Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2008,2010 Intel Corporation |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
| 21 | * IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Eric Anholt <eric@anholt.net> |
| 25 | * Chris Wilson <chris@chris-wilson.co.uk> |
| 26 | * |
| 27 | */ |
| 28 | |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 29 | #include <drm/drmP.h> |
| 30 | #include <drm/i915_drm.h> |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 31 | #include "i915_drv.h" |
| 32 | #include "i915_trace.h" |
| 33 | #include "intel_drv.h" |
Eugeni Dodonov | f45b555 | 2011-12-09 17:16:37 -0800 | [diff] [blame] | 34 | #include <linux/dma_remapping.h> |
David Hildenbrand | 32d8206 | 2015-05-11 17:52:12 +0200 | [diff] [blame] | 35 | #include <linux/uaccess.h> |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 36 | |
Dave Gordon | 9e2793f6 | 2016-07-14 14:52:03 +0100 | [diff] [blame] | 37 | #define __EXEC_OBJECT_HAS_PIN (1<<31) |
| 38 | #define __EXEC_OBJECT_HAS_FENCE (1<<30) |
| 39 | #define __EXEC_OBJECT_NEEDS_MAP (1<<29) |
| 40 | #define __EXEC_OBJECT_NEEDS_BIAS (1<<28) |
| 41 | #define __EXEC_OBJECT_INTERNAL_FLAGS (0xf<<28) /* all of the above */ |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 42 | |
| 43 | #define BATCH_OFFSET_BIAS (256*1024) |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 44 | |
Chris Wilson | 5b043f4 | 2016-08-02 22:50:38 +0100 | [diff] [blame] | 45 | struct i915_execbuffer_params { |
| 46 | struct drm_device *dev; |
| 47 | struct drm_file *file; |
| 48 | u32 dispatch_flags; |
| 49 | u32 args_batch_start_offset; |
| 50 | u32 batch_obj_vm_offset; |
| 51 | struct intel_engine_cs *engine; |
| 52 | struct drm_i915_gem_object *batch_obj; |
| 53 | struct i915_gem_context *ctx; |
| 54 | struct drm_i915_gem_request *request; |
| 55 | }; |
| 56 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 57 | struct eb_vmas { |
| 58 | struct list_head vmas; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 59 | int and; |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 60 | union { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 61 | struct i915_vma *lut[0]; |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 62 | struct hlist_head buckets[0]; |
| 63 | }; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 64 | }; |
| 65 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 66 | static struct eb_vmas * |
Ben Widawsky | 17601cbc | 2013-11-25 09:54:38 -0800 | [diff] [blame] | 67 | eb_create(struct drm_i915_gem_execbuffer2 *args) |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 68 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 69 | struct eb_vmas *eb = NULL; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 70 | |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 71 | if (args->flags & I915_EXEC_HANDLE_LUT) { |
Daniel Vetter | b205ca5 | 2013-09-19 14:00:11 +0200 | [diff] [blame] | 72 | unsigned size = args->buffer_count; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 73 | size *= sizeof(struct i915_vma *); |
| 74 | size += sizeof(struct eb_vmas); |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 75 | eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY); |
| 76 | } |
| 77 | |
| 78 | if (eb == NULL) { |
Daniel Vetter | b205ca5 | 2013-09-19 14:00:11 +0200 | [diff] [blame] | 79 | unsigned size = args->buffer_count; |
| 80 | unsigned count = PAGE_SIZE / sizeof(struct hlist_head) / 2; |
Lauri Kasanen | 27b7c63 | 2013-03-27 15:04:55 +0200 | [diff] [blame] | 81 | BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head)); |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 82 | while (count > 2*size) |
| 83 | count >>= 1; |
| 84 | eb = kzalloc(count*sizeof(struct hlist_head) + |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 85 | sizeof(struct eb_vmas), |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 86 | GFP_TEMPORARY); |
| 87 | if (eb == NULL) |
| 88 | return eb; |
| 89 | |
| 90 | eb->and = count - 1; |
| 91 | } else |
| 92 | eb->and = -args->buffer_count; |
| 93 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 94 | INIT_LIST_HEAD(&eb->vmas); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 95 | return eb; |
| 96 | } |
| 97 | |
| 98 | static void |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 99 | eb_reset(struct eb_vmas *eb) |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 100 | { |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 101 | if (eb->and >= 0) |
| 102 | memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head)); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 105 | static int |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 106 | eb_lookup_vmas(struct eb_vmas *eb, |
| 107 | struct drm_i915_gem_exec_object2 *exec, |
| 108 | const struct drm_i915_gem_execbuffer2 *args, |
| 109 | struct i915_address_space *vm, |
| 110 | struct drm_file *file) |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 111 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 112 | struct drm_i915_gem_object *obj; |
| 113 | struct list_head objects; |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 114 | int i, ret; |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 115 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 116 | INIT_LIST_HEAD(&objects); |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 117 | spin_lock(&file->table_lock); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 118 | /* Grab a reference to the object and release the lock so we can lookup |
| 119 | * or create the VMA without using GFP_ATOMIC */ |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 120 | for (i = 0; i < args->buffer_count; i++) { |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 121 | obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle)); |
| 122 | if (obj == NULL) { |
| 123 | spin_unlock(&file->table_lock); |
| 124 | DRM_DEBUG("Invalid object handle %d at index %d\n", |
| 125 | exec[i].handle, i); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 126 | ret = -ENOENT; |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 127 | goto err; |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 128 | } |
| 129 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 130 | if (!list_empty(&obj->obj_exec_link)) { |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 131 | spin_unlock(&file->table_lock); |
| 132 | DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n", |
| 133 | obj, exec[i].handle, i); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 134 | ret = -EINVAL; |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 135 | goto err; |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 136 | } |
| 137 | |
Chris Wilson | 25dc556 | 2016-07-20 13:31:52 +0100 | [diff] [blame] | 138 | i915_gem_object_get(obj); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 139 | list_add_tail(&obj->obj_exec_link, &objects); |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 140 | } |
| 141 | spin_unlock(&file->table_lock); |
| 142 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 143 | i = 0; |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 144 | while (!list_empty(&objects)) { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 145 | struct i915_vma *vma; |
Ben Widawsky | 6f65e29 | 2013-12-06 14:10:56 -0800 | [diff] [blame] | 146 | |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 147 | obj = list_first_entry(&objects, |
| 148 | struct drm_i915_gem_object, |
| 149 | obj_exec_link); |
| 150 | |
Daniel Vetter | e656a6c | 2013-08-14 14:14:04 +0200 | [diff] [blame] | 151 | /* |
| 152 | * NOTE: We can leak any vmas created here when something fails |
| 153 | * later on. But that's no issue since vma_unbind can deal with |
| 154 | * vmas which are not actually bound. And since only |
| 155 | * lookup_or_create exists as an interface to get at the vma |
| 156 | * from the (obj, vm) we don't run the risk of creating |
| 157 | * duplicated vmas for the same vm. |
| 158 | */ |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 159 | vma = i915_gem_obj_lookup_or_create_vma(obj, vm); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 160 | if (IS_ERR(vma)) { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 161 | DRM_DEBUG("Failed to lookup VMA\n"); |
| 162 | ret = PTR_ERR(vma); |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 163 | goto err; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 164 | } |
| 165 | |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 166 | /* Transfer ownership from the objects list to the vmas list. */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 167 | list_add_tail(&vma->exec_list, &eb->vmas); |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 168 | list_del_init(&obj->obj_exec_link); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 169 | |
| 170 | vma->exec_entry = &exec[i]; |
| 171 | if (eb->and < 0) { |
| 172 | eb->lut[i] = vma; |
| 173 | } else { |
| 174 | uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle; |
| 175 | vma->exec_handle = handle; |
| 176 | hlist_add_head(&vma->exec_node, |
| 177 | &eb->buckets[handle & eb->and]); |
| 178 | } |
| 179 | ++i; |
| 180 | } |
| 181 | |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 182 | return 0; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 183 | |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 184 | |
| 185 | err: |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 186 | while (!list_empty(&objects)) { |
| 187 | obj = list_first_entry(&objects, |
| 188 | struct drm_i915_gem_object, |
| 189 | obj_exec_link); |
| 190 | list_del_init(&obj->obj_exec_link); |
Chris Wilson | f8c417c | 2016-07-20 13:31:53 +0100 | [diff] [blame] | 191 | i915_gem_object_put(obj); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 192 | } |
Chris Wilson | 9ae9ab5 | 2013-12-04 09:52:58 +0000 | [diff] [blame] | 193 | /* |
| 194 | * Objects already transfered to the vmas list will be unreferenced by |
| 195 | * eb_destroy. |
| 196 | */ |
| 197 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 198 | return ret; |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 199 | } |
| 200 | |
Dave Gordon | 4bfa339 | 2016-07-14 14:52:04 +0100 | [diff] [blame] | 201 | static inline struct i915_vma * |
| 202 | eb_get_batch_vma(struct eb_vmas *eb) |
| 203 | { |
| 204 | /* The batch is always the LAST item in the VMA list */ |
| 205 | struct i915_vma *vma = list_last_entry(&eb->vmas, typeof(*vma), exec_list); |
| 206 | |
| 207 | return vma; |
| 208 | } |
| 209 | |
| 210 | static struct drm_i915_gem_object * |
| 211 | eb_get_batch(struct eb_vmas *eb) |
| 212 | { |
| 213 | struct i915_vma *vma = eb_get_batch_vma(eb); |
| 214 | |
| 215 | /* |
| 216 | * SNA is doing fancy tricks with compressing batch buffers, which leads |
| 217 | * to negative relocation deltas. Usually that works out ok since the |
| 218 | * relocate address is still positive, except when the batch is placed |
| 219 | * very low in the GTT. Ensure this doesn't happen. |
| 220 | * |
| 221 | * Note that actual hangs have only been observed on gen7, but for |
| 222 | * paranoia do it everywhere. |
| 223 | */ |
| 224 | if ((vma->exec_entry->flags & EXEC_OBJECT_PINNED) == 0) |
| 225 | vma->exec_entry->flags |= __EXEC_OBJECT_NEEDS_BIAS; |
| 226 | |
| 227 | return vma->obj; |
| 228 | } |
| 229 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 230 | static struct i915_vma *eb_get_vma(struct eb_vmas *eb, unsigned long handle) |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 231 | { |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 232 | if (eb->and < 0) { |
| 233 | if (handle >= -eb->and) |
| 234 | return NULL; |
| 235 | return eb->lut[handle]; |
| 236 | } else { |
| 237 | struct hlist_head *head; |
Geliang Tang | aa45950 | 2016-01-18 23:54:20 +0800 | [diff] [blame] | 238 | struct i915_vma *vma; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 239 | |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 240 | head = &eb->buckets[handle & eb->and]; |
Geliang Tang | aa45950 | 2016-01-18 23:54:20 +0800 | [diff] [blame] | 241 | hlist_for_each_entry(vma, head, exec_node) { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 242 | if (vma->exec_handle == handle) |
| 243 | return vma; |
Chris Wilson | eef90cc | 2013-01-08 10:53:17 +0000 | [diff] [blame] | 244 | } |
| 245 | return NULL; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 246 | } |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 247 | } |
| 248 | |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 249 | static void |
| 250 | i915_gem_execbuffer_unreserve_vma(struct i915_vma *vma) |
| 251 | { |
| 252 | struct drm_i915_gem_exec_object2 *entry; |
| 253 | struct drm_i915_gem_object *obj = vma->obj; |
| 254 | |
| 255 | if (!drm_mm_node_allocated(&vma->node)) |
| 256 | return; |
| 257 | |
| 258 | entry = vma->exec_entry; |
| 259 | |
| 260 | if (entry->flags & __EXEC_OBJECT_HAS_FENCE) |
| 261 | i915_gem_object_unpin_fence(obj); |
| 262 | |
| 263 | if (entry->flags & __EXEC_OBJECT_HAS_PIN) |
Chris Wilson | 20dfbde | 2016-08-04 16:32:30 +0100 | [diff] [blame^] | 264 | __i915_vma_unpin(vma); |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 265 | |
Chris Wilson | de4e783 | 2015-04-07 16:20:35 +0100 | [diff] [blame] | 266 | entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN); |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 267 | } |
| 268 | |
| 269 | static void eb_destroy(struct eb_vmas *eb) |
| 270 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 271 | while (!list_empty(&eb->vmas)) { |
| 272 | struct i915_vma *vma; |
Chris Wilson | bcffc3f | 2013-01-08 10:53:15 +0000 | [diff] [blame] | 273 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 274 | vma = list_first_entry(&eb->vmas, |
| 275 | struct i915_vma, |
Chris Wilson | bcffc3f | 2013-01-08 10:53:15 +0000 | [diff] [blame] | 276 | exec_list); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 277 | list_del_init(&vma->exec_list); |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 278 | i915_gem_execbuffer_unreserve_vma(vma); |
Chris Wilson | f8c417c | 2016-07-20 13:31:53 +0100 | [diff] [blame] | 279 | i915_gem_object_put(vma->obj); |
Chris Wilson | bcffc3f | 2013-01-08 10:53:15 +0000 | [diff] [blame] | 280 | } |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 281 | kfree(eb); |
| 282 | } |
| 283 | |
Chris Wilson | dabdfe0 | 2012-03-26 10:10:27 +0200 | [diff] [blame] | 284 | static inline int use_cpu_reloc(struct drm_i915_gem_object *obj) |
| 285 | { |
Chris Wilson | 2cc86b8 | 2013-08-26 19:51:00 -0300 | [diff] [blame] | 286 | return (HAS_LLC(obj->base.dev) || |
| 287 | obj->base.write_domain == I915_GEM_DOMAIN_CPU || |
Chris Wilson | dabdfe0 | 2012-03-26 10:10:27 +0200 | [diff] [blame] | 288 | obj->cache_level != I915_CACHE_NONE); |
| 289 | } |
| 290 | |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 291 | /* Used to convert any address to canonical form. |
| 292 | * Starting from gen8, some commands (e.g. STATE_BASE_ADDRESS, |
| 293 | * MI_LOAD_REGISTER_MEM and others, see Broadwell PRM Vol2a) require the |
| 294 | * addresses to be in a canonical form: |
| 295 | * "GraphicsAddress[63:48] are ignored by the HW and assumed to be in correct |
| 296 | * canonical form [63:48] == [47]." |
| 297 | */ |
| 298 | #define GEN8_HIGH_ADDRESS_BIT 47 |
| 299 | static inline uint64_t gen8_canonical_addr(uint64_t address) |
| 300 | { |
| 301 | return sign_extend64(address, GEN8_HIGH_ADDRESS_BIT); |
| 302 | } |
| 303 | |
| 304 | static inline uint64_t gen8_noncanonical_addr(uint64_t address) |
| 305 | { |
| 306 | return address & ((1ULL << (GEN8_HIGH_ADDRESS_BIT + 1)) - 1); |
| 307 | } |
| 308 | |
| 309 | static inline uint64_t |
| 310 | relocation_target(struct drm_i915_gem_relocation_entry *reloc, |
| 311 | uint64_t target_offset) |
| 312 | { |
| 313 | return gen8_canonical_addr((int)reloc->delta + target_offset); |
| 314 | } |
| 315 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 316 | static int |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 317 | relocate_entry_cpu(struct drm_i915_gem_object *obj, |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 318 | struct drm_i915_gem_relocation_entry *reloc, |
| 319 | uint64_t target_offset) |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 320 | { |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 321 | struct drm_device *dev = obj->base.dev; |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 322 | uint32_t page_offset = offset_in_page(reloc->offset); |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 323 | uint64_t delta = relocation_target(reloc, target_offset); |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 324 | char *vaddr; |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 325 | int ret; |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 326 | |
Chris Wilson | 2cc86b8 | 2013-08-26 19:51:00 -0300 | [diff] [blame] | 327 | ret = i915_gem_object_set_to_cpu_domain(obj, true); |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 328 | if (ret) |
| 329 | return ret; |
| 330 | |
Dave Gordon | 033908a | 2015-12-10 18:51:23 +0000 | [diff] [blame] | 331 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 332 | reloc->offset >> PAGE_SHIFT)); |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 333 | *(uint32_t *)(vaddr + page_offset) = lower_32_bits(delta); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 334 | |
| 335 | if (INTEL_INFO(dev)->gen >= 8) { |
| 336 | page_offset = offset_in_page(page_offset + sizeof(uint32_t)); |
| 337 | |
| 338 | if (page_offset == 0) { |
| 339 | kunmap_atomic(vaddr); |
Dave Gordon | 033908a | 2015-12-10 18:51:23 +0000 | [diff] [blame] | 340 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 341 | (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT)); |
| 342 | } |
| 343 | |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 344 | *(uint32_t *)(vaddr + page_offset) = upper_32_bits(delta); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 345 | } |
| 346 | |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 347 | kunmap_atomic(vaddr); |
| 348 | |
| 349 | return 0; |
| 350 | } |
| 351 | |
| 352 | static int |
| 353 | relocate_entry_gtt(struct drm_i915_gem_object *obj, |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 354 | struct drm_i915_gem_relocation_entry *reloc, |
| 355 | uint64_t target_offset) |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 356 | { |
| 357 | struct drm_device *dev = obj->base.dev; |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 358 | struct drm_i915_private *dev_priv = to_i915(dev); |
| 359 | struct i915_ggtt *ggtt = &dev_priv->ggtt; |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 360 | uint64_t delta = relocation_target(reloc, target_offset); |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 361 | uint64_t offset; |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 362 | void __iomem *reloc_page; |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 363 | int ret; |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 364 | |
| 365 | ret = i915_gem_object_set_to_gtt_domain(obj, true); |
| 366 | if (ret) |
| 367 | return ret; |
| 368 | |
| 369 | ret = i915_gem_object_put_fence(obj); |
| 370 | if (ret) |
| 371 | return ret; |
| 372 | |
| 373 | /* Map the page containing the relocation we're going to perform. */ |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 374 | offset = i915_gem_obj_ggtt_offset(obj); |
| 375 | offset += reloc->offset; |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 376 | reloc_page = io_mapping_map_atomic_wc(ggtt->mappable, |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 377 | offset & PAGE_MASK); |
| 378 | iowrite32(lower_32_bits(delta), reloc_page + offset_in_page(offset)); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 379 | |
| 380 | if (INTEL_INFO(dev)->gen >= 8) { |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 381 | offset += sizeof(uint32_t); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 382 | |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 383 | if (offset_in_page(offset) == 0) { |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 384 | io_mapping_unmap_atomic(reloc_page); |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 385 | reloc_page = |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 386 | io_mapping_map_atomic_wc(ggtt->mappable, |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 387 | offset); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 388 | } |
| 389 | |
Chris Wilson | 906843c | 2014-08-10 06:29:11 +0100 | [diff] [blame] | 390 | iowrite32(upper_32_bits(delta), |
| 391 | reloc_page + offset_in_page(offset)); |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 392 | } |
| 393 | |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 394 | io_mapping_unmap_atomic(reloc_page); |
| 395 | |
| 396 | return 0; |
| 397 | } |
| 398 | |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 399 | static void |
| 400 | clflush_write32(void *addr, uint32_t value) |
| 401 | { |
| 402 | /* This is not a fast path, so KISS. */ |
| 403 | drm_clflush_virt_range(addr, sizeof(uint32_t)); |
| 404 | *(uint32_t *)addr = value; |
| 405 | drm_clflush_virt_range(addr, sizeof(uint32_t)); |
| 406 | } |
| 407 | |
| 408 | static int |
| 409 | relocate_entry_clflush(struct drm_i915_gem_object *obj, |
| 410 | struct drm_i915_gem_relocation_entry *reloc, |
| 411 | uint64_t target_offset) |
| 412 | { |
| 413 | struct drm_device *dev = obj->base.dev; |
| 414 | uint32_t page_offset = offset_in_page(reloc->offset); |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 415 | uint64_t delta = relocation_target(reloc, target_offset); |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 416 | char *vaddr; |
| 417 | int ret; |
| 418 | |
| 419 | ret = i915_gem_object_set_to_gtt_domain(obj, true); |
| 420 | if (ret) |
| 421 | return ret; |
| 422 | |
Dave Gordon | 033908a | 2015-12-10 18:51:23 +0000 | [diff] [blame] | 423 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 424 | reloc->offset >> PAGE_SHIFT)); |
| 425 | clflush_write32(vaddr + page_offset, lower_32_bits(delta)); |
| 426 | |
| 427 | if (INTEL_INFO(dev)->gen >= 8) { |
| 428 | page_offset = offset_in_page(page_offset + sizeof(uint32_t)); |
| 429 | |
| 430 | if (page_offset == 0) { |
| 431 | kunmap_atomic(vaddr); |
Dave Gordon | 033908a | 2015-12-10 18:51:23 +0000 | [diff] [blame] | 432 | vaddr = kmap_atomic(i915_gem_object_get_dirty_page(obj, |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 433 | (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT)); |
| 434 | } |
| 435 | |
| 436 | clflush_write32(vaddr + page_offset, upper_32_bits(delta)); |
| 437 | } |
| 438 | |
| 439 | kunmap_atomic(vaddr); |
| 440 | |
| 441 | return 0; |
| 442 | } |
| 443 | |
Chris Wilson | 909d074 | 2016-08-04 07:52:41 +0100 | [diff] [blame] | 444 | static bool object_is_idle(struct drm_i915_gem_object *obj) |
| 445 | { |
| 446 | unsigned long active = obj->active; |
| 447 | int idx; |
| 448 | |
| 449 | for_each_active(active, idx) { |
| 450 | if (!i915_gem_active_is_idle(&obj->last_read[idx], |
| 451 | &obj->base.dev->struct_mutex)) |
| 452 | return false; |
| 453 | } |
| 454 | |
| 455 | return true; |
| 456 | } |
| 457 | |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 458 | static int |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 459 | i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj, |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 460 | struct eb_vmas *eb, |
Ben Widawsky | 3e7a032 | 2013-12-06 14:10:57 -0800 | [diff] [blame] | 461 | struct drm_i915_gem_relocation_entry *reloc) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 462 | { |
| 463 | struct drm_device *dev = obj->base.dev; |
| 464 | struct drm_gem_object *target_obj; |
Daniel Vetter | 149c840 | 2012-02-15 23:50:23 +0100 | [diff] [blame] | 465 | struct drm_i915_gem_object *target_i915_obj; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 466 | struct i915_vma *target_vma; |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 467 | uint64_t target_offset; |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 468 | int ret; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 469 | |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 470 | /* we've already hold a reference to all valid objects */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 471 | target_vma = eb_get_vma(eb, reloc->target_handle); |
| 472 | if (unlikely(target_vma == NULL)) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 473 | return -ENOENT; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 474 | target_i915_obj = target_vma->obj; |
| 475 | target_obj = &target_vma->obj->base; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 476 | |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 477 | target_offset = gen8_canonical_addr(target_vma->node.start); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 478 | |
Eric Anholt | e844b99 | 2012-07-31 15:35:01 -0700 | [diff] [blame] | 479 | /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and |
| 480 | * pipe_control writes because the gpu doesn't properly redirect them |
| 481 | * through the ppgtt for non_secure batchbuffers. */ |
| 482 | if (unlikely(IS_GEN6(dev) && |
Daniel Vetter | 0875546 | 2015-04-20 09:04:05 -0700 | [diff] [blame] | 483 | reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION)) { |
Tvrtko Ursulin | fe14d5f | 2014-12-10 17:27:58 +0000 | [diff] [blame] | 484 | ret = i915_vma_bind(target_vma, target_i915_obj->cache_level, |
Daniel Vetter | 0875546 | 2015-04-20 09:04:05 -0700 | [diff] [blame] | 485 | PIN_GLOBAL); |
Tvrtko Ursulin | fe14d5f | 2014-12-10 17:27:58 +0000 | [diff] [blame] | 486 | if (WARN_ONCE(ret, "Unexpected failure to bind target VMA!")) |
| 487 | return ret; |
| 488 | } |
Eric Anholt | e844b99 | 2012-07-31 15:35:01 -0700 | [diff] [blame] | 489 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 490 | /* Validate that the target is in a valid r/w GPU domain */ |
Chris Wilson | b8f7ab1 | 2010-12-08 10:43:06 +0000 | [diff] [blame] | 491 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 492 | DRM_DEBUG("reloc with multiple write domains: " |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 493 | "obj %p target %d offset %d " |
| 494 | "read %08x write %08x", |
| 495 | obj, reloc->target_handle, |
| 496 | (int) reloc->offset, |
| 497 | reloc->read_domains, |
| 498 | reloc->write_domain); |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 499 | return -EINVAL; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 500 | } |
Daniel Vetter | 4ca4a25 | 2011-12-14 13:57:27 +0100 | [diff] [blame] | 501 | if (unlikely((reloc->write_domain | reloc->read_domains) |
| 502 | & ~I915_GEM_GPU_DOMAINS)) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 503 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 504 | "obj %p target %d offset %d " |
| 505 | "read %08x write %08x", |
| 506 | obj, reloc->target_handle, |
| 507 | (int) reloc->offset, |
| 508 | reloc->read_domains, |
| 509 | reloc->write_domain); |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 510 | return -EINVAL; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 511 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 512 | |
| 513 | target_obj->pending_read_domains |= reloc->read_domains; |
| 514 | target_obj->pending_write_domain |= reloc->write_domain; |
| 515 | |
| 516 | /* If the relocation already has the right value in it, no |
| 517 | * more work needs to be done. |
| 518 | */ |
| 519 | if (target_offset == reloc->presumed_offset) |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 520 | return 0; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 521 | |
| 522 | /* Check that the relocation address is valid... */ |
Ben Widawsky | 3c94cee | 2013-11-02 21:07:11 -0700 | [diff] [blame] | 523 | if (unlikely(reloc->offset > |
| 524 | obj->base.size - (INTEL_INFO(dev)->gen >= 8 ? 8 : 4))) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 525 | DRM_DEBUG("Relocation beyond object bounds: " |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 526 | "obj %p target %d offset %d size %d.\n", |
| 527 | obj, reloc->target_handle, |
| 528 | (int) reloc->offset, |
| 529 | (int) obj->base.size); |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 530 | return -EINVAL; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 531 | } |
Chris Wilson | b8f7ab1 | 2010-12-08 10:43:06 +0000 | [diff] [blame] | 532 | if (unlikely(reloc->offset & 3)) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 533 | DRM_DEBUG("Relocation not 4-byte aligned: " |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 534 | "obj %p target %d offset %d.\n", |
| 535 | obj, reloc->target_handle, |
| 536 | (int) reloc->offset); |
Ben Widawsky | 8b78f0e | 2013-12-26 13:39:50 -0800 | [diff] [blame] | 537 | return -EINVAL; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 538 | } |
| 539 | |
Chris Wilson | dabdfe0 | 2012-03-26 10:10:27 +0200 | [diff] [blame] | 540 | /* We can't wait for rendering with pagefaults disabled */ |
Chris Wilson | 909d074 | 2016-08-04 07:52:41 +0100 | [diff] [blame] | 541 | if (pagefault_disabled() && !object_is_idle(obj)) |
Chris Wilson | dabdfe0 | 2012-03-26 10:10:27 +0200 | [diff] [blame] | 542 | return -EFAULT; |
| 543 | |
Rafael Barbalho | 5032d87 | 2013-08-21 17:10:51 +0100 | [diff] [blame] | 544 | if (use_cpu_reloc(obj)) |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 545 | ret = relocate_entry_cpu(obj, reloc, target_offset); |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 546 | else if (obj->map_and_fenceable) |
Ben Widawsky | d9ceb95 | 2014-04-28 17:18:28 -0700 | [diff] [blame] | 547 | ret = relocate_entry_gtt(obj, reloc, target_offset); |
Borislav Petkov | 906bf7f | 2016-03-29 17:41:59 +0200 | [diff] [blame] | 548 | else if (static_cpu_has(X86_FEATURE_CLFLUSH)) |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 549 | ret = relocate_entry_clflush(obj, reloc, target_offset); |
| 550 | else { |
| 551 | WARN_ONCE(1, "Impossible case in relocation handling\n"); |
| 552 | ret = -ENODEV; |
| 553 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 554 | |
Daniel Vetter | d4d3601 | 2013-09-02 20:56:23 +0200 | [diff] [blame] | 555 | if (ret) |
| 556 | return ret; |
| 557 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 558 | /* and update the user's relocation entry */ |
| 559 | reloc->presumed_offset = target_offset; |
| 560 | |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 561 | return 0; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 562 | } |
| 563 | |
| 564 | static int |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 565 | i915_gem_execbuffer_relocate_vma(struct i915_vma *vma, |
| 566 | struct eb_vmas *eb) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 567 | { |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 568 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
| 569 | struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(512)]; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 570 | struct drm_i915_gem_relocation_entry __user *user_relocs; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 571 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 572 | int remain, ret; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 573 | |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 574 | user_relocs = u64_to_user_ptr(entry->relocs_ptr); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 575 | |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 576 | remain = entry->relocation_count; |
| 577 | while (remain) { |
| 578 | struct drm_i915_gem_relocation_entry *r = stack_reloc; |
| 579 | int count = remain; |
| 580 | if (count > ARRAY_SIZE(stack_reloc)) |
| 581 | count = ARRAY_SIZE(stack_reloc); |
| 582 | remain -= count; |
| 583 | |
| 584 | if (__copy_from_user_inatomic(r, user_relocs, count*sizeof(r[0]))) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 585 | return -EFAULT; |
| 586 | |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 587 | do { |
| 588 | u64 offset = r->presumed_offset; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 589 | |
Ben Widawsky | 3e7a032 | 2013-12-06 14:10:57 -0800 | [diff] [blame] | 590 | ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, r); |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 591 | if (ret) |
| 592 | return ret; |
| 593 | |
| 594 | if (r->presumed_offset != offset && |
Linus Torvalds | 5b09c3e | 2016-05-22 14:19:37 -0700 | [diff] [blame] | 595 | __put_user(r->presumed_offset, &user_relocs->presumed_offset)) { |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 596 | return -EFAULT; |
| 597 | } |
| 598 | |
| 599 | user_relocs++; |
| 600 | r++; |
| 601 | } while (--count); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 602 | } |
| 603 | |
| 604 | return 0; |
Chris Wilson | 1d83f44 | 2012-03-24 20:12:53 +0000 | [diff] [blame] | 605 | #undef N_RELOC |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 606 | } |
| 607 | |
| 608 | static int |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 609 | i915_gem_execbuffer_relocate_vma_slow(struct i915_vma *vma, |
| 610 | struct eb_vmas *eb, |
| 611 | struct drm_i915_gem_relocation_entry *relocs) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 612 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 613 | const struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 614 | int i, ret; |
| 615 | |
| 616 | for (i = 0; i < entry->relocation_count; i++) { |
Ben Widawsky | 3e7a032 | 2013-12-06 14:10:57 -0800 | [diff] [blame] | 617 | ret = i915_gem_execbuffer_relocate_entry(vma->obj, eb, &relocs[i]); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 618 | if (ret) |
| 619 | return ret; |
| 620 | } |
| 621 | |
| 622 | return 0; |
| 623 | } |
| 624 | |
| 625 | static int |
Ben Widawsky | 17601cbc | 2013-11-25 09:54:38 -0800 | [diff] [blame] | 626 | i915_gem_execbuffer_relocate(struct eb_vmas *eb) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 627 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 628 | struct i915_vma *vma; |
Chris Wilson | d4aeee7 | 2011-03-14 15:11:24 +0000 | [diff] [blame] | 629 | int ret = 0; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 630 | |
Chris Wilson | d4aeee7 | 2011-03-14 15:11:24 +0000 | [diff] [blame] | 631 | /* This is the fast path and we cannot handle a pagefault whilst |
| 632 | * holding the struct mutex lest the user pass in the relocations |
| 633 | * contained within a mmaped bo. For in such a case we, the page |
| 634 | * fault handler would call i915_gem_fault() and we would try to |
| 635 | * acquire the struct mutex again. Obviously this is bad and so |
| 636 | * lockdep complains vehemently. |
| 637 | */ |
| 638 | pagefault_disable(); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 639 | list_for_each_entry(vma, &eb->vmas, exec_list) { |
| 640 | ret = i915_gem_execbuffer_relocate_vma(vma, eb); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 641 | if (ret) |
Chris Wilson | d4aeee7 | 2011-03-14 15:11:24 +0000 | [diff] [blame] | 642 | break; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 643 | } |
Chris Wilson | d4aeee7 | 2011-03-14 15:11:24 +0000 | [diff] [blame] | 644 | pagefault_enable(); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 645 | |
Chris Wilson | d4aeee7 | 2011-03-14 15:11:24 +0000 | [diff] [blame] | 646 | return ret; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 647 | } |
| 648 | |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 649 | static bool only_mappable_for_reloc(unsigned int flags) |
| 650 | { |
| 651 | return (flags & (EXEC_OBJECT_NEEDS_FENCE | __EXEC_OBJECT_NEEDS_MAP)) == |
| 652 | __EXEC_OBJECT_NEEDS_MAP; |
| 653 | } |
| 654 | |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 655 | static int |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 656 | i915_gem_execbuffer_reserve_vma(struct i915_vma *vma, |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 657 | struct intel_engine_cs *engine, |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 658 | bool *need_reloc) |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 659 | { |
Ben Widawsky | 6f65e29 | 2013-12-06 14:10:56 -0800 | [diff] [blame] | 660 | struct drm_i915_gem_object *obj = vma->obj; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 661 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 662 | uint64_t flags; |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 663 | int ret; |
| 664 | |
Daniel Vetter | 0875546 | 2015-04-20 09:04:05 -0700 | [diff] [blame] | 665 | flags = PIN_USER; |
Daniel Vetter | 0229da3 | 2015-04-14 19:01:54 +0200 | [diff] [blame] | 666 | if (entry->flags & EXEC_OBJECT_NEEDS_GTT) |
| 667 | flags |= PIN_GLOBAL; |
| 668 | |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 669 | if (!drm_mm_node_allocated(&vma->node)) { |
Michel Thierry | 101b506 | 2015-10-01 13:33:57 +0100 | [diff] [blame] | 670 | /* Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset, |
| 671 | * limit address to the first 4GBs for unflagged objects. |
| 672 | */ |
| 673 | if ((entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) == 0) |
| 674 | flags |= PIN_ZONE_4G; |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 675 | if (entry->flags & __EXEC_OBJECT_NEEDS_MAP) |
| 676 | flags |= PIN_GLOBAL | PIN_MAPPABLE; |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 677 | if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS) |
| 678 | flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 679 | if (entry->flags & EXEC_OBJECT_PINNED) |
| 680 | flags |= entry->offset | PIN_OFFSET_FIXED; |
Michel Thierry | 101b506 | 2015-10-01 13:33:57 +0100 | [diff] [blame] | 681 | if ((flags & PIN_MAPPABLE) == 0) |
| 682 | flags |= PIN_HIGH; |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 683 | } |
Daniel Vetter | 1ec9e26 | 2014-02-14 14:01:11 +0100 | [diff] [blame] | 684 | |
Chris Wilson | 91b2db6 | 2016-08-04 16:32:23 +0100 | [diff] [blame] | 685 | ret = i915_gem_object_pin(obj, vma->vm, |
| 686 | entry->pad_to_size, |
| 687 | entry->alignment, |
| 688 | flags); |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 689 | if ((ret == -ENOSPC || ret == -E2BIG) && |
| 690 | only_mappable_for_reloc(entry->flags)) |
| 691 | ret = i915_gem_object_pin(obj, vma->vm, |
Chris Wilson | 91b2db6 | 2016-08-04 16:32:23 +0100 | [diff] [blame] | 692 | entry->pad_to_size, |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 693 | entry->alignment, |
Daniel Vetter | 0229da3 | 2015-04-14 19:01:54 +0200 | [diff] [blame] | 694 | flags & ~PIN_MAPPABLE); |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 695 | if (ret) |
| 696 | return ret; |
| 697 | |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 698 | entry->flags |= __EXEC_OBJECT_HAS_PIN; |
| 699 | |
Chris Wilson | 82b6b6d | 2014-08-09 17:37:24 +0100 | [diff] [blame] | 700 | if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) { |
| 701 | ret = i915_gem_object_get_fence(obj); |
| 702 | if (ret) |
| 703 | return ret; |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 704 | |
Chris Wilson | 82b6b6d | 2014-08-09 17:37:24 +0100 | [diff] [blame] | 705 | if (i915_gem_object_pin_fence(obj)) |
| 706 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 707 | } |
| 708 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 709 | if (entry->offset != vma->node.start) { |
| 710 | entry->offset = vma->node.start; |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 711 | *need_reloc = true; |
| 712 | } |
| 713 | |
| 714 | if (entry->flags & EXEC_OBJECT_WRITE) { |
| 715 | obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER; |
| 716 | obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER; |
| 717 | } |
| 718 | |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 719 | return 0; |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 720 | } |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 721 | |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 722 | static bool |
Chris Wilson | e6a8446 | 2014-08-11 12:00:12 +0200 | [diff] [blame] | 723 | need_reloc_mappable(struct i915_vma *vma) |
| 724 | { |
| 725 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
| 726 | |
| 727 | if (entry->relocation_count == 0) |
| 728 | return false; |
| 729 | |
Chris Wilson | 596c592 | 2016-02-26 11:03:20 +0000 | [diff] [blame] | 730 | if (!vma->is_ggtt) |
Chris Wilson | e6a8446 | 2014-08-11 12:00:12 +0200 | [diff] [blame] | 731 | return false; |
| 732 | |
| 733 | /* See also use_cpu_reloc() */ |
| 734 | if (HAS_LLC(vma->obj->base.dev)) |
| 735 | return false; |
| 736 | |
| 737 | if (vma->obj->base.write_domain == I915_GEM_DOMAIN_CPU) |
| 738 | return false; |
| 739 | |
| 740 | return true; |
| 741 | } |
| 742 | |
| 743 | static bool |
| 744 | eb_vma_misplaced(struct i915_vma *vma) |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 745 | { |
| 746 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
| 747 | struct drm_i915_gem_object *obj = vma->obj; |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 748 | |
Chris Wilson | 596c592 | 2016-02-26 11:03:20 +0000 | [diff] [blame] | 749 | WARN_ON(entry->flags & __EXEC_OBJECT_NEEDS_MAP && !vma->is_ggtt); |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 750 | |
| 751 | if (entry->alignment && |
| 752 | vma->node.start & (entry->alignment - 1)) |
| 753 | return true; |
| 754 | |
Chris Wilson | 91b2db6 | 2016-08-04 16:32:23 +0100 | [diff] [blame] | 755 | if (vma->node.size < entry->pad_to_size) |
| 756 | return true; |
| 757 | |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 758 | if (entry->flags & EXEC_OBJECT_PINNED && |
| 759 | vma->node.start != entry->offset) |
| 760 | return true; |
| 761 | |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 762 | if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS && |
| 763 | vma->node.start < BATCH_OFFSET_BIAS) |
| 764 | return true; |
| 765 | |
Chris Wilson | edf4427 | 2015-01-14 11:20:56 +0000 | [diff] [blame] | 766 | /* avoid costly ping-pong once a batch bo ended up non-mappable */ |
| 767 | if (entry->flags & __EXEC_OBJECT_NEEDS_MAP && !obj->map_and_fenceable) |
| 768 | return !only_mappable_for_reloc(entry->flags); |
| 769 | |
Michel Thierry | 101b506 | 2015-10-01 13:33:57 +0100 | [diff] [blame] | 770 | if ((entry->flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) == 0 && |
| 771 | (vma->node.start + vma->node.size - 1) >> 32) |
| 772 | return true; |
| 773 | |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 774 | return false; |
| 775 | } |
| 776 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 777 | static int |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 778 | i915_gem_execbuffer_reserve(struct intel_engine_cs *engine, |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 779 | struct list_head *vmas, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 780 | struct i915_gem_context *ctx, |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 781 | bool *need_relocs) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 782 | { |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 783 | struct drm_i915_gem_object *obj; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 784 | struct i915_vma *vma; |
Ben Widawsky | 68c8c17 | 2013-09-11 14:57:50 -0700 | [diff] [blame] | 785 | struct i915_address_space *vm; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 786 | struct list_head ordered_vmas; |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 787 | struct list_head pinned_vmas; |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 788 | bool has_fenced_gpu_access = INTEL_GEN(engine->i915) < 4; |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 789 | int retry; |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 790 | |
Ben Widawsky | 68c8c17 | 2013-09-11 14:57:50 -0700 | [diff] [blame] | 791 | vm = list_first_entry(vmas, struct i915_vma, exec_list)->vm; |
| 792 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 793 | INIT_LIST_HEAD(&ordered_vmas); |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 794 | INIT_LIST_HEAD(&pinned_vmas); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 795 | while (!list_empty(vmas)) { |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 796 | struct drm_i915_gem_exec_object2 *entry; |
| 797 | bool need_fence, need_mappable; |
| 798 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 799 | vma = list_first_entry(vmas, struct i915_vma, exec_list); |
| 800 | obj = vma->obj; |
| 801 | entry = vma->exec_entry; |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 802 | |
David Weinehall | b1b3827 | 2015-05-20 17:00:13 +0300 | [diff] [blame] | 803 | if (ctx->flags & CONTEXT_NO_ZEROMAP) |
| 804 | entry->flags |= __EXEC_OBJECT_NEEDS_BIAS; |
| 805 | |
Chris Wilson | 82b6b6d | 2014-08-09 17:37:24 +0100 | [diff] [blame] | 806 | if (!has_fenced_gpu_access) |
| 807 | entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE; |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 808 | need_fence = |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 809 | entry->flags & EXEC_OBJECT_NEEDS_FENCE && |
| 810 | obj->tiling_mode != I915_TILING_NONE; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 811 | need_mappable = need_fence || need_reloc_mappable(vma); |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 812 | |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 813 | if (entry->flags & EXEC_OBJECT_PINNED) |
| 814 | list_move_tail(&vma->exec_list, &pinned_vmas); |
| 815 | else if (need_mappable) { |
Chris Wilson | e6a8446 | 2014-08-11 12:00:12 +0200 | [diff] [blame] | 816 | entry->flags |= __EXEC_OBJECT_NEEDS_MAP; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 817 | list_move(&vma->exec_list, &ordered_vmas); |
Chris Wilson | e6a8446 | 2014-08-11 12:00:12 +0200 | [diff] [blame] | 818 | } else |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 819 | list_move_tail(&vma->exec_list, &ordered_vmas); |
Chris Wilson | 595dad7 | 2011-01-13 11:03:48 +0000 | [diff] [blame] | 820 | |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 821 | obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND; |
Chris Wilson | 595dad7 | 2011-01-13 11:03:48 +0000 | [diff] [blame] | 822 | obj->base.pending_write_domain = 0; |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 823 | } |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 824 | list_splice(&ordered_vmas, vmas); |
Chris Wilson | 506a8e8 | 2015-12-08 11:55:07 +0000 | [diff] [blame] | 825 | list_splice(&pinned_vmas, vmas); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 826 | |
| 827 | /* Attempt to pin all of the buffers into the GTT. |
| 828 | * This is done in 3 phases: |
| 829 | * |
| 830 | * 1a. Unbind all objects that do not match the GTT constraints for |
| 831 | * the execbuffer (fenceable, mappable, alignment etc). |
| 832 | * 1b. Increment pin count for already bound objects. |
| 833 | * 2. Bind new objects. |
| 834 | * 3. Decrement pin count. |
| 835 | * |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 836 | * This avoid unnecessary unbinding of later objects in order to make |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 837 | * room for the earlier objects *unless* we need to defragment. |
| 838 | */ |
| 839 | retry = 0; |
| 840 | do { |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 841 | int ret = 0; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 842 | |
| 843 | /* Unbind any ill-fitting objects or pin. */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 844 | list_for_each_entry(vma, vmas, exec_list) { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 845 | if (!drm_mm_node_allocated(&vma->node)) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 846 | continue; |
| 847 | |
Chris Wilson | e6a8446 | 2014-08-11 12:00:12 +0200 | [diff] [blame] | 848 | if (eb_vma_misplaced(vma)) |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 849 | ret = i915_vma_unbind(vma); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 850 | else |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 851 | ret = i915_gem_execbuffer_reserve_vma(vma, |
| 852 | engine, |
| 853 | need_relocs); |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 854 | if (ret) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 855 | goto err; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 856 | } |
| 857 | |
| 858 | /* Bind fresh objects */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 859 | list_for_each_entry(vma, vmas, exec_list) { |
| 860 | if (drm_mm_node_allocated(&vma->node)) |
Chris Wilson | 1690e1e | 2011-12-14 13:57:08 +0100 | [diff] [blame] | 861 | continue; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 862 | |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 863 | ret = i915_gem_execbuffer_reserve_vma(vma, engine, |
| 864 | need_relocs); |
Chris Wilson | 7788a76 | 2012-08-24 19:18:18 +0100 | [diff] [blame] | 865 | if (ret) |
| 866 | goto err; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 867 | } |
| 868 | |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 869 | err: |
Chris Wilson | 6c085a7 | 2012-08-20 11:40:46 +0200 | [diff] [blame] | 870 | if (ret != -ENOSPC || retry++) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 871 | return ret; |
| 872 | |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 873 | /* Decrement pin count for bound objects */ |
| 874 | list_for_each_entry(vma, vmas, exec_list) |
| 875 | i915_gem_execbuffer_unreserve_vma(vma); |
| 876 | |
Ben Widawsky | 68c8c17 | 2013-09-11 14:57:50 -0700 | [diff] [blame] | 877 | ret = i915_gem_evict_vm(vm, true); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 878 | if (ret) |
| 879 | return ret; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 880 | } while (1); |
| 881 | } |
| 882 | |
| 883 | static int |
| 884 | i915_gem_execbuffer_relocate_slow(struct drm_device *dev, |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 885 | struct drm_i915_gem_execbuffer2 *args, |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 886 | struct drm_file *file, |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 887 | struct intel_engine_cs *engine, |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 888 | struct eb_vmas *eb, |
David Weinehall | b1b3827 | 2015-05-20 17:00:13 +0300 | [diff] [blame] | 889 | struct drm_i915_gem_exec_object2 *exec, |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 890 | struct i915_gem_context *ctx) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 891 | { |
| 892 | struct drm_i915_gem_relocation_entry *reloc; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 893 | struct i915_address_space *vm; |
| 894 | struct i915_vma *vma; |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 895 | bool need_relocs; |
Chris Wilson | dd6864a | 2011-01-12 23:49:13 +0000 | [diff] [blame] | 896 | int *reloc_offset; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 897 | int i, total, ret; |
Daniel Vetter | b205ca5 | 2013-09-19 14:00:11 +0200 | [diff] [blame] | 898 | unsigned count = args->buffer_count; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 899 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 900 | vm = list_first_entry(&eb->vmas, struct i915_vma, exec_list)->vm; |
| 901 | |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 902 | /* We may process another execbuffer during the unlock... */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 903 | while (!list_empty(&eb->vmas)) { |
| 904 | vma = list_first_entry(&eb->vmas, struct i915_vma, exec_list); |
| 905 | list_del_init(&vma->exec_list); |
Chris Wilson | a415d35 | 2013-11-26 11:23:15 +0000 | [diff] [blame] | 906 | i915_gem_execbuffer_unreserve_vma(vma); |
Chris Wilson | f8c417c | 2016-07-20 13:31:53 +0100 | [diff] [blame] | 907 | i915_gem_object_put(vma->obj); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 908 | } |
| 909 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 910 | mutex_unlock(&dev->struct_mutex); |
| 911 | |
| 912 | total = 0; |
| 913 | for (i = 0; i < count; i++) |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 914 | total += exec[i].relocation_count; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 915 | |
Chris Wilson | dd6864a | 2011-01-12 23:49:13 +0000 | [diff] [blame] | 916 | reloc_offset = drm_malloc_ab(count, sizeof(*reloc_offset)); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 917 | reloc = drm_malloc_ab(total, sizeof(*reloc)); |
Chris Wilson | dd6864a | 2011-01-12 23:49:13 +0000 | [diff] [blame] | 918 | if (reloc == NULL || reloc_offset == NULL) { |
| 919 | drm_free_large(reloc); |
| 920 | drm_free_large(reloc_offset); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 921 | mutex_lock(&dev->struct_mutex); |
| 922 | return -ENOMEM; |
| 923 | } |
| 924 | |
| 925 | total = 0; |
| 926 | for (i = 0; i < count; i++) { |
| 927 | struct drm_i915_gem_relocation_entry __user *user_relocs; |
Chris Wilson | 262b6d3 | 2013-01-15 16:17:54 +0000 | [diff] [blame] | 928 | u64 invalid_offset = (u64)-1; |
| 929 | int j; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 930 | |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 931 | user_relocs = u64_to_user_ptr(exec[i].relocs_ptr); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 932 | |
| 933 | if (copy_from_user(reloc+total, user_relocs, |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 934 | exec[i].relocation_count * sizeof(*reloc))) { |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 935 | ret = -EFAULT; |
| 936 | mutex_lock(&dev->struct_mutex); |
| 937 | goto err; |
| 938 | } |
| 939 | |
Chris Wilson | 262b6d3 | 2013-01-15 16:17:54 +0000 | [diff] [blame] | 940 | /* As we do not update the known relocation offsets after |
| 941 | * relocating (due to the complexities in lock handling), |
| 942 | * we need to mark them as invalid now so that we force the |
| 943 | * relocation processing next time. Just in case the target |
| 944 | * object is evicted and then rebound into its old |
| 945 | * presumed_offset before the next execbuffer - if that |
| 946 | * happened we would make the mistake of assuming that the |
| 947 | * relocations were valid. |
| 948 | */ |
| 949 | for (j = 0; j < exec[i].relocation_count; j++) { |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 950 | if (__copy_to_user(&user_relocs[j].presumed_offset, |
| 951 | &invalid_offset, |
| 952 | sizeof(invalid_offset))) { |
Chris Wilson | 262b6d3 | 2013-01-15 16:17:54 +0000 | [diff] [blame] | 953 | ret = -EFAULT; |
| 954 | mutex_lock(&dev->struct_mutex); |
| 955 | goto err; |
| 956 | } |
| 957 | } |
| 958 | |
Chris Wilson | dd6864a | 2011-01-12 23:49:13 +0000 | [diff] [blame] | 959 | reloc_offset[i] = total; |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 960 | total += exec[i].relocation_count; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 961 | } |
| 962 | |
| 963 | ret = i915_mutex_lock_interruptible(dev); |
| 964 | if (ret) { |
| 965 | mutex_lock(&dev->struct_mutex); |
| 966 | goto err; |
| 967 | } |
| 968 | |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 969 | /* reacquire the objects */ |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 970 | eb_reset(eb); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 971 | ret = eb_lookup_vmas(eb, exec, args, vm, file); |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 972 | if (ret) |
| 973 | goto err; |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 974 | |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 975 | need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 976 | ret = i915_gem_execbuffer_reserve(engine, &eb->vmas, ctx, |
| 977 | &need_relocs); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 978 | if (ret) |
| 979 | goto err; |
| 980 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 981 | list_for_each_entry(vma, &eb->vmas, exec_list) { |
| 982 | int offset = vma->exec_entry - exec; |
| 983 | ret = i915_gem_execbuffer_relocate_vma_slow(vma, eb, |
| 984 | reloc + reloc_offset[offset]); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 985 | if (ret) |
| 986 | goto err; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 987 | } |
| 988 | |
| 989 | /* Leave the user relocations as are, this is the painfully slow path, |
| 990 | * and we want to avoid the complication of dropping the lock whilst |
| 991 | * having buffers reserved in the aperture and so causing spurious |
| 992 | * ENOSPC for random operations. |
| 993 | */ |
| 994 | |
| 995 | err: |
| 996 | drm_free_large(reloc); |
Chris Wilson | dd6864a | 2011-01-12 23:49:13 +0000 | [diff] [blame] | 997 | drm_free_large(reloc_offset); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 998 | return ret; |
| 999 | } |
| 1000 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1001 | static int |
John Harrison | 535fbe8 | 2015-05-29 17:43:32 +0100 | [diff] [blame] | 1002 | i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req, |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1003 | struct list_head *vmas) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1004 | { |
Tvrtko Ursulin | 666796d | 2016-03-16 11:00:39 +0000 | [diff] [blame] | 1005 | const unsigned other_rings = ~intel_engine_flag(req->engine); |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1006 | struct i915_vma *vma; |
Daniel Vetter | 6ac42f4 | 2012-07-21 12:25:01 +0200 | [diff] [blame] | 1007 | uint32_t flush_domains = 0; |
Chris Wilson | 000433b | 2013-08-08 14:41:09 +0100 | [diff] [blame] | 1008 | bool flush_chipset = false; |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1009 | int ret; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1010 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1011 | list_for_each_entry(vma, vmas, exec_list) { |
| 1012 | struct drm_i915_gem_object *obj = vma->obj; |
Chris Wilson | 03ade51 | 2015-04-27 13:41:18 +0100 | [diff] [blame] | 1013 | |
| 1014 | if (obj->active & other_rings) { |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 1015 | ret = i915_gem_object_sync(obj, req); |
Chris Wilson | 03ade51 | 2015-04-27 13:41:18 +0100 | [diff] [blame] | 1016 | if (ret) |
| 1017 | return ret; |
| 1018 | } |
Daniel Vetter | 6ac42f4 | 2012-07-21 12:25:01 +0200 | [diff] [blame] | 1019 | |
| 1020 | if (obj->base.write_domain & I915_GEM_DOMAIN_CPU) |
Chris Wilson | 000433b | 2013-08-08 14:41:09 +0100 | [diff] [blame] | 1021 | flush_chipset |= i915_gem_clflush_object(obj, false); |
Daniel Vetter | 6ac42f4 | 2012-07-21 12:25:01 +0200 | [diff] [blame] | 1022 | |
Daniel Vetter | 6ac42f4 | 2012-07-21 12:25:01 +0200 | [diff] [blame] | 1023 | flush_domains |= obj->base.write_domain; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1024 | } |
| 1025 | |
Chris Wilson | 000433b | 2013-08-08 14:41:09 +0100 | [diff] [blame] | 1026 | if (flush_chipset) |
Chris Wilson | c033666 | 2016-05-06 15:40:21 +0100 | [diff] [blame] | 1027 | i915_gem_chipset_flush(req->engine->i915); |
Daniel Vetter | 6ac42f4 | 2012-07-21 12:25:01 +0200 | [diff] [blame] | 1028 | |
| 1029 | if (flush_domains & I915_GEM_DOMAIN_GTT) |
| 1030 | wmb(); |
| 1031 | |
Chris Wilson | c7fe7d2 | 2016-08-02 22:50:24 +0100 | [diff] [blame] | 1032 | /* Unconditionally invalidate GPU caches and TLBs. */ |
Chris Wilson | 7c9cf4e | 2016-08-02 22:50:25 +0100 | [diff] [blame] | 1033 | return req->engine->emit_flush(req, EMIT_INVALIDATE); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1034 | } |
| 1035 | |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1036 | static bool |
| 1037 | i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1038 | { |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1039 | if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS) |
| 1040 | return false; |
| 1041 | |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1042 | /* Kernel clipping was a DRI1 misfeature */ |
| 1043 | if (exec->num_cliprects || exec->cliprects_ptr) |
| 1044 | return false; |
| 1045 | |
| 1046 | if (exec->DR4 == 0xffffffff) { |
| 1047 | DRM_DEBUG("UXA submitting garbage DR4, fixing up\n"); |
| 1048 | exec->DR4 = 0; |
| 1049 | } |
| 1050 | if (exec->DR1 || exec->DR4) |
| 1051 | return false; |
| 1052 | |
| 1053 | if ((exec->batch_start_offset | exec->batch_len) & 0x7) |
| 1054 | return false; |
| 1055 | |
| 1056 | return true; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1057 | } |
| 1058 | |
| 1059 | static int |
Chris Wilson | ad19f10 | 2014-08-10 06:29:08 +0100 | [diff] [blame] | 1060 | validate_exec_list(struct drm_device *dev, |
| 1061 | struct drm_i915_gem_exec_object2 *exec, |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1062 | int count) |
| 1063 | { |
Daniel Vetter | b205ca5 | 2013-09-19 14:00:11 +0200 | [diff] [blame] | 1064 | unsigned relocs_total = 0; |
| 1065 | unsigned relocs_max = UINT_MAX / sizeof(struct drm_i915_gem_relocation_entry); |
Chris Wilson | ad19f10 | 2014-08-10 06:29:08 +0100 | [diff] [blame] | 1066 | unsigned invalid_flags; |
| 1067 | int i; |
| 1068 | |
Dave Gordon | 9e2793f6 | 2016-07-14 14:52:03 +0100 | [diff] [blame] | 1069 | /* INTERNAL flags must not overlap with external ones */ |
| 1070 | BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & ~__EXEC_OBJECT_UNKNOWN_FLAGS); |
| 1071 | |
Chris Wilson | ad19f10 | 2014-08-10 06:29:08 +0100 | [diff] [blame] | 1072 | invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; |
| 1073 | if (USES_FULL_PPGTT(dev)) |
| 1074 | invalid_flags |= EXEC_OBJECT_NEEDS_GTT; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1075 | |
| 1076 | for (i = 0; i < count; i++) { |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 1077 | char __user *ptr = u64_to_user_ptr(exec[i].relocs_ptr); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1078 | int length; /* limited by fault_in_pages_readable() */ |
| 1079 | |
Chris Wilson | ad19f10 | 2014-08-10 06:29:08 +0100 | [diff] [blame] | 1080 | if (exec[i].flags & invalid_flags) |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1081 | return -EINVAL; |
| 1082 | |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 1083 | /* Offset can be used as input (EXEC_OBJECT_PINNED), reject |
| 1084 | * any non-page-aligned or non-canonical addresses. |
| 1085 | */ |
| 1086 | if (exec[i].flags & EXEC_OBJECT_PINNED) { |
| 1087 | if (exec[i].offset != |
| 1088 | gen8_canonical_addr(exec[i].offset & PAGE_MASK)) |
| 1089 | return -EINVAL; |
| 1090 | |
| 1091 | /* From drm_mm perspective address space is continuous, |
| 1092 | * so from this point we're always using non-canonical |
| 1093 | * form internally. |
| 1094 | */ |
| 1095 | exec[i].offset = gen8_noncanonical_addr(exec[i].offset); |
| 1096 | } |
| 1097 | |
Chris Wilson | 55a9785 | 2015-06-19 13:59:46 +0100 | [diff] [blame] | 1098 | if (exec[i].alignment && !is_power_of_2(exec[i].alignment)) |
| 1099 | return -EINVAL; |
| 1100 | |
Chris Wilson | 91b2db6 | 2016-08-04 16:32:23 +0100 | [diff] [blame] | 1101 | /* pad_to_size was once a reserved field, so sanitize it */ |
| 1102 | if (exec[i].flags & EXEC_OBJECT_PAD_TO_SIZE) { |
| 1103 | if (offset_in_page(exec[i].pad_to_size)) |
| 1104 | return -EINVAL; |
| 1105 | } else { |
| 1106 | exec[i].pad_to_size = 0; |
| 1107 | } |
| 1108 | |
Kees Cook | 3118a4f | 2013-03-11 17:31:45 -0700 | [diff] [blame] | 1109 | /* First check for malicious input causing overflow in |
| 1110 | * the worst case where we need to allocate the entire |
| 1111 | * relocation tree as a single array. |
| 1112 | */ |
| 1113 | if (exec[i].relocation_count > relocs_max - relocs_total) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1114 | return -EINVAL; |
Kees Cook | 3118a4f | 2013-03-11 17:31:45 -0700 | [diff] [blame] | 1115 | relocs_total += exec[i].relocation_count; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1116 | |
| 1117 | length = exec[i].relocation_count * |
| 1118 | sizeof(struct drm_i915_gem_relocation_entry); |
Kees Cook | 3058753 | 2013-03-11 14:37:35 -0700 | [diff] [blame] | 1119 | /* |
| 1120 | * We must check that the entire relocation array is safe |
| 1121 | * to read, but since we may need to update the presumed |
| 1122 | * offsets during execution, check for full write access. |
| 1123 | */ |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1124 | if (!access_ok(VERIFY_WRITE, ptr, length)) |
| 1125 | return -EFAULT; |
| 1126 | |
Jani Nikula | d330a95 | 2014-01-21 11:24:25 +0200 | [diff] [blame] | 1127 | if (likely(!i915.prefault_disable)) { |
Xiong Zhang | 0b74b50 | 2013-07-19 13:51:24 +0800 | [diff] [blame] | 1128 | if (fault_in_multipages_readable(ptr, length)) |
| 1129 | return -EFAULT; |
| 1130 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1131 | } |
| 1132 | |
| 1133 | return 0; |
| 1134 | } |
| 1135 | |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 1136 | static struct i915_gem_context * |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1137 | i915_gem_validate_context(struct drm_device *dev, struct drm_file *file, |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1138 | struct intel_engine_cs *engine, const u32 ctx_id) |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1139 | { |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 1140 | struct i915_gem_context *ctx = NULL; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1141 | struct i915_ctx_hang_stats *hs; |
| 1142 | |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1143 | if (engine->id != RCS && ctx_id != DEFAULT_CONTEXT_HANDLE) |
Daniel Vetter | 7c9c4b8 | 2013-12-18 16:37:49 +0100 | [diff] [blame] | 1144 | return ERR_PTR(-EINVAL); |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1145 | |
Chris Wilson | ca585b5 | 2016-05-24 14:53:36 +0100 | [diff] [blame] | 1146 | ctx = i915_gem_context_lookup(file->driver_priv, ctx_id); |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 1147 | if (IS_ERR(ctx)) |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1148 | return ctx; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1149 | |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1150 | hs = &ctx->hang_stats; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1151 | if (hs->banned) { |
| 1152 | DRM_DEBUG("Context %u tried to submit while banned\n", ctx_id); |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1153 | return ERR_PTR(-EIO); |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1154 | } |
| 1155 | |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1156 | return ctx; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1157 | } |
| 1158 | |
Chris Wilson | 5cf3d28 | 2016-08-04 07:52:43 +0100 | [diff] [blame] | 1159 | void i915_vma_move_to_active(struct i915_vma *vma, |
| 1160 | struct drm_i915_gem_request *req, |
| 1161 | unsigned int flags) |
| 1162 | { |
| 1163 | struct drm_i915_gem_object *obj = vma->obj; |
| 1164 | const unsigned int idx = req->engine->id; |
| 1165 | |
| 1166 | GEM_BUG_ON(!drm_mm_node_allocated(&vma->node)); |
| 1167 | |
| 1168 | obj->dirty = 1; /* be paranoid */ |
| 1169 | |
Chris Wilson | b0decaf | 2016-08-04 07:52:44 +0100 | [diff] [blame] | 1170 | /* Add a reference if we're newly entering the active list. |
| 1171 | * The order in which we add operations to the retirement queue is |
| 1172 | * vital here: mark_active adds to the start of the callback list, |
| 1173 | * such that subsequent callbacks are called first. Therefore we |
| 1174 | * add the active reference first and queue for it to be dropped |
| 1175 | * *last*. |
| 1176 | */ |
Chris Wilson | 5cf3d28 | 2016-08-04 07:52:43 +0100 | [diff] [blame] | 1177 | if (obj->active == 0) |
| 1178 | i915_gem_object_get(obj); |
| 1179 | obj->active |= 1 << idx; |
| 1180 | i915_gem_active_set(&obj->last_read[idx], req); |
| 1181 | |
| 1182 | if (flags & EXEC_OBJECT_WRITE) { |
| 1183 | i915_gem_active_set(&obj->last_write, req); |
| 1184 | |
| 1185 | intel_fb_obj_invalidate(obj, ORIGIN_CS); |
| 1186 | |
| 1187 | /* update for the implicit flush after a batch */ |
| 1188 | obj->base.write_domain &= ~I915_GEM_GPU_DOMAINS; |
| 1189 | } |
| 1190 | |
| 1191 | if (flags & EXEC_OBJECT_NEEDS_FENCE) { |
| 1192 | i915_gem_active_set(&obj->last_fence, req); |
| 1193 | if (flags & __EXEC_OBJECT_HAS_FENCE) { |
| 1194 | struct drm_i915_private *dev_priv = req->i915; |
| 1195 | |
| 1196 | list_move_tail(&dev_priv->fence_regs[obj->fence_reg].lru_list, |
| 1197 | &dev_priv->mm.fence_list); |
| 1198 | } |
| 1199 | } |
| 1200 | |
Chris Wilson | b0decaf | 2016-08-04 07:52:44 +0100 | [diff] [blame] | 1201 | i915_vma_set_active(vma, idx); |
| 1202 | i915_gem_active_set(&vma->last_read[idx], req); |
Chris Wilson | 5cf3d28 | 2016-08-04 07:52:43 +0100 | [diff] [blame] | 1203 | list_move_tail(&vma->vm_link, &vma->vm->active_list); |
| 1204 | } |
| 1205 | |
Chris Wilson | 5b043f4 | 2016-08-02 22:50:38 +0100 | [diff] [blame] | 1206 | static void |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1207 | i915_gem_execbuffer_move_to_active(struct list_head *vmas, |
John Harrison | 8a8edb5 | 2015-05-29 17:43:33 +0100 | [diff] [blame] | 1208 | struct drm_i915_gem_request *req) |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1209 | { |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1210 | struct i915_vma *vma; |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1211 | |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1212 | list_for_each_entry(vma, vmas, exec_list) { |
| 1213 | struct drm_i915_gem_object *obj = vma->obj; |
Chris Wilson | 69c2fc8 | 2012-07-20 12:41:03 +0100 | [diff] [blame] | 1214 | u32 old_read = obj->base.read_domains; |
| 1215 | u32 old_write = obj->base.write_domain; |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 1216 | |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1217 | obj->base.write_domain = obj->base.pending_write_domain; |
Chris Wilson | 5cf3d28 | 2016-08-04 07:52:43 +0100 | [diff] [blame] | 1218 | if (obj->base.write_domain) |
| 1219 | vma->exec_entry->flags |= EXEC_OBJECT_WRITE; |
| 1220 | else |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1221 | obj->base.pending_read_domains |= obj->base.read_domains; |
| 1222 | obj->base.read_domains = obj->base.pending_read_domains; |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1223 | |
Chris Wilson | 5cf3d28 | 2016-08-04 07:52:43 +0100 | [diff] [blame] | 1224 | i915_vma_move_to_active(vma, req, vma->exec_entry->flags); |
Chris Wilson | db53a30 | 2011-02-03 11:57:46 +0000 | [diff] [blame] | 1225 | trace_i915_gem_object_change_domain(obj, old_read, old_write); |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1226 | } |
| 1227 | } |
| 1228 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1229 | static int |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1230 | i915_reset_gen7_sol_offsets(struct drm_i915_gem_request *req) |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1231 | { |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 1232 | struct intel_ring *ring = req->ring; |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1233 | int ret, i; |
| 1234 | |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1235 | if (!IS_GEN7(req->i915) || req->engine->id != RCS) { |
Daniel Vetter | 9d662da | 2014-04-24 08:09:09 +0200 | [diff] [blame] | 1236 | DRM_DEBUG("sol reset is gen7/rcs only\n"); |
| 1237 | return -EINVAL; |
| 1238 | } |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1239 | |
John Harrison | 5fb9de1 | 2015-05-29 17:44:07 +0100 | [diff] [blame] | 1240 | ret = intel_ring_begin(req, 4 * 3); |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1241 | if (ret) |
| 1242 | return ret; |
| 1243 | |
| 1244 | for (i = 0; i < 4; i++) { |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1245 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); |
| 1246 | intel_ring_emit_reg(ring, GEN7_SO_WRITE_OFFSET(i)); |
| 1247 | intel_ring_emit(ring, 0); |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1248 | } |
| 1249 | |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1250 | intel_ring_advance(ring); |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1251 | |
| 1252 | return 0; |
| 1253 | } |
| 1254 | |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1255 | static struct drm_i915_gem_object* |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1256 | i915_gem_execbuffer_parse(struct intel_engine_cs *engine, |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1257 | struct drm_i915_gem_exec_object2 *shadow_exec_entry, |
| 1258 | struct eb_vmas *eb, |
| 1259 | struct drm_i915_gem_object *batch_obj, |
| 1260 | u32 batch_start_offset, |
| 1261 | u32 batch_len, |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1262 | bool is_master) |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1263 | { |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1264 | struct drm_i915_gem_object *shadow_batch_obj; |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1265 | struct i915_vma *vma; |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1266 | int ret; |
| 1267 | |
Tvrtko Ursulin | 0bc40be | 2016-03-16 11:00:37 +0000 | [diff] [blame] | 1268 | shadow_batch_obj = i915_gem_batch_pool_get(&engine->batch_pool, |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1269 | PAGE_ALIGN(batch_len)); |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1270 | if (IS_ERR(shadow_batch_obj)) |
| 1271 | return shadow_batch_obj; |
| 1272 | |
Chris Wilson | 33a051a | 2016-07-27 09:07:26 +0100 | [diff] [blame] | 1273 | ret = intel_engine_cmd_parser(engine, |
| 1274 | batch_obj, |
| 1275 | shadow_batch_obj, |
| 1276 | batch_start_offset, |
| 1277 | batch_len, |
| 1278 | is_master); |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1279 | if (ret) |
| 1280 | goto err; |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1281 | |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1282 | ret = i915_gem_obj_ggtt_pin(shadow_batch_obj, 0, 0); |
| 1283 | if (ret) |
| 1284 | goto err; |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1285 | |
Chris Wilson | de4e783 | 2015-04-07 16:20:35 +0100 | [diff] [blame] | 1286 | i915_gem_object_unpin_pages(shadow_batch_obj); |
| 1287 | |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1288 | memset(shadow_exec_entry, 0, sizeof(*shadow_exec_entry)); |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1289 | |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1290 | vma = i915_gem_obj_to_ggtt(shadow_batch_obj); |
| 1291 | vma->exec_entry = shadow_exec_entry; |
Chris Wilson | de4e783 | 2015-04-07 16:20:35 +0100 | [diff] [blame] | 1292 | vma->exec_entry->flags = __EXEC_OBJECT_HAS_PIN; |
Chris Wilson | 25dc556 | 2016-07-20 13:31:52 +0100 | [diff] [blame] | 1293 | i915_gem_object_get(shadow_batch_obj); |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1294 | list_add_tail(&vma->exec_list, &eb->vmas); |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1295 | |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1296 | shadow_batch_obj->base.pending_read_domains = I915_GEM_DOMAIN_COMMAND; |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1297 | |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1298 | return shadow_batch_obj; |
| 1299 | |
| 1300 | err: |
Chris Wilson | de4e783 | 2015-04-07 16:20:35 +0100 | [diff] [blame] | 1301 | i915_gem_object_unpin_pages(shadow_batch_obj); |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1302 | if (ret == -EACCES) /* unhandled chained batch */ |
| 1303 | return batch_obj; |
| 1304 | else |
| 1305 | return ERR_PTR(ret); |
Brad Volkin | 7174537 | 2014-12-11 12:13:12 -0800 | [diff] [blame] | 1306 | } |
Chris Wilson | 5c6c600 | 2014-09-06 10:28:27 +0100 | [diff] [blame] | 1307 | |
Chris Wilson | 5b043f4 | 2016-08-02 22:50:38 +0100 | [diff] [blame] | 1308 | static int |
| 1309 | execbuf_submit(struct i915_execbuffer_params *params, |
| 1310 | struct drm_i915_gem_execbuffer2 *args, |
| 1311 | struct list_head *vmas) |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1312 | { |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1313 | struct drm_i915_private *dev_priv = params->request->i915; |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1314 | u64 exec_start, exec_len; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1315 | int instp_mode; |
| 1316 | u32 instp_mask; |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1317 | int ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1318 | |
John Harrison | 535fbe8 | 2015-05-29 17:43:32 +0100 | [diff] [blame] | 1319 | ret = i915_gem_execbuffer_move_to_gpu(params->request, vmas); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1320 | if (ret) |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1321 | return ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1322 | |
John Harrison | ba01cc9 | 2015-05-29 17:43:41 +0100 | [diff] [blame] | 1323 | ret = i915_switch_context(params->request); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1324 | if (ret) |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1325 | return ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1326 | |
| 1327 | instp_mode = args->flags & I915_EXEC_CONSTANTS_MASK; |
| 1328 | instp_mask = I915_EXEC_CONSTANTS_MASK; |
| 1329 | switch (instp_mode) { |
| 1330 | case I915_EXEC_CONSTANTS_REL_GENERAL: |
| 1331 | case I915_EXEC_CONSTANTS_ABSOLUTE: |
| 1332 | case I915_EXEC_CONSTANTS_REL_SURFACE: |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1333 | if (instp_mode != 0 && params->engine->id != RCS) { |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1334 | DRM_DEBUG("non-0 rel constants mode on non-RCS\n"); |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1335 | return -EINVAL; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1336 | } |
| 1337 | |
| 1338 | if (instp_mode != dev_priv->relative_constants_mode) { |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1339 | if (INTEL_INFO(dev_priv)->gen < 4) { |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1340 | DRM_DEBUG("no rel constants on pre-gen4\n"); |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1341 | return -EINVAL; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1342 | } |
| 1343 | |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1344 | if (INTEL_INFO(dev_priv)->gen > 5 && |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1345 | instp_mode == I915_EXEC_CONSTANTS_REL_SURFACE) { |
| 1346 | DRM_DEBUG("rel surface constants mode invalid on gen5+\n"); |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1347 | return -EINVAL; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1348 | } |
| 1349 | |
| 1350 | /* The HW changed the meaning on this bit on gen6 */ |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1351 | if (INTEL_INFO(dev_priv)->gen >= 6) |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1352 | instp_mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE; |
| 1353 | } |
| 1354 | break; |
| 1355 | default: |
| 1356 | DRM_DEBUG("execbuf with unknown constants: %d\n", instp_mode); |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1357 | return -EINVAL; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1358 | } |
| 1359 | |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1360 | if (params->engine->id == RCS && |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1361 | instp_mode != dev_priv->relative_constants_mode) { |
Chris Wilson | 7e37f88 | 2016-08-02 22:50:21 +0100 | [diff] [blame] | 1362 | struct intel_ring *ring = params->request->ring; |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1363 | |
John Harrison | 5fb9de1 | 2015-05-29 17:44:07 +0100 | [diff] [blame] | 1364 | ret = intel_ring_begin(params->request, 4); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1365 | if (ret) |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1366 | return ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1367 | |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1368 | intel_ring_emit(ring, MI_NOOP); |
| 1369 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); |
| 1370 | intel_ring_emit_reg(ring, INSTPM); |
| 1371 | intel_ring_emit(ring, instp_mask << 16 | instp_mode); |
| 1372 | intel_ring_advance(ring); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1373 | |
| 1374 | dev_priv->relative_constants_mode = instp_mode; |
| 1375 | } |
| 1376 | |
| 1377 | if (args->flags & I915_EXEC_GEN7_SOL_RESET) { |
Chris Wilson | b5321f3 | 2016-08-02 22:50:18 +0100 | [diff] [blame] | 1378 | ret = i915_reset_gen7_sol_offsets(params->request); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1379 | if (ret) |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1380 | return ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1381 | } |
| 1382 | |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1383 | exec_len = args->batch_len; |
| 1384 | exec_start = params->batch_obj_vm_offset + |
| 1385 | params->args_batch_start_offset; |
| 1386 | |
Ville Syrjälä | 9d611c0 | 2015-12-14 18:23:49 +0200 | [diff] [blame] | 1387 | if (exec_len == 0) |
| 1388 | exec_len = params->batch_obj->base.size; |
| 1389 | |
Chris Wilson | 803688b | 2016-08-02 22:50:27 +0100 | [diff] [blame] | 1390 | ret = params->engine->emit_bb_start(params->request, |
| 1391 | exec_start, exec_len, |
| 1392 | params->dispatch_flags); |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1393 | if (ret) |
| 1394 | return ret; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1395 | |
John Harrison | 95c2416 | 2015-05-29 17:43:31 +0100 | [diff] [blame] | 1396 | trace_i915_gem_ring_dispatch(params->request, params->dispatch_flags); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1397 | |
John Harrison | 8a8edb5 | 2015-05-29 17:43:33 +0100 | [diff] [blame] | 1398 | i915_gem_execbuffer_move_to_active(vmas, params->request); |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1399 | |
Chris Wilson | 2f5945b | 2015-10-06 11:39:55 +0100 | [diff] [blame] | 1400 | return 0; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1401 | } |
| 1402 | |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1403 | /** |
| 1404 | * Find one BSD ring to dispatch the corresponding BSD command. |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1405 | * The engine index is returned. |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1406 | */ |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1407 | static unsigned int |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1408 | gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv, |
| 1409 | struct drm_file *file) |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1410 | { |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1411 | struct drm_i915_file_private *file_priv = file->driver_priv; |
| 1412 | |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1413 | /* Check whether the file_priv has already selected one ring. */ |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1414 | if ((int)file_priv->bsd_engine < 0) { |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1415 | /* If not, use the ping-pong mechanism to select one. */ |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 1416 | mutex_lock(&dev_priv->drm.struct_mutex); |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1417 | file_priv->bsd_engine = dev_priv->mm.bsd_engine_dispatch_index; |
| 1418 | dev_priv->mm.bsd_engine_dispatch_index ^= 1; |
Chris Wilson | 91c8a32 | 2016-07-05 10:40:23 +0100 | [diff] [blame] | 1419 | mutex_unlock(&dev_priv->drm.struct_mutex); |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1420 | } |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1421 | |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1422 | return file_priv->bsd_engine; |
Zhao Yakui | a8ebba7 | 2014-04-17 10:37:40 +0800 | [diff] [blame] | 1423 | } |
| 1424 | |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1425 | #define I915_USER_RINGS (4) |
| 1426 | |
Tvrtko Ursulin | 117897f | 2016-03-16 11:00:40 +0000 | [diff] [blame] | 1427 | static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = { |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1428 | [I915_EXEC_DEFAULT] = RCS, |
| 1429 | [I915_EXEC_RENDER] = RCS, |
| 1430 | [I915_EXEC_BLT] = BCS, |
| 1431 | [I915_EXEC_BSD] = VCS, |
| 1432 | [I915_EXEC_VEBOX] = VECS |
| 1433 | }; |
| 1434 | |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1435 | static struct intel_engine_cs * |
| 1436 | eb_select_engine(struct drm_i915_private *dev_priv, |
| 1437 | struct drm_file *file, |
| 1438 | struct drm_i915_gem_execbuffer2 *args) |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1439 | { |
| 1440 | unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK; |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1441 | struct intel_engine_cs *engine; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1442 | |
| 1443 | if (user_ring_id > I915_USER_RINGS) { |
| 1444 | DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id); |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1445 | return NULL; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1446 | } |
| 1447 | |
| 1448 | if ((user_ring_id != I915_EXEC_BSD) && |
| 1449 | ((args->flags & I915_EXEC_BSD_MASK) != 0)) { |
| 1450 | DRM_DEBUG("execbuf with non bsd ring but with invalid " |
| 1451 | "bsd dispatch flags: %d\n", (int)(args->flags)); |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1452 | return NULL; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1453 | } |
| 1454 | |
| 1455 | if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(dev_priv)) { |
| 1456 | unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK; |
| 1457 | |
| 1458 | if (bsd_idx == I915_EXEC_BSD_DEFAULT) { |
Chris Wilson | c80ff16 | 2016-07-27 09:07:27 +0100 | [diff] [blame] | 1459 | bsd_idx = gen8_dispatch_bsd_engine(dev_priv, file); |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1460 | } else if (bsd_idx >= I915_EXEC_BSD_RING1 && |
| 1461 | bsd_idx <= I915_EXEC_BSD_RING2) { |
Tvrtko Ursulin | d9da6aa | 2016-01-27 13:41:09 +0000 | [diff] [blame] | 1462 | bsd_idx >>= I915_EXEC_BSD_SHIFT; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1463 | bsd_idx--; |
| 1464 | } else { |
| 1465 | DRM_DEBUG("execbuf with unknown bsd ring: %u\n", |
| 1466 | bsd_idx); |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1467 | return NULL; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1468 | } |
| 1469 | |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1470 | engine = &dev_priv->engine[_VCS(bsd_idx)]; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1471 | } else { |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1472 | engine = &dev_priv->engine[user_ring_map[user_ring_id]]; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1473 | } |
| 1474 | |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1475 | if (!intel_engine_initialized(engine)) { |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1476 | DRM_DEBUG("execbuf with invalid ring: %u\n", user_ring_id); |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1477 | return NULL; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1478 | } |
| 1479 | |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1480 | return engine; |
Tvrtko Ursulin | de1add3 | 2016-01-15 15:12:50 +0000 | [diff] [blame] | 1481 | } |
| 1482 | |
Eric Anholt | ae662d3 | 2012-01-03 09:23:29 -0800 | [diff] [blame] | 1483 | static int |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1484 | i915_gem_do_execbuffer(struct drm_device *dev, void *data, |
| 1485 | struct drm_file *file, |
| 1486 | struct drm_i915_gem_execbuffer2 *args, |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1487 | struct drm_i915_gem_exec_object2 *exec) |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1488 | { |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 1489 | struct drm_i915_private *dev_priv = to_i915(dev); |
| 1490 | struct i915_ggtt *ggtt = &dev_priv->ggtt; |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1491 | struct eb_vmas *eb; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1492 | struct drm_i915_gem_object *batch_obj; |
Brad Volkin | 78a4237 | 2014-12-11 12:13:09 -0800 | [diff] [blame] | 1493 | struct drm_i915_gem_exec_object2 shadow_exec_entry; |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1494 | struct intel_engine_cs *engine; |
Chris Wilson | e2efd13 | 2016-05-24 14:53:34 +0100 | [diff] [blame] | 1495 | struct i915_gem_context *ctx; |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1496 | struct i915_address_space *vm; |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1497 | struct i915_execbuffer_params params_master; /* XXX: will be removed later */ |
| 1498 | struct i915_execbuffer_params *params = ¶ms_master; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1499 | const u32 ctx_id = i915_execbuffer2_get_context_id(*args); |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1500 | u32 dispatch_flags; |
Oscar Mateo | 7838259 | 2014-07-03 16:28:05 +0100 | [diff] [blame] | 1501 | int ret; |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1502 | bool need_relocs; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1503 | |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1504 | if (!i915_gem_check_execbuffer(args)) |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1505 | return -EINVAL; |
Chris Wilson | 432e58e | 2010-11-25 19:32:06 +0000 | [diff] [blame] | 1506 | |
Chris Wilson | ad19f10 | 2014-08-10 06:29:08 +0100 | [diff] [blame] | 1507 | ret = validate_exec_list(dev, exec, args->buffer_count); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1508 | if (ret) |
| 1509 | return ret; |
| 1510 | |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1511 | dispatch_flags = 0; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1512 | if (args->flags & I915_EXEC_SECURE) { |
Daniel Vetter | b3ac9f2 | 2016-06-21 10:54:20 +0200 | [diff] [blame] | 1513 | if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1514 | return -EPERM; |
| 1515 | |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1516 | dispatch_flags |= I915_DISPATCH_SECURE; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1517 | } |
Daniel Vetter | b45305f | 2012-12-17 16:21:27 +0100 | [diff] [blame] | 1518 | if (args->flags & I915_EXEC_IS_PINNED) |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1519 | dispatch_flags |= I915_DISPATCH_PINNED; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1520 | |
Dave Gordon | f8ca0c0 | 2016-07-20 18:16:07 +0100 | [diff] [blame] | 1521 | engine = eb_select_engine(dev_priv, file, args); |
| 1522 | if (!engine) |
| 1523 | return -EINVAL; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1524 | |
| 1525 | if (args->buffer_count < 1) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1526 | DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1527 | return -EINVAL; |
| 1528 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1529 | |
Abdiel Janulgue | a9ed33c | 2015-07-01 10:12:23 +0300 | [diff] [blame] | 1530 | if (args->flags & I915_EXEC_RESOURCE_STREAMER) { |
| 1531 | if (!HAS_RESOURCE_STREAMER(dev)) { |
| 1532 | DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n"); |
| 1533 | return -EINVAL; |
| 1534 | } |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1535 | if (engine->id != RCS) { |
Abdiel Janulgue | a9ed33c | 2015-07-01 10:12:23 +0300 | [diff] [blame] | 1536 | DRM_DEBUG("RS is not available on %s\n", |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1537 | engine->name); |
Abdiel Janulgue | a9ed33c | 2015-07-01 10:12:23 +0300 | [diff] [blame] | 1538 | return -EINVAL; |
| 1539 | } |
| 1540 | |
| 1541 | dispatch_flags |= I915_DISPATCH_RS; |
| 1542 | } |
| 1543 | |
Chris Wilson | 67d97da | 2016-07-04 08:08:31 +0100 | [diff] [blame] | 1544 | /* Take a local wakeref for preparing to dispatch the execbuf as |
| 1545 | * we expect to access the hardware fairly frequently in the |
| 1546 | * process. Upon first dispatch, we acquire another prolonged |
| 1547 | * wakeref that we hold until the GPU has been idle for at least |
| 1548 | * 100ms. |
| 1549 | */ |
Paulo Zanoni | f65c916 | 2013-11-27 18:20:34 -0200 | [diff] [blame] | 1550 | intel_runtime_pm_get(dev_priv); |
| 1551 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1552 | ret = i915_mutex_lock_interruptible(dev); |
| 1553 | if (ret) |
| 1554 | goto pre_mutex_err; |
| 1555 | |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1556 | ctx = i915_gem_validate_context(dev, file, engine, ctx_id); |
Ben Widawsky | 72ad5c4 | 2014-01-02 19:50:27 -1000 | [diff] [blame] | 1557 | if (IS_ERR(ctx)) { |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1558 | mutex_unlock(&dev->struct_mutex); |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1559 | ret = PTR_ERR(ctx); |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1560 | goto pre_mutex_err; |
Ben Widawsky | 935f38d | 2014-04-04 22:41:07 -0700 | [diff] [blame] | 1561 | } |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1562 | |
Chris Wilson | 9a6feaf | 2016-07-20 13:31:50 +0100 | [diff] [blame] | 1563 | i915_gem_context_get(ctx); |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1564 | |
Daniel Vetter | ae6c480 | 2014-08-06 15:04:53 +0200 | [diff] [blame] | 1565 | if (ctx->ppgtt) |
| 1566 | vm = &ctx->ppgtt->base; |
| 1567 | else |
Joonas Lahtinen | 72e96d6 | 2016-03-30 16:57:10 +0300 | [diff] [blame] | 1568 | vm = &ggtt->base; |
Mika Kuoppala | d299cce | 2013-11-26 16:14:33 +0200 | [diff] [blame] | 1569 | |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1570 | memset(¶ms_master, 0x00, sizeof(params_master)); |
| 1571 | |
Ben Widawsky | 17601cbc | 2013-11-25 09:54:38 -0800 | [diff] [blame] | 1572 | eb = eb_create(args); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 1573 | if (eb == NULL) { |
Chris Wilson | 9a6feaf | 2016-07-20 13:31:50 +0100 | [diff] [blame] | 1574 | i915_gem_context_put(ctx); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 1575 | mutex_unlock(&dev->struct_mutex); |
| 1576 | ret = -ENOMEM; |
| 1577 | goto pre_mutex_err; |
| 1578 | } |
| 1579 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1580 | /* Look up object handles */ |
Ben Widawsky | 27173f1 | 2013-08-14 11:38:36 +0200 | [diff] [blame] | 1581 | ret = eb_lookup_vmas(eb, exec, args, vm, file); |
Chris Wilson | 3b96eff | 2013-01-08 10:53:14 +0000 | [diff] [blame] | 1582 | if (ret) |
| 1583 | goto err; |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1584 | |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 1585 | /* take note of the batch buffer before we might reorder the lists */ |
Chris Wilson | d23db88 | 2014-05-23 08:48:08 +0200 | [diff] [blame] | 1586 | batch_obj = eb_get_batch(eb); |
Chris Wilson | 6fe4f14 | 2011-01-10 17:35:37 +0000 | [diff] [blame] | 1587 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1588 | /* Move the objects en-masse into the GTT, evicting if necessary. */ |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1589 | need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1590 | ret = i915_gem_execbuffer_reserve(engine, &eb->vmas, ctx, |
| 1591 | &need_relocs); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1592 | if (ret) |
| 1593 | goto err; |
| 1594 | |
| 1595 | /* The objects are in their final locations, apply the relocations. */ |
Daniel Vetter | ed5982e | 2013-01-17 22:23:36 +0100 | [diff] [blame] | 1596 | if (need_relocs) |
Ben Widawsky | 17601cbc | 2013-11-25 09:54:38 -0800 | [diff] [blame] | 1597 | ret = i915_gem_execbuffer_relocate(eb); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1598 | if (ret) { |
| 1599 | if (ret == -EFAULT) { |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1600 | ret = i915_gem_execbuffer_relocate_slow(dev, args, file, |
| 1601 | engine, |
David Weinehall | b1b3827 | 2015-05-20 17:00:13 +0300 | [diff] [blame] | 1602 | eb, exec, ctx); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1603 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); |
| 1604 | } |
| 1605 | if (ret) |
| 1606 | goto err; |
| 1607 | } |
| 1608 | |
| 1609 | /* Set the pending read domains for the batch buffer to COMMAND */ |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1610 | if (batch_obj->base.pending_write_domain) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1611 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1612 | ret = -EINVAL; |
| 1613 | goto err; |
| 1614 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1615 | |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1616 | params->args_batch_start_offset = args->batch_start_offset; |
Chris Wilson | 33a051a | 2016-07-27 09:07:26 +0100 | [diff] [blame] | 1617 | if (intel_engine_needs_cmd_parser(engine) && args->batch_len) { |
Rebecca N. Palmer | c7c7372 | 2015-05-08 14:26:50 +0100 | [diff] [blame] | 1618 | struct drm_i915_gem_object *parsed_batch_obj; |
| 1619 | |
Tvrtko Ursulin | e2f8039 | 2016-03-16 11:00:36 +0000 | [diff] [blame] | 1620 | parsed_batch_obj = i915_gem_execbuffer_parse(engine, |
| 1621 | &shadow_exec_entry, |
| 1622 | eb, |
| 1623 | batch_obj, |
| 1624 | args->batch_start_offset, |
| 1625 | args->batch_len, |
Daniel Vetter | b3ac9f2 | 2016-06-21 10:54:20 +0200 | [diff] [blame] | 1626 | drm_is_current_master(file)); |
Rebecca N. Palmer | c7c7372 | 2015-05-08 14:26:50 +0100 | [diff] [blame] | 1627 | if (IS_ERR(parsed_batch_obj)) { |
| 1628 | ret = PTR_ERR(parsed_batch_obj); |
Brad Volkin | 78a4237 | 2014-12-11 12:13:09 -0800 | [diff] [blame] | 1629 | goto err; |
| 1630 | } |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1631 | |
| 1632 | /* |
Rebecca N. Palmer | c7c7372 | 2015-05-08 14:26:50 +0100 | [diff] [blame] | 1633 | * parsed_batch_obj == batch_obj means batch not fully parsed: |
| 1634 | * Accept, but don't promote to secure. |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1635 | */ |
Chris Wilson | 17cabf5 | 2015-01-14 11:20:57 +0000 | [diff] [blame] | 1636 | |
Rebecca N. Palmer | c7c7372 | 2015-05-08 14:26:50 +0100 | [diff] [blame] | 1637 | if (parsed_batch_obj != batch_obj) { |
| 1638 | /* |
| 1639 | * Batch parsed and accepted: |
| 1640 | * |
| 1641 | * Set the DISPATCH_SECURE bit to remove the NON_SECURE |
| 1642 | * bit from MI_BATCH_BUFFER_START commands issued in |
| 1643 | * the dispatch_execbuffer implementations. We |
| 1644 | * specifically don't want that set on batches the |
| 1645 | * command parser has accepted. |
| 1646 | */ |
| 1647 | dispatch_flags |= I915_DISPATCH_SECURE; |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1648 | params->args_batch_start_offset = 0; |
Rebecca N. Palmer | c7c7372 | 2015-05-08 14:26:50 +0100 | [diff] [blame] | 1649 | batch_obj = parsed_batch_obj; |
| 1650 | } |
Brad Volkin | 351e3db | 2014-02-18 10:15:46 -0800 | [diff] [blame] | 1651 | } |
| 1652 | |
Brad Volkin | 78a4237 | 2014-12-11 12:13:09 -0800 | [diff] [blame] | 1653 | batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND; |
| 1654 | |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1655 | /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure |
| 1656 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
Ben Widawsky | 28cf541 | 2013-11-02 21:07:26 -0700 | [diff] [blame] | 1657 | * hsw should have this fixed, but bdw mucks it up again. */ |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1658 | if (dispatch_flags & I915_DISPATCH_SECURE) { |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 1659 | /* |
| 1660 | * So on first glance it looks freaky that we pin the batch here |
| 1661 | * outside of the reservation loop. But: |
| 1662 | * - The batch is already pinned into the relevant ppgtt, so we |
| 1663 | * already have the backing storage fully allocated. |
| 1664 | * - No other BO uses the global gtt (well contexts, but meh), |
Yannick Guerrini | fd0753c | 2015-02-28 17:20:41 +0100 | [diff] [blame] | 1665 | * so we don't really have issues with multiple objects not |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 1666 | * fitting due to fragmentation. |
| 1667 | * So this is actually safe. |
| 1668 | */ |
| 1669 | ret = i915_gem_obj_ggtt_pin(batch_obj, 0, 0); |
| 1670 | if (ret) |
| 1671 | goto err; |
Chris Wilson | d7d4eed | 2012-10-17 12:09:54 +0100 | [diff] [blame] | 1672 | |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1673 | params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj); |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 1674 | } else |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1675 | params->batch_obj_vm_offset = i915_gem_obj_offset(batch_obj, vm); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1676 | |
John Harrison | 0c8dac8 | 2015-05-29 17:43:25 +0100 | [diff] [blame] | 1677 | /* Allocate a request for this batch buffer nice and early. */ |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 1678 | params->request = i915_gem_request_alloc(engine, ctx); |
| 1679 | if (IS_ERR(params->request)) { |
| 1680 | ret = PTR_ERR(params->request); |
John Harrison | 0c8dac8 | 2015-05-29 17:43:25 +0100 | [diff] [blame] | 1681 | goto err_batch_unpin; |
Dave Gordon | 2682708 | 2016-01-19 19:02:53 +0000 | [diff] [blame] | 1682 | } |
John Harrison | 0c8dac8 | 2015-05-29 17:43:25 +0100 | [diff] [blame] | 1683 | |
Chris Wilson | 8e63717 | 2016-08-02 22:50:26 +0100 | [diff] [blame] | 1684 | ret = i915_gem_request_add_to_client(params->request, file); |
John Harrison | fcfa423c | 2015-05-29 17:44:12 +0100 | [diff] [blame] | 1685 | if (ret) |
Chris Wilson | aa9b781 | 2016-04-13 17:35:15 +0100 | [diff] [blame] | 1686 | goto err_request; |
John Harrison | fcfa423c | 2015-05-29 17:44:12 +0100 | [diff] [blame] | 1687 | |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1688 | /* |
| 1689 | * Save assorted stuff away to pass through to *_submission(). |
| 1690 | * NB: This data should be 'persistent' and not local as it will |
| 1691 | * kept around beyond the duration of the IOCTL once the GPU |
| 1692 | * scheduler arrives. |
| 1693 | */ |
| 1694 | params->dev = dev; |
| 1695 | params->file = file; |
Tvrtko Ursulin | 4a570db | 2016-03-16 11:00:38 +0000 | [diff] [blame] | 1696 | params->engine = engine; |
John Harrison | 5f19e2b | 2015-05-29 17:43:27 +0100 | [diff] [blame] | 1697 | params->dispatch_flags = dispatch_flags; |
| 1698 | params->batch_obj = batch_obj; |
| 1699 | params->ctx = ctx; |
| 1700 | |
Chris Wilson | 5b043f4 | 2016-08-02 22:50:38 +0100 | [diff] [blame] | 1701 | ret = execbuf_submit(params, args, &eb->vmas); |
Chris Wilson | aa9b781 | 2016-04-13 17:35:15 +0100 | [diff] [blame] | 1702 | err_request: |
Chris Wilson | e655bc3 | 2016-08-04 16:32:21 +0100 | [diff] [blame] | 1703 | __i915_add_request(params->request, params->batch_obj, ret == 0); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1704 | |
John Harrison | 0c8dac8 | 2015-05-29 17:43:25 +0100 | [diff] [blame] | 1705 | err_batch_unpin: |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 1706 | /* |
| 1707 | * FIXME: We crucially rely upon the active tracking for the (ppgtt) |
| 1708 | * batch vma for correctness. For less ugly and less fragility this |
| 1709 | * needs to be adjusted to also track the ggtt batch vma properly as |
| 1710 | * active. |
| 1711 | */ |
John Harrison | 8e004ef | 2015-02-13 11:48:10 +0000 | [diff] [blame] | 1712 | if (dispatch_flags & I915_DISPATCH_SECURE) |
Daniel Vetter | da51a1e | 2014-08-11 12:08:58 +0200 | [diff] [blame] | 1713 | i915_gem_object_ggtt_unpin(batch_obj); |
John Harrison | 0c8dac8 | 2015-05-29 17:43:25 +0100 | [diff] [blame] | 1714 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1715 | err: |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1716 | /* the request owns the ref now */ |
Chris Wilson | 9a6feaf | 2016-07-20 13:31:50 +0100 | [diff] [blame] | 1717 | i915_gem_context_put(ctx); |
Chris Wilson | 67731b8 | 2010-12-08 10:38:14 +0000 | [diff] [blame] | 1718 | eb_destroy(eb); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1719 | |
| 1720 | mutex_unlock(&dev->struct_mutex); |
| 1721 | |
| 1722 | pre_mutex_err: |
Paulo Zanoni | f65c916 | 2013-11-27 18:20:34 -0200 | [diff] [blame] | 1723 | /* intel_gpu_busy should also get a ref, so it will free when the device |
| 1724 | * is really idle. */ |
| 1725 | intel_runtime_pm_put(dev_priv); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1726 | return ret; |
| 1727 | } |
| 1728 | |
| 1729 | /* |
| 1730 | * Legacy execbuffer just creates an exec2 list from the original exec object |
| 1731 | * list array and passes it to the real function. |
| 1732 | */ |
| 1733 | int |
| 1734 | i915_gem_execbuffer(struct drm_device *dev, void *data, |
| 1735 | struct drm_file *file) |
| 1736 | { |
| 1737 | struct drm_i915_gem_execbuffer *args = data; |
| 1738 | struct drm_i915_gem_execbuffer2 exec2; |
| 1739 | struct drm_i915_gem_exec_object *exec_list = NULL; |
| 1740 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; |
| 1741 | int ret, i; |
| 1742 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1743 | if (args->buffer_count < 1) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1744 | DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1745 | return -EINVAL; |
| 1746 | } |
| 1747 | |
| 1748 | /* Copy in the exec list from userland */ |
| 1749 | exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count); |
| 1750 | exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count); |
| 1751 | if (exec_list == NULL || exec2_list == NULL) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1752 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1753 | args->buffer_count); |
| 1754 | drm_free_large(exec_list); |
| 1755 | drm_free_large(exec2_list); |
| 1756 | return -ENOMEM; |
| 1757 | } |
| 1758 | ret = copy_from_user(exec_list, |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 1759 | u64_to_user_ptr(args->buffers_ptr), |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1760 | sizeof(*exec_list) * args->buffer_count); |
| 1761 | if (ret != 0) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1762 | DRM_DEBUG("copy %d exec entries failed %d\n", |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1763 | args->buffer_count, ret); |
| 1764 | drm_free_large(exec_list); |
| 1765 | drm_free_large(exec2_list); |
| 1766 | return -EFAULT; |
| 1767 | } |
| 1768 | |
| 1769 | for (i = 0; i < args->buffer_count; i++) { |
| 1770 | exec2_list[i].handle = exec_list[i].handle; |
| 1771 | exec2_list[i].relocation_count = exec_list[i].relocation_count; |
| 1772 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; |
| 1773 | exec2_list[i].alignment = exec_list[i].alignment; |
| 1774 | exec2_list[i].offset = exec_list[i].offset; |
| 1775 | if (INTEL_INFO(dev)->gen < 4) |
| 1776 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
| 1777 | else |
| 1778 | exec2_list[i].flags = 0; |
| 1779 | } |
| 1780 | |
| 1781 | exec2.buffers_ptr = args->buffers_ptr; |
| 1782 | exec2.buffer_count = args->buffer_count; |
| 1783 | exec2.batch_start_offset = args->batch_start_offset; |
| 1784 | exec2.batch_len = args->batch_len; |
| 1785 | exec2.DR1 = args->DR1; |
| 1786 | exec2.DR4 = args->DR4; |
| 1787 | exec2.num_cliprects = args->num_cliprects; |
| 1788 | exec2.cliprects_ptr = args->cliprects_ptr; |
| 1789 | exec2.flags = I915_EXEC_RENDER; |
Ben Widawsky | 6e0a69d | 2012-06-04 14:42:55 -0700 | [diff] [blame] | 1790 | i915_execbuffer2_set_context_id(exec2, 0); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1791 | |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1792 | ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1793 | if (!ret) { |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1794 | struct drm_i915_gem_exec_object __user *user_exec_list = |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 1795 | u64_to_user_ptr(args->buffers_ptr); |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1796 | |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1797 | /* Copy the new buffer offsets back to the user's exec list. */ |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1798 | for (i = 0; i < args->buffer_count; i++) { |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 1799 | exec2_list[i].offset = |
| 1800 | gen8_canonical_addr(exec2_list[i].offset); |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1801 | ret = __copy_to_user(&user_exec_list[i].offset, |
| 1802 | &exec2_list[i].offset, |
| 1803 | sizeof(user_exec_list[i].offset)); |
| 1804 | if (ret) { |
| 1805 | ret = -EFAULT; |
| 1806 | DRM_DEBUG("failed to copy %d exec entries " |
| 1807 | "back to user (%d)\n", |
| 1808 | args->buffer_count, ret); |
| 1809 | break; |
| 1810 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1811 | } |
| 1812 | } |
| 1813 | |
| 1814 | drm_free_large(exec_list); |
| 1815 | drm_free_large(exec2_list); |
| 1816 | return ret; |
| 1817 | } |
| 1818 | |
| 1819 | int |
| 1820 | i915_gem_execbuffer2(struct drm_device *dev, void *data, |
| 1821 | struct drm_file *file) |
| 1822 | { |
| 1823 | struct drm_i915_gem_execbuffer2 *args = data; |
| 1824 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; |
| 1825 | int ret; |
| 1826 | |
Xi Wang | ed8cd3b | 2012-04-23 04:06:41 -0400 | [diff] [blame] | 1827 | if (args->buffer_count < 1 || |
| 1828 | args->buffer_count > UINT_MAX / sizeof(*exec2_list)) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1829 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1830 | return -EINVAL; |
| 1831 | } |
| 1832 | |
Daniel Vetter | 9cb3466 | 2014-04-24 08:09:11 +0200 | [diff] [blame] | 1833 | if (args->rsvd2 != 0) { |
| 1834 | DRM_DEBUG("dirty rvsd2 field\n"); |
| 1835 | return -EINVAL; |
| 1836 | } |
| 1837 | |
Chris Wilson | f2a85e1 | 2016-04-08 12:11:13 +0100 | [diff] [blame] | 1838 | exec2_list = drm_malloc_gfp(args->buffer_count, |
| 1839 | sizeof(*exec2_list), |
| 1840 | GFP_TEMPORARY); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1841 | if (exec2_list == NULL) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1842 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1843 | args->buffer_count); |
| 1844 | return -ENOMEM; |
| 1845 | } |
| 1846 | ret = copy_from_user(exec2_list, |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 1847 | u64_to_user_ptr(args->buffers_ptr), |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1848 | sizeof(*exec2_list) * args->buffer_count); |
| 1849 | if (ret != 0) { |
Daniel Vetter | ff24019 | 2012-01-31 21:08:14 +0100 | [diff] [blame] | 1850 | DRM_DEBUG("copy %d exec entries failed %d\n", |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1851 | args->buffer_count, ret); |
| 1852 | drm_free_large(exec2_list); |
| 1853 | return -EFAULT; |
| 1854 | } |
| 1855 | |
Ben Widawsky | 41bde55 | 2013-12-06 14:11:21 -0800 | [diff] [blame] | 1856 | ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list); |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1857 | if (!ret) { |
| 1858 | /* Copy the new buffer offsets back to the user's exec list. */ |
Ville Syrjälä | d593d99 | 2014-06-13 16:42:51 +0300 | [diff] [blame] | 1859 | struct drm_i915_gem_exec_object2 __user *user_exec_list = |
Gustavo Padovan | 3ed605b | 2016-04-26 12:32:27 -0300 | [diff] [blame] | 1860 | u64_to_user_ptr(args->buffers_ptr); |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1861 | int i; |
| 1862 | |
| 1863 | for (i = 0; i < args->buffer_count; i++) { |
Michał Winiarski | 934acce | 2015-12-29 18:24:52 +0100 | [diff] [blame] | 1864 | exec2_list[i].offset = |
| 1865 | gen8_canonical_addr(exec2_list[i].offset); |
Chris Wilson | 9aab8bf | 2014-05-23 10:45:52 +0100 | [diff] [blame] | 1866 | ret = __copy_to_user(&user_exec_list[i].offset, |
| 1867 | &exec2_list[i].offset, |
| 1868 | sizeof(user_exec_list[i].offset)); |
| 1869 | if (ret) { |
| 1870 | ret = -EFAULT; |
| 1871 | DRM_DEBUG("failed to copy %d exec entries " |
| 1872 | "back to user\n", |
| 1873 | args->buffer_count); |
| 1874 | break; |
| 1875 | } |
Chris Wilson | 54cf91d | 2010-11-25 18:00:26 +0000 | [diff] [blame] | 1876 | } |
| 1877 | } |
| 1878 | |
| 1879 | drm_free_large(exec2_list); |
| 1880 | return ret; |
| 1881 | } |