Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 2a96e3912b8d79f0bde45a5d657d48595cc7261c / . / arch / arm / boot / dts / imx28.dtsi
blob: fd73fc24e26ebe6f35d6c050b1e9152937bd8647 [file] [log] [blame]
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 interrupt-parent = <&icoll>;
16
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]17 aliases {
18 gpio0 = &gpio0;
19 gpio1 = &gpio1;
20 gpio2 = &gpio2;
21 gpio3 = &gpio3;
22 gpio4 = &gpio4;
23 };
24
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]25 cpus {
26 cpu@0 {
27 compatible = "arm,arm926ejs";
28 };
29 };
30
31 apb@80000000 {
32 compatible = "simple-bus";
33 #address-cells = <1>;
34 #size-cells = <1>;
35 reg = <0x80000000 0x80000>;
36 ranges;
37
38 apbh@80000000 {
39 compatible = "simple-bus";
40 #address-cells = <1>;
41 #size-cells = <1>;
42 reg = <0x80000000 0x3c900>;
43 ranges;
44
45 icoll: interrupt-controller@80000000 {
46 compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
47 interrupt-controller;
48 #interrupt-cells = <1>;
49 reg = <0x80000000 0x2000>;
50 };
51
52 hsadc@80002000 {
53 reg = <0x80002000 2000>;
54 interrupts = <13 87>;
55 status = "disabled";
56 };
57
58 dma-apbh@80004000 {
Dong Aisheng84f35702012-05-04 20:12:19 +0800[diff] [blame]59 compatible = "fsl,imx28-dma-apbh";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]60 reg = <0x80004000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]61 };
62
63 perfmon@80006000 {
64 reg = <0x80006000 800>;
65 interrupts = <27>;
66 status = "disabled";
67 };
68
69 bch@8000a000 {
70 reg = <0x8000a000 2000>;
71 interrupts = <41>;
72 status = "disabled";
73 };
74
75 gpmi@8000c000 {
76 reg = <0x8000c000 2000>;
77 interrupts = <42 88>;
78 status = "disabled";
79 };
80
81 ssp0: ssp@80010000 {
82 reg = <0x80010000 2000>;
83 interrupts = <96 82>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame]84 fsl,ssp-dma-channel = <0>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]85 status = "disabled";
86 };
87
88 ssp1: ssp@80012000 {
89 reg = <0x80012000 2000>;
90 interrupts = <97 83>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame]91 fsl,ssp-dma-channel = <1>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]92 status = "disabled";
93 };
94
95 ssp2: ssp@80014000 {
96 reg = <0x80014000 2000>;
97 interrupts = <98 84>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame]98 fsl,ssp-dma-channel = <2>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]99 status = "disabled";
100 };
101
102 ssp3: ssp@80016000 {
103 reg = <0x80016000 2000>;
104 interrupts = <99 85>;
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame]105 fsl,ssp-dma-channel = <3>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]106 status = "disabled";
107 };
108
109 pinctrl@80018000 {
110 #address-cells = <1>;
111 #size-cells = <0>;
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]112 compatible = "fsl,imx28-pinctrl", "simple-bus";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]113 reg = <0x80018000 2000>;
114
Shawn Guoce4c6f92012-05-04 14:32:35 +0800[diff] [blame]115 gpio0: gpio@0 {
116 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
117 interrupts = <127>;
118 gpio-controller;
119 #gpio-cells = <2>;
120 interrupt-controller;
121 #interrupt-cells = <2>;
122 };
123
124 gpio1: gpio@1 {
125 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
126 interrupts = <126>;
127 gpio-controller;
128 #gpio-cells = <2>;
129 interrupt-controller;
130 #interrupt-cells = <2>;
131 };
132
133 gpio2: gpio@2 {
134 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
135 interrupts = <125>;
136 gpio-controller;
137 #gpio-cells = <2>;
138 interrupt-controller;
139 #interrupt-cells = <2>;
140 };
141
142 gpio3: gpio@3 {
143 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
144 interrupts = <124>;
145 gpio-controller;
146 #gpio-cells = <2>;
147 interrupt-controller;
148 #interrupt-cells = <2>;
149 };
150
151 gpio4: gpio@4 {
152 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
153 interrupts = <123>;
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
157 #interrupt-cells = <2>;
158 };
159
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]160 duart_pins_a: duart@0 {
161 reg = <0>;
162 fsl,pinmux-ids = <0x3102 0x3112>;
163 fsl,drive-strength = <0>;
164 fsl,voltage = <1>;
165 fsl,pull-up = <0>;
166 };
167
168 mac0_pins_a: mac0@0 {
169 reg = <0>;
170 fsl,pinmux-ids = <0x4000 0x4010 0x4020
171 0x4030 0x4040 0x4060 0x4070
172 0x4080 0x4100>;
173 fsl,drive-strength = <1>;
174 fsl,voltage = <1>;
175 fsl,pull-up = <1>;
176 };
177
178 mac1_pins_a: mac1@0 {
179 reg = <0>;
180 fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
181 0x40e1 0x40b1 0x40c1>;
182 fsl,drive-strength = <1>;
183 fsl,voltage = <1>;
184 fsl,pull-up = <1>;
185 };
Shawn Guo35d23042012-05-06 16:33:34 +0800[diff] [blame]186
187 mmc0_8bit_pins_a: mmc0-8bit@0 {
188 reg = <0>;
189 fsl,pinmux-ids = <0x2000 0x2010 0x2020
190 0x2030 0x2040 0x2050 0x2060
191 0x2070 0x2080 0x2090 0x20a0>;
192 fsl,drive-strength = <1>;
193 fsl,voltage = <1>;
194 fsl,pull-up = <1>;
195 };
196
197 mmc0_cd_cfg: mmc0-cd-cfg {
198 fsl,pinmux-ids = <0x2090>;
199 fsl,pull-up = <0>;
200 };
201
202 mmc0_sck_cfg: mmc0-sck-cfg {
203 fsl,pinmux-ids = <0x20a0>;
204 fsl,drive-strength = <2>;
205 fsl,pull-up = <0>;
206 };
Shawn Guo2a96e392012-05-10 15:02:10 +0800[diff] [blame^]207
208 i2c0_pins_a: i2c0@0 {
209 reg = <0>;
210 fsl,pinmux-ids = <0x3180 0x3190>;
211 fsl,drive-strength = <1>;
212 fsl,voltage = <1>;
213 fsl,pull-up = <1>;
214 };
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]215 };
216
217 digctl@8001c000 {
218 reg = <0x8001c000 2000>;
219 interrupts = <89>;
220 status = "disabled";
221 };
222
223 etm@80022000 {
224 reg = <0x80022000 2000>;
225 status = "disabled";
226 };
227
228 dma-apbx@80024000 {
Dong Aisheng84f35702012-05-04 20:12:19 +0800[diff] [blame]229 compatible = "fsl,imx28-dma-apbx";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]230 reg = <0x80024000 2000>;
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]231 };
232
233 dcp@80028000 {
234 reg = <0x80028000 2000>;
235 interrupts = <52 53 54>;
236 status = "disabled";
237 };
238
239 pxp@8002a000 {
240 reg = <0x8002a000 2000>;
241 interrupts = <39>;
242 status = "disabled";
243 };
244
245 ocotp@8002c000 {
246 reg = <0x8002c000 2000>;
247 status = "disabled";
248 };
249
250 axi-ahb@8002e000 {
251 reg = <0x8002e000 2000>;
252 status = "disabled";
253 };
254
255 lcdif@80030000 {
256 reg = <0x80030000 2000>;
257 interrupts = <38 86>;
258 status = "disabled";
259 };
260
261 can0: can@80032000 {
262 reg = <0x80032000 2000>;
263 interrupts = <8>;
264 status = "disabled";
265 };
266
267 can1: can@80034000 {
268 reg = <0x80034000 2000>;
269 interrupts = <9>;
270 status = "disabled";
271 };
272
273 simdbg@8003c000 {
274 reg = <0x8003c000 200>;
275 status = "disabled";
276 };
277
278 simgpmisel@8003c200 {
279 reg = <0x8003c200 100>;
280 status = "disabled";
281 };
282
283 simsspsel@8003c300 {
284 reg = <0x8003c300 100>;
285 status = "disabled";
286 };
287
288 simmemsel@8003c400 {
289 reg = <0x8003c400 100>;
290 status = "disabled";
291 };
292
293 gpiomon@8003c500 {
294 reg = <0x8003c500 100>;
295 status = "disabled";
296 };
297
298 simenet@8003c700 {
299 reg = <0x8003c700 100>;
300 status = "disabled";
301 };
302
303 armjtag@8003c800 {
304 reg = <0x8003c800 100>;
305 status = "disabled";
306 };
307 };
308
309 apbx@80040000 {
310 compatible = "simple-bus";
311 #address-cells = <1>;
312 #size-cells = <1>;
313 reg = <0x80040000 0x40000>;
314 ranges;
315
316 clkctl@80040000 {
317 reg = <0x80040000 2000>;
318 status = "disabled";
319 };
320
321 saif0: saif@80042000 {
322 reg = <0x80042000 2000>;
323 interrupts = <59 80>;
324 status = "disabled";
325 };
326
327 power@80044000 {
328 reg = <0x80044000 2000>;
329 status = "disabled";
330 };
331
332 saif1: saif@80046000 {
333 reg = <0x80046000 2000>;
334 interrupts = <58 81>;
335 status = "disabled";
336 };
337
338 lradc@80050000 {
339 reg = <0x80050000 2000>;
340 status = "disabled";
341 };
342
343 spdif@80054000 {
344 reg = <0x80054000 2000>;
345 interrupts = <45 66>;
346 status = "disabled";
347 };
348
349 rtc@80056000 {
350 reg = <0x80056000 2000>;
351 interrupts = <28 29>;
352 status = "disabled";
353 };
354
355 i2c0: i2c@80058000 {
Shawn Guo2a96e392012-05-10 15:02:10 +0800[diff] [blame^]356 #address-cells = <1>;
357 #size-cells = <0>;
358 compatible = "fsl,imx28-i2c";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]359 reg = <0x80058000 2000>;
360 interrupts = <111 68>;
361 status = "disabled";
362 };
363
364 i2c1: i2c@8005a000 {
Shawn Guo2a96e392012-05-10 15:02:10 +0800[diff] [blame^]365 #address-cells = <1>;
366 #size-cells = <0>;
367 compatible = "fsl,imx28-i2c";
Dong Aishengbc3a59c2012-03-31 21:26:57 +0800[diff] [blame]368 reg = <0x8005a000 2000>;
369 interrupts = <110 69>;
370 status = "disabled";
371 };
372
373 pwm@80064000 {
374 reg = <0x80064000 2000>;
375 status = "disabled";
376 };
377
378 timrot@80068000 {
379 reg = <0x80068000 2000>;
380 status = "disabled";
381 };
382
383 auart0: serial@8006a000 {
384 reg = <0x8006a000 0x2000>;
385 interrupts = <112 70 71>;
386 status = "disabled";
387 };
388
389 auart1: serial@8006c000 {
390 reg = <0x8006c000 0x2000>;
391 interrupts = <113 72 73>;
392 status = "disabled";
393 };
394
395 auart2: serial@8006e000 {
396 reg = <0x8006e000 0x2000>;
397 interrupts = <114 74 75>;
398 status = "disabled";
399 };
400
401 auart3: serial@80070000 {
402 reg = <0x80070000 0x2000>;
403 interrupts = <115 76 77>;
404 status = "disabled";
405 };
406
407 auart4: serial@80072000 {
408 reg = <0x80072000 0x2000>;
409 interrupts = <116 78 79>;
410 status = "disabled";
411 };
412
413 duart: serial@80074000 {
414 compatible = "arm,pl011", "arm,primecell";
415 reg = <0x80074000 0x1000>;
416 interrupts = <47>;
417 status = "disabled";
418 };
419
420 usbphy0: usbphy@8007c000 {
421 reg = <0x8007c000 0x2000>;
422 status = "disabled";
423 };
424
425 usbphy1: usbphy@8007e000 {
426 reg = <0x8007e000 0x2000>;
427 status = "disabled";
428 };
429 };
430 };
431
432 ahb@80080000 {
433 compatible = "simple-bus";
434 #address-cells = <1>;
435 #size-cells = <1>;
436 reg = <0x80080000 0x80000>;
437 ranges;
438
439 usbctrl0: usbctrl@80080000 {
440 reg = <0x80080000 0x10000>;
441 status = "disabled";
442 };
443
444 usbctrl1: usbctrl@80090000 {
445 reg = <0x80090000 0x10000>;
446 status = "disabled";
447 };
448
449 dflpt@800c0000 {
450 reg = <0x800c0000 0x10000>;
451 status = "disabled";
452 };
453
454 mac0: ethernet@800f0000 {
455 compatible = "fsl,imx28-fec";
456 reg = <0x800f0000 0x4000>;
457 interrupts = <101>;
458 status = "disabled";
459 };
460
461 mac1: ethernet@800f4000 {
462 compatible = "fsl,imx28-fec";
463 reg = <0x800f4000 0x4000>;
464 interrupts = <102>;
465 status = "disabled";
466 };
467
468 switch@800f8000 {
469 reg = <0x800f8000 0x8000>;
470 status = "disabled";
471 };
472
473 };
474};