Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) |
| 3 | * Copyright (c) 2007-2008 Intel Corporation |
| 4 | * Jesse Barnes <jesse.barnes@intel.com> |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 5 | * Copyright 2010 Red Hat, Inc. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 6 | * |
| 7 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from |
| 8 | * FB layer. |
| 9 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> |
| 10 | * |
| 11 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 12 | * copy of this software and associated documentation files (the "Software"), |
| 13 | * to deal in the Software without restriction, including without limitation |
| 14 | * the rights to use, copy, modify, merge, publish, distribute, sub license, |
| 15 | * and/or sell copies of the Software, and to permit persons to whom the |
| 16 | * Software is furnished to do so, subject to the following conditions: |
| 17 | * |
| 18 | * The above copyright notice and this permission notice (including the |
| 19 | * next paragraph) shall be included in all copies or substantial portions |
| 20 | * of the Software. |
| 21 | * |
| 22 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 23 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 24 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 25 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 26 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 27 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 28 | * DEALINGS IN THE SOFTWARE. |
| 29 | */ |
| 30 | #include <linux/kernel.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 31 | #include <linux/slab.h> |
Thierry Reding | 10a8512 | 2012-11-21 15:31:35 +0100 | [diff] [blame] | 32 | #include <linux/hdmi.h> |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 33 | #include <linux/i2c.h> |
Adam Jackson | 47819ba | 2012-05-30 16:42:39 -0400 | [diff] [blame] | 34 | #include <linux/module.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 35 | #include <drm/drmP.h> |
| 36 | #include <drm/drm_edid.h> |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 37 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 38 | #define version_greater(edid, maj, min) \ |
| 39 | (((edid)->version > (maj)) || \ |
| 40 | ((edid)->version == (maj) && (edid)->revision > (min))) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 41 | |
Adam Jackson | d1ff640 | 2010-03-29 21:43:26 +0000 | [diff] [blame] | 42 | #define EDID_EST_TIMINGS 16 |
| 43 | #define EDID_STD_TIMINGS 8 |
| 44 | #define EDID_DETAILED_TIMINGS 4 |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 45 | |
| 46 | /* |
| 47 | * EDID blocks out in the wild have a variety of bugs, try to collect |
| 48 | * them here (note that userspace may work around broken monitors first, |
| 49 | * but fixes should make their way here so that the kernel "just works" |
| 50 | * on as many displays as possible). |
| 51 | */ |
| 52 | |
| 53 | /* First detailed mode wrong, use largest 60Hz mode */ |
| 54 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) |
| 55 | /* Reported 135MHz pixel clock is too high, needs adjustment */ |
| 56 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) |
| 57 | /* Prefer the largest mode at 75 Hz */ |
| 58 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) |
| 59 | /* Detail timing is in cm not mm */ |
| 60 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) |
| 61 | /* Detailed timing descriptors have bogus size values, so just take the |
| 62 | * maximum size and use that. |
| 63 | */ |
| 64 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) |
| 65 | /* Monitor forgot to set the first detailed is preferred bit. */ |
| 66 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) |
| 67 | /* use +hsync +vsync for detailed mode */ |
| 68 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 69 | /* Force reduced-blanking timings for detailed modes */ |
| 70 | #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 71 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 72 | struct detailed_mode_closure { |
| 73 | struct drm_connector *connector; |
| 74 | struct edid *edid; |
| 75 | bool preferred; |
| 76 | u32 quirks; |
| 77 | int modes; |
| 78 | }; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 79 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 80 | #define LEVEL_DMT 0 |
| 81 | #define LEVEL_GTF 1 |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 82 | #define LEVEL_GTF2 2 |
| 83 | #define LEVEL_CVT 3 |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 84 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 85 | static struct edid_quirk { |
Ian Pilcher | c51a3fd6 | 2012-04-22 11:40:26 -0500 | [diff] [blame] | 86 | char vendor[4]; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 87 | int product_id; |
| 88 | u32 quirks; |
| 89 | } edid_quirk_list[] = { |
| 90 | /* Acer AL1706 */ |
| 91 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, |
| 92 | /* Acer F51 */ |
| 93 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, |
| 94 | /* Unknown Acer */ |
| 95 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 96 | |
| 97 | /* Belinea 10 15 55 */ |
| 98 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, |
| 99 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, |
| 100 | |
| 101 | /* Envision Peripherals, Inc. EN-7100e */ |
| 102 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
Adam Jackson | ba1163d | 2010-04-06 16:11:00 +0000 | [diff] [blame] | 103 | /* Envision EN2028 */ |
| 104 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 105 | |
| 106 | /* Funai Electronics PM36B */ |
| 107 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
| 108 | EDID_QUIRK_DETAILED_IN_CM }, |
| 109 | |
| 110 | /* LG Philips LCD LP154W01-A5 */ |
| 111 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
| 112 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, |
| 113 | |
| 114 | /* Philips 107p5 CRT */ |
| 115 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 116 | |
| 117 | /* Proview AY765C */ |
| 118 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, |
| 119 | |
| 120 | /* Samsung SyncMaster 205BW. Note: irony */ |
| 121 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, |
| 122 | /* Samsung SyncMaster 22[5-6]BW */ |
| 123 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, |
| 124 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 125 | |
| 126 | /* ViewSonic VA2026w */ |
| 127 | { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, |
Alex Deucher | 118bdbd | 2013-08-12 11:04:29 -0400 | [diff] [blame] | 128 | |
| 129 | /* Medion MD 30217 PG */ |
| 130 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 131 | }; |
| 132 | |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 133 | /* |
| 134 | * Autogenerated from the DMT spec. |
| 135 | * This table is copied from xfree86/modes/xf86EdidModes.c. |
| 136 | */ |
| 137 | static const struct drm_display_mode drm_dmt_modes[] = { |
| 138 | /* 640x350@85Hz */ |
| 139 | { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
| 140 | 736, 832, 0, 350, 382, 385, 445, 0, |
| 141 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 142 | /* 640x400@85Hz */ |
| 143 | { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, |
| 144 | 736, 832, 0, 400, 401, 404, 445, 0, |
| 145 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 146 | /* 720x400@85Hz */ |
| 147 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, |
| 148 | 828, 936, 0, 400, 401, 404, 446, 0, |
| 149 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 150 | /* 640x480@60Hz */ |
| 151 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
| 152 | 752, 800, 0, 480, 489, 492, 525, 0, |
| 153 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 154 | /* 640x480@72Hz */ |
| 155 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
| 156 | 704, 832, 0, 480, 489, 492, 520, 0, |
| 157 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 158 | /* 640x480@75Hz */ |
| 159 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
| 160 | 720, 840, 0, 480, 481, 484, 500, 0, |
| 161 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 162 | /* 640x480@85Hz */ |
| 163 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, |
| 164 | 752, 832, 0, 480, 481, 484, 509, 0, |
| 165 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 166 | /* 800x600@56Hz */ |
| 167 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
| 168 | 896, 1024, 0, 600, 601, 603, 625, 0, |
| 169 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 170 | /* 800x600@60Hz */ |
| 171 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
| 172 | 968, 1056, 0, 600, 601, 605, 628, 0, |
| 173 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 174 | /* 800x600@72Hz */ |
| 175 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
| 176 | 976, 1040, 0, 600, 637, 643, 666, 0, |
| 177 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 178 | /* 800x600@75Hz */ |
| 179 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
| 180 | 896, 1056, 0, 600, 601, 604, 625, 0, |
| 181 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 182 | /* 800x600@85Hz */ |
| 183 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, |
| 184 | 896, 1048, 0, 600, 601, 604, 631, 0, |
| 185 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 186 | /* 800x600@120Hz RB */ |
| 187 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, |
| 188 | 880, 960, 0, 600, 603, 607, 636, 0, |
| 189 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 190 | /* 848x480@60Hz */ |
| 191 | { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, |
| 192 | 976, 1088, 0, 480, 486, 494, 517, 0, |
| 193 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 194 | /* 1024x768@43Hz, interlace */ |
| 195 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, |
| 196 | 1208, 1264, 0, 768, 768, 772, 817, 0, |
| 197 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
| 198 | DRM_MODE_FLAG_INTERLACE) }, |
| 199 | /* 1024x768@60Hz */ |
| 200 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
| 201 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
| 202 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 203 | /* 1024x768@70Hz */ |
| 204 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
| 205 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
| 206 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 207 | /* 1024x768@75Hz */ |
| 208 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, |
| 209 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
| 210 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 211 | /* 1024x768@85Hz */ |
| 212 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, |
| 213 | 1168, 1376, 0, 768, 769, 772, 808, 0, |
| 214 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 215 | /* 1024x768@120Hz RB */ |
| 216 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, |
| 217 | 1104, 1184, 0, 768, 771, 775, 813, 0, |
| 218 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 219 | /* 1152x864@75Hz */ |
| 220 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
| 221 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
| 222 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 223 | /* 1280x768@60Hz RB */ |
| 224 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, |
| 225 | 1360, 1440, 0, 768, 771, 778, 790, 0, |
| 226 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 227 | /* 1280x768@60Hz */ |
| 228 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, |
| 229 | 1472, 1664, 0, 768, 771, 778, 798, 0, |
| 230 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 231 | /* 1280x768@75Hz */ |
| 232 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, |
| 233 | 1488, 1696, 0, 768, 771, 778, 805, 0, |
| 234 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 235 | /* 1280x768@85Hz */ |
| 236 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, |
| 237 | 1496, 1712, 0, 768, 771, 778, 809, 0, |
| 238 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 239 | /* 1280x768@120Hz RB */ |
| 240 | { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, |
| 241 | 1360, 1440, 0, 768, 771, 778, 813, 0, |
| 242 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 243 | /* 1280x800@60Hz RB */ |
| 244 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, |
| 245 | 1360, 1440, 0, 800, 803, 809, 823, 0, |
| 246 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 247 | /* 1280x800@60Hz */ |
| 248 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, |
| 249 | 1480, 1680, 0, 800, 803, 809, 831, 0, |
| 250 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 251 | /* 1280x800@75Hz */ |
| 252 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, |
| 253 | 1488, 1696, 0, 800, 803, 809, 838, 0, |
| 254 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 255 | /* 1280x800@85Hz */ |
| 256 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, |
| 257 | 1496, 1712, 0, 800, 803, 809, 843, 0, |
| 258 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 259 | /* 1280x800@120Hz RB */ |
| 260 | { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, |
| 261 | 1360, 1440, 0, 800, 803, 809, 847, 0, |
| 262 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 263 | /* 1280x960@60Hz */ |
| 264 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, |
| 265 | 1488, 1800, 0, 960, 961, 964, 1000, 0, |
| 266 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 267 | /* 1280x960@85Hz */ |
| 268 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, |
| 269 | 1504, 1728, 0, 960, 961, 964, 1011, 0, |
| 270 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 271 | /* 1280x960@120Hz RB */ |
| 272 | { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, |
| 273 | 1360, 1440, 0, 960, 963, 967, 1017, 0, |
| 274 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 275 | /* 1280x1024@60Hz */ |
| 276 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, |
| 277 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 278 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 279 | /* 1280x1024@75Hz */ |
| 280 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
| 281 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 282 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 283 | /* 1280x1024@85Hz */ |
| 284 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, |
| 285 | 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, |
| 286 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 287 | /* 1280x1024@120Hz RB */ |
| 288 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, |
| 289 | 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, |
| 290 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 291 | /* 1360x768@60Hz */ |
| 292 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, |
| 293 | 1536, 1792, 0, 768, 771, 777, 795, 0, |
| 294 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 295 | /* 1360x768@120Hz RB */ |
| 296 | { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, |
| 297 | 1440, 1520, 0, 768, 771, 776, 813, 0, |
| 298 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 299 | /* 1400x1050@60Hz RB */ |
| 300 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, |
| 301 | 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, |
| 302 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 303 | /* 1400x1050@60Hz */ |
| 304 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, |
| 305 | 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, |
| 306 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 307 | /* 1400x1050@75Hz */ |
| 308 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, |
| 309 | 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, |
| 310 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 311 | /* 1400x1050@85Hz */ |
| 312 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, |
| 313 | 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, |
| 314 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 315 | /* 1400x1050@120Hz RB */ |
| 316 | { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, |
| 317 | 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, |
| 318 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 319 | /* 1440x900@60Hz RB */ |
| 320 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, |
| 321 | 1520, 1600, 0, 900, 903, 909, 926, 0, |
| 322 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 323 | /* 1440x900@60Hz */ |
| 324 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, |
| 325 | 1672, 1904, 0, 900, 903, 909, 934, 0, |
| 326 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 327 | /* 1440x900@75Hz */ |
| 328 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, |
| 329 | 1688, 1936, 0, 900, 903, 909, 942, 0, |
| 330 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 331 | /* 1440x900@85Hz */ |
| 332 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, |
| 333 | 1696, 1952, 0, 900, 903, 909, 948, 0, |
| 334 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 335 | /* 1440x900@120Hz RB */ |
| 336 | { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, |
| 337 | 1520, 1600, 0, 900, 903, 909, 953, 0, |
| 338 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 339 | /* 1600x1200@60Hz */ |
| 340 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, |
| 341 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 342 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 343 | /* 1600x1200@65Hz */ |
| 344 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, |
| 345 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 346 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 347 | /* 1600x1200@70Hz */ |
| 348 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, |
| 349 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 350 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 351 | /* 1600x1200@75Hz */ |
| 352 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, |
| 353 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 354 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 355 | /* 1600x1200@85Hz */ |
| 356 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, |
| 357 | 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, |
| 358 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 359 | /* 1600x1200@120Hz RB */ |
| 360 | { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, |
| 361 | 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, |
| 362 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 363 | /* 1680x1050@60Hz RB */ |
| 364 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, |
| 365 | 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, |
| 366 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 367 | /* 1680x1050@60Hz */ |
| 368 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, |
| 369 | 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, |
| 370 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 371 | /* 1680x1050@75Hz */ |
| 372 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, |
| 373 | 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, |
| 374 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 375 | /* 1680x1050@85Hz */ |
| 376 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, |
| 377 | 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, |
| 378 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 379 | /* 1680x1050@120Hz RB */ |
| 380 | { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, |
| 381 | 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, |
| 382 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 383 | /* 1792x1344@60Hz */ |
| 384 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, |
| 385 | 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, |
| 386 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 387 | /* 1792x1344@75Hz */ |
| 388 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, |
| 389 | 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, |
| 390 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 391 | /* 1792x1344@120Hz RB */ |
| 392 | { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, |
| 393 | 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, |
| 394 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 395 | /* 1856x1392@60Hz */ |
| 396 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, |
| 397 | 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, |
| 398 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 399 | /* 1856x1392@75Hz */ |
| 400 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, |
| 401 | 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, |
| 402 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 403 | /* 1856x1392@120Hz RB */ |
| 404 | { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, |
| 405 | 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, |
| 406 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 407 | /* 1920x1200@60Hz RB */ |
| 408 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, |
| 409 | 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, |
| 410 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 411 | /* 1920x1200@60Hz */ |
| 412 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, |
| 413 | 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, |
| 414 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 415 | /* 1920x1200@75Hz */ |
| 416 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, |
| 417 | 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, |
| 418 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 419 | /* 1920x1200@85Hz */ |
| 420 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, |
| 421 | 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, |
| 422 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 423 | /* 1920x1200@120Hz RB */ |
| 424 | { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, |
| 425 | 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, |
| 426 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 427 | /* 1920x1440@60Hz */ |
| 428 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, |
| 429 | 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, |
| 430 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 431 | /* 1920x1440@75Hz */ |
| 432 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, |
| 433 | 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, |
| 434 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 435 | /* 1920x1440@120Hz RB */ |
| 436 | { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, |
| 437 | 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, |
| 438 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 439 | /* 2560x1600@60Hz RB */ |
| 440 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, |
| 441 | 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, |
| 442 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 443 | /* 2560x1600@60Hz */ |
| 444 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, |
| 445 | 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, |
| 446 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 447 | /* 2560x1600@75HZ */ |
| 448 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, |
| 449 | 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, |
| 450 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 451 | /* 2560x1600@85HZ */ |
| 452 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, |
| 453 | 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, |
| 454 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, |
| 455 | /* 2560x1600@120Hz RB */ |
| 456 | { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, |
| 457 | 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, |
| 458 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, |
| 459 | }; |
| 460 | |
| 461 | static const struct drm_display_mode edid_est_modes[] = { |
| 462 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, |
| 463 | 968, 1056, 0, 600, 601, 605, 628, 0, |
| 464 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ |
| 465 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, |
| 466 | 896, 1024, 0, 600, 601, 603, 625, 0, |
| 467 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ |
| 468 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, |
| 469 | 720, 840, 0, 480, 481, 484, 500, 0, |
| 470 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ |
| 471 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, |
| 472 | 704, 832, 0, 480, 489, 491, 520, 0, |
| 473 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ |
| 474 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, |
| 475 | 768, 864, 0, 480, 483, 486, 525, 0, |
| 476 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ |
| 477 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, |
| 478 | 752, 800, 0, 480, 490, 492, 525, 0, |
| 479 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ |
| 480 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, |
| 481 | 846, 900, 0, 400, 421, 423, 449, 0, |
| 482 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ |
| 483 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, |
| 484 | 846, 900, 0, 400, 412, 414, 449, 0, |
| 485 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ |
| 486 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, |
| 487 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, |
| 488 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ |
| 489 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, |
| 490 | 1136, 1312, 0, 768, 769, 772, 800, 0, |
| 491 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ |
| 492 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, |
| 493 | 1184, 1328, 0, 768, 771, 777, 806, 0, |
| 494 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ |
| 495 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, |
| 496 | 1184, 1344, 0, 768, 771, 777, 806, 0, |
| 497 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ |
| 498 | { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, |
| 499 | 1208, 1264, 0, 768, 768, 776, 817, 0, |
| 500 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ |
| 501 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, |
| 502 | 928, 1152, 0, 624, 625, 628, 667, 0, |
| 503 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ |
| 504 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, |
| 505 | 896, 1056, 0, 600, 601, 604, 625, 0, |
| 506 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ |
| 507 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, |
| 508 | 976, 1040, 0, 600, 637, 643, 666, 0, |
| 509 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ |
| 510 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, |
| 511 | 1344, 1600, 0, 864, 865, 868, 900, 0, |
| 512 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ |
| 513 | }; |
| 514 | |
| 515 | struct minimode { |
| 516 | short w; |
| 517 | short h; |
| 518 | short r; |
| 519 | short rb; |
| 520 | }; |
| 521 | |
| 522 | static const struct minimode est3_modes[] = { |
| 523 | /* byte 6 */ |
| 524 | { 640, 350, 85, 0 }, |
| 525 | { 640, 400, 85, 0 }, |
| 526 | { 720, 400, 85, 0 }, |
| 527 | { 640, 480, 85, 0 }, |
| 528 | { 848, 480, 60, 0 }, |
| 529 | { 800, 600, 85, 0 }, |
| 530 | { 1024, 768, 85, 0 }, |
| 531 | { 1152, 864, 75, 0 }, |
| 532 | /* byte 7 */ |
| 533 | { 1280, 768, 60, 1 }, |
| 534 | { 1280, 768, 60, 0 }, |
| 535 | { 1280, 768, 75, 0 }, |
| 536 | { 1280, 768, 85, 0 }, |
| 537 | { 1280, 960, 60, 0 }, |
| 538 | { 1280, 960, 85, 0 }, |
| 539 | { 1280, 1024, 60, 0 }, |
| 540 | { 1280, 1024, 85, 0 }, |
| 541 | /* byte 8 */ |
| 542 | { 1360, 768, 60, 0 }, |
| 543 | { 1440, 900, 60, 1 }, |
| 544 | { 1440, 900, 60, 0 }, |
| 545 | { 1440, 900, 75, 0 }, |
| 546 | { 1440, 900, 85, 0 }, |
| 547 | { 1400, 1050, 60, 1 }, |
| 548 | { 1400, 1050, 60, 0 }, |
| 549 | { 1400, 1050, 75, 0 }, |
| 550 | /* byte 9 */ |
| 551 | { 1400, 1050, 85, 0 }, |
| 552 | { 1680, 1050, 60, 1 }, |
| 553 | { 1680, 1050, 60, 0 }, |
| 554 | { 1680, 1050, 75, 0 }, |
| 555 | { 1680, 1050, 85, 0 }, |
| 556 | { 1600, 1200, 60, 0 }, |
| 557 | { 1600, 1200, 65, 0 }, |
| 558 | { 1600, 1200, 70, 0 }, |
| 559 | /* byte 10 */ |
| 560 | { 1600, 1200, 75, 0 }, |
| 561 | { 1600, 1200, 85, 0 }, |
| 562 | { 1792, 1344, 60, 0 }, |
| 563 | { 1792, 1344, 85, 0 }, |
| 564 | { 1856, 1392, 60, 0 }, |
| 565 | { 1856, 1392, 75, 0 }, |
| 566 | { 1920, 1200, 60, 1 }, |
| 567 | { 1920, 1200, 60, 0 }, |
| 568 | /* byte 11 */ |
| 569 | { 1920, 1200, 75, 0 }, |
| 570 | { 1920, 1200, 85, 0 }, |
| 571 | { 1920, 1440, 60, 0 }, |
| 572 | { 1920, 1440, 75, 0 }, |
| 573 | }; |
| 574 | |
| 575 | static const struct minimode extra_modes[] = { |
| 576 | { 1024, 576, 60, 0 }, |
| 577 | { 1366, 768, 60, 0 }, |
| 578 | { 1600, 900, 60, 0 }, |
| 579 | { 1680, 945, 60, 0 }, |
| 580 | { 1920, 1080, 60, 0 }, |
| 581 | { 2048, 1152, 60, 0 }, |
| 582 | { 2048, 1536, 60, 0 }, |
| 583 | }; |
| 584 | |
| 585 | /* |
| 586 | * Probably taken from CEA-861 spec. |
| 587 | * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. |
| 588 | */ |
| 589 | static const struct drm_display_mode edid_cea_modes[] = { |
| 590 | /* 1 - 640x480@60Hz */ |
| 591 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, |
| 592 | 752, 800, 0, 480, 490, 492, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 593 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 594 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 595 | /* 2 - 720x480@60Hz */ |
| 596 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
| 597 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 598 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 599 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 600 | /* 3 - 720x480@60Hz */ |
| 601 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, |
| 602 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 603 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 604 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 605 | /* 4 - 1280x720@60Hz */ |
| 606 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, |
| 607 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 608 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 609 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 610 | /* 5 - 1920x1080i@60Hz */ |
| 611 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
| 612 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
| 613 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 614 | DRM_MODE_FLAG_INTERLACE), |
| 615 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 616 | /* 6 - 1440x480i@60Hz */ |
| 617 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
| 618 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 619 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 620 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 621 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 622 | /* 7 - 1440x480i@60Hz */ |
| 623 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
| 624 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 625 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 626 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 627 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 628 | /* 8 - 1440x240@60Hz */ |
| 629 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
| 630 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
| 631 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 632 | DRM_MODE_FLAG_DBLCLK), |
| 633 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 634 | /* 9 - 1440x240@60Hz */ |
| 635 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, |
| 636 | 1602, 1716, 0, 240, 244, 247, 262, 0, |
| 637 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 638 | DRM_MODE_FLAG_DBLCLK), |
| 639 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 640 | /* 10 - 2880x480i@60Hz */ |
| 641 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
| 642 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
| 643 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 644 | DRM_MODE_FLAG_INTERLACE), |
| 645 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 646 | /* 11 - 2880x480i@60Hz */ |
| 647 | { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
| 648 | 3204, 3432, 0, 480, 488, 494, 525, 0, |
| 649 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 650 | DRM_MODE_FLAG_INTERLACE), |
| 651 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 652 | /* 12 - 2880x240@60Hz */ |
| 653 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
| 654 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 655 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 656 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 657 | /* 13 - 2880x240@60Hz */ |
| 658 | { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, |
| 659 | 3204, 3432, 0, 240, 244, 247, 262, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 660 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 661 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 662 | /* 14 - 1440x480@60Hz */ |
| 663 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
| 664 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 665 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 666 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 667 | /* 15 - 1440x480@60Hz */ |
| 668 | { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, |
| 669 | 1596, 1716, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 670 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 671 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 672 | /* 16 - 1920x1080@60Hz */ |
| 673 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
| 674 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 675 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 676 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 677 | /* 17 - 720x576@50Hz */ |
| 678 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
| 679 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 680 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 681 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 682 | /* 18 - 720x576@50Hz */ |
| 683 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
| 684 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 685 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 686 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 687 | /* 19 - 1280x720@50Hz */ |
| 688 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, |
| 689 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 690 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 691 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 692 | /* 20 - 1920x1080i@50Hz */ |
| 693 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
| 694 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
| 695 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 696 | DRM_MODE_FLAG_INTERLACE), |
| 697 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 698 | /* 21 - 1440x576i@50Hz */ |
| 699 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
| 700 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 701 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 702 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 703 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 704 | /* 22 - 1440x576i@50Hz */ |
| 705 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
| 706 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 707 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 708 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 709 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 710 | /* 23 - 1440x288@50Hz */ |
| 711 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
| 712 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
| 713 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 714 | DRM_MODE_FLAG_DBLCLK), |
| 715 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 716 | /* 24 - 1440x288@50Hz */ |
| 717 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, |
| 718 | 1590, 1728, 0, 288, 290, 293, 312, 0, |
| 719 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 720 | DRM_MODE_FLAG_DBLCLK), |
| 721 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 722 | /* 25 - 2880x576i@50Hz */ |
| 723 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
| 724 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
| 725 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 726 | DRM_MODE_FLAG_INTERLACE), |
| 727 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 728 | /* 26 - 2880x576i@50Hz */ |
| 729 | { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
| 730 | 3180, 3456, 0, 576, 580, 586, 625, 0, |
| 731 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 732 | DRM_MODE_FLAG_INTERLACE), |
| 733 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 734 | /* 27 - 2880x288@50Hz */ |
| 735 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
| 736 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 737 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 738 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 739 | /* 28 - 2880x288@50Hz */ |
| 740 | { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, |
| 741 | 3180, 3456, 0, 288, 290, 293, 312, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 742 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 743 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 744 | /* 29 - 1440x576@50Hz */ |
| 745 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
| 746 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 747 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 748 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 749 | /* 30 - 1440x576@50Hz */ |
| 750 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
| 751 | 1592, 1728, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 752 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 753 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 754 | /* 31 - 1920x1080@50Hz */ |
| 755 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
| 756 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 757 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 758 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 759 | /* 32 - 1920x1080@24Hz */ |
| 760 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, |
| 761 | 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 762 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 763 | .vrefresh = 24, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 764 | /* 33 - 1920x1080@25Hz */ |
| 765 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, |
| 766 | 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 767 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 768 | .vrefresh = 25, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 769 | /* 34 - 1920x1080@30Hz */ |
| 770 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, |
| 771 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 772 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 773 | .vrefresh = 30, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 774 | /* 35 - 2880x480@60Hz */ |
| 775 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
| 776 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 777 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 778 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 779 | /* 36 - 2880x480@60Hz */ |
| 780 | { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, |
| 781 | 3192, 3432, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 782 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 783 | .vrefresh = 60, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 784 | /* 37 - 2880x576@50Hz */ |
| 785 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
| 786 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 787 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 788 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 789 | /* 38 - 2880x576@50Hz */ |
| 790 | { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, |
| 791 | 3184, 3456, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 792 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 793 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 794 | /* 39 - 1920x1080i@50Hz */ |
| 795 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, |
| 796 | 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, |
| 797 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 798 | DRM_MODE_FLAG_INTERLACE), |
| 799 | .vrefresh = 50, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 800 | /* 40 - 1920x1080i@100Hz */ |
| 801 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, |
| 802 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
| 803 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 804 | DRM_MODE_FLAG_INTERLACE), |
| 805 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 806 | /* 41 - 1280x720@100Hz */ |
| 807 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, |
| 808 | 1760, 1980, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 809 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 810 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 811 | /* 42 - 720x576@100Hz */ |
| 812 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
| 813 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 814 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 815 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 816 | /* 43 - 720x576@100Hz */ |
| 817 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
| 818 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 819 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 820 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 821 | /* 44 - 1440x576i@100Hz */ |
| 822 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
| 823 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 824 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 825 | DRM_MODE_FLAG_DBLCLK), |
| 826 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 827 | /* 45 - 1440x576i@100Hz */ |
| 828 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, |
| 829 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 830 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 831 | DRM_MODE_FLAG_DBLCLK), |
| 832 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 833 | /* 46 - 1920x1080i@120Hz */ |
| 834 | { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, |
| 835 | 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, |
| 836 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 837 | DRM_MODE_FLAG_INTERLACE), |
| 838 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 839 | /* 47 - 1280x720@120Hz */ |
| 840 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, |
| 841 | 1430, 1650, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 842 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 843 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 844 | /* 48 - 720x480@120Hz */ |
| 845 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
| 846 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 847 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 848 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 849 | /* 49 - 720x480@120Hz */ |
| 850 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, |
| 851 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 852 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 853 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 854 | /* 50 - 1440x480i@120Hz */ |
| 855 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
| 856 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 857 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 858 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 859 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 860 | /* 51 - 1440x480i@120Hz */ |
| 861 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, |
| 862 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 863 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 864 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 865 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 866 | /* 52 - 720x576@200Hz */ |
| 867 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
| 868 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 869 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 870 | .vrefresh = 200, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 871 | /* 53 - 720x576@200Hz */ |
| 872 | { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, |
| 873 | 796, 864, 0, 576, 581, 586, 625, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 874 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 875 | .vrefresh = 200, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 876 | /* 54 - 1440x576i@200Hz */ |
| 877 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
| 878 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 879 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 880 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 881 | .vrefresh = 200, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 882 | /* 55 - 1440x576i@200Hz */ |
| 883 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, |
| 884 | 1590, 1728, 0, 576, 580, 586, 625, 0, |
| 885 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 886 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 887 | .vrefresh = 200, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 888 | /* 56 - 720x480@240Hz */ |
| 889 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
| 890 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 891 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 892 | .vrefresh = 240, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 893 | /* 57 - 720x480@240Hz */ |
| 894 | { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, |
| 895 | 798, 858, 0, 480, 489, 495, 525, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 896 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
| 897 | .vrefresh = 240, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 898 | /* 58 - 1440x480i@240 */ |
| 899 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
| 900 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 901 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 902 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 903 | .vrefresh = 240, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 904 | /* 59 - 1440x480i@240 */ |
| 905 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, |
| 906 | 1602, 1716, 0, 480, 488, 494, 525, 0, |
| 907 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 908 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
| 909 | .vrefresh = 240, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 910 | /* 60 - 1280x720@24Hz */ |
| 911 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, |
| 912 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 913 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 914 | .vrefresh = 24, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 915 | /* 61 - 1280x720@25Hz */ |
| 916 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, |
| 917 | 3740, 3960, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 918 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 919 | .vrefresh = 25, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 920 | /* 62 - 1280x720@30Hz */ |
| 921 | { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, |
| 922 | 3080, 3300, 0, 720, 725, 730, 750, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 923 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 924 | .vrefresh = 30, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 925 | /* 63 - 1920x1080@120Hz */ |
| 926 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, |
| 927 | 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 928 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 929 | .vrefresh = 120, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 930 | /* 64 - 1920x1080@100Hz */ |
| 931 | { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, |
| 932 | 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 933 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC), |
| 934 | .vrefresh = 100, }, |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 935 | }; |
| 936 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 937 | /*** DDC fetch and block validation ***/ |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 938 | |
Adam Jackson | 083ae05 | 2009-09-23 17:30:45 -0400 | [diff] [blame] | 939 | static const u8 edid_header[] = { |
| 940 | 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 |
| 941 | }; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 942 | |
Thomas Reim | 051963d | 2011-07-29 14:28:57 +0000 | [diff] [blame] | 943 | /* |
| 944 | * Sanity check the header of the base EDID block. Return 8 if the header |
| 945 | * is perfect, down to 0 if it's totally wrong. |
| 946 | */ |
| 947 | int drm_edid_header_is_valid(const u8 *raw_edid) |
| 948 | { |
| 949 | int i, score = 0; |
| 950 | |
| 951 | for (i = 0; i < sizeof(edid_header); i++) |
| 952 | if (raw_edid[i] == edid_header[i]) |
| 953 | score++; |
| 954 | |
| 955 | return score; |
| 956 | } |
| 957 | EXPORT_SYMBOL(drm_edid_header_is_valid); |
| 958 | |
Adam Jackson | 47819ba | 2012-05-30 16:42:39 -0400 | [diff] [blame] | 959 | static int edid_fixup __read_mostly = 6; |
| 960 | module_param_named(edid_fixup, edid_fixup, int, 0400); |
| 961 | MODULE_PARM_DESC(edid_fixup, |
| 962 | "Minimum number of valid EDID header bytes (0-8, default 6)"); |
Thomas Reim | 051963d | 2011-07-29 14:28:57 +0000 | [diff] [blame] | 963 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 964 | /* |
| 965 | * Sanity check the EDID block (base or extension). Return 0 if the block |
| 966 | * doesn't check out, or 1 if it's valid. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 967 | */ |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 968 | bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 969 | { |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 970 | int i; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 971 | u8 csum = 0; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 972 | struct edid *edid = (struct edid *)raw_edid; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 973 | |
Seung-Woo Kim | fe2ef78 | 2013-07-02 17:57:04 +0900 | [diff] [blame] | 974 | if (WARN_ON(!raw_edid)) |
| 975 | return false; |
| 976 | |
Adam Jackson | 47819ba | 2012-05-30 16:42:39 -0400 | [diff] [blame] | 977 | if (edid_fixup > 8 || edid_fixup < 0) |
| 978 | edid_fixup = 6; |
| 979 | |
Adam Jackson | f89ec8a | 2012-04-16 10:40:08 -0400 | [diff] [blame] | 980 | if (block == 0) { |
Thomas Reim | 051963d | 2011-07-29 14:28:57 +0000 | [diff] [blame] | 981 | int score = drm_edid_header_is_valid(raw_edid); |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 982 | if (score == 8) ; |
Adam Jackson | 47819ba | 2012-05-30 16:42:39 -0400 | [diff] [blame] | 983 | else if (score >= edid_fixup) { |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 984 | DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); |
| 985 | memcpy(raw_edid, edid_header, sizeof(edid_header)); |
| 986 | } else { |
| 987 | goto bad; |
| 988 | } |
| 989 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 990 | |
| 991 | for (i = 0; i < EDID_LENGTH; i++) |
| 992 | csum += raw_edid[i]; |
| 993 | if (csum) { |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 994 | if (print_bad_edid) { |
| 995 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); |
| 996 | } |
Adam Jackson | 4a638b4 | 2010-05-25 16:33:09 -0400 | [diff] [blame] | 997 | |
| 998 | /* allow CEA to slide through, switches mangle this */ |
| 999 | if (raw_edid[0] != 0x02) |
| 1000 | goto bad; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1001 | } |
| 1002 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1003 | /* per-block-type checks */ |
| 1004 | switch (raw_edid[0]) { |
| 1005 | case 0: /* base */ |
| 1006 | if (edid->version != 1) { |
| 1007 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); |
| 1008 | goto bad; |
| 1009 | } |
Adam Jackson | 862b89c | 2009-11-23 14:23:06 -0500 | [diff] [blame] | 1010 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1011 | if (edid->revision > 4) |
| 1012 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); |
| 1013 | break; |
| 1014 | |
| 1015 | default: |
| 1016 | break; |
| 1017 | } |
Adam Jackson | 47ee4cc | 2009-11-23 14:23:05 -0500 | [diff] [blame] | 1018 | |
Seung-Woo Kim | fe2ef78 | 2013-07-02 17:57:04 +0900 | [diff] [blame] | 1019 | return true; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1020 | |
| 1021 | bad: |
Seung-Woo Kim | fe2ef78 | 2013-07-02 17:57:04 +0900 | [diff] [blame] | 1022 | if (print_bad_edid) { |
Dave Airlie | f49dadb | 2011-06-14 06:13:54 +0000 | [diff] [blame] | 1023 | printk(KERN_ERR "Raw EDID:\n"); |
Tormod Volden | 0aff47f | 2011-07-05 20:12:53 +0000 | [diff] [blame] | 1024 | print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1, |
| 1025 | raw_edid, EDID_LENGTH, false); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1026 | } |
Seung-Woo Kim | fe2ef78 | 2013-07-02 17:57:04 +0900 | [diff] [blame] | 1027 | return false; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1028 | } |
Carsten Emde | da0df92 | 2012-03-18 22:37:33 +0100 | [diff] [blame] | 1029 | EXPORT_SYMBOL(drm_edid_block_valid); |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1030 | |
| 1031 | /** |
| 1032 | * drm_edid_is_valid - sanity check EDID data |
| 1033 | * @edid: EDID data |
| 1034 | * |
| 1035 | * Sanity-check an entire EDID record (including extensions) |
| 1036 | */ |
| 1037 | bool drm_edid_is_valid(struct edid *edid) |
| 1038 | { |
| 1039 | int i; |
| 1040 | u8 *raw = (u8 *)edid; |
| 1041 | |
| 1042 | if (!edid) |
| 1043 | return false; |
| 1044 | |
| 1045 | for (i = 0; i <= edid->extensions; i++) |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 1046 | if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1047 | return false; |
| 1048 | |
| 1049 | return true; |
| 1050 | } |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 1051 | EXPORT_SYMBOL(drm_edid_is_valid); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1052 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1053 | #define DDC_SEGMENT_ADDR 0x30 |
| 1054 | /** |
| 1055 | * Get EDID information via I2C. |
| 1056 | * |
| 1057 | * \param adapter : i2c device adaptor |
| 1058 | * \param buf : EDID data buffer to be filled |
| 1059 | * \param len : EDID data buffer length |
| 1060 | * \return 0 on success or -1 on failure. |
| 1061 | * |
| 1062 | * Try to fetch EDID information by calling i2c driver function. |
| 1063 | */ |
| 1064 | static int |
| 1065 | drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, |
| 1066 | int block, int len) |
| 1067 | { |
| 1068 | unsigned char start = block * EDID_LENGTH; |
Shirish S | cd004b3 | 2012-08-30 07:04:06 +0000 | [diff] [blame] | 1069 | unsigned char segment = block >> 1; |
| 1070 | unsigned char xfers = segment ? 3 : 2; |
Chris Wilson | 4819d2e | 2011-03-15 11:04:41 +0000 | [diff] [blame] | 1071 | int ret, retries = 5; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1072 | |
Chris Wilson | 4819d2e | 2011-03-15 11:04:41 +0000 | [diff] [blame] | 1073 | /* The core i2c driver will automatically retry the transfer if the |
| 1074 | * adapter reports EAGAIN. However, we find that bit-banging transfers |
| 1075 | * are susceptible to errors under a heavily loaded machine and |
| 1076 | * generate spurious NAKs and timeouts. Retrying the transfer |
| 1077 | * of the individual block a few times seems to overcome this. |
| 1078 | */ |
| 1079 | do { |
| 1080 | struct i2c_msg msgs[] = { |
| 1081 | { |
Shirish S | cd004b3 | 2012-08-30 07:04:06 +0000 | [diff] [blame] | 1082 | .addr = DDC_SEGMENT_ADDR, |
| 1083 | .flags = 0, |
| 1084 | .len = 1, |
| 1085 | .buf = &segment, |
| 1086 | }, { |
Chris Wilson | 4819d2e | 2011-03-15 11:04:41 +0000 | [diff] [blame] | 1087 | .addr = DDC_ADDR, |
| 1088 | .flags = 0, |
| 1089 | .len = 1, |
| 1090 | .buf = &start, |
| 1091 | }, { |
| 1092 | .addr = DDC_ADDR, |
| 1093 | .flags = I2C_M_RD, |
| 1094 | .len = len, |
| 1095 | .buf = buf, |
| 1096 | } |
| 1097 | }; |
Shirish S | cd004b3 | 2012-08-30 07:04:06 +0000 | [diff] [blame] | 1098 | |
| 1099 | /* |
| 1100 | * Avoid sending the segment addr to not upset non-compliant ddc |
| 1101 | * monitors. |
| 1102 | */ |
| 1103 | ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); |
| 1104 | |
Eugeni Dodonov | 9292f37 | 2012-01-05 09:34:28 -0200 | [diff] [blame] | 1105 | if (ret == -ENXIO) { |
| 1106 | DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", |
| 1107 | adapter->name); |
| 1108 | break; |
| 1109 | } |
Shirish S | cd004b3 | 2012-08-30 07:04:06 +0000 | [diff] [blame] | 1110 | } while (ret != xfers && --retries); |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1111 | |
Shirish S | cd004b3 | 2012-08-30 07:04:06 +0000 | [diff] [blame] | 1112 | return ret == xfers ? 0 : -1; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1113 | } |
| 1114 | |
Dave Airlie | 4a9a8b7 | 2011-06-14 06:13:55 +0000 | [diff] [blame] | 1115 | static bool drm_edid_is_zero(u8 *in_edid, int length) |
| 1116 | { |
Akinobu Mita | 6311803 | 2012-11-09 12:10:42 +0000 | [diff] [blame] | 1117 | if (memchr_inv(in_edid, 0, length)) |
| 1118 | return false; |
Dave Airlie | 4a9a8b7 | 2011-06-14 06:13:55 +0000 | [diff] [blame] | 1119 | |
Dave Airlie | 4a9a8b7 | 2011-06-14 06:13:55 +0000 | [diff] [blame] | 1120 | return true; |
| 1121 | } |
| 1122 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1123 | static u8 * |
| 1124 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
| 1125 | { |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1126 | int i, j = 0, valid_extensions = 0; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1127 | u8 *block, *new; |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 1128 | bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1129 | |
| 1130 | if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL) |
| 1131 | return NULL; |
| 1132 | |
| 1133 | /* base block fetch */ |
| 1134 | for (i = 0; i < 4; i++) { |
| 1135 | if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) |
| 1136 | goto out; |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 1137 | if (drm_edid_block_valid(block, 0, print_bad_edid)) |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1138 | break; |
Dave Airlie | 4a9a8b7 | 2011-06-14 06:13:55 +0000 | [diff] [blame] | 1139 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { |
| 1140 | connector->null_edid_counter++; |
| 1141 | goto carp; |
| 1142 | } |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1143 | } |
| 1144 | if (i == 4) |
| 1145 | goto carp; |
| 1146 | |
| 1147 | /* if there's no extensions, we're done */ |
| 1148 | if (block[0x7e] == 0) |
| 1149 | return block; |
| 1150 | |
| 1151 | new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL); |
| 1152 | if (!new) |
| 1153 | goto out; |
| 1154 | block = new; |
| 1155 | |
| 1156 | for (j = 1; j <= block[0x7e]; j++) { |
| 1157 | for (i = 0; i < 4; i++) { |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1158 | if (drm_do_probe_ddc_edid(adapter, |
| 1159 | block + (valid_extensions + 1) * EDID_LENGTH, |
| 1160 | j, EDID_LENGTH)) |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1161 | goto out; |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 1162 | if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1163 | valid_extensions++; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1164 | break; |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1165 | } |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1166 | } |
Maarten Lankhorst | f934ec8c | 2013-01-29 14:27:39 +0100 | [diff] [blame] | 1167 | |
| 1168 | if (i == 4 && print_bad_edid) { |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1169 | dev_warn(connector->dev->dev, |
| 1170 | "%s: Ignoring invalid EDID block %d.\n", |
| 1171 | drm_get_connector_name(connector), j); |
Maarten Lankhorst | f934ec8c | 2013-01-29 14:27:39 +0100 | [diff] [blame] | 1172 | |
| 1173 | connector->bad_edid_counter++; |
| 1174 | } |
Sam Tygier | 0ea75e2 | 2010-09-23 10:11:01 +0100 | [diff] [blame] | 1175 | } |
| 1176 | |
| 1177 | if (valid_extensions != block[0x7e]) { |
| 1178 | block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; |
| 1179 | block[0x7e] = valid_extensions; |
| 1180 | new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL); |
| 1181 | if (!new) |
| 1182 | goto out; |
| 1183 | block = new; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1184 | } |
| 1185 | |
| 1186 | return block; |
| 1187 | |
| 1188 | carp: |
Jerome Glisse | 0b2443e | 2012-08-09 11:25:51 -0400 | [diff] [blame] | 1189 | if (print_bad_edid) { |
| 1190 | dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", |
| 1191 | drm_get_connector_name(connector), j); |
| 1192 | } |
| 1193 | connector->bad_edid_counter++; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1194 | |
| 1195 | out: |
| 1196 | kfree(block); |
| 1197 | return NULL; |
| 1198 | } |
| 1199 | |
| 1200 | /** |
| 1201 | * Probe DDC presence. |
| 1202 | * |
| 1203 | * \param adapter : i2c device adaptor |
| 1204 | * \return 1 on success |
| 1205 | */ |
Adam Jackson | fbff469 | 2012-09-18 10:58:47 -0400 | [diff] [blame] | 1206 | bool |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1207 | drm_probe_ddc(struct i2c_adapter *adapter) |
| 1208 | { |
| 1209 | unsigned char out; |
| 1210 | |
| 1211 | return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); |
| 1212 | } |
Adam Jackson | fbff469 | 2012-09-18 10:58:47 -0400 | [diff] [blame] | 1213 | EXPORT_SYMBOL(drm_probe_ddc); |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1214 | |
| 1215 | /** |
| 1216 | * drm_get_edid - get EDID data, if available |
| 1217 | * @connector: connector we're probing |
| 1218 | * @adapter: i2c adapter to use for DDC |
| 1219 | * |
| 1220 | * Poke the given i2c channel to grab EDID data if possible. If found, |
| 1221 | * attach it to the connector. |
| 1222 | * |
| 1223 | * Return edid data or NULL if we couldn't find any. |
| 1224 | */ |
| 1225 | struct edid *drm_get_edid(struct drm_connector *connector, |
| 1226 | struct i2c_adapter *adapter) |
| 1227 | { |
| 1228 | struct edid *edid = NULL; |
| 1229 | |
| 1230 | if (drm_probe_ddc(adapter)) |
| 1231 | edid = (struct edid *)drm_do_get_edid(connector, adapter); |
| 1232 | |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1233 | return edid; |
Adam Jackson | 61e57a8 | 2010-03-29 21:43:18 +0000 | [diff] [blame] | 1234 | } |
| 1235 | EXPORT_SYMBOL(drm_get_edid); |
| 1236 | |
| 1237 | /*** EDID parsing ***/ |
| 1238 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1239 | /** |
| 1240 | * edid_vendor - match a string against EDID's obfuscated vendor field |
| 1241 | * @edid: EDID to match |
| 1242 | * @vendor: vendor string |
| 1243 | * |
| 1244 | * Returns true if @vendor is in @edid, false otherwise |
| 1245 | */ |
| 1246 | static bool edid_vendor(struct edid *edid, char *vendor) |
| 1247 | { |
| 1248 | char edid_vendor[3]; |
| 1249 | |
| 1250 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; |
| 1251 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | |
| 1252 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; |
Dave Airlie | 16456c8 | 2009-04-03 09:10:33 +1000 | [diff] [blame] | 1253 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1254 | |
| 1255 | return !strncmp(edid_vendor, vendor, 3); |
| 1256 | } |
| 1257 | |
| 1258 | /** |
| 1259 | * edid_get_quirks - return quirk flags for a given EDID |
| 1260 | * @edid: EDID to process |
| 1261 | * |
| 1262 | * This tells subsequent routines what fixes they need to apply. |
| 1263 | */ |
| 1264 | static u32 edid_get_quirks(struct edid *edid) |
| 1265 | { |
| 1266 | struct edid_quirk *quirk; |
| 1267 | int i; |
| 1268 | |
| 1269 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { |
| 1270 | quirk = &edid_quirk_list[i]; |
| 1271 | |
| 1272 | if (edid_vendor(edid, quirk->vendor) && |
| 1273 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) |
| 1274 | return quirk->quirks; |
| 1275 | } |
| 1276 | |
| 1277 | return 0; |
| 1278 | } |
| 1279 | |
| 1280 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) |
| 1281 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) |
| 1282 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1283 | /** |
| 1284 | * edid_fixup_preferred - set preferred modes based on quirk list |
| 1285 | * @connector: has mode list to fix up |
| 1286 | * @quirks: quirks list |
| 1287 | * |
| 1288 | * Walk the mode list for @connector, clearing the preferred status |
| 1289 | * on existing modes and setting it anew for the right mode ala @quirks. |
| 1290 | */ |
| 1291 | static void edid_fixup_preferred(struct drm_connector *connector, |
| 1292 | u32 quirks) |
| 1293 | { |
| 1294 | struct drm_display_mode *t, *cur_mode, *preferred_mode; |
Dave Airlie | f890607 | 2008-12-18 16:59:02 +1000 | [diff] [blame] | 1295 | int target_refresh = 0; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1296 | |
| 1297 | if (list_empty(&connector->probed_modes)) |
| 1298 | return; |
| 1299 | |
| 1300 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) |
| 1301 | target_refresh = 60; |
| 1302 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) |
| 1303 | target_refresh = 75; |
| 1304 | |
| 1305 | preferred_mode = list_first_entry(&connector->probed_modes, |
| 1306 | struct drm_display_mode, head); |
| 1307 | |
| 1308 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { |
| 1309 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; |
| 1310 | |
| 1311 | if (cur_mode == preferred_mode) |
| 1312 | continue; |
| 1313 | |
| 1314 | /* Largest mode is preferred */ |
| 1315 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) |
| 1316 | preferred_mode = cur_mode; |
| 1317 | |
| 1318 | /* At a given size, try to get closest to target refresh */ |
| 1319 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && |
| 1320 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < |
| 1321 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { |
| 1322 | preferred_mode = cur_mode; |
| 1323 | } |
| 1324 | } |
| 1325 | |
| 1326 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; |
| 1327 | } |
| 1328 | |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1329 | static bool |
| 1330 | mode_is_rb(const struct drm_display_mode *mode) |
| 1331 | { |
| 1332 | return (mode->htotal - mode->hdisplay == 160) && |
| 1333 | (mode->hsync_end - mode->hdisplay == 80) && |
| 1334 | (mode->hsync_end - mode->hsync_start == 32) && |
| 1335 | (mode->vsync_start - mode->vdisplay == 3); |
| 1336 | } |
| 1337 | |
Adam Jackson | 33c7531 | 2012-04-13 16:33:29 -0400 | [diff] [blame] | 1338 | /* |
| 1339 | * drm_mode_find_dmt - Create a copy of a mode if present in DMT |
| 1340 | * @dev: Device to duplicate against |
| 1341 | * @hsize: Mode width |
| 1342 | * @vsize: Mode height |
| 1343 | * @fresh: Mode refresh rate |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1344 | * @rb: Mode reduced-blanking-ness |
Adam Jackson | 33c7531 | 2012-04-13 16:33:29 -0400 | [diff] [blame] | 1345 | * |
| 1346 | * Walk the DMT mode list looking for a match for the given parameters. |
| 1347 | * Return a newly allocated copy of the mode, or NULL if not found. |
| 1348 | */ |
Dave Airlie | 1d42bbc | 2010-05-07 05:02:30 +0000 | [diff] [blame] | 1349 | struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1350 | int hsize, int vsize, int fresh, |
| 1351 | bool rb) |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1352 | { |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1353 | int i; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1354 | |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 1355 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 1356 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
Adam Jackson | f8b46a0 | 2012-04-13 16:33:30 -0400 | [diff] [blame] | 1357 | if (hsize != ptr->hdisplay) |
| 1358 | continue; |
| 1359 | if (vsize != ptr->vdisplay) |
| 1360 | continue; |
| 1361 | if (fresh != drm_mode_vrefresh(ptr)) |
| 1362 | continue; |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1363 | if (rb != mode_is_rb(ptr)) |
| 1364 | continue; |
Adam Jackson | f8b46a0 | 2012-04-13 16:33:30 -0400 | [diff] [blame] | 1365 | |
| 1366 | return drm_mode_duplicate(dev, ptr); |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1367 | } |
Adam Jackson | f8b46a0 | 2012-04-13 16:33:30 -0400 | [diff] [blame] | 1368 | |
| 1369 | return NULL; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1370 | } |
Dave Airlie | 1d42bbc | 2010-05-07 05:02:30 +0000 | [diff] [blame] | 1371 | EXPORT_SYMBOL(drm_mode_find_dmt); |
Adam Jackson | 23425ca | 2009-09-23 17:30:58 -0400 | [diff] [blame] | 1372 | |
Adam Jackson | d1ff640 | 2010-03-29 21:43:26 +0000 | [diff] [blame] | 1373 | typedef void detailed_cb(struct detailed_timing *timing, void *closure); |
| 1374 | |
| 1375 | static void |
Adam Jackson | 4d76a22 | 2010-08-03 14:38:17 -0400 | [diff] [blame] | 1376 | cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
| 1377 | { |
| 1378 | int i, n = 0; |
Christian Schmidt | 4966b2a | 2011-12-19 20:03:43 +0100 | [diff] [blame] | 1379 | u8 d = ext[0x02]; |
Adam Jackson | 4d76a22 | 2010-08-03 14:38:17 -0400 | [diff] [blame] | 1380 | u8 *det_base = ext + d; |
| 1381 | |
Christian Schmidt | 4966b2a | 2011-12-19 20:03:43 +0100 | [diff] [blame] | 1382 | n = (127 - d) / 18; |
Adam Jackson | 4d76a22 | 2010-08-03 14:38:17 -0400 | [diff] [blame] | 1383 | for (i = 0; i < n; i++) |
| 1384 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
| 1385 | } |
| 1386 | |
| 1387 | static void |
Adam Jackson | cbba98f | 2010-08-03 14:38:18 -0400 | [diff] [blame] | 1388 | vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) |
| 1389 | { |
| 1390 | unsigned int i, n = min((int)ext[0x02], 6); |
| 1391 | u8 *det_base = ext + 5; |
| 1392 | |
| 1393 | if (ext[0x01] != 1) |
| 1394 | return; /* unknown version */ |
| 1395 | |
| 1396 | for (i = 0; i < n; i++) |
| 1397 | cb((struct detailed_timing *)(det_base + 18 * i), closure); |
| 1398 | } |
| 1399 | |
| 1400 | static void |
Adam Jackson | d1ff640 | 2010-03-29 21:43:26 +0000 | [diff] [blame] | 1401 | drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) |
| 1402 | { |
| 1403 | int i; |
| 1404 | struct edid *edid = (struct edid *)raw_edid; |
| 1405 | |
| 1406 | if (edid == NULL) |
| 1407 | return; |
| 1408 | |
| 1409 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) |
| 1410 | cb(&(edid->detailed_timings[i]), closure); |
| 1411 | |
Adam Jackson | 4d76a22 | 2010-08-03 14:38:17 -0400 | [diff] [blame] | 1412 | for (i = 1; i <= raw_edid[0x7e]; i++) { |
| 1413 | u8 *ext = raw_edid + (i * EDID_LENGTH); |
| 1414 | switch (*ext) { |
| 1415 | case CEA_EXT: |
| 1416 | cea_for_each_detailed_block(ext, cb, closure); |
| 1417 | break; |
Adam Jackson | cbba98f | 2010-08-03 14:38:18 -0400 | [diff] [blame] | 1418 | case VTB_EXT: |
| 1419 | vtb_for_each_detailed_block(ext, cb, closure); |
| 1420 | break; |
Adam Jackson | 4d76a22 | 2010-08-03 14:38:17 -0400 | [diff] [blame] | 1421 | default: |
| 1422 | break; |
| 1423 | } |
| 1424 | } |
Adam Jackson | d1ff640 | 2010-03-29 21:43:26 +0000 | [diff] [blame] | 1425 | } |
| 1426 | |
| 1427 | static void |
| 1428 | is_rb(struct detailed_timing *t, void *data) |
| 1429 | { |
| 1430 | u8 *r = (u8 *)t; |
| 1431 | if (r[3] == EDID_DETAIL_MONITOR_RANGE) |
| 1432 | if (r[15] & 0x10) |
| 1433 | *(bool *)data = true; |
| 1434 | } |
| 1435 | |
| 1436 | /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ |
| 1437 | static bool |
| 1438 | drm_monitor_supports_rb(struct edid *edid) |
| 1439 | { |
| 1440 | if (edid->revision >= 4) { |
Daniel Vetter | b196a49 | 2012-06-19 11:33:06 +0200 | [diff] [blame] | 1441 | bool ret = false; |
Adam Jackson | d1ff640 | 2010-03-29 21:43:26 +0000 | [diff] [blame] | 1442 | drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); |
| 1443 | return ret; |
| 1444 | } |
| 1445 | |
| 1446 | return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); |
| 1447 | } |
| 1448 | |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1449 | static void |
| 1450 | find_gtf2(struct detailed_timing *t, void *data) |
| 1451 | { |
| 1452 | u8 *r = (u8 *)t; |
| 1453 | if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) |
| 1454 | *(u8 **)data = r; |
| 1455 | } |
| 1456 | |
| 1457 | /* Secondary GTF curve kicks in above some break frequency */ |
| 1458 | static int |
| 1459 | drm_gtf2_hbreak(struct edid *edid) |
| 1460 | { |
| 1461 | u8 *r = NULL; |
| 1462 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
| 1463 | return r ? (r[12] * 2) : 0; |
| 1464 | } |
| 1465 | |
| 1466 | static int |
| 1467 | drm_gtf2_2c(struct edid *edid) |
| 1468 | { |
| 1469 | u8 *r = NULL; |
| 1470 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
| 1471 | return r ? r[13] : 0; |
| 1472 | } |
| 1473 | |
| 1474 | static int |
| 1475 | drm_gtf2_m(struct edid *edid) |
| 1476 | { |
| 1477 | u8 *r = NULL; |
| 1478 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
| 1479 | return r ? (r[15] << 8) + r[14] : 0; |
| 1480 | } |
| 1481 | |
| 1482 | static int |
| 1483 | drm_gtf2_k(struct edid *edid) |
| 1484 | { |
| 1485 | u8 *r = NULL; |
| 1486 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
| 1487 | return r ? r[16] : 0; |
| 1488 | } |
| 1489 | |
| 1490 | static int |
| 1491 | drm_gtf2_2j(struct edid *edid) |
| 1492 | { |
| 1493 | u8 *r = NULL; |
| 1494 | drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); |
| 1495 | return r ? r[17] : 0; |
| 1496 | } |
| 1497 | |
| 1498 | /** |
| 1499 | * standard_timing_level - get std. timing level(CVT/GTF/DMT) |
| 1500 | * @edid: EDID block to scan |
| 1501 | */ |
| 1502 | static int standard_timing_level(struct edid *edid) |
| 1503 | { |
| 1504 | if (edid->revision >= 2) { |
| 1505 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) |
| 1506 | return LEVEL_CVT; |
| 1507 | if (drm_gtf2_hbreak(edid)) |
| 1508 | return LEVEL_GTF2; |
| 1509 | return LEVEL_GTF; |
| 1510 | } |
| 1511 | return LEVEL_DMT; |
| 1512 | } |
| 1513 | |
Adam Jackson | 23425ca | 2009-09-23 17:30:58 -0400 | [diff] [blame] | 1514 | /* |
| 1515 | * 0 is reserved. The spec says 0x01 fill for unused timings. Some old |
| 1516 | * monitors fill with ascii space (0x20) instead. |
| 1517 | */ |
| 1518 | static int |
| 1519 | bad_std_timing(u8 a, u8 b) |
| 1520 | { |
| 1521 | return (a == 0x00 && b == 0x00) || |
| 1522 | (a == 0x01 && b == 0x01) || |
| 1523 | (a == 0x20 && b == 0x20); |
| 1524 | } |
| 1525 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1526 | /** |
| 1527 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode |
| 1528 | * @t: standard timing params |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1529 | * @timing_level: standard timing level |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1530 | * |
| 1531 | * Take the standard timing params (in this case width, aspect, and refresh) |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1532 | * and convert them into a real mode using CVT/GTF/DMT. |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1533 | */ |
Adam Jackson | 7ca6adb | 2010-03-29 21:43:29 +0000 | [diff] [blame] | 1534 | static struct drm_display_mode * |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1535 | drm_mode_std(struct drm_connector *connector, struct edid *edid, |
| 1536 | struct std_timing *t, int revision) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1537 | { |
Adam Jackson | 7ca6adb | 2010-03-29 21:43:29 +0000 | [diff] [blame] | 1538 | struct drm_device *dev = connector->dev; |
| 1539 | struct drm_display_mode *m, *mode = NULL; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1540 | int hsize, vsize; |
| 1541 | int vrefresh_rate; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1542 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
| 1543 | >> EDID_TIMING_ASPECT_SHIFT; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1544 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
| 1545 | >> EDID_TIMING_VFREQ_SHIFT; |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1546 | int timing_level = standard_timing_level(edid); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1547 | |
Adam Jackson | 23425ca | 2009-09-23 17:30:58 -0400 | [diff] [blame] | 1548 | if (bad_std_timing(t->hsize, t->vfreq_aspect)) |
| 1549 | return NULL; |
| 1550 | |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1551 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ |
| 1552 | hsize = t->hsize * 8 + 248; |
| 1553 | /* vrefresh_rate = vfreq + 60 */ |
| 1554 | vrefresh_rate = vfreq + 60; |
| 1555 | /* the vdisplay is calculated based on the aspect ratio */ |
Adam Jackson | f066a17 | 2009-09-23 17:31:21 -0400 | [diff] [blame] | 1556 | if (aspect_ratio == 0) { |
| 1557 | if (revision < 3) |
| 1558 | vsize = hsize; |
| 1559 | else |
| 1560 | vsize = (hsize * 10) / 16; |
| 1561 | } else if (aspect_ratio == 1) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1562 | vsize = (hsize * 3) / 4; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1563 | else if (aspect_ratio == 2) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1564 | vsize = (hsize * 4) / 5; |
| 1565 | else |
| 1566 | vsize = (hsize * 9) / 16; |
Adam Jackson | a0910c8 | 2010-03-29 21:43:28 +0000 | [diff] [blame] | 1567 | |
| 1568 | /* HDTV hack, part 1 */ |
| 1569 | if (vrefresh_rate == 60 && |
| 1570 | ((hsize == 1360 && vsize == 765) || |
| 1571 | (hsize == 1368 && vsize == 769))) { |
| 1572 | hsize = 1366; |
| 1573 | vsize = 768; |
| 1574 | } |
| 1575 | |
Adam Jackson | 7ca6adb | 2010-03-29 21:43:29 +0000 | [diff] [blame] | 1576 | /* |
| 1577 | * If this connector already has a mode for this size and refresh |
| 1578 | * rate (because it came from detailed or CVT info), use that |
| 1579 | * instead. This way we don't have to guess at interlace or |
| 1580 | * reduced blanking. |
| 1581 | */ |
Adam Jackson | 522032d | 2010-04-09 16:52:49 +0000 | [diff] [blame] | 1582 | list_for_each_entry(m, &connector->probed_modes, head) |
Adam Jackson | 7ca6adb | 2010-03-29 21:43:29 +0000 | [diff] [blame] | 1583 | if (m->hdisplay == hsize && m->vdisplay == vsize && |
| 1584 | drm_mode_vrefresh(m) == vrefresh_rate) |
| 1585 | return NULL; |
| 1586 | |
Adam Jackson | a0910c8 | 2010-03-29 21:43:28 +0000 | [diff] [blame] | 1587 | /* HDTV hack, part 2 */ |
| 1588 | if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { |
| 1589 | mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 1590 | false); |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1591 | mode->hdisplay = 1366; |
Adam Jackson | a4967de | 2010-07-28 07:40:32 +1000 | [diff] [blame] | 1592 | mode->hsync_start = mode->hsync_start - 1; |
| 1593 | mode->hsync_end = mode->hsync_end - 1; |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1594 | return mode; |
| 1595 | } |
Adam Jackson | a0910c8 | 2010-03-29 21:43:28 +0000 | [diff] [blame] | 1596 | |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1597 | /* check whether it can be found in default mode table */ |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1598 | if (drm_monitor_supports_rb(edid)) { |
| 1599 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, |
| 1600 | true); |
| 1601 | if (mode) |
| 1602 | return mode; |
| 1603 | } |
| 1604 | mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); |
Zhao Yakui | 559ee21 | 2009-09-03 09:33:47 +0800 | [diff] [blame] | 1605 | if (mode) |
| 1606 | return mode; |
| 1607 | |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 1608 | /* okay, generate it */ |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1609 | switch (timing_level) { |
| 1610 | case LEVEL_DMT: |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1611 | break; |
| 1612 | case LEVEL_GTF: |
| 1613 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
| 1614 | break; |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1615 | case LEVEL_GTF2: |
| 1616 | /* |
| 1617 | * This is potentially wrong if there's ever a monitor with |
| 1618 | * more than one ranges section, each claiming a different |
| 1619 | * secondary GTF curve. Please don't do that. |
| 1620 | */ |
| 1621 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); |
Takashi Iwai | fc48f16 | 2012-04-20 12:59:33 +0100 | [diff] [blame] | 1622 | if (!mode) |
| 1623 | return NULL; |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1624 | if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { |
Sascha Hauer | aefd330 | 2012-02-01 11:38:21 +0100 | [diff] [blame] | 1625 | drm_mode_destroy(dev, mode); |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 1626 | mode = drm_gtf_mode_complex(dev, hsize, vsize, |
| 1627 | vrefresh_rate, 0, 0, |
| 1628 | drm_gtf2_m(edid), |
| 1629 | drm_gtf2_2c(edid), |
| 1630 | drm_gtf2_k(edid), |
| 1631 | drm_gtf2_2j(edid)); |
| 1632 | } |
| 1633 | break; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1634 | case LEVEL_CVT: |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 1635 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, |
| 1636 | false); |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 1637 | break; |
| 1638 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1639 | return mode; |
| 1640 | } |
| 1641 | |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 1642 | /* |
| 1643 | * EDID is delightfully ambiguous about how interlaced modes are to be |
| 1644 | * encoded. Our internal representation is of frame height, but some |
| 1645 | * HDTV detailed timings are encoded as field height. |
| 1646 | * |
| 1647 | * The format list here is from CEA, in frame size. Technically we |
| 1648 | * should be checking refresh rate too. Whatever. |
| 1649 | */ |
| 1650 | static void |
| 1651 | drm_mode_do_interlace_quirk(struct drm_display_mode *mode, |
| 1652 | struct detailed_pixel_timing *pt) |
| 1653 | { |
| 1654 | int i; |
| 1655 | static const struct { |
| 1656 | int w, h; |
| 1657 | } cea_interlaced[] = { |
| 1658 | { 1920, 1080 }, |
| 1659 | { 720, 480 }, |
| 1660 | { 1440, 480 }, |
| 1661 | { 2880, 480 }, |
| 1662 | { 720, 576 }, |
| 1663 | { 1440, 576 }, |
| 1664 | { 2880, 576 }, |
| 1665 | }; |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 1666 | |
| 1667 | if (!(pt->misc & DRM_EDID_PT_INTERLACED)) |
| 1668 | return; |
| 1669 | |
Kulikov Vasiliy | 3c58141 | 2010-06-28 15:54:52 +0400 | [diff] [blame] | 1670 | for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 1671 | if ((mode->hdisplay == cea_interlaced[i].w) && |
| 1672 | (mode->vdisplay == cea_interlaced[i].h / 2)) { |
| 1673 | mode->vdisplay *= 2; |
| 1674 | mode->vsync_start *= 2; |
| 1675 | mode->vsync_end *= 2; |
| 1676 | mode->vtotal *= 2; |
| 1677 | mode->vtotal |= 1; |
| 1678 | } |
| 1679 | } |
| 1680 | |
| 1681 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
| 1682 | } |
| 1683 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1684 | /** |
| 1685 | * drm_mode_detailed - create a new mode from an EDID detailed timing section |
| 1686 | * @dev: DRM device (needed to create new mode) |
| 1687 | * @edid: EDID block |
| 1688 | * @timing: EDID detailed timing info |
| 1689 | * @quirks: quirks to apply |
| 1690 | * |
| 1691 | * An EDID detailed timing block contains enough info for us to create and |
| 1692 | * return a new struct drm_display_mode. |
| 1693 | */ |
| 1694 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, |
| 1695 | struct edid *edid, |
| 1696 | struct detailed_timing *timing, |
| 1697 | u32 quirks) |
| 1698 | { |
| 1699 | struct drm_display_mode *mode; |
| 1700 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1701 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
| 1702 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; |
| 1703 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; |
| 1704 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; |
Michel Dänzer | e14cbee | 2009-06-23 12:36:32 +0200 | [diff] [blame] | 1705 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
| 1706 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; |
Torsten Duwe | 16dad1d | 2013-03-23 15:38:22 +0100 | [diff] [blame] | 1707 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; |
Michel Dänzer | e14cbee | 2009-06-23 12:36:32 +0200 | [diff] [blame] | 1708 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1709 | |
Adam Jackson | fc43896 | 2009-06-04 10:20:34 +1000 | [diff] [blame] | 1710 | /* ignore tiny modes */ |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1711 | if (hactive < 64 || vactive < 64) |
Adam Jackson | fc43896 | 2009-06-04 10:20:34 +1000 | [diff] [blame] | 1712 | return NULL; |
| 1713 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1714 | if (pt->misc & DRM_EDID_PT_STEREO) { |
Egbert Eich | c7d015f3 | 2013-06-13 21:01:19 +0200 | [diff] [blame] | 1715 | DRM_DEBUG_KMS("stereo mode not supported\n"); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1716 | return NULL; |
| 1717 | } |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1718 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
Egbert Eich | c7d015f3 | 2013-06-13 21:01:19 +0200 | [diff] [blame] | 1719 | DRM_DEBUG_KMS("composite sync not supported\n"); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1720 | } |
| 1721 | |
Zhao Yakui | fcb4561 | 2009-10-14 09:11:25 +0800 | [diff] [blame] | 1722 | /* it is incorrect if hsync/vsync width is zero */ |
| 1723 | if (!hsync_pulse_width || !vsync_pulse_width) { |
| 1724 | DRM_DEBUG_KMS("Incorrect Detailed timing. " |
| 1725 | "Wrong Hsync/Vsync pulse width\n"); |
| 1726 | return NULL; |
| 1727 | } |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 1728 | |
| 1729 | if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { |
| 1730 | mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); |
| 1731 | if (!mode) |
| 1732 | return NULL; |
| 1733 | |
| 1734 | goto set_size; |
| 1735 | } |
| 1736 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1737 | mode = drm_mode_create(dev); |
| 1738 | if (!mode) |
| 1739 | return NULL; |
| 1740 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1741 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1742 | timing->pixel_clock = cpu_to_le16(1088); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1743 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1744 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1745 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1746 | mode->hdisplay = hactive; |
| 1747 | mode->hsync_start = mode->hdisplay + hsync_offset; |
| 1748 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; |
| 1749 | mode->htotal = mode->hdisplay + hblank; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1750 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1751 | mode->vdisplay = vactive; |
| 1752 | mode->vsync_start = mode->vdisplay + vsync_offset; |
| 1753 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
| 1754 | mode->vtotal = mode->vdisplay + vblank; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1755 | |
Jesse Barnes | 7064fef | 2009-11-05 10:12:54 -0800 | [diff] [blame] | 1756 | /* Some EDIDs have bogus h/vtotal values */ |
| 1757 | if (mode->hsync_end > mode->htotal) |
| 1758 | mode->htotal = mode->hsync_end + 1; |
| 1759 | if (mode->vsync_end > mode->vtotal) |
| 1760 | mode->vtotal = mode->vsync_end + 1; |
| 1761 | |
Adam Jackson | b58db2c | 2010-02-15 22:15:39 +0000 | [diff] [blame] | 1762 | drm_mode_do_interlace_quirk(mode, pt); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1763 | |
| 1764 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1765 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1766 | } |
| 1767 | |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 1768 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
| 1769 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; |
| 1770 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? |
| 1771 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1772 | |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 1773 | set_size: |
Michel Dänzer | e14cbee | 2009-06-23 12:36:32 +0200 | [diff] [blame] | 1774 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
| 1775 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1776 | |
| 1777 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { |
| 1778 | mode->width_mm *= 10; |
| 1779 | mode->height_mm *= 10; |
| 1780 | } |
| 1781 | |
| 1782 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { |
| 1783 | mode->width_mm = edid->width_cm * 10; |
| 1784 | mode->height_mm = edid->height_cm * 10; |
| 1785 | } |
| 1786 | |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 1787 | mode->type = DRM_MODE_TYPE_DRIVER; |
Torsten Duwe | c19b3b0f | 2013-03-23 15:39:34 +0100 | [diff] [blame] | 1788 | mode->vrefresh = drm_mode_vrefresh(mode); |
Adam Jackson | bc42aab | 2012-05-23 16:26:54 -0400 | [diff] [blame] | 1789 | drm_mode_set_name(mode); |
| 1790 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 1791 | return mode; |
| 1792 | } |
| 1793 | |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1794 | static bool |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 1795 | mode_in_hsync_range(const struct drm_display_mode *mode, |
| 1796 | struct edid *edid, u8 *t) |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1797 | { |
| 1798 | int hsync, hmin, hmax; |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1799 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1800 | hmin = t[7]; |
| 1801 | if (edid->revision >= 4) |
| 1802 | hmin += ((t[4] & 0x04) ? 255 : 0); |
| 1803 | hmax = t[8]; |
| 1804 | if (edid->revision >= 4) |
| 1805 | hmax += ((t[4] & 0x08) ? 255 : 0); |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1806 | hsync = drm_mode_hsync(mode); |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1807 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1808 | return (hsync <= hmax && hsync >= hmin); |
| 1809 | } |
| 1810 | |
| 1811 | static bool |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 1812 | mode_in_vsync_range(const struct drm_display_mode *mode, |
| 1813 | struct edid *edid, u8 *t) |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1814 | { |
| 1815 | int vsync, vmin, vmax; |
| 1816 | |
| 1817 | vmin = t[5]; |
| 1818 | if (edid->revision >= 4) |
| 1819 | vmin += ((t[4] & 0x01) ? 255 : 0); |
| 1820 | vmax = t[6]; |
| 1821 | if (edid->revision >= 4) |
| 1822 | vmax += ((t[4] & 0x02) ? 255 : 0); |
| 1823 | vsync = drm_mode_vrefresh(mode); |
| 1824 | |
| 1825 | return (vsync <= vmax && vsync >= vmin); |
| 1826 | } |
| 1827 | |
| 1828 | static u32 |
| 1829 | range_pixel_clock(struct edid *edid, u8 *t) |
| 1830 | { |
| 1831 | /* unspecified */ |
| 1832 | if (t[9] == 0 || t[9] == 255) |
| 1833 | return 0; |
| 1834 | |
| 1835 | /* 1.4 with CVT support gives us real precision, yay */ |
| 1836 | if (edid->revision >= 4 && t[10] == 0x04) |
| 1837 | return (t[9] * 10000) - ((t[12] >> 2) * 250); |
| 1838 | |
| 1839 | /* 1.3 is pathetic, so fuzz up a bit */ |
| 1840 | return t[9] * 10000 + 5001; |
| 1841 | } |
| 1842 | |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1843 | static bool |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 1844 | mode_in_range(const struct drm_display_mode *mode, struct edid *edid, |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1845 | struct detailed_timing *timing) |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1846 | { |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1847 | u32 max_clock; |
| 1848 | u8 *t = (u8 *)timing; |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1849 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1850 | if (!mode_in_hsync_range(mode, edid, t)) |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1851 | return false; |
| 1852 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1853 | if (!mode_in_vsync_range(mode, edid, t)) |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1854 | return false; |
| 1855 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1856 | if ((max_clock = range_pixel_clock(edid, t))) |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1857 | if (mode->clock > max_clock) |
| 1858 | return false; |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1859 | |
| 1860 | /* 1.4 max horizontal check */ |
| 1861 | if (edid->revision >= 4 && t[10] == 0x04) |
| 1862 | if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) |
| 1863 | return false; |
| 1864 | |
| 1865 | if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) |
| 1866 | return false; |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1867 | |
| 1868 | return true; |
| 1869 | } |
| 1870 | |
Takashi Iwai | 7b668eb | 2012-07-03 11:22:11 +0200 | [diff] [blame] | 1871 | static bool valid_inferred_mode(const struct drm_connector *connector, |
| 1872 | const struct drm_display_mode *mode) |
| 1873 | { |
| 1874 | struct drm_display_mode *m; |
| 1875 | bool ok = false; |
| 1876 | |
| 1877 | list_for_each_entry(m, &connector->probed_modes, head) { |
| 1878 | if (mode->hdisplay == m->hdisplay && |
| 1879 | mode->vdisplay == m->vdisplay && |
| 1880 | drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) |
| 1881 | return false; /* duplicated */ |
| 1882 | if (mode->hdisplay <= m->hdisplay && |
| 1883 | mode->vdisplay <= m->vdisplay) |
| 1884 | ok = true; |
| 1885 | } |
| 1886 | return ok; |
| 1887 | } |
| 1888 | |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1889 | static int |
Adam Jackson | cd4cd3d | 2012-04-13 16:33:33 -0400 | [diff] [blame] | 1890 | drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
Adam Jackson | b17e52e | 2010-03-29 21:43:27 +0000 | [diff] [blame] | 1891 | struct detailed_timing *timing) |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1892 | { |
| 1893 | int i, modes = 0; |
| 1894 | struct drm_display_mode *newmode; |
| 1895 | struct drm_device *dev = connector->dev; |
| 1896 | |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 1897 | for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { |
Takashi Iwai | 7b668eb | 2012-07-03 11:22:11 +0200 | [diff] [blame] | 1898 | if (mode_in_range(drm_dmt_modes + i, edid, timing) && |
| 1899 | valid_inferred_mode(connector, drm_dmt_modes + i)) { |
Adam Jackson | 07a5e63 | 2009-12-03 17:44:38 -0500 | [diff] [blame] | 1900 | newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); |
| 1901 | if (newmode) { |
| 1902 | drm_mode_probed_add(connector, newmode); |
| 1903 | modes++; |
| 1904 | } |
| 1905 | } |
| 1906 | } |
| 1907 | |
| 1908 | return modes; |
| 1909 | } |
| 1910 | |
Takashi Iwai | c09dedb | 2012-04-23 17:40:33 +0100 | [diff] [blame] | 1911 | /* fix up 1366x768 mode from 1368x768; |
| 1912 | * GFT/CVT can't express 1366 width which isn't dividable by 8 |
| 1913 | */ |
| 1914 | static void fixup_mode_1366x768(struct drm_display_mode *mode) |
| 1915 | { |
| 1916 | if (mode->hdisplay == 1368 && mode->vdisplay == 768) { |
| 1917 | mode->hdisplay = 1366; |
| 1918 | mode->hsync_start--; |
| 1919 | mode->hsync_end--; |
| 1920 | drm_mode_set_name(mode); |
| 1921 | } |
| 1922 | } |
| 1923 | |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1924 | static int |
| 1925 | drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, |
| 1926 | struct detailed_timing *timing) |
| 1927 | { |
| 1928 | int i, modes = 0; |
| 1929 | struct drm_display_mode *newmode; |
| 1930 | struct drm_device *dev = connector->dev; |
| 1931 | |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 1932 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1933 | const struct minimode *m = &extra_modes[i]; |
| 1934 | newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); |
Takashi Iwai | fc48f16 | 2012-04-20 12:59:33 +0100 | [diff] [blame] | 1935 | if (!newmode) |
| 1936 | return modes; |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1937 | |
Takashi Iwai | c09dedb | 2012-04-23 17:40:33 +0100 | [diff] [blame] | 1938 | fixup_mode_1366x768(newmode); |
Takashi Iwai | 7b668eb | 2012-07-03 11:22:11 +0200 | [diff] [blame] | 1939 | if (!mode_in_range(newmode, edid, timing) || |
| 1940 | !valid_inferred_mode(connector, newmode)) { |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1941 | drm_mode_destroy(dev, newmode); |
| 1942 | continue; |
| 1943 | } |
| 1944 | |
| 1945 | drm_mode_probed_add(connector, newmode); |
| 1946 | modes++; |
| 1947 | } |
| 1948 | |
| 1949 | return modes; |
| 1950 | } |
| 1951 | |
| 1952 | static int |
| 1953 | drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, |
| 1954 | struct detailed_timing *timing) |
| 1955 | { |
| 1956 | int i, modes = 0; |
| 1957 | struct drm_display_mode *newmode; |
| 1958 | struct drm_device *dev = connector->dev; |
| 1959 | bool rb = drm_monitor_supports_rb(edid); |
| 1960 | |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 1961 | for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1962 | const struct minimode *m = &extra_modes[i]; |
| 1963 | newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); |
Takashi Iwai | fc48f16 | 2012-04-20 12:59:33 +0100 | [diff] [blame] | 1964 | if (!newmode) |
| 1965 | return modes; |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1966 | |
Takashi Iwai | c09dedb | 2012-04-23 17:40:33 +0100 | [diff] [blame] | 1967 | fixup_mode_1366x768(newmode); |
Takashi Iwai | 7b668eb | 2012-07-03 11:22:11 +0200 | [diff] [blame] | 1968 | if (!mode_in_range(newmode, edid, timing) || |
| 1969 | !valid_inferred_mode(connector, newmode)) { |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1970 | drm_mode_destroy(dev, newmode); |
| 1971 | continue; |
| 1972 | } |
| 1973 | |
| 1974 | drm_mode_probed_add(connector, newmode); |
| 1975 | modes++; |
| 1976 | } |
| 1977 | |
| 1978 | return modes; |
| 1979 | } |
| 1980 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 1981 | static void |
| 1982 | do_inferred_modes(struct detailed_timing *timing, void *c) |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1983 | { |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 1984 | struct detailed_mode_closure *closure = c; |
| 1985 | struct detailed_non_pixel *data = &timing->data.other_data; |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1986 | struct detailed_data_monitor_range *range = &data->data.range; |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 1987 | |
Adam Jackson | cb21aaf | 2012-04-13 16:33:36 -0400 | [diff] [blame] | 1988 | if (data->type != EDID_DETAIL_MONITOR_RANGE) |
| 1989 | return; |
| 1990 | |
| 1991 | closure->modes += drm_dmt_modes_for_range(closure->connector, |
| 1992 | closure->edid, |
| 1993 | timing); |
Adam Jackson | b309bd3 | 2012-04-13 16:33:40 -0400 | [diff] [blame] | 1994 | |
| 1995 | if (!version_greater(closure->edid, 1, 1)) |
| 1996 | return; /* GTF not defined yet */ |
| 1997 | |
| 1998 | switch (range->flags) { |
| 1999 | case 0x02: /* secondary gtf, XXX could do more */ |
| 2000 | case 0x00: /* default gtf */ |
| 2001 | closure->modes += drm_gtf_modes_for_range(closure->connector, |
| 2002 | closure->edid, |
| 2003 | timing); |
| 2004 | break; |
| 2005 | case 0x04: /* cvt, only in 1.4+ */ |
| 2006 | if (!version_greater(closure->edid, 1, 3)) |
| 2007 | break; |
| 2008 | |
| 2009 | closure->modes += drm_cvt_modes_for_range(closure->connector, |
| 2010 | closure->edid, |
| 2011 | timing); |
| 2012 | break; |
| 2013 | case 0x01: /* just the ranges, no formula */ |
| 2014 | default: |
| 2015 | break; |
| 2016 | } |
Adam Jackson | 9340d8c | 2009-12-03 17:44:40 -0500 | [diff] [blame] | 2017 | } |
| 2018 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2019 | static int |
| 2020 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
| 2021 | { |
| 2022 | struct detailed_mode_closure closure = { |
| 2023 | connector, edid, 0, 0, 0 |
| 2024 | }; |
| 2025 | |
| 2026 | if (version_greater(edid, 1, 0)) |
| 2027 | drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, |
| 2028 | &closure); |
| 2029 | |
| 2030 | return closure.modes; |
| 2031 | } |
| 2032 | |
Adam Jackson | 2255be1 | 2010-03-29 21:43:22 +0000 | [diff] [blame] | 2033 | static int |
| 2034 | drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) |
| 2035 | { |
| 2036 | int i, j, m, modes = 0; |
| 2037 | struct drm_display_mode *mode; |
| 2038 | u8 *est = ((u8 *)timing) + 5; |
| 2039 | |
| 2040 | for (i = 0; i < 6; i++) { |
| 2041 | for (j = 7; j > 0; j--) { |
| 2042 | m = (i * 8) + (7 - j); |
Linus Torvalds | aa9f56b | 2010-08-12 09:21:39 -0700 | [diff] [blame] | 2043 | if (m >= ARRAY_SIZE(est3_modes)) |
Adam Jackson | 2255be1 | 2010-03-29 21:43:22 +0000 | [diff] [blame] | 2044 | break; |
| 2045 | if (est[i] & (1 << j)) { |
Dave Airlie | 1d42bbc | 2010-05-07 05:02:30 +0000 | [diff] [blame] | 2046 | mode = drm_mode_find_dmt(connector->dev, |
| 2047 | est3_modes[m].w, |
| 2048 | est3_modes[m].h, |
Adam Jackson | f6e252b | 2012-04-13 16:33:31 -0400 | [diff] [blame] | 2049 | est3_modes[m].r, |
| 2050 | est3_modes[m].rb); |
Adam Jackson | 2255be1 | 2010-03-29 21:43:22 +0000 | [diff] [blame] | 2051 | if (mode) { |
| 2052 | drm_mode_probed_add(connector, mode); |
| 2053 | modes++; |
| 2054 | } |
| 2055 | } |
| 2056 | } |
| 2057 | } |
| 2058 | |
| 2059 | return modes; |
| 2060 | } |
| 2061 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2062 | static void |
| 2063 | do_established_modes(struct detailed_timing *timing, void *c) |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2064 | { |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2065 | struct detailed_mode_closure *closure = c; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2066 | struct detailed_non_pixel *data = &timing->data.other_data; |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2067 | |
| 2068 | if (data->type == EDID_DETAIL_EST_TIMINGS) |
| 2069 | closure->modes += drm_est3_modes(closure->connector, timing); |
| 2070 | } |
| 2071 | |
| 2072 | /** |
| 2073 | * add_established_modes - get est. modes from EDID and add them |
| 2074 | * @edid: EDID block to scan |
| 2075 | * |
| 2076 | * Each EDID block contains a bitmap of the supported "established modes" list |
| 2077 | * (defined above). Tease them out and add them to the global modes list. |
| 2078 | */ |
| 2079 | static int |
| 2080 | add_established_modes(struct drm_connector *connector, struct edid *edid) |
| 2081 | { |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2082 | struct drm_device *dev = connector->dev; |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2083 | unsigned long est_bits = edid->established_timings.t1 | |
| 2084 | (edid->established_timings.t2 << 8) | |
| 2085 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
| 2086 | int i, modes = 0; |
| 2087 | struct detailed_mode_closure closure = { |
| 2088 | connector, edid, 0, 0, 0 |
| 2089 | }; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2090 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2091 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
| 2092 | if (est_bits & (1<<i)) { |
| 2093 | struct drm_display_mode *newmode; |
| 2094 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); |
| 2095 | if (newmode) { |
| 2096 | drm_mode_probed_add(connector, newmode); |
| 2097 | modes++; |
| 2098 | } |
| 2099 | } |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2100 | } |
| 2101 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2102 | if (version_greater(edid, 1, 0)) |
| 2103 | drm_for_each_detailed_block((u8 *)edid, |
| 2104 | do_established_modes, &closure); |
| 2105 | |
| 2106 | return modes + closure.modes; |
| 2107 | } |
| 2108 | |
| 2109 | static void |
| 2110 | do_standard_modes(struct detailed_timing *timing, void *c) |
| 2111 | { |
| 2112 | struct detailed_mode_closure *closure = c; |
| 2113 | struct detailed_non_pixel *data = &timing->data.other_data; |
| 2114 | struct drm_connector *connector = closure->connector; |
| 2115 | struct edid *edid = closure->edid; |
| 2116 | |
| 2117 | if (data->type == EDID_DETAIL_STD_MODES) { |
| 2118 | int i; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2119 | for (i = 0; i < 6; i++) { |
| 2120 | struct std_timing *std; |
| 2121 | struct drm_display_mode *newmode; |
| 2122 | |
| 2123 | std = &data->data.timings[i]; |
Adam Jackson | 7a37435 | 2010-03-29 21:43:30 +0000 | [diff] [blame] | 2124 | newmode = drm_mode_std(connector, edid, std, |
| 2125 | edid->revision); |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2126 | if (newmode) { |
| 2127 | drm_mode_probed_add(connector, newmode); |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2128 | closure->modes++; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2129 | } |
| 2130 | } |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2131 | } |
| 2132 | } |
| 2133 | |
| 2134 | /** |
| 2135 | * add_standard_modes - get std. modes from EDID and add them |
| 2136 | * @edid: EDID block to scan |
| 2137 | * |
| 2138 | * Standard modes can be calculated using the appropriate standard (DMT, |
| 2139 | * GTF or CVT. Grab them from @edid and add them to the list. |
| 2140 | */ |
| 2141 | static int |
| 2142 | add_standard_modes(struct drm_connector *connector, struct edid *edid) |
| 2143 | { |
| 2144 | int i, modes = 0; |
| 2145 | struct detailed_mode_closure closure = { |
| 2146 | connector, edid, 0, 0, 0 |
| 2147 | }; |
| 2148 | |
| 2149 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
| 2150 | struct drm_display_mode *newmode; |
| 2151 | |
| 2152 | newmode = drm_mode_std(connector, edid, |
| 2153 | &edid->standard_timings[i], |
| 2154 | edid->revision); |
| 2155 | if (newmode) { |
| 2156 | drm_mode_probed_add(connector, newmode); |
| 2157 | modes++; |
| 2158 | } |
| 2159 | } |
| 2160 | |
| 2161 | if (version_greater(edid, 1, 0)) |
| 2162 | drm_for_each_detailed_block((u8 *)edid, do_standard_modes, |
| 2163 | &closure); |
| 2164 | |
| 2165 | /* XXX should also look for standard codes in VTB blocks */ |
| 2166 | |
| 2167 | return modes + closure.modes; |
| 2168 | } |
| 2169 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2170 | static int drm_cvt_modes(struct drm_connector *connector, |
| 2171 | struct detailed_timing *timing) |
| 2172 | { |
| 2173 | int i, j, modes = 0; |
| 2174 | struct drm_display_mode *newmode; |
| 2175 | struct drm_device *dev = connector->dev; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 2176 | struct cvt_timing *cvt; |
| 2177 | const int rates[] = { 60, 85, 75, 60, 50 }; |
| 2178 | const u8 empty[3] = { 0, 0, 0 }; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2179 | |
| 2180 | for (i = 0; i < 4; i++) { |
| 2181 | int uninitialized_var(width), height; |
| 2182 | cvt = &(timing->data.other_data.data.cvt[i]); |
| 2183 | |
| 2184 | if (!memcmp(cvt->code, empty, 3)) |
Michel Dänzer | 0454bea | 2009-06-15 16:56:07 +0200 | [diff] [blame] | 2185 | continue; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2186 | |
| 2187 | height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; |
Zhao Yakui | 5c61259 | 2009-06-22 13:17:10 +0800 | [diff] [blame] | 2188 | switch (cvt->code[1] & 0x0c) { |
Adam Jackson | f066a17 | 2009-09-23 17:31:21 -0400 | [diff] [blame] | 2189 | case 0x00: |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2190 | width = height * 4 / 3; |
| 2191 | break; |
| 2192 | case 0x04: |
| 2193 | width = height * 16 / 9; |
| 2194 | break; |
| 2195 | case 0x08: |
| 2196 | width = height * 16 / 10; |
| 2197 | break; |
| 2198 | case 0x0c: |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2199 | width = height * 15 / 9; |
| 2200 | break; |
| 2201 | } |
| 2202 | |
| 2203 | for (j = 1; j < 5; j++) { |
| 2204 | if (cvt->code[2] & (1 << j)) { |
| 2205 | newmode = drm_cvt_mode(dev, width, height, |
| 2206 | rates[j], j == 0, |
| 2207 | false, false); |
| 2208 | if (newmode) { |
| 2209 | drm_mode_probed_add(connector, newmode); |
| 2210 | modes++; |
| 2211 | } |
| 2212 | } |
| 2213 | } |
| 2214 | } |
| 2215 | |
| 2216 | return modes; |
| 2217 | } |
| 2218 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2219 | static void |
| 2220 | do_cvt_mode(struct detailed_timing *timing, void *c) |
| 2221 | { |
| 2222 | struct detailed_mode_closure *closure = c; |
| 2223 | struct detailed_non_pixel *data = &timing->data.other_data; |
| 2224 | |
| 2225 | if (data->type == EDID_DETAIL_CVT_3BYTE) |
| 2226 | closure->modes += drm_cvt_modes(closure->connector, timing); |
| 2227 | } |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2228 | |
| 2229 | static int |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2230 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
| 2231 | { |
| 2232 | struct detailed_mode_closure closure = { |
| 2233 | connector, edid, 0, 0, 0 |
| 2234 | }; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2235 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2236 | if (version_greater(edid, 1, 2)) |
| 2237 | drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2238 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2239 | /* XXX should also look for CVT codes in VTB blocks */ |
| 2240 | |
| 2241 | return closure.modes; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2242 | } |
| 2243 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2244 | static void |
| 2245 | do_detailed_mode(struct detailed_timing *timing, void *c) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2246 | { |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2247 | struct detailed_mode_closure *closure = c; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2248 | struct drm_display_mode *newmode; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2249 | |
| 2250 | if (timing->pixel_clock) { |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2251 | newmode = drm_mode_detailed(closure->connector->dev, |
| 2252 | closure->edid, timing, |
| 2253 | closure->quirks); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2254 | if (!newmode) |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2255 | return; |
Adam Jackson | 9cf0097 | 2009-12-03 17:44:36 -0500 | [diff] [blame] | 2256 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2257 | if (closure->preferred) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2258 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
| 2259 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2260 | drm_mode_probed_add(closure->connector, newmode); |
| 2261 | closure->modes++; |
| 2262 | closure->preferred = 0; |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 2263 | } |
Ma Ling | 167f3a0 | 2009-03-20 14:09:48 +0800 | [diff] [blame] | 2264 | } |
| 2265 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2266 | /* |
| 2267 | * add_detailed_modes - Add modes from detailed timings |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2268 | * @connector: attached connector |
| 2269 | * @edid: EDID block to scan |
| 2270 | * @quirks: quirks to apply |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2271 | */ |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2272 | static int |
| 2273 | add_detailed_modes(struct drm_connector *connector, struct edid *edid, |
| 2274 | u32 quirks) |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2275 | { |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2276 | struct detailed_mode_closure closure = { |
| 2277 | connector, |
| 2278 | edid, |
| 2279 | 1, |
| 2280 | quirks, |
| 2281 | 0 |
| 2282 | }; |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2283 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2284 | if (closure.preferred && !version_greater(edid, 1, 3)) |
| 2285 | closure.preferred = |
| 2286 | (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); |
Adam Jackson | a327f6b | 2010-03-29 21:43:25 +0000 | [diff] [blame] | 2287 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2288 | drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2289 | |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 2290 | return closure.modes; |
Zhao Yakui | 882f021 | 2009-08-26 18:20:49 +0800 | [diff] [blame] | 2291 | } |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2292 | |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2293 | #define HDMI_IDENTIFIER 0x000C03 |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2294 | #define AUDIO_BLOCK 0x01 |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2295 | #define VIDEO_BLOCK 0x02 |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2296 | #define VENDOR_BLOCK 0x03 |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2297 | #define SPEAKER_BLOCK 0x04 |
Ville Syrjälä | b1edd6a | 2013-01-17 16:31:30 +0200 | [diff] [blame] | 2298 | #define VIDEO_CAPABILITY_BLOCK 0x07 |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2299 | #define EDID_BASIC_AUDIO (1 << 6) |
Lars-Peter Clausen | a988bc7 | 2012-04-16 15:16:19 +0200 | [diff] [blame] | 2300 | #define EDID_CEA_YCRCB444 (1 << 5) |
| 2301 | #define EDID_CEA_YCRCB422 (1 << 4) |
Ville Syrjälä | b1edd6a | 2013-01-17 16:31:30 +0200 | [diff] [blame] | 2302 | #define EDID_CEA_VCDB_QS (1 << 6) |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2303 | |
| 2304 | /** |
| 2305 | * Search EDID for CEA extension block. |
| 2306 | */ |
Ben Skeggs | eccaca2 | 2011-03-30 05:03:47 +0000 | [diff] [blame] | 2307 | u8 *drm_find_cea_extension(struct edid *edid) |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2308 | { |
| 2309 | u8 *edid_ext = NULL; |
| 2310 | int i; |
| 2311 | |
| 2312 | /* No EDID or EDID extensions */ |
| 2313 | if (edid == NULL || edid->extensions == 0) |
| 2314 | return NULL; |
| 2315 | |
| 2316 | /* Find CEA extension */ |
| 2317 | for (i = 0; i < edid->extensions; i++) { |
| 2318 | edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); |
| 2319 | if (edid_ext[0] == CEA_EXT) |
| 2320 | break; |
| 2321 | } |
| 2322 | |
| 2323 | if (i == edid->extensions) |
| 2324 | return NULL; |
| 2325 | |
| 2326 | return edid_ext; |
| 2327 | } |
Ben Skeggs | eccaca2 | 2011-03-30 05:03:47 +0000 | [diff] [blame] | 2328 | EXPORT_SYMBOL(drm_find_cea_extension); |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2329 | |
Ville Syrjälä | e6e7920 | 2013-05-31 15:23:41 +0300 | [diff] [blame] | 2330 | /* |
| 2331 | * Calculate the alternate clock for the CEA mode |
| 2332 | * (60Hz vs. 59.94Hz etc.) |
| 2333 | */ |
| 2334 | static unsigned int |
| 2335 | cea_mode_alternate_clock(const struct drm_display_mode *cea_mode) |
| 2336 | { |
| 2337 | unsigned int clock = cea_mode->clock; |
| 2338 | |
| 2339 | if (cea_mode->vrefresh % 6 != 0) |
| 2340 | return clock; |
| 2341 | |
| 2342 | /* |
| 2343 | * edid_cea_modes contains the 59.94Hz |
| 2344 | * variant for 240 and 480 line modes, |
| 2345 | * and the 60Hz variant otherwise. |
| 2346 | */ |
| 2347 | if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) |
| 2348 | clock = clock * 1001 / 1000; |
| 2349 | else |
| 2350 | clock = DIV_ROUND_UP(clock * 1000, 1001); |
| 2351 | |
| 2352 | return clock; |
| 2353 | } |
| 2354 | |
Thierry Reding | 18316c8 | 2012-12-20 15:41:44 +0100 | [diff] [blame] | 2355 | /** |
| 2356 | * drm_match_cea_mode - look for a CEA mode matching given mode |
| 2357 | * @to_match: display mode |
| 2358 | * |
| 2359 | * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 |
| 2360 | * mode. |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2361 | */ |
Thierry Reding | 18316c8 | 2012-12-20 15:41:44 +0100 | [diff] [blame] | 2362 | u8 drm_match_cea_mode(const struct drm_display_mode *to_match) |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2363 | { |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2364 | u8 mode; |
| 2365 | |
Ville Syrjälä | a90b590 | 2013-04-24 19:07:18 +0300 | [diff] [blame] | 2366 | if (!to_match->clock) |
| 2367 | return 0; |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2368 | |
Ville Syrjälä | a90b590 | 2013-04-24 19:07:18 +0300 | [diff] [blame] | 2369 | for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { |
| 2370 | const struct drm_display_mode *cea_mode = &edid_cea_modes[mode]; |
| 2371 | unsigned int clock1, clock2; |
| 2372 | |
Ville Syrjälä | a90b590 | 2013-04-24 19:07:18 +0300 | [diff] [blame] | 2373 | /* Check both 60Hz and 59.94Hz */ |
Ville Syrjälä | e6e7920 | 2013-05-31 15:23:41 +0300 | [diff] [blame] | 2374 | clock1 = cea_mode->clock; |
| 2375 | clock2 = cea_mode_alternate_clock(cea_mode); |
Ville Syrjälä | a90b590 | 2013-04-24 19:07:18 +0300 | [diff] [blame] | 2376 | |
| 2377 | if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || |
| 2378 | KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && |
| 2379 | drm_mode_equal_no_clocks(to_match, cea_mode)) |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2380 | return mode + 1; |
| 2381 | } |
| 2382 | return 0; |
| 2383 | } |
| 2384 | EXPORT_SYMBOL(drm_match_cea_mode); |
| 2385 | |
Ville Syrjälä | e6e7920 | 2013-05-31 15:23:41 +0300 | [diff] [blame] | 2386 | static int |
| 2387 | add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid) |
| 2388 | { |
| 2389 | struct drm_device *dev = connector->dev; |
| 2390 | struct drm_display_mode *mode, *tmp; |
| 2391 | LIST_HEAD(list); |
| 2392 | int modes = 0; |
| 2393 | |
| 2394 | /* Don't add CEA modes if the CEA extension block is missing */ |
| 2395 | if (!drm_find_cea_extension(edid)) |
| 2396 | return 0; |
| 2397 | |
| 2398 | /* |
| 2399 | * Go through all probed modes and create a new mode |
| 2400 | * with the alternate clock for certain CEA modes. |
| 2401 | */ |
| 2402 | list_for_each_entry(mode, &connector->probed_modes, head) { |
| 2403 | const struct drm_display_mode *cea_mode; |
| 2404 | struct drm_display_mode *newmode; |
| 2405 | u8 cea_mode_idx = drm_match_cea_mode(mode) - 1; |
| 2406 | unsigned int clock1, clock2; |
| 2407 | |
| 2408 | if (cea_mode_idx >= ARRAY_SIZE(edid_cea_modes)) |
| 2409 | continue; |
| 2410 | |
| 2411 | cea_mode = &edid_cea_modes[cea_mode_idx]; |
| 2412 | |
| 2413 | clock1 = cea_mode->clock; |
| 2414 | clock2 = cea_mode_alternate_clock(cea_mode); |
| 2415 | |
| 2416 | if (clock1 == clock2) |
| 2417 | continue; |
| 2418 | |
| 2419 | if (mode->clock != clock1 && mode->clock != clock2) |
| 2420 | continue; |
| 2421 | |
| 2422 | newmode = drm_mode_duplicate(dev, cea_mode); |
| 2423 | if (!newmode) |
| 2424 | continue; |
| 2425 | |
| 2426 | /* |
| 2427 | * The current mode could be either variant. Make |
| 2428 | * sure to pick the "other" clock for the new mode. |
| 2429 | */ |
| 2430 | if (mode->clock != clock1) |
| 2431 | newmode->clock = clock1; |
| 2432 | else |
| 2433 | newmode->clock = clock2; |
| 2434 | |
| 2435 | list_add_tail(&newmode->head, &list); |
| 2436 | } |
| 2437 | |
| 2438 | list_for_each_entry_safe(mode, tmp, &list, head) { |
| 2439 | list_del(&mode->head); |
| 2440 | drm_mode_probed_add(connector, mode); |
| 2441 | modes++; |
| 2442 | } |
| 2443 | |
| 2444 | return modes; |
| 2445 | } |
Stephane Marchesin | a479903 | 2012-11-09 16:21:05 +0000 | [diff] [blame] | 2446 | |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2447 | static int |
| 2448 | do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) |
| 2449 | { |
| 2450 | struct drm_device *dev = connector->dev; |
| 2451 | u8 * mode, cea_mode; |
| 2452 | int modes = 0; |
| 2453 | |
| 2454 | for (mode = db; mode < db + len; mode++) { |
| 2455 | cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ |
Thierry Reding | a6b2183 | 2012-11-23 15:01:42 +0100 | [diff] [blame] | 2456 | if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2457 | struct drm_display_mode *newmode; |
| 2458 | newmode = drm_mode_duplicate(dev, |
| 2459 | &edid_cea_modes[cea_mode]); |
| 2460 | if (newmode) { |
Ville Syrjälä | ee7925b | 2013-04-24 19:07:17 +0300 | [diff] [blame] | 2461 | newmode->vrefresh = 0; |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2462 | drm_mode_probed_add(connector, newmode); |
| 2463 | modes++; |
| 2464 | } |
| 2465 | } |
| 2466 | } |
| 2467 | |
| 2468 | return modes; |
| 2469 | } |
| 2470 | |
| 2471 | static int |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2472 | cea_db_payload_len(const u8 *db) |
| 2473 | { |
| 2474 | return db[0] & 0x1f; |
| 2475 | } |
| 2476 | |
| 2477 | static int |
| 2478 | cea_db_tag(const u8 *db) |
| 2479 | { |
| 2480 | return db[0] >> 5; |
| 2481 | } |
| 2482 | |
| 2483 | static int |
| 2484 | cea_revision(const u8 *cea) |
| 2485 | { |
| 2486 | return cea[1]; |
| 2487 | } |
| 2488 | |
| 2489 | static int |
| 2490 | cea_db_offsets(const u8 *cea, int *start, int *end) |
| 2491 | { |
| 2492 | /* Data block offset in CEA extension block */ |
| 2493 | *start = 4; |
| 2494 | *end = cea[2]; |
| 2495 | if (*end == 0) |
| 2496 | *end = 127; |
| 2497 | if (*end < 4 || *end > 127) |
| 2498 | return -ERANGE; |
| 2499 | return 0; |
| 2500 | } |
| 2501 | |
| 2502 | #define for_each_cea_db(cea, i, start, end) \ |
| 2503 | for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) |
| 2504 | |
| 2505 | static int |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2506 | add_cea_modes(struct drm_connector *connector, struct edid *edid) |
| 2507 | { |
| 2508 | u8 * cea = drm_find_cea_extension(edid); |
| 2509 | u8 * db, dbl; |
| 2510 | int modes = 0; |
| 2511 | |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2512 | if (cea && cea_revision(cea) >= 3) { |
| 2513 | int i, start, end; |
| 2514 | |
| 2515 | if (cea_db_offsets(cea, &start, &end)) |
| 2516 | return 0; |
| 2517 | |
| 2518 | for_each_cea_db(cea, i, start, end) { |
| 2519 | db = &cea[i]; |
| 2520 | dbl = cea_db_payload_len(db); |
| 2521 | |
| 2522 | if (cea_db_tag(db) == VIDEO_BLOCK) |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 2523 | modes += do_cea_modes (connector, db+1, dbl); |
| 2524 | } |
| 2525 | } |
| 2526 | |
| 2527 | return modes; |
| 2528 | } |
| 2529 | |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2530 | static void |
Ville Syrjälä | 8504072 | 2012-08-16 14:55:05 +0000 | [diff] [blame] | 2531 | parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2532 | { |
Ville Syrjälä | 8504072 | 2012-08-16 14:55:05 +0000 | [diff] [blame] | 2533 | u8 len = cea_db_payload_len(db); |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2534 | |
Ville Syrjälä | 8504072 | 2012-08-16 14:55:05 +0000 | [diff] [blame] | 2535 | if (len >= 6) { |
| 2536 | connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ |
| 2537 | connector->dvi_dual = db[6] & 1; |
| 2538 | } |
| 2539 | if (len >= 7) |
| 2540 | connector->max_tmds_clock = db[7] * 5; |
| 2541 | if (len >= 8) { |
| 2542 | connector->latency_present[0] = db[8] >> 7; |
| 2543 | connector->latency_present[1] = (db[8] >> 6) & 1; |
| 2544 | } |
| 2545 | if (len >= 9) |
| 2546 | connector->video_latency[0] = db[9]; |
| 2547 | if (len >= 10) |
| 2548 | connector->audio_latency[0] = db[10]; |
| 2549 | if (len >= 11) |
| 2550 | connector->video_latency[1] = db[11]; |
| 2551 | if (len >= 12) |
| 2552 | connector->audio_latency[1] = db[12]; |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2553 | |
Daniel Vetter | 670c1ef | 2012-11-22 09:53:55 +0100 | [diff] [blame] | 2554 | DRM_DEBUG_KMS("HDMI: DVI dual %d, " |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2555 | "max TMDS clock %d, " |
| 2556 | "latency present %d %d, " |
| 2557 | "video latency %d %d, " |
| 2558 | "audio latency %d %d\n", |
| 2559 | connector->dvi_dual, |
| 2560 | connector->max_tmds_clock, |
| 2561 | (int) connector->latency_present[0], |
| 2562 | (int) connector->latency_present[1], |
| 2563 | connector->video_latency[0], |
| 2564 | connector->video_latency[1], |
| 2565 | connector->audio_latency[0], |
| 2566 | connector->audio_latency[1]); |
| 2567 | } |
| 2568 | |
| 2569 | static void |
| 2570 | monitor_name(struct detailed_timing *t, void *data) |
| 2571 | { |
| 2572 | if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) |
| 2573 | *(u8 **)data = t->data.other_data.data.str.str; |
| 2574 | } |
| 2575 | |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2576 | static bool cea_db_is_hdmi_vsdb(const u8 *db) |
| 2577 | { |
| 2578 | int hdmi_id; |
| 2579 | |
| 2580 | if (cea_db_tag(db) != VENDOR_BLOCK) |
| 2581 | return false; |
| 2582 | |
| 2583 | if (cea_db_payload_len(db) < 5) |
| 2584 | return false; |
| 2585 | |
| 2586 | hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); |
| 2587 | |
| 2588 | return hdmi_id == HDMI_IDENTIFIER; |
| 2589 | } |
| 2590 | |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2591 | /** |
| 2592 | * drm_edid_to_eld - build ELD from EDID |
| 2593 | * @connector: connector corresponding to the HDMI/DP sink |
| 2594 | * @edid: EDID to parse |
| 2595 | * |
| 2596 | * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. |
| 2597 | * Some ELD fields are left to the graphics driver caller: |
| 2598 | * - Conn_Type |
| 2599 | * - HDCP |
| 2600 | * - Port_ID |
| 2601 | */ |
| 2602 | void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) |
| 2603 | { |
| 2604 | uint8_t *eld = connector->eld; |
| 2605 | u8 *cea; |
| 2606 | u8 *name; |
| 2607 | u8 *db; |
| 2608 | int sad_count = 0; |
| 2609 | int mnl; |
| 2610 | int dbl; |
| 2611 | |
| 2612 | memset(eld, 0, sizeof(connector->eld)); |
| 2613 | |
| 2614 | cea = drm_find_cea_extension(edid); |
| 2615 | if (!cea) { |
| 2616 | DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); |
| 2617 | return; |
| 2618 | } |
| 2619 | |
| 2620 | name = NULL; |
| 2621 | drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); |
| 2622 | for (mnl = 0; name && mnl < 13; mnl++) { |
| 2623 | if (name[mnl] == 0x0a) |
| 2624 | break; |
| 2625 | eld[20 + mnl] = name[mnl]; |
| 2626 | } |
| 2627 | eld[4] = (cea[1] << 5) | mnl; |
| 2628 | DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); |
| 2629 | |
| 2630 | eld[0] = 2 << 3; /* ELD version: 2 */ |
| 2631 | |
| 2632 | eld[16] = edid->mfg_id[0]; |
| 2633 | eld[17] = edid->mfg_id[1]; |
| 2634 | eld[18] = edid->prod_code[0]; |
| 2635 | eld[19] = edid->prod_code[1]; |
| 2636 | |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2637 | if (cea_revision(cea) >= 3) { |
| 2638 | int i, start, end; |
| 2639 | |
| 2640 | if (cea_db_offsets(cea, &start, &end)) { |
| 2641 | start = 0; |
| 2642 | end = 0; |
| 2643 | } |
| 2644 | |
| 2645 | for_each_cea_db(cea, i, start, end) { |
| 2646 | db = &cea[i]; |
| 2647 | dbl = cea_db_payload_len(db); |
| 2648 | |
| 2649 | switch (cea_db_tag(db)) { |
Christian Schmidt | a0ab734 | 2011-12-19 20:03:38 +0100 | [diff] [blame] | 2650 | case AUDIO_BLOCK: |
| 2651 | /* Audio Data Block, contains SADs */ |
| 2652 | sad_count = dbl / 3; |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2653 | if (dbl >= 1) |
| 2654 | memcpy(eld + 20 + mnl, &db[1], dbl); |
Christian Schmidt | a0ab734 | 2011-12-19 20:03:38 +0100 | [diff] [blame] | 2655 | break; |
| 2656 | case SPEAKER_BLOCK: |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2657 | /* Speaker Allocation Data Block */ |
| 2658 | if (dbl >= 1) |
| 2659 | eld[7] = db[1]; |
Christian Schmidt | a0ab734 | 2011-12-19 20:03:38 +0100 | [diff] [blame] | 2660 | break; |
| 2661 | case VENDOR_BLOCK: |
| 2662 | /* HDMI Vendor-Specific Data Block */ |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2663 | if (cea_db_is_hdmi_vsdb(db)) |
Christian Schmidt | a0ab734 | 2011-12-19 20:03:38 +0100 | [diff] [blame] | 2664 | parse_hdmi_vsdb(connector, db); |
| 2665 | break; |
| 2666 | default: |
| 2667 | break; |
| 2668 | } |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2669 | } |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2670 | } |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2671 | eld[5] |= sad_count << 4; |
| 2672 | eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; |
| 2673 | |
| 2674 | DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); |
| 2675 | } |
| 2676 | EXPORT_SYMBOL(drm_edid_to_eld); |
| 2677 | |
| 2678 | /** |
Rafał Miłecki | fe21416 | 2013-04-19 19:01:25 +0200 | [diff] [blame] | 2679 | * drm_edid_to_sad - extracts SADs from EDID |
| 2680 | * @edid: EDID to parse |
| 2681 | * @sads: pointer that will be set to the extracted SADs |
| 2682 | * |
| 2683 | * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it. |
| 2684 | * Note: returned pointer needs to be kfreed |
| 2685 | * |
| 2686 | * Return number of found SADs or negative number on error. |
| 2687 | */ |
| 2688 | int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads) |
| 2689 | { |
| 2690 | int count = 0; |
| 2691 | int i, start, end, dbl; |
| 2692 | u8 *cea; |
| 2693 | |
| 2694 | cea = drm_find_cea_extension(edid); |
| 2695 | if (!cea) { |
| 2696 | DRM_DEBUG_KMS("SAD: no CEA Extension found\n"); |
| 2697 | return -ENOENT; |
| 2698 | } |
| 2699 | |
| 2700 | if (cea_revision(cea) < 3) { |
| 2701 | DRM_DEBUG_KMS("SAD: wrong CEA revision\n"); |
| 2702 | return -ENOTSUPP; |
| 2703 | } |
| 2704 | |
| 2705 | if (cea_db_offsets(cea, &start, &end)) { |
| 2706 | DRM_DEBUG_KMS("SAD: invalid data block offsets\n"); |
| 2707 | return -EPROTO; |
| 2708 | } |
| 2709 | |
| 2710 | for_each_cea_db(cea, i, start, end) { |
| 2711 | u8 *db = &cea[i]; |
| 2712 | |
| 2713 | if (cea_db_tag(db) == AUDIO_BLOCK) { |
| 2714 | int j; |
| 2715 | dbl = cea_db_payload_len(db); |
| 2716 | |
| 2717 | count = dbl / 3; /* SAD is 3B */ |
| 2718 | *sads = kcalloc(count, sizeof(**sads), GFP_KERNEL); |
| 2719 | if (!*sads) |
| 2720 | return -ENOMEM; |
| 2721 | for (j = 0; j < count; j++) { |
| 2722 | u8 *sad = &db[1 + j * 3]; |
| 2723 | |
| 2724 | (*sads)[j].format = (sad[0] & 0x78) >> 3; |
| 2725 | (*sads)[j].channels = sad[0] & 0x7; |
| 2726 | (*sads)[j].freq = sad[1] & 0x7F; |
| 2727 | (*sads)[j].byte2 = sad[2]; |
| 2728 | } |
| 2729 | break; |
| 2730 | } |
| 2731 | } |
| 2732 | |
| 2733 | return count; |
| 2734 | } |
| 2735 | EXPORT_SYMBOL(drm_edid_to_sad); |
| 2736 | |
| 2737 | /** |
Wu Fengguang | 76adaa34 | 2011-09-05 14:23:20 +0800 | [diff] [blame] | 2738 | * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond |
| 2739 | * @connector: connector associated with the HDMI/DP sink |
| 2740 | * @mode: the display mode |
| 2741 | */ |
| 2742 | int drm_av_sync_delay(struct drm_connector *connector, |
| 2743 | struct drm_display_mode *mode) |
| 2744 | { |
| 2745 | int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); |
| 2746 | int a, v; |
| 2747 | |
| 2748 | if (!connector->latency_present[0]) |
| 2749 | return 0; |
| 2750 | if (!connector->latency_present[1]) |
| 2751 | i = 0; |
| 2752 | |
| 2753 | a = connector->audio_latency[i]; |
| 2754 | v = connector->video_latency[i]; |
| 2755 | |
| 2756 | /* |
| 2757 | * HDMI/DP sink doesn't support audio or video? |
| 2758 | */ |
| 2759 | if (a == 255 || v == 255) |
| 2760 | return 0; |
| 2761 | |
| 2762 | /* |
| 2763 | * Convert raw EDID values to millisecond. |
| 2764 | * Treat unknown latency as 0ms. |
| 2765 | */ |
| 2766 | if (a) |
| 2767 | a = min(2 * (a - 1), 500); |
| 2768 | if (v) |
| 2769 | v = min(2 * (v - 1), 500); |
| 2770 | |
| 2771 | return max(v - a, 0); |
| 2772 | } |
| 2773 | EXPORT_SYMBOL(drm_av_sync_delay); |
| 2774 | |
| 2775 | /** |
| 2776 | * drm_select_eld - select one ELD from multiple HDMI/DP sinks |
| 2777 | * @encoder: the encoder just changed display mode |
| 2778 | * @mode: the adjusted display mode |
| 2779 | * |
| 2780 | * It's possible for one encoder to be associated with multiple HDMI/DP sinks. |
| 2781 | * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. |
| 2782 | */ |
| 2783 | struct drm_connector *drm_select_eld(struct drm_encoder *encoder, |
| 2784 | struct drm_display_mode *mode) |
| 2785 | { |
| 2786 | struct drm_connector *connector; |
| 2787 | struct drm_device *dev = encoder->dev; |
| 2788 | |
| 2789 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) |
| 2790 | if (connector->encoder == encoder && connector->eld[0]) |
| 2791 | return connector; |
| 2792 | |
| 2793 | return NULL; |
| 2794 | } |
| 2795 | EXPORT_SYMBOL(drm_select_eld); |
| 2796 | |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2797 | /** |
| 2798 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. |
| 2799 | * @edid: monitor EDID information |
| 2800 | * |
| 2801 | * Parse the CEA extension according to CEA-861-B. |
| 2802 | * Return true if HDMI, false if not or unknown. |
| 2803 | */ |
| 2804 | bool drm_detect_hdmi_monitor(struct edid *edid) |
| 2805 | { |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2806 | u8 *edid_ext; |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2807 | int i; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2808 | int start_offset, end_offset; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2809 | |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2810 | edid_ext = drm_find_cea_extension(edid); |
| 2811 | if (!edid_ext) |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2812 | return false; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2813 | |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2814 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2815 | return false; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2816 | |
| 2817 | /* |
| 2818 | * Because HDMI identifier is in Vendor Specific Block, |
| 2819 | * search it from all data blocks of CEA extension. |
| 2820 | */ |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2821 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2822 | if (cea_db_is_hdmi_vsdb(&edid_ext[i])) |
| 2823 | return true; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2824 | } |
| 2825 | |
Ville Syrjälä | 14f77fd | 2012-08-16 14:55:06 +0000 | [diff] [blame] | 2826 | return false; |
Ma Ling | f23c20c | 2009-03-26 19:26:23 +0800 | [diff] [blame] | 2827 | } |
| 2828 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); |
| 2829 | |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2830 | /** |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2831 | * drm_detect_monitor_audio - check monitor audio capability |
| 2832 | * |
| 2833 | * Monitor should have CEA extension block. |
| 2834 | * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic |
| 2835 | * audio' only. If there is any audio extension block and supported |
| 2836 | * audio format, assume at least 'basic audio' support, even if 'basic |
| 2837 | * audio' is not defined in EDID. |
| 2838 | * |
| 2839 | */ |
| 2840 | bool drm_detect_monitor_audio(struct edid *edid) |
| 2841 | { |
| 2842 | u8 *edid_ext; |
| 2843 | int i, j; |
| 2844 | bool has_audio = false; |
| 2845 | int start_offset, end_offset; |
| 2846 | |
| 2847 | edid_ext = drm_find_cea_extension(edid); |
| 2848 | if (!edid_ext) |
| 2849 | goto end; |
| 2850 | |
| 2851 | has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); |
| 2852 | |
| 2853 | if (has_audio) { |
| 2854 | DRM_DEBUG_KMS("Monitor has basic audio support\n"); |
| 2855 | goto end; |
| 2856 | } |
| 2857 | |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2858 | if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) |
| 2859 | goto end; |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2860 | |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2861 | for_each_cea_db(edid_ext, i, start_offset, end_offset) { |
| 2862 | if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2863 | has_audio = true; |
Ville Syrjälä | 9e50b9d | 2012-08-16 14:55:04 +0000 | [diff] [blame] | 2864 | for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) |
Zhenyu Wang | 8fe9790 | 2010-09-19 14:27:28 +0800 | [diff] [blame] | 2865 | DRM_DEBUG_KMS("CEA audio format %d\n", |
| 2866 | (edid_ext[i + j] >> 3) & 0xf); |
| 2867 | goto end; |
| 2868 | } |
| 2869 | } |
| 2870 | end: |
| 2871 | return has_audio; |
| 2872 | } |
| 2873 | EXPORT_SYMBOL(drm_detect_monitor_audio); |
| 2874 | |
| 2875 | /** |
Ville Syrjälä | b1edd6a | 2013-01-17 16:31:30 +0200 | [diff] [blame] | 2876 | * drm_rgb_quant_range_selectable - is RGB quantization range selectable? |
| 2877 | * |
| 2878 | * Check whether the monitor reports the RGB quantization range selection |
| 2879 | * as supported. The AVI infoframe can then be used to inform the monitor |
| 2880 | * which quantization range (full or limited) is used. |
| 2881 | */ |
| 2882 | bool drm_rgb_quant_range_selectable(struct edid *edid) |
| 2883 | { |
| 2884 | u8 *edid_ext; |
| 2885 | int i, start, end; |
| 2886 | |
| 2887 | edid_ext = drm_find_cea_extension(edid); |
| 2888 | if (!edid_ext) |
| 2889 | return false; |
| 2890 | |
| 2891 | if (cea_db_offsets(edid_ext, &start, &end)) |
| 2892 | return false; |
| 2893 | |
| 2894 | for_each_cea_db(edid_ext, i, start, end) { |
| 2895 | if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && |
| 2896 | cea_db_payload_len(&edid_ext[i]) == 2) { |
| 2897 | DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); |
| 2898 | return edid_ext[i + 2] & EDID_CEA_VCDB_QS; |
| 2899 | } |
| 2900 | } |
| 2901 | |
| 2902 | return false; |
| 2903 | } |
| 2904 | EXPORT_SYMBOL(drm_rgb_quant_range_selectable); |
| 2905 | |
| 2906 | /** |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2907 | * drm_add_display_info - pull display info out if present |
| 2908 | * @edid: EDID data |
| 2909 | * @info: display info (attached to connector) |
| 2910 | * |
| 2911 | * Grab any available display info and stuff it into the drm_display_info |
| 2912 | * structure that's part of the connector. Useful for tracking bpp and |
| 2913 | * color spaces. |
| 2914 | */ |
| 2915 | static void drm_add_display_info(struct edid *edid, |
| 2916 | struct drm_display_info *info) |
| 2917 | { |
Jesse Barnes | ebec9a7 | 2011-08-03 09:22:54 -0700 | [diff] [blame] | 2918 | u8 *edid_ext; |
| 2919 | |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2920 | info->width_mm = edid->width_cm * 10; |
| 2921 | info->height_mm = edid->height_cm * 10; |
| 2922 | |
| 2923 | /* driver figures it out in this case */ |
| 2924 | info->bpc = 0; |
Jesse Barnes | da05a5a7 | 2011-04-15 13:48:57 -0700 | [diff] [blame] | 2925 | info->color_formats = 0; |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2926 | |
Lars-Peter Clausen | a988bc7 | 2012-04-16 15:16:19 +0200 | [diff] [blame] | 2927 | if (edid->revision < 3) |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2928 | return; |
| 2929 | |
| 2930 | if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) |
| 2931 | return; |
| 2932 | |
Lars-Peter Clausen | a988bc7 | 2012-04-16 15:16:19 +0200 | [diff] [blame] | 2933 | /* Get data from CEA blocks if present */ |
| 2934 | edid_ext = drm_find_cea_extension(edid); |
| 2935 | if (edid_ext) { |
| 2936 | info->cea_rev = edid_ext[1]; |
| 2937 | |
| 2938 | /* The existence of a CEA block should imply RGB support */ |
| 2939 | info->color_formats = DRM_COLOR_FORMAT_RGB444; |
| 2940 | if (edid_ext[3] & EDID_CEA_YCRCB444) |
| 2941 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
| 2942 | if (edid_ext[3] & EDID_CEA_YCRCB422) |
| 2943 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
| 2944 | } |
| 2945 | |
| 2946 | /* Only defined for 1.4 with digital displays */ |
| 2947 | if (edid->revision < 4) |
| 2948 | return; |
| 2949 | |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2950 | switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { |
| 2951 | case DRM_EDID_DIGITAL_DEPTH_6: |
| 2952 | info->bpc = 6; |
| 2953 | break; |
| 2954 | case DRM_EDID_DIGITAL_DEPTH_8: |
| 2955 | info->bpc = 8; |
| 2956 | break; |
| 2957 | case DRM_EDID_DIGITAL_DEPTH_10: |
| 2958 | info->bpc = 10; |
| 2959 | break; |
| 2960 | case DRM_EDID_DIGITAL_DEPTH_12: |
| 2961 | info->bpc = 12; |
| 2962 | break; |
| 2963 | case DRM_EDID_DIGITAL_DEPTH_14: |
| 2964 | info->bpc = 14; |
| 2965 | break; |
| 2966 | case DRM_EDID_DIGITAL_DEPTH_16: |
| 2967 | info->bpc = 16; |
| 2968 | break; |
| 2969 | case DRM_EDID_DIGITAL_DEPTH_UNDEF: |
| 2970 | default: |
| 2971 | info->bpc = 0; |
| 2972 | break; |
| 2973 | } |
Jesse Barnes | da05a5a7 | 2011-04-15 13:48:57 -0700 | [diff] [blame] | 2974 | |
Lars-Peter Clausen | a988bc7 | 2012-04-16 15:16:19 +0200 | [diff] [blame] | 2975 | info->color_formats |= DRM_COLOR_FORMAT_RGB444; |
Lars-Peter Clausen | ee58808 | 2012-04-16 15:16:18 +0200 | [diff] [blame] | 2976 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) |
| 2977 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; |
| 2978 | if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) |
| 2979 | info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 2980 | } |
| 2981 | |
| 2982 | /** |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 2983 | * drm_add_edid_modes - add modes from EDID data, if available |
| 2984 | * @connector: connector we're probing |
| 2985 | * @edid: edid data |
| 2986 | * |
| 2987 | * Add the specified modes to the connector's mode list. |
| 2988 | * |
| 2989 | * Return number of modes added or 0 if we couldn't find any. |
| 2990 | */ |
| 2991 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) |
| 2992 | { |
| 2993 | int num_modes = 0; |
| 2994 | u32 quirks; |
| 2995 | |
| 2996 | if (edid == NULL) { |
| 2997 | return 0; |
| 2998 | } |
Alex Deucher | 3c53788 | 2010-02-05 04:21:19 -0500 | [diff] [blame] | 2999 | if (!drm_edid_is_valid(edid)) { |
Jordan Crouse | dcdb167 | 2010-05-27 13:40:25 -0600 | [diff] [blame] | 3000 | dev_warn(connector->dev->dev, "%s: EDID invalid.\n", |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 3001 | drm_get_connector_name(connector)); |
| 3002 | return 0; |
| 3003 | } |
| 3004 | |
| 3005 | quirks = edid_get_quirks(edid); |
| 3006 | |
Adam Jackson | c867df7 | 2010-03-29 21:43:21 +0000 | [diff] [blame] | 3007 | /* |
| 3008 | * EDID spec says modes should be preferred in this order: |
| 3009 | * - preferred detailed mode |
| 3010 | * - other detailed modes from base block |
| 3011 | * - detailed modes from extension blocks |
| 3012 | * - CVT 3-byte code modes |
| 3013 | * - standard timing codes |
| 3014 | * - established timing codes |
| 3015 | * - modes inferred from GTF or CVT range information |
| 3016 | * |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 3017 | * We get this pretty much right. |
Adam Jackson | c867df7 | 2010-03-29 21:43:21 +0000 | [diff] [blame] | 3018 | * |
| 3019 | * XXX order for additional mode types in extension blocks? |
| 3020 | */ |
Adam Jackson | 1393157 | 2010-08-03 14:38:19 -0400 | [diff] [blame] | 3021 | num_modes += add_detailed_modes(connector, edid, quirks); |
| 3022 | num_modes += add_cvt_modes(connector, edid); |
Adam Jackson | c867df7 | 2010-03-29 21:43:21 +0000 | [diff] [blame] | 3023 | num_modes += add_standard_modes(connector, edid); |
| 3024 | num_modes += add_established_modes(connector, edid); |
Paulo Zanoni | 196e077 | 2013-02-15 13:36:27 -0200 | [diff] [blame] | 3025 | if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) |
| 3026 | num_modes += add_inferred_modes(connector, edid); |
Christian Schmidt | 54ac76f | 2011-12-19 14:53:16 +0000 | [diff] [blame] | 3027 | num_modes += add_cea_modes(connector, edid); |
Ville Syrjälä | e6e7920 | 2013-05-31 15:23:41 +0300 | [diff] [blame] | 3028 | num_modes += add_alternate_cea_modes(connector, edid); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 3029 | |
| 3030 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) |
| 3031 | edid_fixup_preferred(connector, quirks); |
| 3032 | |
Jesse Barnes | 3b11228 | 2011-04-15 12:49:23 -0700 | [diff] [blame] | 3033 | drm_add_display_info(edid, &connector->display_info); |
Dave Airlie | f453ba0 | 2008-11-07 14:05:41 -0800 | [diff] [blame] | 3034 | |
| 3035 | return num_modes; |
| 3036 | } |
| 3037 | EXPORT_SYMBOL(drm_add_edid_modes); |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 3038 | |
| 3039 | /** |
| 3040 | * drm_add_modes_noedid - add modes for the connectors without EDID |
| 3041 | * @connector: connector we're probing |
| 3042 | * @hdisplay: the horizontal display limit |
| 3043 | * @vdisplay: the vertical display limit |
| 3044 | * |
| 3045 | * Add the specified modes to the connector's mode list. Only when the |
| 3046 | * hdisplay/vdisplay is not beyond the given limit, it will be added. |
| 3047 | * |
| 3048 | * Return number of modes added or 0 if we couldn't find any. |
| 3049 | */ |
| 3050 | int drm_add_modes_noedid(struct drm_connector *connector, |
| 3051 | int hdisplay, int vdisplay) |
| 3052 | { |
| 3053 | int i, count, num_modes = 0; |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 3054 | struct drm_display_mode *mode; |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 3055 | struct drm_device *dev = connector->dev; |
| 3056 | |
| 3057 | count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); |
| 3058 | if (hdisplay < 0) |
| 3059 | hdisplay = 0; |
| 3060 | if (vdisplay < 0) |
| 3061 | vdisplay = 0; |
| 3062 | |
| 3063 | for (i = 0; i < count; i++) { |
Chris Wilson | b1f559e | 2011-01-26 09:49:47 +0000 | [diff] [blame] | 3064 | const struct drm_display_mode *ptr = &drm_dmt_modes[i]; |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 3065 | if (hdisplay && vdisplay) { |
| 3066 | /* |
| 3067 | * Only when two are valid, they will be used to check |
| 3068 | * whether the mode should be added to the mode list of |
| 3069 | * the connector. |
| 3070 | */ |
| 3071 | if (ptr->hdisplay > hdisplay || |
| 3072 | ptr->vdisplay > vdisplay) |
| 3073 | continue; |
| 3074 | } |
Adam Jackson | f985ded | 2009-11-23 14:23:04 -0500 | [diff] [blame] | 3075 | if (drm_mode_vrefresh(ptr) > 61) |
| 3076 | continue; |
Zhao Yakui | f0fda0a | 2009-09-03 09:33:48 +0800 | [diff] [blame] | 3077 | mode = drm_mode_duplicate(dev, ptr); |
| 3078 | if (mode) { |
| 3079 | drm_mode_probed_add(connector, mode); |
| 3080 | num_modes++; |
| 3081 | } |
| 3082 | } |
| 3083 | return num_modes; |
| 3084 | } |
| 3085 | EXPORT_SYMBOL(drm_add_modes_noedid); |
Thierry Reding | 10a8512 | 2012-11-21 15:31:35 +0100 | [diff] [blame] | 3086 | |
| 3087 | /** |
| 3088 | * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with |
| 3089 | * data from a DRM display mode |
| 3090 | * @frame: HDMI AVI infoframe |
| 3091 | * @mode: DRM display mode |
| 3092 | * |
| 3093 | * Returns 0 on success or a negative error code on failure. |
| 3094 | */ |
| 3095 | int |
| 3096 | drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, |
| 3097 | const struct drm_display_mode *mode) |
| 3098 | { |
| 3099 | int err; |
| 3100 | |
| 3101 | if (!frame || !mode) |
| 3102 | return -EINVAL; |
| 3103 | |
| 3104 | err = hdmi_avi_infoframe_init(frame); |
| 3105 | if (err < 0) |
| 3106 | return err; |
| 3107 | |
| 3108 | frame->video_code = drm_match_cea_mode(mode); |
| 3109 | if (!frame->video_code) |
| 3110 | return 0; |
| 3111 | |
| 3112 | frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; |
| 3113 | frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; |
| 3114 | |
| 3115 | return 0; |
| 3116 | } |
| 3117 | EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); |