Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * GPMC support functions |
| 3 | * |
| 4 | * Copyright (C) 2005-2006 Nokia Corporation |
| 5 | * |
| 6 | * Author: Juha Yrjola |
| 7 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 8 | * Copyright (C) 2009 Texas Instruments |
| 9 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
| 10 | * |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 15 | #undef DEBUG |
| 16 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 17 | #include <linux/irq.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 18 | #include <linux/kernel.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/err.h> |
| 21 | #include <linux/clk.h> |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 22 | #include <linux/ioport.h> |
| 23 | #include <linux/spinlock.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 24 | #include <linux/io.h> |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 25 | #include <linux/module.h> |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 26 | #include <linux/interrupt.h> |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 28 | #include <linux/of.h> |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 29 | #include <linux/of_address.h> |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 30 | #include <linux/of_mtd.h> |
| 31 | #include <linux/of_device.h> |
Tony Lindgren | e639cd5 | 2014-11-20 12:11:25 -0800 | [diff] [blame] | 32 | #include <linux/omap-gpmc.h> |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 33 | #include <linux/mtd/nand.h> |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 34 | #include <linux/pm_runtime.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 35 | |
Afzal Mohammed | bc3668e | 2012-09-29 12:26:13 +0530 | [diff] [blame] | 36 | #include <linux/platform_data/mtd-nand-omap2.h> |
Tony Lindgren | e639cd5 | 2014-11-20 12:11:25 -0800 | [diff] [blame] | 37 | #include <linux/platform_data/mtd-onenand-omap2.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 38 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 39 | #include <asm/mach-types.h> |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 40 | |
Afzal Mohammed | 4be48fd | 2012-09-23 17:28:24 -0600 | [diff] [blame] | 41 | #define DEVICE_NAME "omap-gpmc" |
| 42 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 43 | /* GPMC register offsets */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 44 | #define GPMC_REVISION 0x00 |
| 45 | #define GPMC_SYSCONFIG 0x10 |
| 46 | #define GPMC_SYSSTATUS 0x14 |
| 47 | #define GPMC_IRQSTATUS 0x18 |
| 48 | #define GPMC_IRQENABLE 0x1c |
| 49 | #define GPMC_TIMEOUT_CONTROL 0x40 |
| 50 | #define GPMC_ERR_ADDRESS 0x44 |
| 51 | #define GPMC_ERR_TYPE 0x48 |
| 52 | #define GPMC_CONFIG 0x50 |
| 53 | #define GPMC_STATUS 0x54 |
| 54 | #define GPMC_PREFETCH_CONFIG1 0x1e0 |
| 55 | #define GPMC_PREFETCH_CONFIG2 0x1e4 |
Thara Gopinath | 15e02a3 | 2008-04-28 16:55:01 +0530 | [diff] [blame] | 56 | #define GPMC_PREFETCH_CONTROL 0x1ec |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 57 | #define GPMC_PREFETCH_STATUS 0x1f0 |
| 58 | #define GPMC_ECC_CONFIG 0x1f4 |
| 59 | #define GPMC_ECC_CONTROL 0x1f8 |
| 60 | #define GPMC_ECC_SIZE_CONFIG 0x1fc |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 61 | #define GPMC_ECC1_RESULT 0x200 |
Ivan Djelic | 8d602cf | 2012-04-26 14:17:49 +0200 | [diff] [blame] | 62 | #define GPMC_ECC_BCH_RESULT_0 0x240 /* not available on OMAP2 */ |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 63 | #define GPMC_ECC_BCH_RESULT_1 0x244 /* not available on OMAP2 */ |
| 64 | #define GPMC_ECC_BCH_RESULT_2 0x248 /* not available on OMAP2 */ |
| 65 | #define GPMC_ECC_BCH_RESULT_3 0x24c /* not available on OMAP2 */ |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 66 | #define GPMC_ECC_BCH_RESULT_4 0x300 /* not available on OMAP2 */ |
| 67 | #define GPMC_ECC_BCH_RESULT_5 0x304 /* not available on OMAP2 */ |
| 68 | #define GPMC_ECC_BCH_RESULT_6 0x308 /* not available on OMAP2 */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 69 | |
Yegor Yefremov | 2c65e74 | 2012-05-09 08:32:49 -0700 | [diff] [blame] | 70 | /* GPMC ECC control settings */ |
| 71 | #define GPMC_ECC_CTRL_ECCCLEAR 0x100 |
| 72 | #define GPMC_ECC_CTRL_ECCDISABLE 0x000 |
| 73 | #define GPMC_ECC_CTRL_ECCREG1 0x001 |
| 74 | #define GPMC_ECC_CTRL_ECCREG2 0x002 |
| 75 | #define GPMC_ECC_CTRL_ECCREG3 0x003 |
| 76 | #define GPMC_ECC_CTRL_ECCREG4 0x004 |
| 77 | #define GPMC_ECC_CTRL_ECCREG5 0x005 |
| 78 | #define GPMC_ECC_CTRL_ECCREG6 0x006 |
| 79 | #define GPMC_ECC_CTRL_ECCREG7 0x007 |
| 80 | #define GPMC_ECC_CTRL_ECCREG8 0x008 |
| 81 | #define GPMC_ECC_CTRL_ECCREG9 0x009 |
| 82 | |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 83 | #define GPMC_CONFIG_LIMITEDADDRESS BIT(1) |
| 84 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 85 | #define GPMC_CONFIG2_CSEXTRADELAY BIT(7) |
| 86 | #define GPMC_CONFIG3_ADVEXTRADELAY BIT(7) |
| 87 | #define GPMC_CONFIG4_OEEXTRADELAY BIT(7) |
| 88 | #define GPMC_CONFIG4_WEEXTRADELAY BIT(23) |
| 89 | #define GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN BIT(6) |
| 90 | #define GPMC_CONFIG6_CYCLE2CYCLESAMECSEN BIT(7) |
| 91 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 92 | #define GPMC_CS0_OFFSET 0x60 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 93 | #define GPMC_CS_SIZE 0x30 |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 94 | #define GPMC_BCH_SIZE 0x10 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 95 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 96 | #define GPMC_MEM_END 0x3FFFFFFF |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 97 | |
| 98 | #define GPMC_CHUNK_SHIFT 24 /* 16 MB */ |
| 99 | #define GPMC_SECTION_SHIFT 28 /* 128 MB */ |
| 100 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 101 | #define CS_NUM_SHIFT 24 |
| 102 | #define ENABLE_PREFETCH (0x1 << 7) |
| 103 | #define DMA_MPU_MODE 2 |
| 104 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 105 | #define GPMC_REVISION_MAJOR(l) ((l >> 4) & 0xf) |
| 106 | #define GPMC_REVISION_MINOR(l) (l & 0xf) |
| 107 | |
| 108 | #define GPMC_HAS_WR_ACCESS 0x1 |
| 109 | #define GPMC_HAS_WR_DATA_MUX_BUS 0x2 |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 110 | #define GPMC_HAS_MUX_AAD 0x4 |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 111 | |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 112 | #define GPMC_NR_WAITPINS 4 |
| 113 | |
Tony Lindgren | e639cd5 | 2014-11-20 12:11:25 -0800 | [diff] [blame] | 114 | #define GPMC_CS_CONFIG1 0x00 |
| 115 | #define GPMC_CS_CONFIG2 0x04 |
| 116 | #define GPMC_CS_CONFIG3 0x08 |
| 117 | #define GPMC_CS_CONFIG4 0x0c |
| 118 | #define GPMC_CS_CONFIG5 0x10 |
| 119 | #define GPMC_CS_CONFIG6 0x14 |
| 120 | #define GPMC_CS_CONFIG7 0x18 |
| 121 | #define GPMC_CS_NAND_COMMAND 0x1c |
| 122 | #define GPMC_CS_NAND_ADDRESS 0x20 |
| 123 | #define GPMC_CS_NAND_DATA 0x24 |
| 124 | |
| 125 | /* Control Commands */ |
| 126 | #define GPMC_CONFIG_RDY_BSY 0x00000001 |
| 127 | #define GPMC_CONFIG_DEV_SIZE 0x00000002 |
| 128 | #define GPMC_CONFIG_DEV_TYPE 0x00000003 |
| 129 | #define GPMC_SET_IRQ_STATUS 0x00000004 |
| 130 | |
| 131 | #define GPMC_CONFIG1_WRAPBURST_SUPP (1 << 31) |
| 132 | #define GPMC_CONFIG1_READMULTIPLE_SUPP (1 << 30) |
| 133 | #define GPMC_CONFIG1_READTYPE_ASYNC (0 << 29) |
| 134 | #define GPMC_CONFIG1_READTYPE_SYNC (1 << 29) |
| 135 | #define GPMC_CONFIG1_WRITEMULTIPLE_SUPP (1 << 28) |
| 136 | #define GPMC_CONFIG1_WRITETYPE_ASYNC (0 << 27) |
| 137 | #define GPMC_CONFIG1_WRITETYPE_SYNC (1 << 27) |
| 138 | #define GPMC_CONFIG1_CLKACTIVATIONTIME(val) ((val & 3) << 25) |
| 139 | #define GPMC_CONFIG1_PAGE_LEN(val) ((val & 3) << 23) |
| 140 | #define GPMC_CONFIG1_WAIT_READ_MON (1 << 22) |
| 141 | #define GPMC_CONFIG1_WAIT_WRITE_MON (1 << 21) |
| 142 | #define GPMC_CONFIG1_WAIT_MON_IIME(val) ((val & 3) << 18) |
| 143 | #define GPMC_CONFIG1_WAIT_PIN_SEL(val) ((val & 3) << 16) |
| 144 | #define GPMC_CONFIG1_DEVICESIZE(val) ((val & 3) << 12) |
| 145 | #define GPMC_CONFIG1_DEVICESIZE_16 GPMC_CONFIG1_DEVICESIZE(1) |
| 146 | #define GPMC_CONFIG1_DEVICETYPE(val) ((val & 3) << 10) |
| 147 | #define GPMC_CONFIG1_DEVICETYPE_NOR GPMC_CONFIG1_DEVICETYPE(0) |
| 148 | #define GPMC_CONFIG1_MUXTYPE(val) ((val & 3) << 8) |
| 149 | #define GPMC_CONFIG1_TIME_PARA_GRAN (1 << 4) |
| 150 | #define GPMC_CONFIG1_FCLK_DIV(val) (val & 3) |
| 151 | #define GPMC_CONFIG1_FCLK_DIV2 (GPMC_CONFIG1_FCLK_DIV(1)) |
| 152 | #define GPMC_CONFIG1_FCLK_DIV3 (GPMC_CONFIG1_FCLK_DIV(2)) |
| 153 | #define GPMC_CONFIG1_FCLK_DIV4 (GPMC_CONFIG1_FCLK_DIV(3)) |
| 154 | #define GPMC_CONFIG7_CSVALID (1 << 6) |
| 155 | |
Semen Protsenko | 9c4f757 | 2015-01-24 22:28:38 +0200 | [diff] [blame] | 156 | #define GPMC_CONFIG7_BASEADDRESS_MASK 0x3f |
| 157 | #define GPMC_CONFIG7_CSVALID_MASK BIT(6) |
| 158 | #define GPMC_CONFIG7_MASKADDRESS_OFFSET 8 |
| 159 | #define GPMC_CONFIG7_MASKADDRESS_MASK (0xf << GPMC_CONFIG7_MASKADDRESS_OFFSET) |
| 160 | /* All CONFIG7 bits except reserved bits */ |
| 161 | #define GPMC_CONFIG7_MASK (GPMC_CONFIG7_BASEADDRESS_MASK | \ |
| 162 | GPMC_CONFIG7_CSVALID_MASK | \ |
| 163 | GPMC_CONFIG7_MASKADDRESS_MASK) |
| 164 | |
Tony Lindgren | e639cd5 | 2014-11-20 12:11:25 -0800 | [diff] [blame] | 165 | #define GPMC_DEVICETYPE_NOR 0 |
| 166 | #define GPMC_DEVICETYPE_NAND 2 |
| 167 | #define GPMC_CONFIG_WRITEPROTECT 0x00000010 |
| 168 | #define WR_RD_PIN_MONITORING 0x00600000 |
| 169 | |
| 170 | #define GPMC_ENABLE_IRQ 0x0000000d |
| 171 | |
| 172 | /* ECC commands */ |
| 173 | #define GPMC_ECC_READ 0 /* Reset Hardware ECC for read */ |
| 174 | #define GPMC_ECC_WRITE 1 /* Reset Hardware ECC for write */ |
| 175 | #define GPMC_ECC_READSYN 2 /* Reset before syndrom is read back */ |
| 176 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 177 | /* XXX: Only NAND irq has been considered,currently these are the only ones used |
| 178 | */ |
| 179 | #define GPMC_NR_IRQ 2 |
| 180 | |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 181 | struct gpmc_cs_data { |
| 182 | const char *name; |
| 183 | |
| 184 | #define GPMC_CS_RESERVED (1 << 0) |
| 185 | u32 flags; |
| 186 | |
| 187 | struct resource mem; |
| 188 | }; |
| 189 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 190 | struct gpmc_client_irq { |
| 191 | unsigned irq; |
| 192 | u32 bitmask; |
| 193 | }; |
| 194 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 195 | /* Structure to save gpmc cs context */ |
| 196 | struct gpmc_cs_config { |
| 197 | u32 config1; |
| 198 | u32 config2; |
| 199 | u32 config3; |
| 200 | u32 config4; |
| 201 | u32 config5; |
| 202 | u32 config6; |
| 203 | u32 config7; |
| 204 | int is_valid; |
| 205 | }; |
| 206 | |
| 207 | /* |
| 208 | * Structure to save/restore gpmc context |
| 209 | * to support core off on OMAP3 |
| 210 | */ |
| 211 | struct omap3_gpmc_regs { |
| 212 | u32 sysconfig; |
| 213 | u32 irqenable; |
| 214 | u32 timeout_ctrl; |
| 215 | u32 config; |
| 216 | u32 prefetch_config1; |
| 217 | u32 prefetch_config2; |
| 218 | u32 prefetch_control; |
| 219 | struct gpmc_cs_config cs_context[GPMC_CS_NUM]; |
| 220 | }; |
| 221 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 222 | static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ]; |
| 223 | static struct irq_chip gpmc_irq_chip; |
Chen Gang | af07219 | 2013-08-22 15:47:21 +0800 | [diff] [blame] | 224 | static int gpmc_irq_start; |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 225 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 226 | static struct resource gpmc_mem_root; |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 227 | static struct gpmc_cs_data gpmc_cs[GPMC_CS_NUM]; |
Thomas Gleixner | 87b247c | 2007-05-10 22:33:04 -0700 | [diff] [blame] | 228 | static DEFINE_SPINLOCK(gpmc_mem_lock); |
Jon Hunter | 6797b4f | 2013-02-01 10:38:45 -0600 | [diff] [blame] | 229 | /* Define chip-selects as reserved by default until probe completes */ |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 230 | static unsigned int gpmc_cs_num = GPMC_CS_NUM; |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 231 | static unsigned int gpmc_nr_waitpins; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 232 | static struct device *gpmc_dev; |
| 233 | static int gpmc_irq; |
| 234 | static resource_size_t phys_base, mem_size; |
| 235 | static unsigned gpmc_capability; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 236 | static void __iomem *gpmc_base; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 237 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 238 | static struct clk *gpmc_l3_clk; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 239 | |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 240 | static irqreturn_t gpmc_handle_irq(int irq, void *dev); |
| 241 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 242 | static void gpmc_write_reg(int idx, u32 val) |
| 243 | { |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 244 | writel_relaxed(val, gpmc_base + idx); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | static u32 gpmc_read_reg(int idx) |
| 248 | { |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 249 | return readl_relaxed(gpmc_base + idx); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 250 | } |
| 251 | |
| 252 | void gpmc_cs_write_reg(int cs, int idx, u32 val) |
| 253 | { |
| 254 | void __iomem *reg_addr; |
| 255 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 256 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 257 | writel_relaxed(val, reg_addr); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 258 | } |
| 259 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 260 | static u32 gpmc_cs_read_reg(int cs, int idx) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 261 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 262 | void __iomem *reg_addr; |
| 263 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 264 | reg_addr = gpmc_base + GPMC_CS0_OFFSET + (cs * GPMC_CS_SIZE) + idx; |
Victor Kamensky | edfaf05 | 2014-04-15 20:37:46 +0300 | [diff] [blame] | 265 | return readl_relaxed(reg_addr); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 266 | } |
| 267 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 268 | /* TODO: Add support for gpmc_fck to clock framework and use it */ |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 269 | static unsigned long gpmc_get_fclk_period(void) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 270 | { |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 271 | unsigned long rate = clk_get_rate(gpmc_l3_clk); |
| 272 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 273 | rate /= 1000; |
| 274 | rate = 1000000000 / rate; /* In picoseconds */ |
| 275 | |
| 276 | return rate; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 277 | } |
| 278 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 279 | static unsigned int gpmc_ns_to_ticks(unsigned int time_ns) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 280 | { |
| 281 | unsigned long tick_ps; |
| 282 | |
| 283 | /* Calculate in picosecs to yield more exact results */ |
| 284 | tick_ps = gpmc_get_fclk_period(); |
| 285 | |
| 286 | return (time_ns * 1000 + tick_ps - 1) / tick_ps; |
| 287 | } |
| 288 | |
Ezequiel Garcia | 3fc089e | 2013-02-12 16:22:17 -0300 | [diff] [blame] | 289 | static unsigned int gpmc_ps_to_ticks(unsigned int time_ps) |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 290 | { |
| 291 | unsigned long tick_ps; |
| 292 | |
| 293 | /* Calculate in picosecs to yield more exact results */ |
| 294 | tick_ps = gpmc_get_fclk_period(); |
| 295 | |
| 296 | return (time_ps + tick_ps - 1) / tick_ps; |
| 297 | } |
| 298 | |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 299 | unsigned int gpmc_ticks_to_ns(unsigned int ticks) |
| 300 | { |
| 301 | return ticks * gpmc_get_fclk_period() / 1000; |
| 302 | } |
| 303 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 304 | static unsigned int gpmc_ticks_to_ps(unsigned int ticks) |
| 305 | { |
| 306 | return ticks * gpmc_get_fclk_period(); |
| 307 | } |
| 308 | |
| 309 | static unsigned int gpmc_round_ps_to_ticks(unsigned int time_ps) |
| 310 | { |
| 311 | unsigned long ticks = gpmc_ps_to_ticks(time_ps); |
| 312 | |
| 313 | return ticks * gpmc_get_fclk_period(); |
| 314 | } |
| 315 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 316 | static inline void gpmc_cs_modify_reg(int cs, int reg, u32 mask, bool value) |
| 317 | { |
| 318 | u32 l; |
| 319 | |
| 320 | l = gpmc_cs_read_reg(cs, reg); |
| 321 | if (value) |
| 322 | l |= mask; |
| 323 | else |
| 324 | l &= ~mask; |
| 325 | gpmc_cs_write_reg(cs, reg, l); |
| 326 | } |
| 327 | |
| 328 | static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) |
| 329 | { |
| 330 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG1, |
| 331 | GPMC_CONFIG1_TIME_PARA_GRAN, |
| 332 | p->time_para_granularity); |
| 333 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG2, |
| 334 | GPMC_CONFIG2_CSEXTRADELAY, p->cs_extra_delay); |
| 335 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG3, |
| 336 | GPMC_CONFIG3_ADVEXTRADELAY, p->adv_extra_delay); |
| 337 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, |
| 338 | GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay); |
| 339 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4, |
| 340 | GPMC_CONFIG4_OEEXTRADELAY, p->we_extra_delay); |
| 341 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, |
| 342 | GPMC_CONFIG6_CYCLE2CYCLESAMECSEN, |
| 343 | p->cycle2cyclesamecsen); |
| 344 | gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6, |
| 345 | GPMC_CONFIG6_CYCLE2CYCLEDIFFCSEN, |
| 346 | p->cycle2cyclediffcsen); |
| 347 | } |
| 348 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 349 | #ifdef DEBUG |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 350 | static int get_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
| 351 | bool raw, bool noval, int shift, |
| 352 | const char *name) |
| 353 | { |
| 354 | u32 l; |
| 355 | int nr_bits, max_value, mask; |
| 356 | |
| 357 | l = gpmc_cs_read_reg(cs, reg); |
| 358 | nr_bits = end_bit - st_bit + 1; |
| 359 | max_value = (1 << nr_bits) - 1; |
| 360 | mask = max_value << st_bit; |
| 361 | l = (l & mask) >> st_bit; |
| 362 | if (shift) |
| 363 | l = (shift << l); |
| 364 | if (noval && (l == 0)) |
| 365 | return 0; |
| 366 | if (!raw) { |
| 367 | unsigned int time_ns_min, time_ns, time_ns_max; |
| 368 | |
| 369 | time_ns_min = gpmc_ticks_to_ns(l ? l - 1 : 0); |
| 370 | time_ns = gpmc_ticks_to_ns(l); |
| 371 | time_ns_max = gpmc_ticks_to_ns(l + 1 > max_value ? |
| 372 | max_value : l + 1); |
| 373 | pr_info("gpmc,%s = <%u> (%u - %u ns, %i ticks)\n", |
| 374 | name, time_ns, time_ns_min, time_ns_max, l); |
| 375 | } else { |
| 376 | pr_info("gpmc,%s = <%u>\n", name, l); |
| 377 | } |
| 378 | |
| 379 | return l; |
| 380 | } |
| 381 | |
| 382 | #define GPMC_PRINT_CONFIG(cs, config) \ |
| 383 | pr_info("cs%i %s: 0x%08x\n", cs, #config, \ |
| 384 | gpmc_cs_read_reg(cs, config)) |
| 385 | #define GPMC_GET_RAW(reg, st, end, field) \ |
| 386 | get_gpmc_timing_reg(cs, (reg), (st), (end), 1, 0, 0, field) |
| 387 | #define GPMC_GET_RAW_BOOL(reg, st, end, field) \ |
| 388 | get_gpmc_timing_reg(cs, (reg), (st), (end), 1, 1, 0, field) |
| 389 | #define GPMC_GET_RAW_SHIFT(reg, st, end, shift, field) \ |
| 390 | get_gpmc_timing_reg(cs, (reg), (st), (end), 1, 1, (shift), field) |
| 391 | #define GPMC_GET_TICKS(reg, st, end, field) \ |
| 392 | get_gpmc_timing_reg(cs, (reg), (st), (end), 0, 0, 0, field) |
| 393 | |
| 394 | static void gpmc_show_regs(int cs, const char *desc) |
| 395 | { |
| 396 | pr_info("gpmc cs%i %s:\n", cs, desc); |
| 397 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG1); |
| 398 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG2); |
| 399 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG3); |
| 400 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG4); |
| 401 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG5); |
| 402 | GPMC_PRINT_CONFIG(cs, GPMC_CS_CONFIG6); |
| 403 | } |
| 404 | |
| 405 | /* |
| 406 | * Note that gpmc,wait-pin handing wrongly assumes bit 8 is available, |
| 407 | * see commit c9fb809. |
| 408 | */ |
| 409 | static void gpmc_cs_show_timings(int cs, const char *desc) |
| 410 | { |
| 411 | gpmc_show_regs(cs, desc); |
| 412 | |
| 413 | pr_info("gpmc cs%i access configuration:\n", cs); |
| 414 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity"); |
| 415 | GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data"); |
| 416 | GPMC_GET_RAW(GPMC_CS_CONFIG1, 12, 13, "device-width"); |
| 417 | GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin"); |
| 418 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write"); |
| 419 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 22, 22, "wait-on-read"); |
| 420 | GPMC_GET_RAW_SHIFT(GPMC_CS_CONFIG1, 23, 24, 4, "burst-length"); |
| 421 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 27, 27, "sync-write"); |
| 422 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 28, 28, "burst-write"); |
| 423 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 29, 29, "gpmc,sync-read"); |
| 424 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 30, 30, "burst-read"); |
| 425 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 31, 31, "burst-wrap"); |
| 426 | |
| 427 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG2, 7, 7, "cs-extra-delay"); |
| 428 | |
| 429 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG3, 7, 7, "adv-extra-delay"); |
| 430 | |
| 431 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 23, 23, "we-extra-delay"); |
| 432 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG4, 7, 7, "oe-extra-delay"); |
| 433 | |
| 434 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 7, 7, "cycle2cycle-samecsen"); |
| 435 | GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG6, 6, 6, "cycle2cycle-diffcsen"); |
| 436 | |
| 437 | pr_info("gpmc cs%i timings configuration:\n", cs); |
| 438 | GPMC_GET_TICKS(GPMC_CS_CONFIG2, 0, 3, "cs-on-ns"); |
| 439 | GPMC_GET_TICKS(GPMC_CS_CONFIG2, 8, 12, "cs-rd-off-ns"); |
| 440 | GPMC_GET_TICKS(GPMC_CS_CONFIG2, 16, 20, "cs-wr-off-ns"); |
| 441 | |
| 442 | GPMC_GET_TICKS(GPMC_CS_CONFIG3, 0, 3, "adv-on-ns"); |
| 443 | GPMC_GET_TICKS(GPMC_CS_CONFIG3, 8, 12, "adv-rd-off-ns"); |
| 444 | GPMC_GET_TICKS(GPMC_CS_CONFIG3, 16, 20, "adv-wr-off-ns"); |
| 445 | |
| 446 | GPMC_GET_TICKS(GPMC_CS_CONFIG4, 0, 3, "oe-on-ns"); |
| 447 | GPMC_GET_TICKS(GPMC_CS_CONFIG4, 8, 12, "oe-off-ns"); |
| 448 | GPMC_GET_TICKS(GPMC_CS_CONFIG4, 16, 19, "we-on-ns"); |
| 449 | GPMC_GET_TICKS(GPMC_CS_CONFIG4, 24, 28, "we-off-ns"); |
| 450 | |
| 451 | GPMC_GET_TICKS(GPMC_CS_CONFIG5, 0, 4, "rd-cycle-ns"); |
| 452 | GPMC_GET_TICKS(GPMC_CS_CONFIG5, 8, 12, "wr-cycle-ns"); |
| 453 | GPMC_GET_TICKS(GPMC_CS_CONFIG5, 16, 20, "access-ns"); |
| 454 | |
| 455 | GPMC_GET_TICKS(GPMC_CS_CONFIG5, 24, 27, "page-burst-access-ns"); |
| 456 | |
| 457 | GPMC_GET_TICKS(GPMC_CS_CONFIG6, 0, 3, "bus-turnaround-ns"); |
| 458 | GPMC_GET_TICKS(GPMC_CS_CONFIG6, 8, 11, "cycle2cycle-delay-ns"); |
| 459 | |
| 460 | GPMC_GET_TICKS(GPMC_CS_CONFIG1, 18, 19, "wait-monitoring-ns"); |
| 461 | GPMC_GET_TICKS(GPMC_CS_CONFIG1, 25, 26, "clk-activation-ns"); |
| 462 | |
| 463 | GPMC_GET_TICKS(GPMC_CS_CONFIG6, 16, 19, "wr-data-mux-bus-ns"); |
| 464 | GPMC_GET_TICKS(GPMC_CS_CONFIG6, 24, 28, "wr-access-ns"); |
| 465 | } |
| 466 | #else |
| 467 | static inline void gpmc_cs_show_timings(int cs, const char *desc) |
| 468 | { |
| 469 | } |
| 470 | #endif |
| 471 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 472 | static int set_gpmc_timing_reg(int cs, int reg, int st_bit, int end_bit, |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 473 | int time, const char *name) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 474 | { |
| 475 | u32 l; |
| 476 | int ticks, mask, nr_bits; |
| 477 | |
| 478 | if (time == 0) |
| 479 | ticks = 0; |
| 480 | else |
| 481 | ticks = gpmc_ns_to_ticks(time); |
| 482 | nr_bits = end_bit - st_bit + 1; |
Roger Quadros | 8032374 | 2014-08-29 19:11:50 +0300 | [diff] [blame] | 483 | mask = (1 << nr_bits) - 1; |
| 484 | |
| 485 | if (ticks > mask) { |
| 486 | pr_err("%s: GPMC error! CS%d: %s: %d ns, %d ticks > %d\n", |
| 487 | __func__, cs, name, time, ticks, mask); |
| 488 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 489 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 490 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 491 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 492 | l = gpmc_cs_read_reg(cs, reg); |
| 493 | #ifdef DEBUG |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 494 | printk(KERN_INFO |
| 495 | "GPMC CS%d: %-10s: %3d ticks, %3lu ns (was %3i ticks) %3d ns\n", |
Juha Yrjola | 2aab646 | 2006-06-26 16:16:21 -0700 | [diff] [blame] | 496 | cs, name, ticks, gpmc_get_fclk_period() * ticks / 1000, |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 497 | (l >> st_bit) & mask, time); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 498 | #endif |
| 499 | l &= ~(mask << st_bit); |
| 500 | l |= ticks << st_bit; |
| 501 | gpmc_cs_write_reg(cs, reg, l); |
| 502 | |
| 503 | return 0; |
| 504 | } |
| 505 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 506 | #define GPMC_SET_ONE(reg, st, end, field) \ |
| 507 | if (set_gpmc_timing_reg(cs, (reg), (st), (end), \ |
| 508 | t->field, #field) < 0) \ |
| 509 | return -1 |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 510 | |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 511 | int gpmc_calc_divider(unsigned int sync_clk) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 512 | { |
| 513 | int div; |
| 514 | u32 l; |
| 515 | |
Adrian Hunter | a3551f5 | 2010-12-09 10:48:27 +0200 | [diff] [blame] | 516 | l = sync_clk + (gpmc_get_fclk_period() - 1); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 517 | div = l / gpmc_get_fclk_period(); |
| 518 | if (div > 4) |
| 519 | return -1; |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 520 | if (div <= 0) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 521 | div = 1; |
| 522 | |
| 523 | return div; |
| 524 | } |
| 525 | |
| 526 | int gpmc_cs_set_timings(int cs, const struct gpmc_timings *t) |
| 527 | { |
| 528 | int div; |
| 529 | u32 l; |
| 530 | |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 531 | gpmc_cs_show_timings(cs, "before gpmc_cs_set_timings"); |
Afzal Mohammed | 1b47ca1 | 2012-08-19 18:29:45 +0530 | [diff] [blame] | 532 | div = gpmc_calc_divider(t->sync_clk); |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 533 | if (div < 0) |
Paul Walmsley | a032d33 | 2012-08-03 09:21:10 -0600 | [diff] [blame] | 534 | return div; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 535 | |
| 536 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 0, 3, cs_on); |
| 537 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 8, 12, cs_rd_off); |
| 538 | GPMC_SET_ONE(GPMC_CS_CONFIG2, 16, 20, cs_wr_off); |
| 539 | |
| 540 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 0, 3, adv_on); |
| 541 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 8, 12, adv_rd_off); |
| 542 | GPMC_SET_ONE(GPMC_CS_CONFIG3, 16, 20, adv_wr_off); |
| 543 | |
| 544 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 0, 3, oe_on); |
| 545 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 8, 12, oe_off); |
| 546 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 16, 19, we_on); |
| 547 | GPMC_SET_ONE(GPMC_CS_CONFIG4, 24, 28, we_off); |
| 548 | |
| 549 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 0, 4, rd_cycle); |
| 550 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 8, 12, wr_cycle); |
| 551 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 16, 20, access); |
| 552 | |
| 553 | GPMC_SET_ONE(GPMC_CS_CONFIG5, 24, 27, page_burst_access); |
| 554 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 555 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 0, 3, bus_turnaround); |
| 556 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 8, 11, cycle2cycle_delay); |
| 557 | |
| 558 | GPMC_SET_ONE(GPMC_CS_CONFIG1, 18, 19, wait_monitoring); |
| 559 | GPMC_SET_ONE(GPMC_CS_CONFIG1, 25, 26, clk_activation); |
| 560 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 561 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 562 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 16, 19, wr_data_mux_bus); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 563 | if (gpmc_capability & GPMC_HAS_WR_ACCESS) |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 564 | GPMC_SET_ONE(GPMC_CS_CONFIG6, 24, 28, wr_access); |
Syed Mohammed, Khasim | cc26b3b | 2008-10-09 17:51:41 +0300 | [diff] [blame] | 565 | |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 566 | /* caller is expected to have initialized CONFIG1 to cover |
| 567 | * at least sync vs async |
| 568 | */ |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 569 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); |
David Brownell | 1c22cc1 | 2006-12-06 17:13:55 -0800 | [diff] [blame] | 570 | if (l & (GPMC_CONFIG1_READTYPE_SYNC | GPMC_CONFIG1_WRITETYPE_SYNC)) { |
| 571 | #ifdef DEBUG |
| 572 | printk(KERN_INFO "GPMC CS%d CLK period is %lu ns (div %d)\n", |
| 573 | cs, (div * gpmc_get_fclk_period()) / 1000, div); |
| 574 | #endif |
| 575 | l &= ~0x03; |
| 576 | l |= (div - 1); |
| 577 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, l); |
| 578 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 579 | |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 580 | gpmc_cs_bool_timings(cs, &t->bool_timings); |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 581 | gpmc_cs_show_timings(cs, "after gpmc_cs_set_timings"); |
Afzal Mohammed | 559d94b | 2012-05-28 17:51:37 +0530 | [diff] [blame] | 582 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 583 | return 0; |
| 584 | } |
| 585 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 586 | static int gpmc_cs_set_memconf(int cs, u32 base, u32 size) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 587 | { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 588 | u32 l; |
| 589 | u32 mask; |
| 590 | |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 591 | /* |
| 592 | * Ensure that base address is aligned on a |
| 593 | * boundary equal to or greater than size. |
| 594 | */ |
| 595 | if (base & (size - 1)) |
| 596 | return -EINVAL; |
| 597 | |
Semen Protsenko | 9c4f757 | 2015-01-24 22:28:38 +0200 | [diff] [blame] | 598 | base >>= GPMC_CHUNK_SHIFT; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 599 | mask = (1 << GPMC_SECTION_SHIFT) - size; |
Semen Protsenko | 9c4f757 | 2015-01-24 22:28:38 +0200 | [diff] [blame] | 600 | mask >>= GPMC_CHUNK_SHIFT; |
| 601 | mask <<= GPMC_CONFIG7_MASKADDRESS_OFFSET; |
| 602 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 603 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Semen Protsenko | 9c4f757 | 2015-01-24 22:28:38 +0200 | [diff] [blame] | 604 | l &= ~GPMC_CONFIG7_MASK; |
| 605 | l |= base & GPMC_CONFIG7_BASEADDRESS_MASK; |
| 606 | l |= mask & GPMC_CONFIG7_MASKADDRESS_MASK; |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 607 | l |= GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 608 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 609 | |
| 610 | return 0; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 611 | } |
| 612 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 613 | static void gpmc_cs_enable_mem(int cs) |
| 614 | { |
| 615 | u32 l; |
| 616 | |
| 617 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 618 | l |= GPMC_CONFIG7_CSVALID; |
| 619 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 620 | } |
| 621 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 622 | static void gpmc_cs_disable_mem(int cs) |
| 623 | { |
| 624 | u32 l; |
| 625 | |
| 626 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 627 | l &= ~GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 628 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); |
| 629 | } |
| 630 | |
| 631 | static void gpmc_cs_get_memconf(int cs, u32 *base, u32 *size) |
| 632 | { |
| 633 | u32 l; |
| 634 | u32 mask; |
| 635 | |
| 636 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
| 637 | *base = (l & 0x3f) << GPMC_CHUNK_SHIFT; |
| 638 | mask = (l >> 8) & 0x0f; |
| 639 | *size = (1 << GPMC_SECTION_SHIFT) - (mask << GPMC_CHUNK_SHIFT); |
| 640 | } |
| 641 | |
| 642 | static int gpmc_cs_mem_enabled(int cs) |
| 643 | { |
| 644 | u32 l; |
| 645 | |
| 646 | l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 647 | return l & GPMC_CONFIG7_CSVALID; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 648 | } |
| 649 | |
Ezequiel Garcia | f5d8eda | 2013-02-12 16:22:24 -0300 | [diff] [blame] | 650 | static void gpmc_cs_set_reserved(int cs, int reserved) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 651 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 652 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 653 | |
| 654 | gpmc->flags |= GPMC_CS_RESERVED; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 655 | } |
| 656 | |
Ezequiel Garcia | ae9d908 | 2013-02-12 16:22:19 -0300 | [diff] [blame] | 657 | static bool gpmc_cs_reserved(int cs) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 658 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 659 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 660 | |
| 661 | return gpmc->flags & GPMC_CS_RESERVED; |
| 662 | } |
| 663 | |
| 664 | static void gpmc_cs_set_name(int cs, const char *name) |
| 665 | { |
| 666 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 667 | |
| 668 | gpmc->name = name; |
| 669 | } |
| 670 | |
Semen Protsenko | 2e25b0e | 2015-01-24 22:28:39 +0200 | [diff] [blame^] | 671 | static const char *gpmc_cs_get_name(int cs) |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 672 | { |
| 673 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 674 | |
| 675 | return gpmc->name; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 676 | } |
| 677 | |
| 678 | static unsigned long gpmc_mem_align(unsigned long size) |
| 679 | { |
| 680 | int order; |
| 681 | |
| 682 | size = (size - 1) >> (GPMC_CHUNK_SHIFT - 1); |
| 683 | order = GPMC_CHUNK_SHIFT - 1; |
| 684 | do { |
| 685 | size >>= 1; |
| 686 | order++; |
| 687 | } while (size); |
| 688 | size = 1 << order; |
| 689 | return size; |
| 690 | } |
| 691 | |
| 692 | static int gpmc_cs_insert_mem(int cs, unsigned long base, unsigned long size) |
| 693 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 694 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 695 | struct resource *res = &gpmc->mem; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 696 | int r; |
| 697 | |
| 698 | size = gpmc_mem_align(size); |
| 699 | spin_lock(&gpmc_mem_lock); |
| 700 | res->start = base; |
| 701 | res->end = base + size - 1; |
| 702 | r = request_resource(&gpmc_mem_root, res); |
| 703 | spin_unlock(&gpmc_mem_lock); |
| 704 | |
| 705 | return r; |
| 706 | } |
| 707 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 708 | static int gpmc_cs_delete_mem(int cs) |
| 709 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 710 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 711 | struct resource *res = &gpmc->mem; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 712 | int r; |
| 713 | |
| 714 | spin_lock(&gpmc_mem_lock); |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 715 | r = release_resource(res); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 716 | res->start = 0; |
| 717 | res->end = 0; |
| 718 | spin_unlock(&gpmc_mem_lock); |
| 719 | |
| 720 | return r; |
| 721 | } |
| 722 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 723 | /** |
| 724 | * gpmc_cs_remap - remaps a chip-select physical base address |
| 725 | * @cs: chip-select to remap |
| 726 | * @base: physical base address to re-map chip-select to |
| 727 | * |
| 728 | * Re-maps a chip-select to a new physical base address specified by |
| 729 | * "base". Returns 0 on success and appropriate negative error code |
| 730 | * on failure. |
| 731 | */ |
| 732 | static int gpmc_cs_remap(int cs, u32 base) |
| 733 | { |
| 734 | int ret; |
| 735 | u32 old_base, size; |
| 736 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 737 | if (cs > gpmc_cs_num) { |
| 738 | pr_err("%s: requested chip-select is disabled\n", __func__); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 739 | return -ENODEV; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 740 | } |
Tony Lindgren | fb677ef | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 741 | |
| 742 | /* |
| 743 | * Make sure we ignore any device offsets from the GPMC partition |
| 744 | * allocated for the chip select and that the new base confirms |
| 745 | * to the GPMC 16MB minimum granularity. |
| 746 | */ |
| 747 | base &= ~(SZ_16M - 1); |
| 748 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 749 | gpmc_cs_get_memconf(cs, &old_base, &size); |
| 750 | if (base == old_base) |
| 751 | return 0; |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 752 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 753 | ret = gpmc_cs_delete_mem(cs); |
| 754 | if (ret < 0) |
| 755 | return ret; |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 756 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 757 | ret = gpmc_cs_insert_mem(cs, base, size); |
| 758 | if (ret < 0) |
| 759 | return ret; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 760 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 761 | ret = gpmc_cs_set_memconf(cs, base, size); |
| 762 | |
| 763 | return ret; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 764 | } |
| 765 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 766 | int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) |
| 767 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 768 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 769 | struct resource *res = &gpmc->mem; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 770 | int r = -1; |
| 771 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 772 | if (cs > gpmc_cs_num) { |
| 773 | pr_err("%s: requested chip-select is disabled\n", __func__); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 774 | return -ENODEV; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 775 | } |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 776 | size = gpmc_mem_align(size); |
| 777 | if (size > (1 << GPMC_SECTION_SHIFT)) |
| 778 | return -ENOMEM; |
| 779 | |
| 780 | spin_lock(&gpmc_mem_lock); |
| 781 | if (gpmc_cs_reserved(cs)) { |
| 782 | r = -EBUSY; |
| 783 | goto out; |
| 784 | } |
| 785 | if (gpmc_cs_mem_enabled(cs)) |
| 786 | r = adjust_resource(res, res->start & ~(size - 1), size); |
| 787 | if (r < 0) |
| 788 | r = allocate_resource(&gpmc_mem_root, res, size, 0, ~0, |
| 789 | size, NULL, NULL); |
| 790 | if (r < 0) |
| 791 | goto out; |
| 792 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 793 | /* Disable CS while changing base address and size mask */ |
| 794 | gpmc_cs_disable_mem(cs); |
| 795 | |
| 796 | r = gpmc_cs_set_memconf(cs, res->start, resource_size(res)); |
Jon Hunter | c71f8e9 | 2013-03-06 12:00:10 -0600 | [diff] [blame] | 797 | if (r < 0) { |
| 798 | release_resource(res); |
| 799 | goto out; |
| 800 | } |
| 801 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 802 | /* Enable CS */ |
| 803 | gpmc_cs_enable_mem(cs); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 804 | *base = res->start; |
| 805 | gpmc_cs_set_reserved(cs, 1); |
| 806 | out: |
| 807 | spin_unlock(&gpmc_mem_lock); |
| 808 | return r; |
| 809 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 810 | EXPORT_SYMBOL(gpmc_cs_request); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 811 | |
| 812 | void gpmc_cs_free(int cs) |
| 813 | { |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 814 | struct gpmc_cs_data *gpmc = &gpmc_cs[cs]; |
| 815 | struct resource *res = &gpmc->mem; |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 816 | |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 817 | spin_lock(&gpmc_mem_lock); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 818 | if (cs >= gpmc_cs_num || cs < 0 || !gpmc_cs_reserved(cs)) { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 819 | printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); |
| 820 | BUG(); |
| 821 | spin_unlock(&gpmc_mem_lock); |
| 822 | return; |
| 823 | } |
| 824 | gpmc_cs_disable_mem(cs); |
Tony Lindgren | efe8072 | 2014-04-21 19:26:13 -0700 | [diff] [blame] | 825 | if (res->flags) |
| 826 | release_resource(res); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 827 | gpmc_cs_set_reserved(cs, 0); |
| 828 | spin_unlock(&gpmc_mem_lock); |
| 829 | } |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 830 | EXPORT_SYMBOL(gpmc_cs_free); |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 831 | |
vimal singh | 59e9c5a | 2009-07-13 16:26:24 +0530 | [diff] [blame] | 832 | /** |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 833 | * gpmc_configure - write request to configure gpmc |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 834 | * @cmd: command type |
| 835 | * @wval: value to write |
| 836 | * @return status of the operation |
| 837 | */ |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 838 | int gpmc_configure(int cmd, int wval) |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 839 | { |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 840 | u32 regval; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 841 | |
| 842 | switch (cmd) { |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 843 | case GPMC_ENABLE_IRQ: |
| 844 | gpmc_write_reg(GPMC_IRQENABLE, wval); |
| 845 | break; |
| 846 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 847 | case GPMC_SET_IRQ_STATUS: |
| 848 | gpmc_write_reg(GPMC_IRQSTATUS, wval); |
| 849 | break; |
| 850 | |
| 851 | case GPMC_CONFIG_WP: |
| 852 | regval = gpmc_read_reg(GPMC_CONFIG); |
| 853 | if (wval) |
| 854 | regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */ |
| 855 | else |
| 856 | regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */ |
| 857 | gpmc_write_reg(GPMC_CONFIG, regval); |
| 858 | break; |
| 859 | |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 860 | default: |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 861 | pr_err("%s: command not supported\n", __func__); |
| 862 | return -EINVAL; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 863 | } |
| 864 | |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 865 | return 0; |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 866 | } |
Jon Hunter | 3a54435 | 2013-02-21 13:00:21 -0600 | [diff] [blame] | 867 | EXPORT_SYMBOL(gpmc_configure); |
Sukumar Ghorai | 948d38e | 2010-07-09 09:14:44 +0000 | [diff] [blame] | 868 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 869 | void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs) |
| 870 | { |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 871 | int i; |
| 872 | |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 873 | reg->gpmc_status = gpmc_base + GPMC_STATUS; |
| 874 | reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET + |
| 875 | GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs; |
| 876 | reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET + |
| 877 | GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs; |
| 878 | reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET + |
| 879 | GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs; |
| 880 | reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1; |
| 881 | reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2; |
| 882 | reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL; |
| 883 | reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS; |
| 884 | reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG; |
| 885 | reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL; |
| 886 | reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG; |
| 887 | reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 888 | |
| 889 | for (i = 0; i < GPMC_BCH_NUM_REMAINDER; i++) { |
| 890 | reg->gpmc_bch_result0[i] = gpmc_base + GPMC_ECC_BCH_RESULT_0 + |
| 891 | GPMC_BCH_SIZE * i; |
| 892 | reg->gpmc_bch_result1[i] = gpmc_base + GPMC_ECC_BCH_RESULT_1 + |
| 893 | GPMC_BCH_SIZE * i; |
| 894 | reg->gpmc_bch_result2[i] = gpmc_base + GPMC_ECC_BCH_RESULT_2 + |
| 895 | GPMC_BCH_SIZE * i; |
| 896 | reg->gpmc_bch_result3[i] = gpmc_base + GPMC_ECC_BCH_RESULT_3 + |
| 897 | GPMC_BCH_SIZE * i; |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 898 | reg->gpmc_bch_result4[i] = gpmc_base + GPMC_ECC_BCH_RESULT_4 + |
| 899 | i * GPMC_BCH_SIZE; |
| 900 | reg->gpmc_bch_result5[i] = gpmc_base + GPMC_ECC_BCH_RESULT_5 + |
| 901 | i * GPMC_BCH_SIZE; |
| 902 | reg->gpmc_bch_result6[i] = gpmc_base + GPMC_ECC_BCH_RESULT_6 + |
| 903 | i * GPMC_BCH_SIZE; |
Afzal Mohammed | 2fdf0c9 | 2012-10-04 15:49:04 +0530 | [diff] [blame] | 904 | } |
Afzal Mohammed | 52bd138 | 2012-08-30 12:53:22 -0700 | [diff] [blame] | 905 | } |
| 906 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 907 | int gpmc_get_client_irq(unsigned irq_config) |
| 908 | { |
| 909 | int i; |
| 910 | |
| 911 | if (hweight32(irq_config) > 1) |
| 912 | return 0; |
| 913 | |
| 914 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 915 | if (gpmc_client_irq[i].bitmask & irq_config) |
| 916 | return gpmc_client_irq[i].irq; |
| 917 | |
| 918 | return 0; |
| 919 | } |
| 920 | |
| 921 | static int gpmc_irq_endis(unsigned irq, bool endis) |
| 922 | { |
| 923 | int i; |
| 924 | u32 regval; |
| 925 | |
| 926 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 927 | if (irq == gpmc_client_irq[i].irq) { |
| 928 | regval = gpmc_read_reg(GPMC_IRQENABLE); |
| 929 | if (endis) |
| 930 | regval |= gpmc_client_irq[i].bitmask; |
| 931 | else |
| 932 | regval &= ~gpmc_client_irq[i].bitmask; |
| 933 | gpmc_write_reg(GPMC_IRQENABLE, regval); |
| 934 | break; |
| 935 | } |
| 936 | |
| 937 | return 0; |
| 938 | } |
| 939 | |
| 940 | static void gpmc_irq_disable(struct irq_data *p) |
| 941 | { |
| 942 | gpmc_irq_endis(p->irq, false); |
| 943 | } |
| 944 | |
| 945 | static void gpmc_irq_enable(struct irq_data *p) |
| 946 | { |
| 947 | gpmc_irq_endis(p->irq, true); |
| 948 | } |
| 949 | |
| 950 | static void gpmc_irq_noop(struct irq_data *data) { } |
| 951 | |
| 952 | static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; } |
| 953 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 954 | static int gpmc_setup_irq(void) |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 955 | { |
| 956 | int i; |
| 957 | u32 regval; |
| 958 | |
| 959 | if (!gpmc_irq) |
| 960 | return -EINVAL; |
| 961 | |
| 962 | gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0); |
Russell King | 7185684 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 963 | if (gpmc_irq_start < 0) { |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 964 | pr_err("irq_alloc_descs failed\n"); |
| 965 | return gpmc_irq_start; |
| 966 | } |
| 967 | |
| 968 | gpmc_irq_chip.name = "gpmc"; |
| 969 | gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret; |
| 970 | gpmc_irq_chip.irq_enable = gpmc_irq_enable; |
| 971 | gpmc_irq_chip.irq_disable = gpmc_irq_disable; |
| 972 | gpmc_irq_chip.irq_shutdown = gpmc_irq_noop; |
| 973 | gpmc_irq_chip.irq_ack = gpmc_irq_noop; |
| 974 | gpmc_irq_chip.irq_mask = gpmc_irq_noop; |
| 975 | gpmc_irq_chip.irq_unmask = gpmc_irq_noop; |
| 976 | |
| 977 | gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE; |
| 978 | gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT; |
| 979 | |
| 980 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 981 | gpmc_client_irq[i].irq = gpmc_irq_start + i; |
| 982 | irq_set_chip_and_handler(gpmc_client_irq[i].irq, |
| 983 | &gpmc_irq_chip, handle_simple_irq); |
| 984 | set_irq_flags(gpmc_client_irq[i].irq, |
| 985 | IRQF_VALID | IRQF_NOAUTOEN); |
| 986 | } |
| 987 | |
| 988 | /* Disable interrupts */ |
| 989 | gpmc_write_reg(GPMC_IRQENABLE, 0); |
| 990 | |
| 991 | /* clear interrupts */ |
| 992 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 993 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
| 994 | |
| 995 | return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); |
| 996 | } |
| 997 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 998 | static int gpmc_free_irq(void) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 999 | { |
| 1000 | int i; |
| 1001 | |
| 1002 | if (gpmc_irq) |
| 1003 | free_irq(gpmc_irq, NULL); |
| 1004 | |
| 1005 | for (i = 0; i < GPMC_NR_IRQ; i++) { |
| 1006 | irq_set_handler(gpmc_client_irq[i].irq, NULL); |
| 1007 | irq_set_chip(gpmc_client_irq[i].irq, &no_irq_chip); |
| 1008 | irq_modify_status(gpmc_client_irq[i].irq, 0, 0); |
| 1009 | } |
| 1010 | |
| 1011 | irq_free_descs(gpmc_irq_start, GPMC_NR_IRQ); |
| 1012 | |
| 1013 | return 0; |
| 1014 | } |
| 1015 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1016 | static void gpmc_mem_exit(void) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1017 | { |
| 1018 | int cs; |
| 1019 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1020 | for (cs = 0; cs < gpmc_cs_num; cs++) { |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1021 | if (!gpmc_cs_mem_enabled(cs)) |
| 1022 | continue; |
| 1023 | gpmc_cs_delete_mem(cs); |
| 1024 | } |
| 1025 | |
| 1026 | } |
| 1027 | |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 1028 | static void gpmc_mem_init(void) |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 1029 | { |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 1030 | int cs; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 1031 | |
Jon Hunter | bf23439 | 2013-03-06 14:12:59 -0600 | [diff] [blame] | 1032 | /* |
| 1033 | * The first 1MB of GPMC address space is typically mapped to |
| 1034 | * the internal ROM. Never allocate the first page, to |
| 1035 | * facilitate bug detection; even if we didn't boot from ROM. |
Kyungmin Park | 7f24516 | 2006-12-29 16:48:51 -0800 | [diff] [blame] | 1036 | */ |
Jon Hunter | bf23439 | 2013-03-06 14:12:59 -0600 | [diff] [blame] | 1037 | gpmc_mem_root.start = SZ_1M; |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 1038 | gpmc_mem_root.end = GPMC_MEM_END; |
| 1039 | |
| 1040 | /* Reserve all regions that has been set up by bootloader */ |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1041 | for (cs = 0; cs < gpmc_cs_num; cs++) { |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 1042 | u32 base, size; |
| 1043 | |
| 1044 | if (!gpmc_cs_mem_enabled(cs)) |
| 1045 | continue; |
| 1046 | gpmc_cs_get_memconf(cs, &base, &size); |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 1047 | if (gpmc_cs_insert_mem(cs, base, size)) { |
| 1048 | pr_warn("%s: disabling cs %d mapped at 0x%x-0x%x\n", |
| 1049 | __func__, cs, base, base + size); |
| 1050 | gpmc_cs_disable_mem(cs); |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 1051 | } |
Imre Deak | f37e458 | 2006-09-25 12:41:33 +0300 | [diff] [blame] | 1052 | } |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1053 | } |
| 1054 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1055 | static u32 gpmc_round_ps_to_sync_clk(u32 time_ps, u32 sync_clk) |
| 1056 | { |
| 1057 | u32 temp; |
| 1058 | int div; |
| 1059 | |
| 1060 | div = gpmc_calc_divider(sync_clk); |
| 1061 | temp = gpmc_ps_to_ticks(time_ps); |
| 1062 | temp = (temp + div - 1) / div; |
| 1063 | return gpmc_ticks_to_ps(temp * div); |
| 1064 | } |
| 1065 | |
| 1066 | /* XXX: can the cycles be avoided ? */ |
| 1067 | static int gpmc_calc_sync_read_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1068 | struct gpmc_device_timings *dev_t, |
| 1069 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1070 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1071 | u32 temp; |
| 1072 | |
| 1073 | /* adv_rd_off */ |
| 1074 | temp = dev_t->t_avdp_r; |
| 1075 | /* XXX: mux check required ? */ |
| 1076 | if (mux) { |
| 1077 | /* XXX: t_avdp not to be required for sync, only added for tusb |
| 1078 | * this indirectly necessitates requirement of t_avdp_r and |
| 1079 | * t_avdp_w instead of having a single t_avdp |
| 1080 | */ |
| 1081 | temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_avdh); |
| 1082 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 1083 | } |
| 1084 | gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); |
| 1085 | |
| 1086 | /* oe_on */ |
| 1087 | temp = dev_t->t_oeasu; /* XXX: remove this ? */ |
| 1088 | if (mux) { |
| 1089 | temp = max_t(u32, temp, gpmc_t->clk_activation + dev_t->t_ach); |
| 1090 | temp = max_t(u32, temp, gpmc_t->adv_rd_off + |
| 1091 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_oe)); |
| 1092 | } |
| 1093 | gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); |
| 1094 | |
| 1095 | /* access */ |
| 1096 | /* XXX: any scope for improvement ?, by combining oe_on |
| 1097 | * and clk_activation, need to check whether |
| 1098 | * access = clk_activation + round to sync clk ? |
| 1099 | */ |
| 1100 | temp = max_t(u32, dev_t->t_iaa, dev_t->cyc_iaa * gpmc_t->sync_clk); |
| 1101 | temp += gpmc_t->clk_activation; |
| 1102 | if (dev_t->cyc_oe) |
| 1103 | temp = max_t(u32, temp, gpmc_t->oe_on + |
| 1104 | gpmc_ticks_to_ps(dev_t->cyc_oe)); |
| 1105 | gpmc_t->access = gpmc_round_ps_to_ticks(temp); |
| 1106 | |
| 1107 | gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); |
| 1108 | gpmc_t->cs_rd_off = gpmc_t->oe_off; |
| 1109 | |
| 1110 | /* rd_cycle */ |
| 1111 | temp = max_t(u32, dev_t->t_cez_r, dev_t->t_oez); |
| 1112 | temp = gpmc_round_ps_to_sync_clk(temp, gpmc_t->sync_clk) + |
| 1113 | gpmc_t->access; |
| 1114 | /* XXX: barter t_ce_rdyz with t_cez_r ? */ |
| 1115 | if (dev_t->t_ce_rdyz) |
| 1116 | temp = max_t(u32, temp, gpmc_t->cs_rd_off + dev_t->t_ce_rdyz); |
| 1117 | gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); |
| 1118 | |
| 1119 | return 0; |
| 1120 | } |
| 1121 | |
| 1122 | static int gpmc_calc_sync_write_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1123 | struct gpmc_device_timings *dev_t, |
| 1124 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1125 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1126 | u32 temp; |
| 1127 | |
| 1128 | /* adv_wr_off */ |
| 1129 | temp = dev_t->t_avdp_w; |
| 1130 | if (mux) { |
| 1131 | temp = max_t(u32, temp, |
| 1132 | gpmc_t->clk_activation + dev_t->t_avdh); |
| 1133 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 1134 | } |
| 1135 | gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); |
| 1136 | |
| 1137 | /* wr_data_mux_bus */ |
| 1138 | temp = max_t(u32, dev_t->t_weasu, |
| 1139 | gpmc_t->clk_activation + dev_t->t_rdyo); |
| 1140 | /* XXX: shouldn't mux be kept as a whole for wr_data_mux_bus ?, |
| 1141 | * and in that case remember to handle we_on properly |
| 1142 | */ |
| 1143 | if (mux) { |
| 1144 | temp = max_t(u32, temp, |
| 1145 | gpmc_t->adv_wr_off + dev_t->t_aavdh); |
| 1146 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + |
| 1147 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); |
| 1148 | } |
| 1149 | gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); |
| 1150 | |
| 1151 | /* we_on */ |
| 1152 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
| 1153 | gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); |
| 1154 | else |
| 1155 | gpmc_t->we_on = gpmc_t->wr_data_mux_bus; |
| 1156 | |
| 1157 | /* wr_access */ |
| 1158 | /* XXX: gpmc_capability check reqd ? , even if not, will not harm */ |
| 1159 | gpmc_t->wr_access = gpmc_t->access; |
| 1160 | |
| 1161 | /* we_off */ |
| 1162 | temp = gpmc_t->we_on + dev_t->t_wpl; |
| 1163 | temp = max_t(u32, temp, |
| 1164 | gpmc_t->wr_access + gpmc_ticks_to_ps(1)); |
| 1165 | temp = max_t(u32, temp, |
| 1166 | gpmc_t->we_on + gpmc_ticks_to_ps(dev_t->cyc_wpl)); |
| 1167 | gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); |
| 1168 | |
| 1169 | gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + |
| 1170 | dev_t->t_wph); |
| 1171 | |
| 1172 | /* wr_cycle */ |
| 1173 | temp = gpmc_round_ps_to_sync_clk(dev_t->t_cez_w, gpmc_t->sync_clk); |
| 1174 | temp += gpmc_t->wr_access; |
| 1175 | /* XXX: barter t_ce_rdyz with t_cez_w ? */ |
| 1176 | if (dev_t->t_ce_rdyz) |
| 1177 | temp = max_t(u32, temp, |
| 1178 | gpmc_t->cs_wr_off + dev_t->t_ce_rdyz); |
| 1179 | gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); |
| 1180 | |
| 1181 | return 0; |
| 1182 | } |
| 1183 | |
| 1184 | static int gpmc_calc_async_read_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1185 | struct gpmc_device_timings *dev_t, |
| 1186 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1187 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1188 | u32 temp; |
| 1189 | |
| 1190 | /* adv_rd_off */ |
| 1191 | temp = dev_t->t_avdp_r; |
| 1192 | if (mux) |
| 1193 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 1194 | gpmc_t->adv_rd_off = gpmc_round_ps_to_ticks(temp); |
| 1195 | |
| 1196 | /* oe_on */ |
| 1197 | temp = dev_t->t_oeasu; |
| 1198 | if (mux) |
| 1199 | temp = max_t(u32, temp, |
| 1200 | gpmc_t->adv_rd_off + dev_t->t_aavdh); |
| 1201 | gpmc_t->oe_on = gpmc_round_ps_to_ticks(temp); |
| 1202 | |
| 1203 | /* access */ |
| 1204 | temp = max_t(u32, dev_t->t_iaa, /* XXX: remove t_iaa in async ? */ |
| 1205 | gpmc_t->oe_on + dev_t->t_oe); |
| 1206 | temp = max_t(u32, temp, |
| 1207 | gpmc_t->cs_on + dev_t->t_ce); |
| 1208 | temp = max_t(u32, temp, |
| 1209 | gpmc_t->adv_on + dev_t->t_aa); |
| 1210 | gpmc_t->access = gpmc_round_ps_to_ticks(temp); |
| 1211 | |
| 1212 | gpmc_t->oe_off = gpmc_t->access + gpmc_ticks_to_ps(1); |
| 1213 | gpmc_t->cs_rd_off = gpmc_t->oe_off; |
| 1214 | |
| 1215 | /* rd_cycle */ |
| 1216 | temp = max_t(u32, dev_t->t_rd_cycle, |
| 1217 | gpmc_t->cs_rd_off + dev_t->t_cez_r); |
| 1218 | temp = max_t(u32, temp, gpmc_t->oe_off + dev_t->t_oez); |
| 1219 | gpmc_t->rd_cycle = gpmc_round_ps_to_ticks(temp); |
| 1220 | |
| 1221 | return 0; |
| 1222 | } |
| 1223 | |
| 1224 | static int gpmc_calc_async_write_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1225 | struct gpmc_device_timings *dev_t, |
| 1226 | bool mux) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1227 | { |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1228 | u32 temp; |
| 1229 | |
| 1230 | /* adv_wr_off */ |
| 1231 | temp = dev_t->t_avdp_w; |
| 1232 | if (mux) |
| 1233 | temp = max_t(u32, gpmc_t->adv_on + gpmc_ticks_to_ps(1), temp); |
| 1234 | gpmc_t->adv_wr_off = gpmc_round_ps_to_ticks(temp); |
| 1235 | |
| 1236 | /* wr_data_mux_bus */ |
| 1237 | temp = dev_t->t_weasu; |
| 1238 | if (mux) { |
| 1239 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + dev_t->t_aavdh); |
| 1240 | temp = max_t(u32, temp, gpmc_t->adv_wr_off + |
| 1241 | gpmc_ticks_to_ps(dev_t->cyc_aavdh_we)); |
| 1242 | } |
| 1243 | gpmc_t->wr_data_mux_bus = gpmc_round_ps_to_ticks(temp); |
| 1244 | |
| 1245 | /* we_on */ |
| 1246 | if (gpmc_capability & GPMC_HAS_WR_DATA_MUX_BUS) |
| 1247 | gpmc_t->we_on = gpmc_round_ps_to_ticks(dev_t->t_weasu); |
| 1248 | else |
| 1249 | gpmc_t->we_on = gpmc_t->wr_data_mux_bus; |
| 1250 | |
| 1251 | /* we_off */ |
| 1252 | temp = gpmc_t->we_on + dev_t->t_wpl; |
| 1253 | gpmc_t->we_off = gpmc_round_ps_to_ticks(temp); |
| 1254 | |
| 1255 | gpmc_t->cs_wr_off = gpmc_round_ps_to_ticks(gpmc_t->we_off + |
| 1256 | dev_t->t_wph); |
| 1257 | |
| 1258 | /* wr_cycle */ |
| 1259 | temp = max_t(u32, dev_t->t_wr_cycle, |
| 1260 | gpmc_t->cs_wr_off + dev_t->t_cez_w); |
| 1261 | gpmc_t->wr_cycle = gpmc_round_ps_to_ticks(temp); |
| 1262 | |
| 1263 | return 0; |
| 1264 | } |
| 1265 | |
| 1266 | static int gpmc_calc_sync_common_timings(struct gpmc_timings *gpmc_t, |
| 1267 | struct gpmc_device_timings *dev_t) |
| 1268 | { |
| 1269 | u32 temp; |
| 1270 | |
| 1271 | gpmc_t->sync_clk = gpmc_calc_divider(dev_t->clk) * |
| 1272 | gpmc_get_fclk_period(); |
| 1273 | |
| 1274 | gpmc_t->page_burst_access = gpmc_round_ps_to_sync_clk( |
| 1275 | dev_t->t_bacc, |
| 1276 | gpmc_t->sync_clk); |
| 1277 | |
| 1278 | temp = max_t(u32, dev_t->t_ces, dev_t->t_avds); |
| 1279 | gpmc_t->clk_activation = gpmc_round_ps_to_ticks(temp); |
| 1280 | |
| 1281 | if (gpmc_calc_divider(gpmc_t->sync_clk) != 1) |
| 1282 | return 0; |
| 1283 | |
| 1284 | if (dev_t->ce_xdelay) |
| 1285 | gpmc_t->bool_timings.cs_extra_delay = true; |
| 1286 | if (dev_t->avd_xdelay) |
| 1287 | gpmc_t->bool_timings.adv_extra_delay = true; |
| 1288 | if (dev_t->oe_xdelay) |
| 1289 | gpmc_t->bool_timings.oe_extra_delay = true; |
| 1290 | if (dev_t->we_xdelay) |
| 1291 | gpmc_t->bool_timings.we_extra_delay = true; |
| 1292 | |
| 1293 | return 0; |
| 1294 | } |
| 1295 | |
| 1296 | static int gpmc_calc_common_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1297 | struct gpmc_device_timings *dev_t, |
| 1298 | bool sync) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1299 | { |
| 1300 | u32 temp; |
| 1301 | |
| 1302 | /* cs_on */ |
| 1303 | gpmc_t->cs_on = gpmc_round_ps_to_ticks(dev_t->t_ceasu); |
| 1304 | |
| 1305 | /* adv_on */ |
| 1306 | temp = dev_t->t_avdasu; |
| 1307 | if (dev_t->t_ce_avd) |
| 1308 | temp = max_t(u32, temp, |
| 1309 | gpmc_t->cs_on + dev_t->t_ce_avd); |
| 1310 | gpmc_t->adv_on = gpmc_round_ps_to_ticks(temp); |
| 1311 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1312 | if (sync) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1313 | gpmc_calc_sync_common_timings(gpmc_t, dev_t); |
| 1314 | |
| 1315 | return 0; |
| 1316 | } |
| 1317 | |
| 1318 | /* TODO: remove this function once all peripherals are confirmed to |
| 1319 | * work with generic timing. Simultaneously gpmc_cs_set_timings() |
| 1320 | * has to be modified to handle timings in ps instead of ns |
| 1321 | */ |
| 1322 | static void gpmc_convert_ps_to_ns(struct gpmc_timings *t) |
| 1323 | { |
| 1324 | t->cs_on /= 1000; |
| 1325 | t->cs_rd_off /= 1000; |
| 1326 | t->cs_wr_off /= 1000; |
| 1327 | t->adv_on /= 1000; |
| 1328 | t->adv_rd_off /= 1000; |
| 1329 | t->adv_wr_off /= 1000; |
| 1330 | t->we_on /= 1000; |
| 1331 | t->we_off /= 1000; |
| 1332 | t->oe_on /= 1000; |
| 1333 | t->oe_off /= 1000; |
| 1334 | t->page_burst_access /= 1000; |
| 1335 | t->access /= 1000; |
| 1336 | t->rd_cycle /= 1000; |
| 1337 | t->wr_cycle /= 1000; |
| 1338 | t->bus_turnaround /= 1000; |
| 1339 | t->cycle2cycle_delay /= 1000; |
| 1340 | t->wait_monitoring /= 1000; |
| 1341 | t->clk_activation /= 1000; |
| 1342 | t->wr_access /= 1000; |
| 1343 | t->wr_data_mux_bus /= 1000; |
| 1344 | } |
| 1345 | |
| 1346 | int gpmc_calc_timings(struct gpmc_timings *gpmc_t, |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1347 | struct gpmc_settings *gpmc_s, |
| 1348 | struct gpmc_device_timings *dev_t) |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1349 | { |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1350 | bool mux = false, sync = false; |
| 1351 | |
| 1352 | if (gpmc_s) { |
| 1353 | mux = gpmc_s->mux_add_data ? true : false; |
| 1354 | sync = (gpmc_s->sync_read || gpmc_s->sync_write); |
| 1355 | } |
| 1356 | |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1357 | memset(gpmc_t, 0, sizeof(*gpmc_t)); |
| 1358 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1359 | gpmc_calc_common_timings(gpmc_t, dev_t, sync); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1360 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1361 | if (gpmc_s && gpmc_s->sync_read) |
| 1362 | gpmc_calc_sync_read_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1363 | else |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1364 | gpmc_calc_async_read_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1365 | |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1366 | if (gpmc_s && gpmc_s->sync_write) |
| 1367 | gpmc_calc_sync_write_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1368 | else |
Jon Hunter | c3be5b4 | 2013-02-21 13:46:22 -0600 | [diff] [blame] | 1369 | gpmc_calc_async_write_timings(gpmc_t, dev_t, mux); |
Afzal Mohammed | 246da26 | 2012-08-02 20:02:10 +0530 | [diff] [blame] | 1370 | |
| 1371 | /* TODO: remove, see function definition */ |
| 1372 | gpmc_convert_ps_to_ns(gpmc_t); |
| 1373 | |
| 1374 | return 0; |
| 1375 | } |
| 1376 | |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1377 | /** |
| 1378 | * gpmc_cs_program_settings - programs non-timing related settings |
| 1379 | * @cs: GPMC chip-select to program |
| 1380 | * @p: pointer to GPMC settings structure |
| 1381 | * |
| 1382 | * Programs non-timing related settings for a GPMC chip-select, such as |
| 1383 | * bus-width, burst configuration, etc. Function should be called once |
| 1384 | * for each chip-select that is being used and must be called before |
| 1385 | * calling gpmc_cs_set_timings() as timing parameters in the CONFIG1 |
| 1386 | * register will be initialised to zero by this function. Returns 0 on |
| 1387 | * success and appropriate negative error code on failure. |
| 1388 | */ |
| 1389 | int gpmc_cs_program_settings(int cs, struct gpmc_settings *p) |
| 1390 | { |
| 1391 | u32 config1; |
| 1392 | |
| 1393 | if ((!p->device_width) || (p->device_width > GPMC_DEVWIDTH_16BIT)) { |
| 1394 | pr_err("%s: invalid width %d!", __func__, p->device_width); |
| 1395 | return -EINVAL; |
| 1396 | } |
| 1397 | |
| 1398 | /* Address-data multiplexing not supported for NAND devices */ |
| 1399 | if (p->device_nand && p->mux_add_data) { |
| 1400 | pr_err("%s: invalid configuration!\n", __func__); |
| 1401 | return -EINVAL; |
| 1402 | } |
| 1403 | |
| 1404 | if ((p->mux_add_data > GPMC_MUX_AD) || |
| 1405 | ((p->mux_add_data == GPMC_MUX_AAD) && |
| 1406 | !(gpmc_capability & GPMC_HAS_MUX_AAD))) { |
| 1407 | pr_err("%s: invalid multiplex configuration!\n", __func__); |
| 1408 | return -EINVAL; |
| 1409 | } |
| 1410 | |
| 1411 | /* Page/burst mode supports lengths of 4, 8 and 16 bytes */ |
| 1412 | if (p->burst_read || p->burst_write) { |
| 1413 | switch (p->burst_len) { |
| 1414 | case GPMC_BURST_4: |
| 1415 | case GPMC_BURST_8: |
| 1416 | case GPMC_BURST_16: |
| 1417 | break; |
| 1418 | default: |
| 1419 | pr_err("%s: invalid page/burst-length (%d)\n", |
| 1420 | __func__, p->burst_len); |
| 1421 | return -EINVAL; |
| 1422 | } |
| 1423 | } |
| 1424 | |
Roger Quadros | 2b54057 | 2014-09-02 16:57:06 +0300 | [diff] [blame] | 1425 | if (p->wait_pin > gpmc_nr_waitpins) { |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1426 | pr_err("%s: invalid wait-pin (%d)\n", __func__, p->wait_pin); |
| 1427 | return -EINVAL; |
| 1428 | } |
| 1429 | |
| 1430 | config1 = GPMC_CONFIG1_DEVICESIZE((p->device_width - 1)); |
| 1431 | |
| 1432 | if (p->sync_read) |
| 1433 | config1 |= GPMC_CONFIG1_READTYPE_SYNC; |
| 1434 | if (p->sync_write) |
| 1435 | config1 |= GPMC_CONFIG1_WRITETYPE_SYNC; |
| 1436 | if (p->wait_on_read) |
| 1437 | config1 |= GPMC_CONFIG1_WAIT_READ_MON; |
| 1438 | if (p->wait_on_write) |
| 1439 | config1 |= GPMC_CONFIG1_WAIT_WRITE_MON; |
| 1440 | if (p->wait_on_read || p->wait_on_write) |
| 1441 | config1 |= GPMC_CONFIG1_WAIT_PIN_SEL(p->wait_pin); |
| 1442 | if (p->device_nand) |
| 1443 | config1 |= GPMC_CONFIG1_DEVICETYPE(GPMC_DEVICETYPE_NAND); |
| 1444 | if (p->mux_add_data) |
| 1445 | config1 |= GPMC_CONFIG1_MUXTYPE(p->mux_add_data); |
| 1446 | if (p->burst_read) |
| 1447 | config1 |= GPMC_CONFIG1_READMULTIPLE_SUPP; |
| 1448 | if (p->burst_write) |
| 1449 | config1 |= GPMC_CONFIG1_WRITEMULTIPLE_SUPP; |
| 1450 | if (p->burst_read || p->burst_write) { |
| 1451 | config1 |= GPMC_CONFIG1_PAGE_LEN(p->burst_len >> 3); |
| 1452 | config1 |= p->burst_wrap ? GPMC_CONFIG1_WRAPBURST_SUPP : 0; |
| 1453 | } |
| 1454 | |
| 1455 | gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, config1); |
| 1456 | |
| 1457 | return 0; |
| 1458 | } |
| 1459 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1460 | #ifdef CONFIG_OF |
Uwe Kleine-König | 3195760 | 2014-09-10 10:26:17 +0200 | [diff] [blame] | 1461 | static const struct of_device_id gpmc_dt_ids[] = { |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1462 | { .compatible = "ti,omap2420-gpmc" }, |
| 1463 | { .compatible = "ti,omap2430-gpmc" }, |
| 1464 | { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */ |
| 1465 | { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */ |
| 1466 | { .compatible = "ti,am3352-gpmc" }, /* am335x devices */ |
| 1467 | { } |
| 1468 | }; |
| 1469 | MODULE_DEVICE_TABLE(of, gpmc_dt_ids); |
| 1470 | |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1471 | /** |
| 1472 | * gpmc_read_settings_dt - read gpmc settings from device-tree |
| 1473 | * @np: pointer to device-tree node for a gpmc child device |
| 1474 | * @p: pointer to gpmc settings structure |
| 1475 | * |
| 1476 | * Reads the GPMC settings for a GPMC child device from device-tree and |
| 1477 | * stores them in the GPMC settings structure passed. The GPMC settings |
| 1478 | * structure is initialised to zero by this function and so any |
| 1479 | * previously stored settings will be cleared. |
| 1480 | */ |
| 1481 | void gpmc_read_settings_dt(struct device_node *np, struct gpmc_settings *p) |
| 1482 | { |
| 1483 | memset(p, 0, sizeof(struct gpmc_settings)); |
| 1484 | |
| 1485 | p->sync_read = of_property_read_bool(np, "gpmc,sync-read"); |
| 1486 | p->sync_write = of_property_read_bool(np, "gpmc,sync-write"); |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1487 | of_property_read_u32(np, "gpmc,device-width", &p->device_width); |
| 1488 | of_property_read_u32(np, "gpmc,mux-add-data", &p->mux_add_data); |
| 1489 | |
| 1490 | if (!of_property_read_u32(np, "gpmc,burst-length", &p->burst_len)) { |
| 1491 | p->burst_wrap = of_property_read_bool(np, "gpmc,burst-wrap"); |
| 1492 | p->burst_read = of_property_read_bool(np, "gpmc,burst-read"); |
| 1493 | p->burst_write = of_property_read_bool(np, "gpmc,burst-write"); |
| 1494 | if (!p->burst_read && !p->burst_write) |
| 1495 | pr_warn("%s: page/burst-length set but not used!\n", |
| 1496 | __func__); |
| 1497 | } |
| 1498 | |
| 1499 | if (!of_property_read_u32(np, "gpmc,wait-pin", &p->wait_pin)) { |
| 1500 | p->wait_on_read = of_property_read_bool(np, |
| 1501 | "gpmc,wait-on-read"); |
| 1502 | p->wait_on_write = of_property_read_bool(np, |
| 1503 | "gpmc,wait-on-write"); |
| 1504 | if (!p->wait_on_read && !p->wait_on_write) |
Roger Quadros | 2b54057 | 2014-09-02 16:57:06 +0300 | [diff] [blame] | 1505 | pr_debug("%s: rd/wr wait monitoring not enabled!\n", |
| 1506 | __func__); |
Jon Hunter | 8c8a7771 | 2013-02-20 15:53:12 -0600 | [diff] [blame] | 1507 | } |
| 1508 | } |
| 1509 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1510 | static void __maybe_unused gpmc_read_timings_dt(struct device_node *np, |
| 1511 | struct gpmc_timings *gpmc_t) |
| 1512 | { |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1513 | struct gpmc_bool_timings *p; |
| 1514 | |
| 1515 | if (!np || !gpmc_t) |
| 1516 | return; |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1517 | |
| 1518 | memset(gpmc_t, 0, sizeof(*gpmc_t)); |
| 1519 | |
| 1520 | /* minimum clock period for syncronous mode */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1521 | of_property_read_u32(np, "gpmc,sync-clk-ps", &gpmc_t->sync_clk); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1522 | |
| 1523 | /* chip select timtings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1524 | of_property_read_u32(np, "gpmc,cs-on-ns", &gpmc_t->cs_on); |
| 1525 | of_property_read_u32(np, "gpmc,cs-rd-off-ns", &gpmc_t->cs_rd_off); |
| 1526 | of_property_read_u32(np, "gpmc,cs-wr-off-ns", &gpmc_t->cs_wr_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1527 | |
| 1528 | /* ADV signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1529 | of_property_read_u32(np, "gpmc,adv-on-ns", &gpmc_t->adv_on); |
| 1530 | of_property_read_u32(np, "gpmc,adv-rd-off-ns", &gpmc_t->adv_rd_off); |
| 1531 | of_property_read_u32(np, "gpmc,adv-wr-off-ns", &gpmc_t->adv_wr_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1532 | |
| 1533 | /* WE signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1534 | of_property_read_u32(np, "gpmc,we-on-ns", &gpmc_t->we_on); |
| 1535 | of_property_read_u32(np, "gpmc,we-off-ns", &gpmc_t->we_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1536 | |
| 1537 | /* OE signal timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1538 | of_property_read_u32(np, "gpmc,oe-on-ns", &gpmc_t->oe_on); |
| 1539 | of_property_read_u32(np, "gpmc,oe-off-ns", &gpmc_t->oe_off); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1540 | |
| 1541 | /* access and cycle timings */ |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1542 | of_property_read_u32(np, "gpmc,page-burst-access-ns", |
| 1543 | &gpmc_t->page_burst_access); |
| 1544 | of_property_read_u32(np, "gpmc,access-ns", &gpmc_t->access); |
| 1545 | of_property_read_u32(np, "gpmc,rd-cycle-ns", &gpmc_t->rd_cycle); |
| 1546 | of_property_read_u32(np, "gpmc,wr-cycle-ns", &gpmc_t->wr_cycle); |
| 1547 | of_property_read_u32(np, "gpmc,bus-turnaround-ns", |
| 1548 | &gpmc_t->bus_turnaround); |
| 1549 | of_property_read_u32(np, "gpmc,cycle2cycle-delay-ns", |
| 1550 | &gpmc_t->cycle2cycle_delay); |
| 1551 | of_property_read_u32(np, "gpmc,wait-monitoring-ns", |
| 1552 | &gpmc_t->wait_monitoring); |
| 1553 | of_property_read_u32(np, "gpmc,clk-activation-ns", |
| 1554 | &gpmc_t->clk_activation); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1555 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1556 | /* only applicable to OMAP3+ */ |
| 1557 | of_property_read_u32(np, "gpmc,wr-access-ns", &gpmc_t->wr_access); |
| 1558 | of_property_read_u32(np, "gpmc,wr-data-mux-bus-ns", |
| 1559 | &gpmc_t->wr_data_mux_bus); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1560 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1561 | /* bool timing parameters */ |
| 1562 | p = &gpmc_t->bool_timings; |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1563 | |
Jon Hunter | d36b4cd | 2013-02-21 18:51:27 -0600 | [diff] [blame] | 1564 | p->cycle2cyclediffcsen = |
| 1565 | of_property_read_bool(np, "gpmc,cycle2cycle-diffcsen"); |
| 1566 | p->cycle2cyclesamecsen = |
| 1567 | of_property_read_bool(np, "gpmc,cycle2cycle-samecsen"); |
| 1568 | p->we_extra_delay = of_property_read_bool(np, "gpmc,we-extra-delay"); |
| 1569 | p->oe_extra_delay = of_property_read_bool(np, "gpmc,oe-extra-delay"); |
| 1570 | p->adv_extra_delay = of_property_read_bool(np, "gpmc,adv-extra-delay"); |
| 1571 | p->cs_extra_delay = of_property_read_bool(np, "gpmc,cs-extra-delay"); |
| 1572 | p->time_para_granularity = |
| 1573 | of_property_read_bool(np, "gpmc,time-para-granularity"); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1574 | } |
| 1575 | |
Pekon Gupta | 6b187b2 | 2014-01-28 11:42:40 +0530 | [diff] [blame] | 1576 | #if IS_ENABLED(CONFIG_MTD_NAND) |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1577 | |
Mark Jackson | 496c8a0 | 2013-04-19 21:08:28 +0100 | [diff] [blame] | 1578 | static const char * const nand_xfer_types[] = { |
| 1579 | [NAND_OMAP_PREFETCH_POLLED] = "prefetch-polled", |
| 1580 | [NAND_OMAP_POLLED] = "polled", |
| 1581 | [NAND_OMAP_PREFETCH_DMA] = "prefetch-dma", |
| 1582 | [NAND_OMAP_PREFETCH_IRQ] = "prefetch-irq", |
| 1583 | }; |
| 1584 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1585 | static int gpmc_probe_nand_child(struct platform_device *pdev, |
| 1586 | struct device_node *child) |
| 1587 | { |
| 1588 | u32 val; |
| 1589 | const char *s; |
| 1590 | struct gpmc_timings gpmc_t; |
| 1591 | struct omap_nand_platform_data *gpmc_nand_data; |
| 1592 | |
| 1593 | if (of_property_read_u32(child, "reg", &val) < 0) { |
| 1594 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1595 | child->full_name); |
| 1596 | return -ENODEV; |
| 1597 | } |
| 1598 | |
| 1599 | gpmc_nand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_nand_data), |
| 1600 | GFP_KERNEL); |
| 1601 | if (!gpmc_nand_data) |
| 1602 | return -ENOMEM; |
| 1603 | |
| 1604 | gpmc_nand_data->cs = val; |
| 1605 | gpmc_nand_data->of_node = child; |
| 1606 | |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1607 | /* Detect availability of ELM module */ |
| 1608 | gpmc_nand_data->elm_of_node = of_parse_phandle(child, "ti,elm-id", 0); |
| 1609 | if (gpmc_nand_data->elm_of_node == NULL) |
| 1610 | gpmc_nand_data->elm_of_node = |
| 1611 | of_parse_phandle(child, "elm_id", 0); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1612 | |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1613 | /* select ecc-scheme for NAND */ |
| 1614 | if (of_property_read_string(child, "ti,nand-ecc-opt", &s)) { |
| 1615 | pr_err("%s: ti,nand-ecc-opt not found\n", __func__); |
| 1616 | return -ENODEV; |
| 1617 | } |
Roger Quadros | a3e83f0 | 2014-08-25 16:15:33 -0700 | [diff] [blame] | 1618 | |
| 1619 | if (!strcmp(s, "sw")) |
| 1620 | gpmc_nand_data->ecc_opt = OMAP_ECC_HAM1_CODE_SW; |
| 1621 | else if (!strcmp(s, "ham1") || |
| 1622 | !strcmp(s, "hw") || !strcmp(s, "hw-romcode")) |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1623 | gpmc_nand_data->ecc_opt = |
| 1624 | OMAP_ECC_HAM1_CODE_HW; |
| 1625 | else if (!strcmp(s, "bch4")) |
| 1626 | if (gpmc_nand_data->elm_of_node) |
| 1627 | gpmc_nand_data->ecc_opt = |
| 1628 | OMAP_ECC_BCH4_CODE_HW; |
| 1629 | else |
| 1630 | gpmc_nand_data->ecc_opt = |
| 1631 | OMAP_ECC_BCH4_CODE_HW_DETECTION_SW; |
| 1632 | else if (!strcmp(s, "bch8")) |
| 1633 | if (gpmc_nand_data->elm_of_node) |
| 1634 | gpmc_nand_data->ecc_opt = |
| 1635 | OMAP_ECC_BCH8_CODE_HW; |
| 1636 | else |
| 1637 | gpmc_nand_data->ecc_opt = |
| 1638 | OMAP_ECC_BCH8_CODE_HW_DETECTION_SW; |
pekon gupta | 27c9fd6 | 2014-05-19 13:24:39 +0530 | [diff] [blame] | 1639 | else if (!strcmp(s, "bch16")) |
| 1640 | if (gpmc_nand_data->elm_of_node) |
| 1641 | gpmc_nand_data->ecc_opt = |
| 1642 | OMAP_ECC_BCH16_CODE_HW; |
| 1643 | else |
| 1644 | pr_err("%s: BCH16 requires ELM support\n", __func__); |
Pekon Gupta | ac65caf | 2013-10-24 18:20:17 +0530 | [diff] [blame] | 1645 | else |
| 1646 | pr_err("%s: ti,nand-ecc-opt invalid value\n", __func__); |
| 1647 | |
| 1648 | /* select data transfer mode for NAND controller */ |
Mark Jackson | 496c8a0 | 2013-04-19 21:08:28 +0100 | [diff] [blame] | 1649 | if (!of_property_read_string(child, "ti,nand-xfer-type", &s)) |
| 1650 | for (val = 0; val < ARRAY_SIZE(nand_xfer_types); val++) |
| 1651 | if (!strcasecmp(s, nand_xfer_types[val])) { |
| 1652 | gpmc_nand_data->xfer_type = val; |
| 1653 | break; |
| 1654 | } |
| 1655 | |
Ezequiel GarcÃa | fef775c | 2014-09-11 12:02:08 -0300 | [diff] [blame] | 1656 | gpmc_nand_data->flash_bbt = of_get_nand_on_flash_bbt(child); |
| 1657 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1658 | val = of_get_nand_bus_width(child); |
| 1659 | if (val == 16) |
| 1660 | gpmc_nand_data->devsize = NAND_BUSWIDTH_16; |
| 1661 | |
| 1662 | gpmc_read_timings_dt(child, &gpmc_t); |
| 1663 | gpmc_nand_init(gpmc_nand_data, &gpmc_t); |
| 1664 | |
| 1665 | return 0; |
| 1666 | } |
| 1667 | #else |
| 1668 | static int gpmc_probe_nand_child(struct platform_device *pdev, |
| 1669 | struct device_node *child) |
| 1670 | { |
| 1671 | return 0; |
| 1672 | } |
| 1673 | #endif |
| 1674 | |
Pekon Gupta | 980386d | 2014-01-28 11:42:41 +0530 | [diff] [blame] | 1675 | #if IS_ENABLED(CONFIG_MTD_ONENAND) |
Ezequiel Garcia | 75d3625 | 2013-01-25 09:23:11 -0300 | [diff] [blame] | 1676 | static int gpmc_probe_onenand_child(struct platform_device *pdev, |
| 1677 | struct device_node *child) |
| 1678 | { |
| 1679 | u32 val; |
| 1680 | struct omap_onenand_platform_data *gpmc_onenand_data; |
| 1681 | |
| 1682 | if (of_property_read_u32(child, "reg", &val) < 0) { |
| 1683 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1684 | child->full_name); |
| 1685 | return -ENODEV; |
| 1686 | } |
| 1687 | |
| 1688 | gpmc_onenand_data = devm_kzalloc(&pdev->dev, sizeof(*gpmc_onenand_data), |
| 1689 | GFP_KERNEL); |
| 1690 | if (!gpmc_onenand_data) |
| 1691 | return -ENOMEM; |
| 1692 | |
| 1693 | gpmc_onenand_data->cs = val; |
| 1694 | gpmc_onenand_data->of_node = child; |
| 1695 | gpmc_onenand_data->dma_channel = -1; |
| 1696 | |
| 1697 | if (!of_property_read_u32(child, "dma-channel", &val)) |
| 1698 | gpmc_onenand_data->dma_channel = val; |
| 1699 | |
| 1700 | gpmc_onenand_init(gpmc_onenand_data); |
| 1701 | |
| 1702 | return 0; |
| 1703 | } |
| 1704 | #else |
| 1705 | static int gpmc_probe_onenand_child(struct platform_device *pdev, |
| 1706 | struct device_node *child) |
| 1707 | { |
| 1708 | return 0; |
| 1709 | } |
| 1710 | #endif |
| 1711 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1712 | /** |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1713 | * gpmc_probe_generic_child - configures the gpmc for a child device |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1714 | * @pdev: pointer to gpmc platform device |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1715 | * @child: pointer to device-tree node for child device |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1716 | * |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1717 | * Allocates and configures a GPMC chip-select for a child device. |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1718 | * Returns 0 on success and appropriate negative error code on failure. |
| 1719 | */ |
Javier Martinez Canillas | 3af91cf | 2013-03-14 16:09:21 +0100 | [diff] [blame] | 1720 | static int gpmc_probe_generic_child(struct platform_device *pdev, |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1721 | struct device_node *child) |
| 1722 | { |
| 1723 | struct gpmc_settings gpmc_s; |
| 1724 | struct gpmc_timings gpmc_t; |
| 1725 | struct resource res; |
| 1726 | unsigned long base; |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1727 | const char *name; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1728 | int ret, cs; |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 1729 | u32 val; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1730 | |
| 1731 | if (of_property_read_u32(child, "reg", &cs) < 0) { |
| 1732 | dev_err(&pdev->dev, "%s has no 'reg' property\n", |
| 1733 | child->full_name); |
| 1734 | return -ENODEV; |
| 1735 | } |
| 1736 | |
| 1737 | if (of_address_to_resource(child, 0, &res) < 0) { |
| 1738 | dev_err(&pdev->dev, "%s has malformed 'reg' property\n", |
| 1739 | child->full_name); |
| 1740 | return -ENODEV; |
| 1741 | } |
| 1742 | |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1743 | /* |
| 1744 | * Check if we have multiple instances of the same device |
| 1745 | * on a single chip select. If so, use the already initialized |
| 1746 | * timings. |
| 1747 | */ |
| 1748 | name = gpmc_cs_get_name(cs); |
| 1749 | if (name && child->name && of_node_cmp(child->name, name) == 0) |
| 1750 | goto no_timings; |
| 1751 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1752 | ret = gpmc_cs_request(cs, resource_size(&res), &base); |
| 1753 | if (ret < 0) { |
| 1754 | dev_err(&pdev->dev, "cannot request GPMC CS %d\n", cs); |
| 1755 | return ret; |
| 1756 | } |
Tony Lindgren | 9ed7a77 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1757 | gpmc_cs_set_name(cs, child->name); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1758 | |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1759 | gpmc_read_settings_dt(child, &gpmc_s); |
| 1760 | gpmc_read_timings_dt(child, &gpmc_t); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1761 | |
| 1762 | /* |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1763 | * For some GPMC devices we still need to rely on the bootloader |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1764 | * timings because the devices can be connected via FPGA. |
| 1765 | * REVISIT: Add timing support from slls644g.pdf. |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1766 | */ |
Tony Lindgren | 35ac051 | 2014-11-03 17:45:01 -0800 | [diff] [blame] | 1767 | if (!gpmc_t.cs_rd_off) { |
| 1768 | WARN(1, "enable GPMC debug to configure .dts timings for CS%i\n", |
| 1769 | cs); |
| 1770 | gpmc_cs_show_timings(cs, |
| 1771 | "please add GPMC bootloader timings to .dts"); |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1772 | goto no_timings; |
| 1773 | } |
| 1774 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 1775 | /* CS must be disabled while making changes to gpmc configuration */ |
| 1776 | gpmc_cs_disable_mem(cs); |
| 1777 | |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1778 | /* |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1779 | * FIXME: gpmc_cs_request() will map the CS to an arbitary |
| 1780 | * location in the gpmc address space. When booting with |
| 1781 | * device-tree we want the NOR flash to be mapped to the |
| 1782 | * location specified in the device-tree blob. So remap the |
| 1783 | * CS to this location. Once DT migration is complete should |
| 1784 | * just make gpmc_cs_request() map a specific address. |
| 1785 | */ |
| 1786 | ret = gpmc_cs_remap(cs, res.start); |
| 1787 | if (ret < 0) { |
Fabio Estevam | f70bf2a | 2013-09-18 12:01:59 -0700 | [diff] [blame] | 1788 | dev_err(&pdev->dev, "cannot remap GPMC CS %d to %pa\n", |
| 1789 | cs, &res.start); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1790 | goto err; |
| 1791 | } |
| 1792 | |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1793 | ret = of_property_read_u32(child, "bank-width", &gpmc_s.device_width); |
| 1794 | if (ret < 0) |
| 1795 | goto err; |
| 1796 | |
| 1797 | ret = gpmc_cs_program_settings(cs, &gpmc_s); |
| 1798 | if (ret < 0) |
| 1799 | goto err; |
| 1800 | |
Roger Quadros | 7604baf | 2014-08-29 19:11:51 +0300 | [diff] [blame] | 1801 | ret = gpmc_cs_set_timings(cs, &gpmc_t); |
| 1802 | if (ret) { |
| 1803 | dev_err(&pdev->dev, "failed to set gpmc timings for: %s\n", |
| 1804 | child->name); |
| 1805 | goto err; |
| 1806 | } |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1807 | |
Roger Quadros | e378d22 | 2014-08-29 19:11:52 +0300 | [diff] [blame] | 1808 | /* Clear limited address i.e. enable A26-A11 */ |
| 1809 | val = gpmc_read_reg(GPMC_CONFIG); |
| 1810 | val &= ~GPMC_CONFIG_LIMITEDADDRESS; |
| 1811 | gpmc_write_reg(GPMC_CONFIG, val); |
| 1812 | |
Roger Quadros | 4cf27d2 | 2014-08-29 19:11:53 +0300 | [diff] [blame] | 1813 | /* Enable CS region */ |
| 1814 | gpmc_cs_enable_mem(cs); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1815 | |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1816 | no_timings: |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1817 | if (of_platform_device_create(child, NULL, &pdev->dev)) |
| 1818 | return 0; |
| 1819 | |
| 1820 | dev_err(&pdev->dev, "failed to create gpmc child %s\n", child->name); |
Javier Martinez Canillas | e8ffd6f | 2013-03-14 16:09:20 +0100 | [diff] [blame] | 1821 | ret = -ENODEV; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1822 | |
| 1823 | err: |
| 1824 | gpmc_cs_free(cs); |
| 1825 | |
| 1826 | return ret; |
| 1827 | } |
| 1828 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1829 | static int gpmc_probe_dt(struct platform_device *pdev) |
| 1830 | { |
| 1831 | int ret; |
| 1832 | struct device_node *child; |
| 1833 | const struct of_device_id *of_id = |
| 1834 | of_match_device(gpmc_dt_ids, &pdev->dev); |
| 1835 | |
| 1836 | if (!of_id) |
| 1837 | return 0; |
| 1838 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1839 | ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-cs", |
| 1840 | &gpmc_cs_num); |
| 1841 | if (ret < 0) { |
| 1842 | pr_err("%s: number of chip-selects not defined\n", __func__); |
| 1843 | return ret; |
| 1844 | } else if (gpmc_cs_num < 1) { |
| 1845 | pr_err("%s: all chip-selects are disabled\n", __func__); |
| 1846 | return -EINVAL; |
| 1847 | } else if (gpmc_cs_num > GPMC_CS_NUM) { |
| 1848 | pr_err("%s: number of supported chip-selects cannot be > %d\n", |
| 1849 | __func__, GPMC_CS_NUM); |
| 1850 | return -EINVAL; |
| 1851 | } |
| 1852 | |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1853 | ret = of_property_read_u32(pdev->dev.of_node, "gpmc,num-waitpins", |
| 1854 | &gpmc_nr_waitpins); |
| 1855 | if (ret < 0) { |
| 1856 | pr_err("%s: number of wait pins not found!\n", __func__); |
| 1857 | return ret; |
| 1858 | } |
| 1859 | |
Guido MartÃnez | 68e2eb5 | 2014-07-02 10:35:18 -0300 | [diff] [blame] | 1860 | for_each_available_child_of_node(pdev->dev.of_node, child) { |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1861 | |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1862 | if (!child->name) |
| 1863 | continue; |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1864 | |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1865 | if (of_node_cmp(child->name, "nand") == 0) |
| 1866 | ret = gpmc_probe_nand_child(pdev, child); |
| 1867 | else if (of_node_cmp(child->name, "onenand") == 0) |
| 1868 | ret = gpmc_probe_onenand_child(pdev, child); |
| 1869 | else if (of_node_cmp(child->name, "ethernet") == 0 || |
Tony Lindgren | fd4446f | 2013-11-14 15:25:09 -0800 | [diff] [blame] | 1870 | of_node_cmp(child->name, "nor") == 0 || |
| 1871 | of_node_cmp(child->name, "uart") == 0) |
Javier Martinez Canillas | f2b09f6 | 2013-04-17 22:34:11 +0200 | [diff] [blame] | 1872 | ret = gpmc_probe_generic_child(pdev, child); |
Jon Hunter | cdd6928 | 2013-02-08 16:46:13 -0600 | [diff] [blame] | 1873 | |
Javier Martinez Canillas | b327b36 | 2013-04-17 22:34:12 +0200 | [diff] [blame] | 1874 | if (WARN(ret < 0, "%s: probing gpmc child %s failed\n", |
| 1875 | __func__, child->full_name)) |
Javier Martinez Canillas | 5330dc1 | 2013-03-14 22:54:11 +0100 | [diff] [blame] | 1876 | of_node_put(child); |
Javier Martinez Canillas | 5330dc1 | 2013-03-14 22:54:11 +0100 | [diff] [blame] | 1877 | } |
| 1878 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1879 | return 0; |
| 1880 | } |
| 1881 | #else |
| 1882 | static int gpmc_probe_dt(struct platform_device *pdev) |
| 1883 | { |
| 1884 | return 0; |
| 1885 | } |
| 1886 | #endif |
| 1887 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1888 | static int gpmc_probe(struct platform_device *pdev) |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1889 | { |
Jon Hunter | 8119024 | 2012-10-17 09:41:25 -0500 | [diff] [blame] | 1890 | int rc; |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 1891 | u32 l; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1892 | struct resource *res; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1893 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1894 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1895 | if (res == NULL) |
| 1896 | return -ENOENT; |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 1897 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1898 | phys_base = res->start; |
| 1899 | mem_size = resource_size(res); |
Kevin Hilman | 8d08436 | 2010-01-29 14:20:06 -0800 | [diff] [blame] | 1900 | |
Thierry Reding | 5857bd9 | 2013-01-21 11:08:55 +0100 | [diff] [blame] | 1901 | gpmc_base = devm_ioremap_resource(&pdev->dev, res); |
| 1902 | if (IS_ERR(gpmc_base)) |
| 1903 | return PTR_ERR(gpmc_base); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1904 | |
| 1905 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 1906 | if (res == NULL) |
| 1907 | dev_warn(&pdev->dev, "Failed to get resource: irq\n"); |
| 1908 | else |
| 1909 | gpmc_irq = res->start; |
| 1910 | |
Roger Quadros | 8bf9be5 | 2014-09-01 15:18:56 +0300 | [diff] [blame] | 1911 | gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck"); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1912 | if (IS_ERR(gpmc_l3_clk)) { |
Roger Quadros | 8bf9be5 | 2014-09-01 15:18:56 +0300 | [diff] [blame] | 1913 | dev_err(&pdev->dev, "Failed to get GPMC fck\n"); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1914 | gpmc_irq = 0; |
| 1915 | return PTR_ERR(gpmc_l3_clk); |
Paul Walmsley | fd1dc87 | 2008-10-06 15:49:17 +0300 | [diff] [blame] | 1916 | } |
| 1917 | |
Roger Quadros | 8bf9be5 | 2014-09-01 15:18:56 +0300 | [diff] [blame] | 1918 | if (!clk_get_rate(gpmc_l3_clk)) { |
| 1919 | dev_err(&pdev->dev, "Invalid GPMC fck clock rate\n"); |
| 1920 | return -EINVAL; |
| 1921 | } |
| 1922 | |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1923 | pm_runtime_enable(&pdev->dev); |
| 1924 | pm_runtime_get_sync(&pdev->dev); |
Olof Johansson | 1daa8c1 | 2010-01-20 22:39:29 +0000 | [diff] [blame] | 1925 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1926 | gpmc_dev = &pdev->dev; |
| 1927 | |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 1928 | l = gpmc_read_reg(GPMC_REVISION); |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1929 | |
| 1930 | /* |
| 1931 | * FIXME: Once device-tree migration is complete the below flags |
| 1932 | * should be populated based upon the device-tree compatible |
| 1933 | * string. For now just use the IP revision. OMAP3+ devices have |
| 1934 | * the wr_access and wr_data_mux_bus register fields. OMAP4+ |
| 1935 | * devices support the addr-addr-data multiplex protocol. |
| 1936 | * |
| 1937 | * GPMC IP revisions: |
| 1938 | * - OMAP24xx = 2.0 |
| 1939 | * - OMAP3xxx = 5.0 |
| 1940 | * - OMAP44xx/54xx/AM335x = 6.0 |
| 1941 | */ |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1942 | if (GPMC_REVISION_MAJOR(l) > 0x4) |
| 1943 | gpmc_capability = GPMC_HAS_WR_ACCESS | GPMC_HAS_WR_DATA_MUX_BUS; |
Jon Hunter | aa8d476 | 2013-02-21 15:25:23 -0600 | [diff] [blame] | 1944 | if (GPMC_REVISION_MAJOR(l) > 0x5) |
| 1945 | gpmc_capability |= GPMC_HAS_MUX_AAD; |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1946 | dev_info(gpmc_dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), |
| 1947 | GPMC_REVISION_MINOR(l)); |
| 1948 | |
Jon Hunter | 84b00f0 | 2013-03-06 14:36:47 -0600 | [diff] [blame] | 1949 | gpmc_mem_init(); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1950 | |
Russell King | 7185684 | 2013-03-13 20:44:21 +0000 | [diff] [blame] | 1951 | if (gpmc_setup_irq() < 0) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1952 | dev_warn(gpmc_dev, "gpmc_setup_irq failed\n"); |
| 1953 | |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1954 | if (!pdev->dev.of_node) { |
| 1955 | gpmc_cs_num = GPMC_CS_NUM; |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1956 | gpmc_nr_waitpins = GPMC_NR_WAITPINS; |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 1957 | } |
Jon Hunter | 9f83315 | 2013-02-20 15:53:38 -0600 | [diff] [blame] | 1958 | |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1959 | rc = gpmc_probe_dt(pdev); |
| 1960 | if (rc < 0) { |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1961 | pm_runtime_put_sync(&pdev->dev); |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 1962 | dev_err(gpmc_dev, "failed to probe DT parameters\n"); |
| 1963 | return rc; |
| 1964 | } |
| 1965 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1966 | return 0; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 1967 | } |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1968 | |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1969 | static int gpmc_remove(struct platform_device *pdev) |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1970 | { |
| 1971 | gpmc_free_irq(); |
| 1972 | gpmc_mem_exit(); |
avinash philip | b3f5525 | 2013-06-12 16:30:56 +0530 | [diff] [blame] | 1973 | pm_runtime_put_sync(&pdev->dev); |
| 1974 | pm_runtime_disable(&pdev->dev); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1975 | gpmc_dev = NULL; |
| 1976 | return 0; |
| 1977 | } |
| 1978 | |
avinash philip | b536dd4 | 2013-06-18 00:16:38 +0530 | [diff] [blame] | 1979 | #ifdef CONFIG_PM_SLEEP |
| 1980 | static int gpmc_suspend(struct device *dev) |
| 1981 | { |
| 1982 | omap3_gpmc_save_context(); |
| 1983 | pm_runtime_put_sync(dev); |
| 1984 | return 0; |
| 1985 | } |
| 1986 | |
| 1987 | static int gpmc_resume(struct device *dev) |
| 1988 | { |
| 1989 | pm_runtime_get_sync(dev); |
| 1990 | omap3_gpmc_restore_context(); |
| 1991 | return 0; |
| 1992 | } |
| 1993 | #endif |
| 1994 | |
| 1995 | static SIMPLE_DEV_PM_OPS(gpmc_pm_ops, gpmc_suspend, gpmc_resume); |
| 1996 | |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 1997 | static struct platform_driver gpmc_driver = { |
| 1998 | .probe = gpmc_probe, |
Greg Kroah-Hartman | 351a102 | 2012-12-21 14:02:24 -0800 | [diff] [blame] | 1999 | .remove = gpmc_remove, |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 2000 | .driver = { |
| 2001 | .name = DEVICE_NAME, |
Daniel Mack | bc6b1e7 | 2012-12-14 11:36:44 +0100 | [diff] [blame] | 2002 | .of_match_table = of_match_ptr(gpmc_dt_ids), |
avinash philip | b536dd4 | 2013-06-18 00:16:38 +0530 | [diff] [blame] | 2003 | .pm = &gpmc_pm_ops, |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 2004 | }, |
| 2005 | }; |
| 2006 | |
| 2007 | static __init int gpmc_init(void) |
| 2008 | { |
| 2009 | return platform_driver_register(&gpmc_driver); |
| 2010 | } |
| 2011 | |
| 2012 | static __exit void gpmc_exit(void) |
| 2013 | { |
| 2014 | platform_driver_unregister(&gpmc_driver); |
| 2015 | |
| 2016 | } |
| 2017 | |
Tony Lindgren | a861280 | 2014-11-20 12:45:43 -0800 | [diff] [blame] | 2018 | postcore_initcall(gpmc_init); |
Afzal Mohammed | da49687 | 2012-09-23 17:28:25 -0600 | [diff] [blame] | 2019 | module_exit(gpmc_exit); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 2020 | |
| 2021 | static irqreturn_t gpmc_handle_irq(int irq, void *dev) |
| 2022 | { |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 2023 | int i; |
| 2024 | u32 regval; |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 2025 | |
Afzal Mohammed | 6b6c32f | 2012-08-30 12:53:23 -0700 | [diff] [blame] | 2026 | regval = gpmc_read_reg(GPMC_IRQSTATUS); |
| 2027 | |
| 2028 | if (!regval) |
| 2029 | return IRQ_NONE; |
| 2030 | |
| 2031 | for (i = 0; i < GPMC_NR_IRQ; i++) |
| 2032 | if (regval & gpmc_client_irq[i].bitmask) |
| 2033 | generic_handle_irq(gpmc_client_irq[i].irq); |
| 2034 | |
| 2035 | gpmc_write_reg(GPMC_IRQSTATUS, regval); |
Sukumar Ghorai | db97eb7d | 2011-01-28 15:42:05 +0530 | [diff] [blame] | 2036 | |
| 2037 | return IRQ_HANDLED; |
Juha Yrjola | 4bbbc1a | 2006-06-26 16:16:16 -0700 | [diff] [blame] | 2038 | } |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2039 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2040 | static struct omap3_gpmc_regs gpmc_context; |
| 2041 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 2042 | void omap3_gpmc_save_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2043 | { |
| 2044 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 2045 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2046 | gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG); |
| 2047 | gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE); |
| 2048 | gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL); |
| 2049 | gpmc_context.config = gpmc_read_reg(GPMC_CONFIG); |
| 2050 | gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1); |
| 2051 | gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2); |
| 2052 | gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 2053 | for (i = 0; i < gpmc_cs_num; i++) { |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2054 | gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i); |
| 2055 | if (gpmc_context.cs_context[i].is_valid) { |
| 2056 | gpmc_context.cs_context[i].config1 = |
| 2057 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG1); |
| 2058 | gpmc_context.cs_context[i].config2 = |
| 2059 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG2); |
| 2060 | gpmc_context.cs_context[i].config3 = |
| 2061 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG3); |
| 2062 | gpmc_context.cs_context[i].config4 = |
| 2063 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG4); |
| 2064 | gpmc_context.cs_context[i].config5 = |
| 2065 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG5); |
| 2066 | gpmc_context.cs_context[i].config6 = |
| 2067 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG6); |
| 2068 | gpmc_context.cs_context[i].config7 = |
| 2069 | gpmc_cs_read_reg(i, GPMC_CS_CONFIG7); |
| 2070 | } |
| 2071 | } |
| 2072 | } |
| 2073 | |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 2074 | void omap3_gpmc_restore_context(void) |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2075 | { |
| 2076 | int i; |
Felipe Balbi | b2fa3b7 | 2010-02-15 10:03:33 -0800 | [diff] [blame] | 2077 | |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2078 | gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig); |
| 2079 | gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable); |
| 2080 | gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl); |
| 2081 | gpmc_write_reg(GPMC_CONFIG, gpmc_context.config); |
| 2082 | gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1); |
| 2083 | gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2); |
| 2084 | gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control); |
Gupta Pekon | f34f371 | 2013-05-31 17:31:30 +0530 | [diff] [blame] | 2085 | for (i = 0; i < gpmc_cs_num; i++) { |
Rajendra Nayak | a2d3e7b | 2008-09-26 17:47:33 +0530 | [diff] [blame] | 2086 | if (gpmc_context.cs_context[i].is_valid) { |
| 2087 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG1, |
| 2088 | gpmc_context.cs_context[i].config1); |
| 2089 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG2, |
| 2090 | gpmc_context.cs_context[i].config2); |
| 2091 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG3, |
| 2092 | gpmc_context.cs_context[i].config3); |
| 2093 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG4, |
| 2094 | gpmc_context.cs_context[i].config4); |
| 2095 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG5, |
| 2096 | gpmc_context.cs_context[i].config5); |
| 2097 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG6, |
| 2098 | gpmc_context.cs_context[i].config6); |
| 2099 | gpmc_cs_write_reg(i, GPMC_CS_CONFIG7, |
| 2100 | gpmc_context.cs_context[i].config7); |
| 2101 | } |
| 2102 | } |
| 2103 | } |