Emmanuel Grumbach | ab697a9 | 2011-07-11 07:35:34 -0700 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
Emmanuel Grumbach | 51368bf | 2013-12-30 13:15:54 +0200 | [diff] [blame] | 3 | * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. |
Johannes Berg | 8b4139d | 2014-07-24 14:05:26 +0200 | [diff] [blame] | 4 | * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH |
Emmanuel Grumbach | ab697a9 | 2011-07-11 07:35:34 -0700 | [diff] [blame] | 5 | * |
| 6 | * Portions of this file are derived from the ipw3945 project, as well |
| 7 | * as portions of the ieee80211 subsystem header files. |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of version 2 of the GNU General Public License as |
| 11 | * published by the Free Software Foundation. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 16 | * more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along with |
| 19 | * this program; if not, write to the Free Software Foundation, Inc., |
| 20 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 21 | * |
| 22 | * The full GNU General Public License is included in this distribution in the |
| 23 | * file called LICENSE. |
| 24 | * |
| 25 | * Contact Information: |
| 26 | * Intel Linux Wireless <ilw@linux.intel.com> |
| 27 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 28 | * |
| 29 | *****************************************************************************/ |
| 30 | #ifndef __iwl_trans_int_pcie_h__ |
| 31 | #define __iwl_trans_int_pcie_h__ |
| 32 | |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 33 | #include <linux/spinlock.h> |
| 34 | #include <linux/interrupt.h> |
| 35 | #include <linux/skbuff.h> |
Johannes Berg | 13df1aa | 2012-03-06 13:31:00 -0800 | [diff] [blame] | 36 | #include <linux/wait.h> |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 37 | #include <linux/pci.h> |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 38 | #include <linux/timer.h> |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 39 | |
Emmanuel Grumbach | dda61a4 | 2011-08-25 23:11:11 -0700 | [diff] [blame] | 40 | #include "iwl-fh.h" |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 41 | #include "iwl-csr.h" |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 42 | #include "iwl-trans.h" |
| 43 | #include "iwl-debug.h" |
| 44 | #include "iwl-io.h" |
Emmanuel Grumbach | 02e3835 | 2012-02-09 16:08:15 +0200 | [diff] [blame] | 45 | #include "iwl-op-mode.h" |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 46 | |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 47 | struct iwl_host_cmd; |
Emmanuel Grumbach | dda61a4 | 2011-08-25 23:11:11 -0700 | [diff] [blame] | 48 | |
Emmanuel Grumbach | ab697a9 | 2011-07-11 07:35:34 -0700 | [diff] [blame] | 49 | /*This file includes the declaration that are internal to the |
| 50 | * trans_pcie layer */ |
| 51 | |
Johannes Berg | 48a2d66 | 2012-03-05 11:24:39 -0800 | [diff] [blame] | 52 | struct iwl_rx_mem_buffer { |
| 53 | dma_addr_t page_dma; |
| 54 | struct page *page; |
| 55 | struct list_head list; |
| 56 | }; |
| 57 | |
Emmanuel Grumbach | e6bb4c9 | 2011-08-25 23:10:48 -0700 | [diff] [blame] | 58 | /** |
Emmanuel Grumbach | 1f7b617 | 2011-08-25 23:10:59 -0700 | [diff] [blame] | 59 | * struct isr_statistics - interrupt statistics |
| 60 | * |
| 61 | */ |
| 62 | struct isr_statistics { |
| 63 | u32 hw; |
| 64 | u32 sw; |
| 65 | u32 err_code; |
| 66 | u32 sch; |
| 67 | u32 alive; |
| 68 | u32 rfkill; |
| 69 | u32 ctkill; |
| 70 | u32 wakeup; |
| 71 | u32 rx; |
| 72 | u32 tx; |
| 73 | u32 unhandled; |
| 74 | }; |
| 75 | |
| 76 | /** |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 77 | * struct iwl_rxq - Rx queue |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 78 | * @bd: driver's pointer to buffer of receive buffer descriptors (rbd) |
| 79 | * @bd_dma: bus address of buffer of receive buffer descriptors (rbd) |
| 80 | * @pool: |
| 81 | * @queue: |
| 82 | * @read: Shared index to newest available Rx buffer |
| 83 | * @write: Shared index to oldest written Rx packet |
| 84 | * @free_count: Number of pre-allocated buffers in rx_free |
| 85 | * @write_actual: |
| 86 | * @rx_free: list of free SKBs for use |
| 87 | * @rx_used: List of Rx buffers with no SKB |
| 88 | * @need_update: flag to indicate we need to update read/write index |
| 89 | * @rb_stts: driver's pointer to receive buffer status |
| 90 | * @rb_stts_dma: bus address of receive buffer status |
| 91 | * @lock: |
| 92 | * |
| 93 | * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers |
| 94 | */ |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 95 | struct iwl_rxq { |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 96 | __le32 *bd; |
| 97 | dma_addr_t bd_dma; |
| 98 | struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS]; |
| 99 | struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE]; |
| 100 | u32 read; |
| 101 | u32 write; |
| 102 | u32 free_count; |
| 103 | u32 write_actual; |
| 104 | struct list_head rx_free; |
| 105 | struct list_head rx_used; |
Johannes Berg | 5d63f92 | 2014-02-27 11:20:07 +0100 | [diff] [blame] | 106 | bool need_update; |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 107 | struct iwl_rb_status *rb_stts; |
| 108 | dma_addr_t rb_stts_dma; |
| 109 | spinlock_t lock; |
| 110 | }; |
| 111 | |
Emmanuel Grumbach | a72b8b0 | 2011-08-25 23:11:13 -0700 | [diff] [blame] | 112 | struct iwl_dma_ptr { |
| 113 | dma_addr_t dma; |
| 114 | void *addr; |
| 115 | size_t size; |
| 116 | }; |
| 117 | |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 118 | /** |
| 119 | * iwl_queue_inc_wrap - increment queue index, wrap back to beginning |
| 120 | * @index -- current index |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 121 | */ |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 122 | static inline int iwl_queue_inc_wrap(int index) |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 123 | { |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 124 | return ++index & (TFD_QUEUE_SIZE_MAX - 1); |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 125 | } |
| 126 | |
| 127 | /** |
| 128 | * iwl_queue_dec_wrap - decrement queue index, wrap back to end |
| 129 | * @index -- current index |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 130 | */ |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 131 | static inline int iwl_queue_dec_wrap(int index) |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 132 | { |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 133 | return --index & (TFD_QUEUE_SIZE_MAX - 1); |
Johannes Berg | bffc66c | 2012-03-05 11:24:42 -0800 | [diff] [blame] | 134 | } |
| 135 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 136 | struct iwl_cmd_meta { |
| 137 | /* only for SYNC commands, iff the reply skb is wanted */ |
| 138 | struct iwl_host_cmd *source; |
Johannes Berg | c14c737 | 2012-04-16 14:48:08 -0700 | [diff] [blame] | 139 | u32 flags; |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 140 | }; |
| 141 | |
| 142 | /* |
| 143 | * Generic queue structure |
| 144 | * |
| 145 | * Contains common data for Rx and Tx queues. |
| 146 | * |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 147 | * Note the difference between TFD_QUEUE_SIZE_MAX and n_window: the hardware |
| 148 | * always assumes 256 descriptors, so TFD_QUEUE_SIZE_MAX is always 256 (unless |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 149 | * there might be HW changes in the future). For the normal TX |
| 150 | * queues, n_window, which is the size of the software queue data |
| 151 | * is also 256; however, for the command queue, n_window is only |
| 152 | * 32 since we don't need so many commands pending. Since the HW |
Johannes Berg | 83f32a4 | 2014-04-24 09:57:40 +0200 | [diff] [blame] | 153 | * still uses 256 BDs for DMA though, TFD_QUEUE_SIZE_MAX stays 256. As a result, |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 154 | * the software buffers (in the variables @meta, @txb in struct |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 155 | * iwl_txq) only have 32 entries, while the HW buffers (@tfds in |
| 156 | * the same struct) have 256. |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 157 | * This means that we end up with the following: |
| 158 | * HW entries: | 0 | ... | N * 32 | ... | N * 32 + 31 | ... | 255 | |
| 159 | * SW entries: | 0 | ... | 31 | |
| 160 | * where N is a number between 0 and 7. This means that the SW |
| 161 | * data is a window overlayed over the HW queue. |
| 162 | */ |
| 163 | struct iwl_queue { |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 164 | int write_ptr; /* 1-st empty entry (index) host_w*/ |
| 165 | int read_ptr; /* last used entry (index) host_r*/ |
| 166 | /* use for monitoring and recovering the stuck queue */ |
| 167 | dma_addr_t dma_addr; /* physical addr for BD's */ |
| 168 | int n_window; /* safe queue window */ |
| 169 | u32 id; |
| 170 | int low_mark; /* low watermark, resume queue if free |
| 171 | * space more than this */ |
| 172 | int high_mark; /* high watermark, stop queue if free |
| 173 | * space less than this */ |
| 174 | }; |
| 175 | |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 176 | #define TFD_TX_CMD_SLOTS 256 |
| 177 | #define TFD_CMD_SLOTS 32 |
| 178 | |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 179 | /* |
| 180 | * The FH will write back to the first TB only, so we need |
| 181 | * to copy some data into the buffer regardless of whether |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 182 | * it should be mapped or not. This indicates how big the |
| 183 | * first TB must be to include the scratch buffer. Since |
| 184 | * the scratch is 4 bytes at offset 12, it's 16 now. If we |
| 185 | * make it bigger then allocations will be bigger and copy |
| 186 | * slower, so that's probably not useful. |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 187 | */ |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 188 | #define IWL_HCMD_SCRATCHBUF_SIZE 16 |
Johannes Berg | 8a964f4 | 2013-02-25 16:01:34 +0100 | [diff] [blame] | 189 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 190 | struct iwl_pcie_txq_entry { |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 191 | struct iwl_device_cmd *cmd; |
| 192 | struct sk_buff *skb; |
Johannes Berg | f4feb8a | 2012-10-19 14:24:43 +0200 | [diff] [blame] | 193 | /* buffer to free after command completes */ |
| 194 | const void *free_buf; |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 195 | struct iwl_cmd_meta meta; |
| 196 | }; |
| 197 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 198 | struct iwl_pcie_txq_scratch_buf { |
| 199 | struct iwl_cmd_header hdr; |
| 200 | u8 buf[8]; |
| 201 | __le32 scratch; |
| 202 | }; |
| 203 | |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 204 | /** |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 205 | * struct iwl_txq - Tx Queue for DMA |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 206 | * @q: generic Rx/Tx queue descriptor |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 207 | * @tfds: transmit frame descriptors (DMA memory) |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 208 | * @scratchbufs: start of command headers, including scratch buffers, for |
| 209 | * the writeback -- this is DMA memory and an array holding one buffer |
| 210 | * for each command on the queue |
| 211 | * @scratchbufs_dma: DMA address for the scratchbufs start |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 212 | * @entries: transmit entries (driver state) |
| 213 | * @lock: queue lock |
| 214 | * @stuck_timer: timer that fires if queue gets stuck |
| 215 | * @trans_pcie: pointer back to transport (for timer) |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 216 | * @need_update: indicates need to update read/write index |
Johannes Berg | bf8440e | 2012-03-19 17:12:06 +0100 | [diff] [blame] | 217 | * @active: stores if queue is active |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 218 | * @ampdu: true if this queue is an ampdu queue for an specific RA/TID |
Emmanuel Grumbach | 4cf677f | 2015-01-12 14:38:29 +0200 | [diff] [blame] | 219 | * @wd_timeout: queue watchdog timeout (jiffies) - per queue |
Emmanuel Grumbach | e0b8d405 | 2015-01-20 17:02:40 +0200 | [diff] [blame] | 220 | * @frozen: tx stuck queue timer is frozen |
| 221 | * @frozen_expiry_remainder: remember how long until the timer fires |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 222 | * |
| 223 | * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame |
| 224 | * descriptors) and required locking structures. |
| 225 | */ |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 226 | struct iwl_txq { |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 227 | struct iwl_queue q; |
| 228 | struct iwl_tfd *tfds; |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 229 | struct iwl_pcie_txq_scratch_buf *scratchbufs; |
| 230 | dma_addr_t scratchbufs_dma; |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 231 | struct iwl_pcie_txq_entry *entries; |
Johannes Berg | 015c15e | 2012-03-05 11:24:24 -0800 | [diff] [blame] | 232 | spinlock_t lock; |
Emmanuel Grumbach | e0b8d405 | 2015-01-20 17:02:40 +0200 | [diff] [blame] | 233 | unsigned long frozen_expiry_remainder; |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 234 | struct timer_list stuck_timer; |
| 235 | struct iwl_trans_pcie *trans_pcie; |
Johannes Berg | 43aa616 | 2014-02-27 14:24:36 +0100 | [diff] [blame] | 236 | bool need_update; |
Emmanuel Grumbach | e0b8d405 | 2015-01-20 17:02:40 +0200 | [diff] [blame] | 237 | bool frozen; |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 238 | u8 active; |
Johannes Berg | 68972c4 | 2013-06-11 19:05:27 +0200 | [diff] [blame] | 239 | bool ampdu; |
Emmanuel Grumbach | 4cf677f | 2015-01-12 14:38:29 +0200 | [diff] [blame] | 240 | unsigned long wd_timeout; |
Emmanuel Grumbach | 522376d | 2011-09-06 09:31:19 -0700 | [diff] [blame] | 241 | }; |
| 242 | |
Johannes Berg | 38c0f334 | 2013-02-27 13:18:50 +0100 | [diff] [blame] | 243 | static inline dma_addr_t |
| 244 | iwl_pcie_get_scratchbuf_dma(struct iwl_txq *txq, int idx) |
| 245 | { |
| 246 | return txq->scratchbufs_dma + |
| 247 | sizeof(struct iwl_pcie_txq_scratch_buf) * idx; |
| 248 | } |
| 249 | |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 250 | /** |
Emmanuel Grumbach | e6bb4c9 | 2011-08-25 23:10:48 -0700 | [diff] [blame] | 251 | * struct iwl_trans_pcie - PCIe transport specific data |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 252 | * @rxq: all the RX queue data |
| 253 | * @rx_replenish: work that will be called when buffers need to be allocated |
Emmanuel Grumbach | 9130bab | 2012-03-26 08:51:09 -0700 | [diff] [blame] | 254 | * @drv - pointer to iwl_drv |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 255 | * @trans: pointer to the generic transport area |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 256 | * @scd_base_addr: scheduler sram base address in SRAM |
| 257 | * @scd_bc_tbls: pointer to the byte count table of the scheduler |
Emmanuel Grumbach | 9d6b2cb | 2011-08-25 23:11:12 -0700 | [diff] [blame] | 258 | * @kw: keep warm address |
Emmanuel Grumbach | a42a184 | 2012-02-02 14:33:08 -0800 | [diff] [blame] | 259 | * @pci_dev: basic pci-network driver stuff |
| 260 | * @hw_base: pci hardware address support |
Johannes Berg | 13df1aa | 2012-03-06 13:31:00 -0800 | [diff] [blame] | 261 | * @ucode_write_complete: indicates that the ucode has been copied. |
| 262 | * @ucode_write_waitq: wait queue for uCode load |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 263 | * @cmd_queue - command queue number |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 264 | * @rx_buf_size_8k: 8 kB RX buffer size |
Emmanuel Grumbach | 046db34 | 2012-12-05 15:07:54 +0200 | [diff] [blame] | 265 | * @bc_table_dword: true if the BC table expects DWORD (as opposed to bytes) |
Emmanuel Grumbach | 3a736bc | 2014-09-10 11:16:41 +0300 | [diff] [blame] | 266 | * @scd_set_active: should the transport configure the SCD for HCMD queue |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 267 | * @rx_page_order: page order for receive buffer size |
Lilach Edelstein | e56b04e | 2013-01-16 11:34:49 +0200 | [diff] [blame] | 268 | * @reg_lock: protect hw register access |
Emmanuel Grumbach | b943949 | 2013-12-22 15:09:40 +0200 | [diff] [blame] | 269 | * @cmd_in_flight: true when we have a host command in flight |
Emmanuel Grumbach | c2d2020 | 2014-06-01 08:05:52 +0300 | [diff] [blame] | 270 | * @fw_mon_phys: physical address of the buffer for the firmware monitor |
| 271 | * @fw_mon_page: points to the first page of the buffer for the firmware monitor |
| 272 | * @fw_mon_size: size of the buffer for the firmware monitor |
Emmanuel Grumbach | e6bb4c9 | 2011-08-25 23:10:48 -0700 | [diff] [blame] | 273 | */ |
| 274 | struct iwl_trans_pcie { |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 275 | struct iwl_rxq rxq; |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 276 | struct work_struct rx_replenish; |
| 277 | struct iwl_trans *trans; |
Emmanuel Grumbach | 9130bab | 2012-03-26 08:51:09 -0700 | [diff] [blame] | 278 | struct iwl_drv *drv; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 279 | |
Johannes Berg | f14d6b3 | 2014-03-21 13:30:03 +0100 | [diff] [blame] | 280 | struct net_device napi_dev; |
| 281 | struct napi_struct napi; |
| 282 | |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 283 | /* INT ICT Table */ |
| 284 | __le32 *ict_tbl; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 285 | dma_addr_t ict_tbl_dma; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 286 | int ict_index; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 287 | bool use_ict; |
Emmanuel Grumbach | 1f7b617 | 2011-08-25 23:10:59 -0700 | [diff] [blame] | 288 | struct isr_statistics isr_stats; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 289 | |
Johannes Berg | 7b11488 | 2012-02-05 13:55:11 -0800 | [diff] [blame] | 290 | spinlock_t irq_lock; |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 291 | u32 inta_mask; |
Emmanuel Grumbach | 105183b | 2011-08-25 23:11:02 -0700 | [diff] [blame] | 292 | u32 scd_base_addr; |
| 293 | struct iwl_dma_ptr scd_bc_tbls; |
Emmanuel Grumbach | 9d6b2cb | 2011-08-25 23:11:12 -0700 | [diff] [blame] | 294 | struct iwl_dma_ptr kw; |
Emmanuel Grumbach | e13c0c5 | 2011-08-25 23:11:24 -0700 | [diff] [blame] | 295 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 296 | struct iwl_txq *txq; |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 297 | unsigned long queue_used[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 298 | unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)]; |
Emmanuel Grumbach | a42a184 | 2012-02-02 14:33:08 -0800 | [diff] [blame] | 299 | |
| 300 | /* PCI bus related data */ |
| 301 | struct pci_dev *pci_dev; |
| 302 | void __iomem *hw_base; |
Johannes Berg | 13df1aa | 2012-03-06 13:31:00 -0800 | [diff] [blame] | 303 | |
| 304 | bool ucode_write_complete; |
| 305 | wait_queue_head_t ucode_write_waitq; |
Emmanuel Grumbach | f946b52 | 2012-10-25 17:25:52 +0200 | [diff] [blame] | 306 | wait_queue_head_t wait_command_queue; |
| 307 | |
Meenakshi Venkataraman | c6f600f | 2012-03-08 11:29:12 -0800 | [diff] [blame] | 308 | u8 cmd_queue; |
Emmanuel Grumbach | b04db9a | 2012-06-21 11:53:44 +0300 | [diff] [blame] | 309 | u8 cmd_fifo; |
Emmanuel Grumbach | 4cf677f | 2015-01-12 14:38:29 +0200 | [diff] [blame] | 310 | unsigned int cmd_q_wdg_timeout; |
Johannes Berg | d663ee7 | 2012-03-10 13:00:07 -0800 | [diff] [blame] | 311 | u8 n_no_reclaim_cmds; |
| 312 | u8 no_reclaim_cmds[MAX_NO_RECLAIM_CMDS]; |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 313 | |
| 314 | bool rx_buf_size_8k; |
Emmanuel Grumbach | 046db34 | 2012-12-05 15:07:54 +0200 | [diff] [blame] | 315 | bool bc_table_dword; |
Emmanuel Grumbach | 3a736bc | 2014-09-10 11:16:41 +0300 | [diff] [blame] | 316 | bool scd_set_active; |
Johannes Berg | b2cf410 | 2012-04-09 17:46:51 -0700 | [diff] [blame] | 317 | u32 rx_page_order; |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 318 | |
Johannes Berg | e520926 | 2014-01-20 23:38:59 +0100 | [diff] [blame] | 319 | const char *const *command_names; |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 320 | |
Lilach Edelstein | e56b04e | 2013-01-16 11:34:49 +0200 | [diff] [blame] | 321 | /*protect hw register */ |
| 322 | spinlock_t reg_lock; |
Emmanuel Grumbach | b943949 | 2013-12-22 15:09:40 +0200 | [diff] [blame] | 323 | bool cmd_in_flight; |
Eliad Peller | 7616f33 | 2014-11-20 17:33:43 +0200 | [diff] [blame] | 324 | bool ref_cmd_in_flight; |
| 325 | |
| 326 | /* protect ref counter */ |
| 327 | spinlock_t ref_lock; |
| 328 | u32 ref_count; |
Emmanuel Grumbach | c2d2020 | 2014-06-01 08:05:52 +0300 | [diff] [blame] | 329 | |
| 330 | dma_addr_t fw_mon_phys; |
| 331 | struct page *fw_mon_page; |
| 332 | u32 fw_mon_size; |
Emmanuel Grumbach | e6bb4c9 | 2011-08-25 23:10:48 -0700 | [diff] [blame] | 333 | }; |
| 334 | |
Emmanuel Grumbach | 5a878bf | 2011-08-25 23:10:51 -0700 | [diff] [blame] | 335 | #define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \ |
| 336 | ((struct iwl_trans_pcie *) ((_iwl_trans)->trans_specific)) |
| 337 | |
Johannes Berg | 7c5ba4a | 2012-04-09 17:46:54 -0700 | [diff] [blame] | 338 | static inline struct iwl_trans * |
| 339 | iwl_trans_pcie_get_trans(struct iwl_trans_pcie *trans_pcie) |
| 340 | { |
| 341 | return container_of((void *)trans_pcie, struct iwl_trans, |
| 342 | trans_specific); |
| 343 | } |
| 344 | |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 345 | /* |
| 346 | * Convention: trans API functions: iwl_trans_pcie_XXX |
| 347 | * Other functions: iwl_pcie_XXX |
| 348 | */ |
Johannes Berg | d1ff525 | 2012-04-12 06:24:30 -0700 | [diff] [blame] | 349 | struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, |
| 350 | const struct pci_device_id *ent, |
| 351 | const struct iwl_cfg *cfg); |
| 352 | void iwl_trans_pcie_free(struct iwl_trans *trans); |
| 353 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 354 | /***************************************************** |
| 355 | * RX |
| 356 | ******************************************************/ |
Emmanuel Grumbach | 9805c446 | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 357 | int iwl_pcie_rx_init(struct iwl_trans *trans); |
Johannes Berg | 2bfb509 | 2012-12-27 21:43:48 +0100 | [diff] [blame] | 358 | irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id); |
Emmanuel Grumbach | 9805c446 | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 359 | int iwl_pcie_rx_stop(struct iwl_trans *trans); |
| 360 | void iwl_pcie_rx_free(struct iwl_trans *trans); |
Emmanuel Grumbach | ab697a9 | 2011-07-11 07:35:34 -0700 | [diff] [blame] | 361 | |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 362 | /***************************************************** |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 363 | * ICT - interrupt handling |
Emmanuel Grumbach | 1a361cd | 2011-07-11 07:44:57 -0700 | [diff] [blame] | 364 | ******************************************************/ |
Emmanuel Grumbach | 85bf9da | 2013-12-09 11:48:30 +0200 | [diff] [blame] | 365 | irqreturn_t iwl_pcie_isr(int irq, void *data); |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 366 | int iwl_pcie_alloc_ict(struct iwl_trans *trans); |
| 367 | void iwl_pcie_free_ict(struct iwl_trans *trans); |
| 368 | void iwl_pcie_reset_ict(struct iwl_trans *trans); |
| 369 | void iwl_pcie_disable_ict(struct iwl_trans *trans); |
Emmanuel Grumbach | 1a361cd | 2011-07-11 07:44:57 -0700 | [diff] [blame] | 370 | |
Emmanuel Grumbach | 1a361cd | 2011-07-11 07:44:57 -0700 | [diff] [blame] | 371 | /***************************************************** |
Emmanuel Grumbach | 253a634 | 2011-07-11 07:39:46 -0700 | [diff] [blame] | 372 | * TX / HCMD |
| 373 | ******************************************************/ |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 374 | int iwl_pcie_tx_init(struct iwl_trans *trans); |
| 375 | void iwl_pcie_tx_start(struct iwl_trans *trans, u32 scd_base_addr); |
| 376 | int iwl_pcie_tx_stop(struct iwl_trans *trans); |
| 377 | void iwl_pcie_tx_free(struct iwl_trans *trans); |
Johannes Berg | fea7795 | 2014-08-01 11:58:47 +0200 | [diff] [blame] | 378 | void iwl_trans_pcie_txq_enable(struct iwl_trans *trans, int queue, u16 ssn, |
Emmanuel Grumbach | 4cf677f | 2015-01-12 14:38:29 +0200 | [diff] [blame] | 379 | const struct iwl_trans_txq_scd_cfg *cfg, |
| 380 | unsigned int wdg_timeout); |
Johannes Berg | d4578ea | 2014-08-01 12:17:40 +0200 | [diff] [blame] | 381 | void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int queue, |
| 382 | bool configure_scd); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 383 | int iwl_trans_pcie_tx(struct iwl_trans *trans, struct sk_buff *skb, |
| 384 | struct iwl_device_cmd *dev_cmd, int txq_id); |
Johannes Berg | ea68f46 | 2014-02-27 14:36:55 +0100 | [diff] [blame] | 385 | void iwl_pcie_txq_check_wrptrs(struct iwl_trans *trans); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 386 | int iwl_trans_pcie_send_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 387 | void iwl_pcie_hcmd_complete(struct iwl_trans *trans, |
| 388 | struct iwl_rx_cmd_buffer *rxb, int handler_status); |
Emmanuel Grumbach | f02831b | 2012-11-14 14:44:18 +0200 | [diff] [blame] | 389 | void iwl_trans_pcie_reclaim(struct iwl_trans *trans, int txq_id, int ssn, |
| 390 | struct sk_buff_head *skbs); |
Johannes Berg | ddaf5a5 | 2013-01-08 11:25:44 +0100 | [diff] [blame] | 391 | void iwl_trans_pcie_tx_reset(struct iwl_trans *trans); |
| 392 | |
Eliad Peller | 7616f33 | 2014-11-20 17:33:43 +0200 | [diff] [blame] | 393 | void iwl_trans_pcie_ref(struct iwl_trans *trans); |
| 394 | void iwl_trans_pcie_unref(struct iwl_trans *trans); |
| 395 | |
Johannes Berg | 4d07500 | 2014-04-24 10:41:31 +0200 | [diff] [blame] | 396 | static inline u16 iwl_pcie_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx) |
| 397 | { |
| 398 | struct iwl_tfd_tb *tb = &tfd->tbs[idx]; |
| 399 | |
| 400 | return le16_to_cpu(tb->hi_n_len) >> 4; |
| 401 | } |
| 402 | |
Emmanuel Grumbach | 7ff9470 | 2011-08-25 23:10:54 -0700 | [diff] [blame] | 403 | /***************************************************** |
| 404 | * Error handling |
| 405 | ******************************************************/ |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 406 | void iwl_pcie_dump_csr(struct iwl_trans *trans); |
Emmanuel Grumbach | 16db88b | 2011-08-25 23:11:08 -0700 | [diff] [blame] | 407 | |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 408 | /***************************************************** |
| 409 | * Helpers |
| 410 | ******************************************************/ |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 411 | static inline void iwl_disable_interrupts(struct iwl_trans *trans) |
| 412 | { |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 413 | clear_bit(STATUS_INT_ENABLED, &trans->status); |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 414 | |
| 415 | /* disable interrupts from uCode/NIC to host */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 416 | iwl_write32(trans, CSR_INT_MASK, 0x00000000); |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 417 | |
| 418 | /* acknowledge/clear/reset any interrupts still pending |
| 419 | * from uCode or flow handler (Rx/Tx DMA) */ |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 420 | iwl_write32(trans, CSR_INT, 0xffffffff); |
| 421 | iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 422 | IWL_DEBUG_ISR(trans, "Disabled interrupts\n"); |
| 423 | } |
| 424 | |
| 425 | static inline void iwl_enable_interrupts(struct iwl_trans *trans) |
| 426 | { |
Don Fry | 8362640 | 2012-03-07 09:52:37 -0800 | [diff] [blame] | 427 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 428 | |
| 429 | IWL_DEBUG_ISR(trans, "Enabling interrupts\n"); |
Arik Nemtsov | eb7ff77 | 2013-12-01 12:30:38 +0200 | [diff] [blame] | 430 | set_bit(STATUS_INT_ENABLED, &trans->status); |
Emmanuel Grumbach | 2dbc368 | 2013-12-09 11:09:47 +0200 | [diff] [blame] | 431 | trans_pcie->inta_mask = CSR_INI_SET_MASK; |
Emmanuel Grumbach | 1042db2 | 2012-01-03 16:56:15 +0200 | [diff] [blame] | 432 | iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); |
Emmanuel Grumbach | 0c32576 | 2011-08-25 23:10:53 -0700 | [diff] [blame] | 433 | } |
| 434 | |
Stanislaw Gruszka | 8722c89 | 2012-03-07 09:52:28 -0800 | [diff] [blame] | 435 | static inline void iwl_enable_rfkill_int(struct iwl_trans *trans) |
| 436 | { |
Emmanuel Grumbach | 2dbc368 | 2013-12-09 11:09:47 +0200 | [diff] [blame] | 437 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
| 438 | |
Stanislaw Gruszka | 8722c89 | 2012-03-07 09:52:28 -0800 | [diff] [blame] | 439 | IWL_DEBUG_ISR(trans, "Enabling rfkill interrupt\n"); |
Emmanuel Grumbach | 2dbc368 | 2013-12-09 11:09:47 +0200 | [diff] [blame] | 440 | trans_pcie->inta_mask = CSR_INT_BIT_RF_KILL; |
| 441 | iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); |
Stanislaw Gruszka | 8722c89 | 2012-03-07 09:52:28 -0800 | [diff] [blame] | 442 | } |
| 443 | |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 444 | static inline void iwl_wake_queue(struct iwl_trans *trans, |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 445 | struct iwl_txq *txq) |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 446 | { |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 447 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 448 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 449 | if (test_and_clear_bit(txq->q.id, trans_pcie->queue_stopped)) { |
| 450 | IWL_DEBUG_TX_QUEUES(trans, "Wake hwq %d\n", txq->q.id); |
| 451 | iwl_op_mode_queue_not_full(trans->op_mode, txq->q.id); |
Emmanuel Grumbach | 81a3de1 | 2011-11-10 06:55:24 -0800 | [diff] [blame] | 452 | } |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | static inline void iwl_stop_queue(struct iwl_trans *trans, |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 456 | struct iwl_txq *txq) |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 457 | { |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 458 | struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); |
Emmanuel Grumbach | e20d4341 | 2011-08-25 23:11:31 -0700 | [diff] [blame] | 459 | |
Johannes Berg | 9eae88f | 2012-03-15 13:26:52 -0700 | [diff] [blame] | 460 | if (!test_and_set_bit(txq->q.id, trans_pcie->queue_stopped)) { |
| 461 | iwl_op_mode_queue_full(trans->op_mode, txq->q.id); |
| 462 | IWL_DEBUG_TX_QUEUES(trans, "Stop hwq %d\n", txq->q.id); |
| 463 | } else |
| 464 | IWL_DEBUG_TX_QUEUES(trans, "hwq %d already stopped\n", |
| 465 | txq->q.id); |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 466 | } |
| 467 | |
Emmanuel Grumbach | 6ca6ebc | 2012-11-14 23:38:08 +0200 | [diff] [blame] | 468 | static inline bool iwl_queue_used(const struct iwl_queue *q, int i) |
Emmanuel Grumbach | 8ad71be | 2011-08-25 23:11:32 -0700 | [diff] [blame] | 469 | { |
| 470 | return q->write_ptr >= q->read_ptr ? |
| 471 | (i >= q->read_ptr && i < q->write_ptr) : |
| 472 | !(i < q->read_ptr && i >= q->write_ptr); |
| 473 | } |
| 474 | |
| 475 | static inline u8 get_cmd_index(struct iwl_queue *q, u32 index) |
| 476 | { |
| 477 | return index & (q->n_window - 1); |
| 478 | } |
| 479 | |
Emmanuel Grumbach | 990aa6d | 2012-11-14 12:39:52 +0200 | [diff] [blame] | 480 | static inline const char *get_cmd_string(struct iwl_trans_pcie *trans_pcie, |
| 481 | u8 cmd) |
Johannes Berg | d9fb646 | 2012-03-26 08:23:39 -0700 | [diff] [blame] | 482 | { |
| 483 | if (!trans_pcie->command_names || !trans_pcie->command_names[cmd]) |
| 484 | return "UNKNOWN"; |
| 485 | return trans_pcie->command_names[cmd]; |
| 486 | } |
| 487 | |
Emmanuel Grumbach | 8d42551 | 2012-03-28 11:00:58 +0200 | [diff] [blame] | 488 | static inline bool iwl_is_rfkill_set(struct iwl_trans *trans) |
| 489 | { |
| 490 | return !(iwl_read32(trans, CSR_GP_CNTRL) & |
| 491 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); |
| 492 | } |
| 493 | |
Emmanuel Grumbach | b943949 | 2013-12-22 15:09:40 +0200 | [diff] [blame] | 494 | static inline void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, |
| 495 | u32 reg, u32 mask, u32 value) |
| 496 | { |
| 497 | u32 v; |
| 498 | |
| 499 | #ifdef CONFIG_IWLWIFI_DEBUG |
| 500 | WARN_ON_ONCE(value & ~mask); |
| 501 | #endif |
| 502 | |
| 503 | v = iwl_read32(trans, reg); |
| 504 | v &= ~mask; |
| 505 | v |= value; |
| 506 | iwl_write32(trans, reg, v); |
| 507 | } |
| 508 | |
| 509 | static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans, |
| 510 | u32 reg, u32 mask) |
| 511 | { |
| 512 | __iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0); |
| 513 | } |
| 514 | |
| 515 | static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans, |
| 516 | u32 reg, u32 mask) |
| 517 | { |
| 518 | __iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask); |
| 519 | } |
| 520 | |
Johannes Berg | 14cfca7 | 2014-02-25 20:50:53 +0100 | [diff] [blame] | 521 | void iwl_trans_pcie_rf_kill(struct iwl_trans *trans, bool state); |
| 522 | |
Emmanuel Grumbach | ab697a9 | 2011-07-11 07:35:34 -0700 | [diff] [blame] | 523 | #endif /* __iwl_trans_int_pcie_h__ */ |