blob: 98019cd9ac05a4102e492765c15894e58d69e95f [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +05301/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/gpio/gpio.h>
Kiran Gundaaf6a0b62017-10-23 16:03:10 +053016#include <dt-bindings/interrupt-controller/arm-gic.h>
Srinivas Ramana3cac2782017-09-13 16:31:17 +053017
18/ {
19 model = "Qualcomm Technologies, Inc. MSM 8953";
20 compatible = "qcom,msm8953";
21 qcom,msm-id = <293 0x0>;
22 interrupt-parent = <&intc>;
23
24 chosen {
25 bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
26 };
27
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
31 ranges;
32
33 other_ext_mem: other_ext_region@0 {
34 compatible = "removed-dma-pool";
35 no-map;
36 reg = <0x0 0x85b00000 0x0 0xd00000>;
37 };
38
39 modem_mem: modem_region@0 {
40 compatible = "removed-dma-pool";
41 no-map-fixup;
42 reg = <0x0 0x86c00000 0x0 0x6a00000>;
43 };
44
45 adsp_fw_mem: adsp_fw_region@0 {
46 compatible = "removed-dma-pool";
47 no-map;
48 reg = <0x0 0x8d600000 0x0 0x1100000>;
49 };
50
51 wcnss_fw_mem: wcnss_fw_region@0 {
52 compatible = "removed-dma-pool";
53 no-map;
54 reg = <0x0 0x8e700000 0x0 0x700000>;
55 };
56
57 venus_mem: venus_region@0 {
58 compatible = "shared-dma-pool";
59 reusable;
60 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
61 alignment = <0 0x400000>;
62 size = <0 0x0800000>;
63 };
64
65 secure_mem: secure_region@0 {
66 compatible = "shared-dma-pool";
67 reusable;
68 alignment = <0 0x400000>;
69 size = <0 0x09800000>;
70 };
71
72 qseecom_mem: qseecom_region@0 {
73 compatible = "shared-dma-pool";
74 reusable;
75 alignment = <0 0x400000>;
76 size = <0 0x1000000>;
77 };
78
79 adsp_mem: adsp_region@0 {
80 compatible = "shared-dma-pool";
81 reusable;
82 size = <0 0x400000>;
83 };
84
85 dfps_data_mem: dfps_data_mem@90000000 {
86 reg = <0 0x90000000 0 0x1000>;
87 label = "dfps_data_mem";
88 };
89
90 cont_splash_mem: splash_region@0x90001000 {
91 reg = <0x0 0x90001000 0x0 0x13ff000>;
92 label = "cont_splash_mem";
93 };
94
95 gpu_mem: gpu_region@0 {
96 compatible = "shared-dma-pool";
97 reusable;
98 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
99 alignment = <0 0x400000>;
100 size = <0 0x800000>;
101 };
102 };
103
104 aliases {
105 /* smdtty devices */
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530106 smd1 = &smdtty_apps_fm;
107 smd2 = &smdtty_apps_riva_bt_acl;
108 smd3 = &smdtty_apps_riva_bt_cmd;
109 smd4 = &smdtty_mbalbridge;
110 smd5 = &smdtty_apps_riva_ant_cmd;
111 smd6 = &smdtty_apps_riva_ant_data;
112 smd7 = &smdtty_data1;
113 smd8 = &smdtty_data4;
114 smd11 = &smdtty_data11;
115 smd21 = &smdtty_data21;
116 smd36 = &smdtty_loopback;
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530117 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
118 sdhc2 = &sdhc_2; /* SDC2 for SD card */
119 };
120
121 soc: soc { };
122
123};
124
125#include "msm8953-pinctrl.dtsi"
126#include "msm8953-cpu.dtsi"
127
128
129&soc {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 ranges = <0 0 0 0xffffffff>;
133 compatible = "simple-bus";
134
135 apc_apm: apm@b111000 {
136 compatible = "qcom,msm8953-apm";
137 reg = <0xb111000 0x1000>;
138 reg-names = "pm-apcc-glb";
139 qcom,apm-post-halt-delay = <0x2>;
140 qcom,apm-halt-clk-delay = <0x11>;
141 qcom,apm-resume-clk-delay = <0x10>;
142 qcom,apm-sel-switch-delay = <0x01>;
143 };
144
145 intc: interrupt-controller@b000000 {
146 compatible = "qcom,msm-qgic2";
147 interrupt-controller;
148 #interrupt-cells = <3>;
149 reg = <0x0b000000 0x1000>,
150 <0x0b002000 0x1000>;
151 };
152
153 qcom,msm-gladiator@b1c0000 {
154 compatible = "qcom,msm-gladiator";
155 reg = <0x0b1c0000 0x4000>;
156 reg-names = "gladiator_base";
157 interrupts = <0 22 0>;
158 };
159
160 timer {
161 compatible = "arm,armv8-timer";
162 interrupts = <1 2 0xff08>,
163 <1 3 0xff08>,
164 <1 4 0xff08>,
165 <1 1 0xff08>;
166 clock-frequency = <19200000>;
167 };
168
169 timer@b120000 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 ranges;
173 compatible = "arm,armv7-timer-mem";
174 reg = <0xb120000 0x1000>;
175 clock-frequency = <19200000>;
176
177 frame@b121000 {
178 frame-number = <0>;
179 interrupts = <0 8 0x4>,
180 <0 7 0x4>;
181 reg = <0xb121000 0x1000>,
182 <0xb122000 0x1000>;
183 };
184
185 frame@b123000 {
186 frame-number = <1>;
187 interrupts = <0 9 0x4>;
188 reg = <0xb123000 0x1000>;
189 status = "disabled";
190 };
191
192 frame@b124000 {
193 frame-number = <2>;
194 interrupts = <0 10 0x4>;
195 reg = <0xb124000 0x1000>;
196 status = "disabled";
197 };
198
199 frame@b125000 {
200 frame-number = <3>;
201 interrupts = <0 11 0x4>;
202 reg = <0xb125000 0x1000>;
203 status = "disabled";
204 };
205
206 frame@b126000 {
207 frame-number = <4>;
208 interrupts = <0 12 0x4>;
209 reg = <0xb126000 0x1000>;
210 status = "disabled";
211 };
212
213 frame@b127000 {
214 frame-number = <5>;
215 interrupts = <0 13 0x4>;
216 reg = <0xb127000 0x1000>;
217 status = "disabled";
218 };
219
220 frame@b128000 {
221 frame-number = <6>;
222 interrupts = <0 14 0x4>;
223 reg = <0xb128000 0x1000>;
224 status = "disabled";
225 };
226 };
227 qcom,rmtfs_sharedmem@00000000 {
228 compatible = "qcom,sharedmem-uio";
229 reg = <0x00000000 0x00180000>;
230 reg-names = "rmtfs";
231 qcom,client-id = <0x00000001>;
232 };
233
234 restart@4ab000 {
235 compatible = "qcom,pshold";
236 reg = <0x4ab000 0x4>,
237 <0x193d100 0x4>;
238 reg-names = "pshold-base", "tcsr-boot-misc-detect";
239 };
240
241 qcom,mpm2-sleep-counter@4a3000 {
242 compatible = "qcom,mpm2-sleep-counter";
243 reg = <0x4a3000 0x1000>;
244 clock-frequency = <32768>;
245 };
246
247 cpu-pmu {
248 compatible = "arm,armv8-pmuv3";
249 interrupts = <1 7 0xff00>;
250 };
251
252 qcom,sps {
253 compatible = "qcom,msm_sps_4k";
254 qcom,pipe-attr-ee;
255 };
256
257 blsp1_uart0: serial@78af000 {
258 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
259 reg = <0x78af000 0x200>;
260 interrupts = <0 107 0>;
261 status = "disabled";
262 };
263
264 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
265 #dma-cells = <4>;
266 compatible = "qcom,sps-dma";
267 reg = <0x7884000 0x1f000>;
268 interrupts = <0 238 0>;
269 qcom,summing-threshold = <10>;
270 };
271
272 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
273 #dma-cells = <4>;
274 compatible = "qcom,sps-dma";
275 reg = <0x7ac4000 0x1f000>;
276 interrupts = <0 239 0>;
277 qcom,summing-threshold = <10>;
278 };
279
280 slim_msm: slim@c140000{
281 cell-index = <1>;
282 compatible = "qcom,slim-ngd";
283 reg = <0xc140000 0x2c000>,
284 <0xc104000 0x2a000>;
285 reg-names = "slimbus_physical", "slimbus_bam_physical";
286 interrupts = <0 163 0>, <0 180 0>;
287 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
288 qcom,apps-ch-pipes = <0x600000>;
289 qcom,ea-pc = <0x200>;
290 status = "disabled";
291 };
292
293 cpubw: qcom,cpubw {
294 compatible = "qcom,devbw";
295 governor = "cpufreq";
296 qcom,src-dst-ports = <1 512>;
297 qcom,active-only;
298 qcom,bw-tbl =
299 < 769 /* 100.8 MHz */ >,
300 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
301 < 2124 /* 278.4 MHz */ >,
302 < 2929 /* 384 MHz */ >,
303 < 3221 /* 422.4 MHz */ >, /* SVS */
304 < 4248 /* 556.8 MHz */ >,
305 < 5126 /* 672 MHz */ >,
306 < 5859 /* 768 MHz */ >, /* SVS+ */
307 < 6152 /* 806.4 MHz */ >,
308 < 6445 /* 844.8 MHz */ >, /* NOM */
309 < 7104 /* 931.2 MHz */ >; /* TURBO */
310 };
311
312 mincpubw: qcom,mincpubw {
313 compatible = "qcom,devbw";
314 governor = "cpufreq";
315 qcom,src-dst-ports = <1 512>;
316 qcom,active-only;
317 qcom,bw-tbl =
318 < 769 /* 100.8 MHz */ >,
319 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
320 < 2124 /* 278.4 MHz */ >,
321 < 2929 /* 384 MHz */ >,
322 < 3221 /* 422.4 MHz */ >, /* SVS */
323 < 4248 /* 556.8 MHz */ >,
324 < 5126 /* 672 MHz */ >,
325 < 5859 /* 768 MHz */ >, /* SVS+ */
326 < 6152 /* 806.4 MHz */ >,
327 < 6445 /* 844.8 MHz */ >, /* NOM */
328 < 7104 /* 931.2 MHz */ >; /* TURBO */
329 };
330
331 qcom,cpu-bwmon {
332 compatible = "qcom,bimc-bwmon2";
333 reg = <0x408000 0x300>, <0x401000 0x200>;
334 reg-names = "base", "global_base";
335 interrupts = <0 183 4>;
336 qcom,mport = <0>;
337 qcom,target-dev = <&cpubw>;
338 };
339
340 devfreq-cpufreq {
341 cpubw-cpufreq {
342 target-dev = <&cpubw>;
343 cpu-to-dev-map =
344 < 652800 1611>,
345 < 1036800 3221>,
346 < 1401600 5859>,
347 < 1689600 6445>,
348 < 1804800 7104>,
349 < 1958400 7104>,
350 < 2208000 7104>;
351 };
352
353 mincpubw-cpufreq {
354 target-dev = <&mincpubw>;
355 cpu-to-dev-map =
356 < 652800 1611 >,
357 < 1401600 3221 >,
358 < 2208000 5859 >;
359 };
360 };
361
Jonathan Avilac7a6fd52017-10-12 15:24:05 -0700362 cpubw_compute: qcom,cpubw-compute {
363 compatible = "qcom,arm-cpu-mon";
364 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
365 &CPU4 &CPU5 &CPU6 &CPU7 >;
366 qcom,target-dev = <&cpubw>;
367 qcom,core-dev-table =
368 < 652800 1611>,
369 < 1036800 3221>,
370 < 1401600 5859>,
371 < 1689600 6445>,
372 < 1804800 7104>,
373 < 1958400 7104>,
374 < 2208000 7104>;
375 };
376
377 mincpubw_compute: qcom,mincpubw-compute {
378 compatible = "qcom,arm-cpu-mon";
379 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
380 &CPU4 &CPU5 &CPU6 &CPU7 >;
381 qcom,target-dev = <&mincpubw>;
382 qcom,core-dev-table =
383 < 652800 1611 >,
384 < 1401600 3221 >,
385 < 2208000 5859 >;
386 };
387
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530388 qcom,ipc-spinlock@1905000 {
389 compatible = "qcom,ipc-spinlock-sfpb";
390 reg = <0x1905000 0x8000>;
391 qcom,num-locks = <8>;
392 };
393
394 qcom,smem@86300000 {
395 compatible = "qcom,smem";
396 reg = <0x86300000 0x100000>,
397 <0x0b011008 0x4>,
398 <0x60000 0x8000>,
399 <0x193d000 0x8>;
400 reg-names = "smem", "irq-reg-base",
401 "aux-mem1", "smem_targ_info_reg";
402 qcom,mpu-enabled;
403
404 qcom,smd-modem {
405 compatible = "qcom,smd";
406 qcom,smd-edge = <0>;
407 qcom,smd-irq-offset = <0x0>;
408 qcom,smd-irq-bitmask = <0x1000>;
409 interrupts = <0 25 1>;
410 label = "modem";
411 qcom,not-loadable;
412 };
413
414 qcom,smsm-modem {
415 compatible = "qcom,smsm";
416 qcom,smsm-edge = <0>;
417 qcom,smsm-irq-offset = <0x0>;
418 qcom,smsm-irq-bitmask = <0x2000>;
419 interrupts = <0 26 1>;
420 };
421
422 qcom,smd-wcnss {
423 compatible = "qcom,smd";
424 qcom,smd-edge = <6>;
425 qcom,smd-irq-offset = <0x0>;
426 qcom,smd-irq-bitmask = <0x20000>;
427 interrupts = <0 142 1>;
428 label = "wcnss";
429 };
430
431 qcom,smsm-wcnss {
432 compatible = "qcom,smsm";
433 qcom,smsm-edge = <6>;
434 qcom,smsm-irq-offset = <0x0>;
435 qcom,smsm-irq-bitmask = <0x80000>;
436 interrupts = <0 144 1>;
437 };
438
439 qcom,smd-adsp {
440 compatible = "qcom,smd";
441 qcom,smd-edge = <1>;
442 qcom,smd-irq-offset = <0x0>;
443 qcom,smd-irq-bitmask = <0x100>;
444 interrupts = <0 289 1>;
445 label = "adsp";
446 };
447
448 qcom,smsm-adsp {
449 compatible = "qcom,smsm";
450 qcom,smsm-edge = <1>;
451 qcom,smsm-irq-offset = <0x0>;
452 qcom,smsm-irq-bitmask = <0x200>;
453 interrupts = <0 290 1>;
454 };
455
456 qcom,smd-rpm {
457 compatible = "qcom,smd";
458 qcom,smd-edge = <15>;
459 qcom,smd-irq-offset = <0x0>;
460 qcom,smd-irq-bitmask = <0x1>;
461 interrupts = <0 168 1>;
462 label = "rpm";
463 qcom,irq-no-suspend;
464 qcom,not-loadable;
465 };
466 };
467
Arun Kumar Neelakantam36151aa2017-11-02 21:34:33 +0530468 qcom,smdtty {
469 compatible = "qcom,smdtty";
470
471 smdtty_apps_fm: qcom,smdtty-apps-fm {
472 qcom,smdtty-remote = "wcnss";
473 qcom,smdtty-port-name = "APPS_FM";
474 };
475
476 smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
477 qcom,smdtty-remote = "wcnss";
478 qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
479 };
480
481 smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
482 qcom,smdtty-remote = "wcnss";
483 qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
484 };
485
486 smdtty_mbalbridge: qcom,smdtty-mbalbridge {
487 qcom,smdtty-remote = "modem";
488 qcom,smdtty-port-name = "MBALBRIDGE";
489 };
490
491 smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
492 qcom,smdtty-remote = "wcnss";
493 qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
494 };
495
496 smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
497 qcom,smdtty-remote = "wcnss";
498 qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
499 };
500
501 smdtty_data1: qcom,smdtty-data1 {
502 qcom,smdtty-remote = "modem";
503 qcom,smdtty-port-name = "DATA1";
504 };
505
506 smdtty_data4: qcom,smdtty-data4 {
507 qcom,smdtty-remote = "modem";
508 qcom,smdtty-port-name = "DATA4";
509 };
510
511 smdtty_data11: qcom,smdtty-data11 {
512 qcom,smdtty-remote = "modem";
513 qcom,smdtty-port-name = "DATA11";
514 };
515
516 smdtty_data21: qcom,smdtty-data21 {
517 qcom,smdtty-remote = "modem";
518 qcom,smdtty-port-name = "DATA21";
519 };
520
521 smdtty_loopback: smdtty-loopback {
522 qcom,smdtty-remote = "modem";
523 qcom,smdtty-port-name = "LOOPBACK";
524 qcom,smdtty-dev-name = "LOOPBACK_TTY";
525 };
526 };
527
Arun Kumar Neelakantamea07e3d2017-11-02 21:27:50 +0530528 qcom,smdpkt {
529 compatible = "qcom,smdpkt";
530
531 qcom,smdpkt-data5-cntl {
532 qcom,smdpkt-remote = "modem";
533 qcom,smdpkt-port-name = "DATA5_CNTL";
534 qcom,smdpkt-dev-name = "smdcntl0";
535 };
536
537 qcom,smdpkt-data22 {
538 qcom,smdpkt-remote = "modem";
539 qcom,smdpkt-port-name = "DATA22";
540 qcom,smdpkt-dev-name = "smd22";
541 };
542
543 qcom,smdpkt-data40-cntl {
544 qcom,smdpkt-remote = "modem";
545 qcom,smdpkt-port-name = "DATA40_CNTL";
546 qcom,smdpkt-dev-name = "smdcntl8";
547 };
548
549 qcom,smdpkt-apr-apps2 {
550 qcom,smdpkt-remote = "adsp";
551 qcom,smdpkt-port-name = "apr_apps2";
552 qcom,smdpkt-dev-name = "apr_apps2";
553 };
554
555 qcom,smdpkt-loopback {
556 qcom,smdpkt-remote = "modem";
557 qcom,smdpkt-port-name = "LOOPBACK";
558 qcom,smdpkt-dev-name = "smd_pkt_loopback";
559 };
560 };
561
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530562 qcom,wdt@b017000 {
563 compatible = "qcom,msm-watchdog";
564 reg = <0xb017000 0x1000>;
565 reg-names = "wdt-base";
566 interrupts = <0 3 0>, <0 4 0>;
567 qcom,bark-time = <11000>;
568 qcom,pet-time = <10000>;
569 qcom,ipi-ping;
570 qcom,wakeup-enable;
571 };
572
573 qcom,chd {
574 compatible = "qcom,core-hang-detect";
575 qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
576 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
577 qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
578 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
579 };
580
581 qcom,msm-rtb {
582 compatible = "qcom,msm-rtb";
583 qcom,rtb-size = <0x100000>;
584 };
585
586 qcom,msm-imem@8600000 {
587 compatible = "qcom,msm-imem";
588 reg = <0x08600000 0x1000>;
589 ranges = <0x0 0x08600000 0x1000>;
590 #address-cells = <1>;
591 #size-cells = <1>;
592
593 mem_dump_table@10 {
594 compatible = "qcom,msm-imem-mem_dump_table";
595 reg = <0x10 8>;
596 };
597
598 restart_reason@65c {
599 compatible = "qcom,msm-imem-restart_reason";
600 reg = <0x65c 4>;
601 };
602
603 boot_stats@6b0 {
604 compatible = "qcom,msm-imem-boot_stats";
605 reg = <0x6b0 32>;
606 };
607
608 pil@94c {
609 compatible = "qcom,msm-imem-pil";
610 reg = <0x94c 200>;
611
612 };
613 };
614
615 qcom,memshare {
616 compatible = "qcom,memshare";
617
618 qcom,client_1 {
619 compatible = "qcom,memshare-peripheral";
620 qcom,peripheral-size = <0x200000>;
621 qcom,client-id = <0>;
622 qcom,allocate-boot-time;
623 label = "modem";
624 };
625
626 qcom,client_2 {
627 compatible = "qcom,memshare-peripheral";
628 qcom,peripheral-size = <0x300000>;
629 qcom,client-id = <2>;
630 label = "modem";
631 };
632
633 mem_client_3_size: qcom,client_3 {
634 compatible = "qcom,memshare-peripheral";
635 qcom,peripheral-size = <0x0>;
636 qcom,client-id = <1>;
637 label = "modem";
638 };
639 };
640 sdcc1_ice: sdcc1ice@7803000 {
641 compatible = "qcom,ice";
642 reg = <0x7803000 0x8000>;
643 interrupt-names = "sdcc_ice_nonsec_level_irq",
644 "sdcc_ice_sec_level_irq";
645 interrupts = <0 312 0>, <0 313 0>;
646 qcom,enable-ice-clk;
647 qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
648 qcom,msm-bus,name = "sdcc_ice_noc";
649 qcom,msm-bus,num-cases = <2>;
650 qcom,msm-bus,num-paths = <1>;
651 qcom,msm-bus,vectors-KBps =
652 <78 512 0 0>, /* No vote */
653 <78 512 1000 0>; /* Max. bandwidth */
654 qcom,bus-vector-names = "MIN", "MAX";
655 qcom,instance-type = "sdcc";
656 };
657
658 sdhc_1: sdhci@7824900 {
659 compatible = "qcom,sdhci-msm";
660 reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
661 reg-names = "hc_mem", "core_mem", "cmdq_mem";
662
663 interrupts = <0 123 0>, <0 138 0>;
664 interrupt-names = "hc_irq", "pwr_irq";
665
666 sdhc-msm-crypto = <&sdcc1_ice>;
667 qcom,bus-width = <8>;
668
669 qcom,devfreq,freq-table = <50000000 200000000>;
670
671 qcom,pm-qos-irq-type = "affine_irq";
672 qcom,pm-qos-irq-latency = <2 213>;
673
674 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
675 qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;
676
677 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
678
679 qcom,msm-bus,name = "sdhc1";
680 qcom,msm-bus,num-cases = <9>;
681 qcom,msm-bus,num-paths = <1>;
682 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
683 <78 512 1046 3200>, /* 400 KB/s*/
684 <78 512 52286 160000>, /* 20 MB/s */
685 <78 512 65360 200000>, /* 25 MB/s */
686 <78 512 130718 400000>, /* 50 MB/s */
687 <78 512 130718 400000>, /* 100 MB/s */
688 <78 512 261438 800000>, /* 200 MB/s */
689 <78 512 261438 800000>, /* 400 MB/s */
690 <78 512 1338562 4096000>; /* Max. bandwidth */
691 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
692 100000000 200000000 400000000 4294967295>;
693
694 qcom,ice-clk-rates = <270000000 160000000>;
695 qcom,large-address-bus;
696
697 status = "disabled";
698 };
699
700 sdhc_2: sdhci@7864900 {
701 compatible = "qcom,sdhci-msm";
702 reg = <0x7864900 0x500>, <0x7864000 0x800>;
703 reg-names = "hc_mem", "core_mem";
704
705 interrupts = <0 125 0>, <0 221 0>;
706 interrupt-names = "hc_irq", "pwr_irq";
707
708 qcom,bus-width = <4>;
709
710 qcom,pm-qos-irq-type = "affine_irq";
711 qcom,pm-qos-irq-latency = <2 213>;
712
713 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
714 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
715
716 qcom,devfreq,freq-table = <50000000 200000000>;
717
718 qcom,msm-bus,name = "sdhc2";
719 qcom,msm-bus,num-cases = <8>;
720 qcom,msm-bus,num-paths = <1>;
721 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
722 <81 512 1046 3200>, /* 400 KB/s*/
723 <81 512 52286 160000>, /* 20 MB/s */
724 <81 512 65360 200000>, /* 25 MB/s */
725 <81 512 130718 400000>, /* 50 MB/s */
726 <81 512 261438 800000>, /* 100 MB/s */
727 <81 512 261438 800000>, /* 200 MB/s */
728 <81 512 1338562 4096000>; /* Max. bandwidth */
729 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
730 100000000 200000000 4294967295>;
731
732 qcom,large-address-bus;
733 status = "disabled";
734 };
735
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530736 spmi_bus: qcom,spmi@200f000 {
737 compatible = "qcom,spmi-pmic-arb";
738 reg = <0x200f000 0x1000>,
739 <0x2400000 0x800000>,
740 <0x2c00000 0x800000>,
741 <0x3800000 0x200000>,
742 <0x200a000 0x2100>;
743 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
744 interrupt-names = "periph_irq";
745 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
746 qcom,ee = <0>;
747 qcom,channel = <0>;
Kiran Gunda90e356a2017-11-22 17:04:46 +0530748 #address-cells = <2>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530749 #size-cells = <0>;
750 interrupt-controller;
Kiran Gunda90e356a2017-11-22 17:04:46 +0530751 #interrupt-cells = <4>;
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530752 cell-index = <0>;
753 };
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530754};