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Mike Turquette9d9f78e2012-03-15 23:11:20 -07001/*
2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adjustable divider clock implementation
11 */
12
13#include <linux/clk-provider.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/io.h>
17#include <linux/err.h>
18#include <linux/string.h>
James Hogan1a3cd182013-01-15 10:28:05 +000019#include <linux/log2.h>
Mike Turquette9d9f78e2012-03-15 23:11:20 -070020
21/*
22 * DOC: basic adjustable divider clock that cannot gate
23 *
24 * Traits of this clock:
25 * prepare - clk_prepare only ensures that parents are prepared
26 * enable - clk_enable only ensures that parents are enabled
Brian Norris9556f9d2015-04-13 16:03:21 -070027 * rate - rate is adjustable. clk->rate = ceiling(parent->rate / divisor)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070028 * parent - fixed parent. No clk_set_parent support
29 */
30
Stephen Boydbca96902015-01-19 18:05:29 -080031#define div_mask(width) ((1 << (width)) - 1)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053032
Stephen Boydfab88ca2015-11-30 17:31:38 -080033static unsigned int _get_table_maxdiv(const struct clk_div_table *table,
34 u8 width)
Rajendra Nayak357c3f02012-06-29 19:06:32 +053035{
Stephen Boydfab88ca2015-11-30 17:31:38 -080036 unsigned int maxdiv = 0, mask = div_mask(width);
Rajendra Nayak357c3f02012-06-29 19:06:32 +053037 const struct clk_div_table *clkt;
38
39 for (clkt = table; clkt->div; clkt++)
Stephen Boydfab88ca2015-11-30 17:31:38 -080040 if (clkt->div > maxdiv && clkt->val <= mask)
Rajendra Nayak357c3f02012-06-29 19:06:32 +053041 maxdiv = clkt->div;
42 return maxdiv;
43}
44
Maxime COQUELIN774b5142014-01-29 17:24:07 +010045static unsigned int _get_table_mindiv(const struct clk_div_table *table)
46{
47 unsigned int mindiv = UINT_MAX;
48 const struct clk_div_table *clkt;
49
50 for (clkt = table; clkt->div; clkt++)
51 if (clkt->div < mindiv)
52 mindiv = clkt->div;
53 return mindiv;
54}
55
Stephen Boydbca96902015-01-19 18:05:29 -080056static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
57 unsigned long flags)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053058{
Stephen Boydbca96902015-01-19 18:05:29 -080059 if (flags & CLK_DIVIDER_ONE_BASED)
60 return div_mask(width);
61 if (flags & CLK_DIVIDER_POWER_OF_TWO)
62 return 1 << div_mask(width);
63 if (table)
Stephen Boydfab88ca2015-11-30 17:31:38 -080064 return _get_table_maxdiv(table, width);
Stephen Boydbca96902015-01-19 18:05:29 -080065 return div_mask(width) + 1;
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053066}
67
Rajendra Nayak357c3f02012-06-29 19:06:32 +053068static unsigned int _get_table_div(const struct clk_div_table *table,
69 unsigned int val)
70{
71 const struct clk_div_table *clkt;
72
73 for (clkt = table; clkt->div; clkt++)
74 if (clkt->val == val)
75 return clkt->div;
76 return 0;
77}
78
Stephen Boydbca96902015-01-19 18:05:29 -080079static unsigned int _get_div(const struct clk_div_table *table,
Jim Quinlanafe76c8f2015-05-15 15:45:47 -040080 unsigned int val, unsigned long flags, u8 width)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053081{
Stephen Boydbca96902015-01-19 18:05:29 -080082 if (flags & CLK_DIVIDER_ONE_BASED)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053083 return val;
Stephen Boydbca96902015-01-19 18:05:29 -080084 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053085 return 1 << val;
Jim Quinlanafe76c8f2015-05-15 15:45:47 -040086 if (flags & CLK_DIVIDER_MAX_AT_ZERO)
87 return val ? val : div_mask(width) + 1;
Stephen Boydbca96902015-01-19 18:05:29 -080088 if (table)
89 return _get_table_div(table, val);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053090 return val + 1;
91}
92
Rajendra Nayak357c3f02012-06-29 19:06:32 +053093static unsigned int _get_table_val(const struct clk_div_table *table,
94 unsigned int div)
95{
96 const struct clk_div_table *clkt;
97
98 for (clkt = table; clkt->div; clkt++)
99 if (clkt->div == div)
100 return clkt->val;
101 return 0;
102}
103
Stephen Boydbca96902015-01-19 18:05:29 -0800104static unsigned int _get_val(const struct clk_div_table *table,
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400105 unsigned int div, unsigned long flags, u8 width)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530106{
Stephen Boydbca96902015-01-19 18:05:29 -0800107 if (flags & CLK_DIVIDER_ONE_BASED)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530108 return div;
Stephen Boydbca96902015-01-19 18:05:29 -0800109 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530110 return __ffs(div);
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400111 if (flags & CLK_DIVIDER_MAX_AT_ZERO)
112 return (div == div_mask(width) + 1) ? 0 : div;
Stephen Boydbca96902015-01-19 18:05:29 -0800113 if (table)
114 return _get_table_val(table, div);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530115 return div - 1;
116}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700117
Stephen Boydbca96902015-01-19 18:05:29 -0800118unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
119 unsigned int val,
120 const struct clk_div_table *table,
121 unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700122{
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400123 struct clk_divider *divider = to_clk_divider(hw);
Stephen Boydbca96902015-01-19 18:05:29 -0800124 unsigned int div;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700125
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400126 div = _get_div(table, val, flags, divider->width);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530127 if (!div) {
Stephen Boydbca96902015-01-19 18:05:29 -0800128 WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
Soren Brinkmann056b20532013-04-02 15:36:56 -0700129 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
Stephen Boyd2f508a92015-07-30 17:20:57 -0700130 clk_hw_get_name(hw));
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530131 return parent_rate;
132 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700133
Brian Norris9556f9d2015-04-13 16:03:21 -0700134 return DIV_ROUND_UP_ULL((u64)parent_rate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700135}
Stephen Boydbca96902015-01-19 18:05:29 -0800136EXPORT_SYMBOL_GPL(divider_recalc_rate);
137
138static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
139 unsigned long parent_rate)
140{
141 struct clk_divider *divider = to_clk_divider(hw);
142 unsigned int val;
143
144 val = clk_readl(divider->reg) >> divider->shift;
145 val &= div_mask(divider->width);
146
147 return divider_recalc_rate(hw, parent_rate, val, divider->table,
148 divider->flags);
149}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700150
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530151static bool _is_valid_table_div(const struct clk_div_table *table,
152 unsigned int div)
153{
154 const struct clk_div_table *clkt;
155
156 for (clkt = table; clkt->div; clkt++)
157 if (clkt->div == div)
158 return true;
159 return false;
160}
161
Stephen Boydbca96902015-01-19 18:05:29 -0800162static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
163 unsigned long flags)
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530164{
Stephen Boydbca96902015-01-19 18:05:29 -0800165 if (flags & CLK_DIVIDER_POWER_OF_TWO)
James Hogan1a3cd182013-01-15 10:28:05 +0000166 return is_power_of_2(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800167 if (table)
168 return _is_valid_table_div(table, div);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530169 return true;
170}
171
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100172static int _round_up_table(const struct clk_div_table *table, int div)
173{
174 const struct clk_div_table *clkt;
Maxime COQUELINfe52e752014-05-07 18:48:52 +0200175 int up = INT_MAX;
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100176
177 for (clkt = table; clkt->div; clkt++) {
178 if (clkt->div == div)
179 return clkt->div;
180 else if (clkt->div < div)
181 continue;
182
183 if ((clkt->div - div) < (up - div))
184 up = clkt->div;
185 }
186
187 return up;
188}
189
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100190static int _round_down_table(const struct clk_div_table *table, int div)
191{
192 const struct clk_div_table *clkt;
193 int down = _get_table_mindiv(table);
194
195 for (clkt = table; clkt->div; clkt++) {
196 if (clkt->div == div)
197 return clkt->div;
198 else if (clkt->div > div)
199 continue;
200
201 if ((div - clkt->div) < (div - down))
202 down = clkt->div;
203 }
204
205 return down;
206}
207
Stephen Boydbca96902015-01-19 18:05:29 -0800208static int _div_round_up(const struct clk_div_table *table,
209 unsigned long parent_rate, unsigned long rate,
210 unsigned long flags)
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100211{
Brian Norris9556f9d2015-04-13 16:03:21 -0700212 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100213
Stephen Boydbca96902015-01-19 18:05:29 -0800214 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100215 div = __roundup_pow_of_two(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800216 if (table)
217 div = _round_up_table(table, div);
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100218
219 return div;
220}
221
Stephen Boydbca96902015-01-19 18:05:29 -0800222static int _div_round_closest(const struct clk_div_table *table,
223 unsigned long parent_rate, unsigned long rate,
224 unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100225{
Uwe Kleine-König93155142015-02-21 11:40:25 +0100226 int up, down;
Uwe Kleine-König26bac952015-02-21 11:40:24 +0100227 unsigned long up_rate, down_rate;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100228
Brian Norris9556f9d2015-04-13 16:03:21 -0700229 up = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
Uwe Kleine-König93155142015-02-21 11:40:25 +0100230 down = parent_rate / rate;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100231
Stephen Boydbca96902015-01-19 18:05:29 -0800232 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
Uwe Kleine-König93155142015-02-21 11:40:25 +0100233 up = __roundup_pow_of_two(up);
234 down = __rounddown_pow_of_two(down);
Stephen Boydbca96902015-01-19 18:05:29 -0800235 } else if (table) {
Uwe Kleine-König93155142015-02-21 11:40:25 +0100236 up = _round_up_table(table, up);
237 down = _round_down_table(table, down);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100238 }
239
Brian Norris9556f9d2015-04-13 16:03:21 -0700240 up_rate = DIV_ROUND_UP_ULL((u64)parent_rate, up);
241 down_rate = DIV_ROUND_UP_ULL((u64)parent_rate, down);
Uwe Kleine-König26bac952015-02-21 11:40:24 +0100242
243 return (rate - up_rate) <= (down_rate - rate) ? up : down;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100244}
245
Stephen Boydbca96902015-01-19 18:05:29 -0800246static int _div_round(const struct clk_div_table *table,
247 unsigned long parent_rate, unsigned long rate,
248 unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100249{
Stephen Boydbca96902015-01-19 18:05:29 -0800250 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
251 return _div_round_closest(table, parent_rate, rate, flags);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100252
Stephen Boydbca96902015-01-19 18:05:29 -0800253 return _div_round_up(table, parent_rate, rate, flags);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100254}
255
Stephen Boydbca96902015-01-19 18:05:29 -0800256static bool _is_best_div(unsigned long rate, unsigned long now,
257 unsigned long best, unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100258{
Stephen Boydbca96902015-01-19 18:05:29 -0800259 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100260 return abs(rate - now) < abs(rate - best);
Vicky Wallace9c866bb2017-05-05 12:21:28 -0700261 else if (flags & CLK_DIVIDER_ROUND_KHZ)
262 return (DIV_ROUND_CLOSEST(abs(rate - now), 1000)
263 < DIV_ROUND_CLOSEST(abs(rate - best), 1000));
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100264
265 return now <= rate && now > best;
266}
267
Stephen Boydbca96902015-01-19 18:05:29 -0800268static int _next_div(const struct clk_div_table *table, int div,
269 unsigned long flags)
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100270{
271 div++;
272
Stephen Boydbca96902015-01-19 18:05:29 -0800273 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100274 return __roundup_pow_of_two(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800275 if (table)
276 return _round_up_table(table, div);
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100277
278 return div;
279}
280
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700281static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
Stephen Boydbca96902015-01-19 18:05:29 -0800282 unsigned long *best_parent_rate,
283 const struct clk_div_table *table, u8 width,
284 unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700285{
Deepak Katragaddaf424e012017-07-14 11:38:35 -0700286 struct clk_hw *parent = clk_hw_get_parent(hw);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700287 int i, bestdiv = 0;
288 unsigned long parent_rate, best = 0, now, maxdiv;
Shawn Guo081c9022013-06-02 22:20:55 +0800289 unsigned long parent_rate_saved = *best_parent_rate;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700290
Deepak Katragaddaf424e012017-07-14 11:38:35 -0700291 if (!parent)
292 return -EINVAL;
293
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700294 if (!rate)
295 rate = 1;
296
Stephen Boydbca96902015-01-19 18:05:29 -0800297 maxdiv = _get_maxdiv(table, width, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700298
Stephen Boyd98d8a602015-06-29 16:56:30 -0700299 if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
Shawn Guo81536e02012-04-12 20:50:17 +0800300 parent_rate = *best_parent_rate;
Stephen Boydbca96902015-01-19 18:05:29 -0800301 bestdiv = _div_round(table, parent_rate, rate, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700302 bestdiv = bestdiv == 0 ? 1 : bestdiv;
303 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
304 return bestdiv;
305 }
306
307 /*
308 * The maximum divider we can use without overflowing
309 * unsigned long in rate * i below
310 */
311 maxdiv = min(ULONG_MAX / rate, maxdiv);
312
Masahiro Yamada653d1452016-01-05 12:43:41 +0900313 for (i = _next_div(table, 0, flags); i <= maxdiv;
314 i = _next_div(table, i, flags)) {
Shawn Guo081c9022013-06-02 22:20:55 +0800315 if (rate * i == parent_rate_saved) {
316 /*
317 * It's the most ideal case if the requested rate can be
318 * divided from parent clock without needing to change
319 * parent rate, so return the divider immediately.
320 */
321 *best_parent_rate = parent_rate_saved;
322 return i;
323 }
Deepak Katragaddaf424e012017-07-14 11:38:35 -0700324 parent_rate = clk_hw_round_rate(parent, rate * i);
Brian Norris9556f9d2015-04-13 16:03:21 -0700325 now = DIV_ROUND_UP_ULL((u64)parent_rate, i);
Stephen Boydbca96902015-01-19 18:05:29 -0800326 if (_is_best_div(rate, now, best, flags)) {
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700327 bestdiv = i;
328 best = now;
329 *best_parent_rate = parent_rate;
330 }
331 }
332
333 if (!bestdiv) {
Stephen Boydbca96902015-01-19 18:05:29 -0800334 bestdiv = _get_maxdiv(table, width, flags);
Deepak Katragaddaf424e012017-07-14 11:38:35 -0700335 *best_parent_rate = clk_hw_round_rate(parent, 1);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700336 }
337
338 return bestdiv;
339}
340
Stephen Boydbca96902015-01-19 18:05:29 -0800341long divider_round_rate(struct clk_hw *hw, unsigned long rate,
342 unsigned long *prate, const struct clk_div_table *table,
343 u8 width, unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700344{
345 int div;
Stephen Boydbca96902015-01-19 18:05:29 -0800346
347 div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700348
Brian Norris9556f9d2015-04-13 16:03:21 -0700349 return DIV_ROUND_UP_ULL((u64)*prate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700350}
Stephen Boydbca96902015-01-19 18:05:29 -0800351EXPORT_SYMBOL_GPL(divider_round_rate);
352
353static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
354 unsigned long *prate)
355{
356 struct clk_divider *divider = to_clk_divider(hw);
357 int bestdiv;
358
359 /* if read only, just return current value */
360 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
Geert Uytterhoeven2cf9a572016-08-12 14:37:54 +0200361 bestdiv = clk_readl(divider->reg) >> divider->shift;
Stephen Boydbca96902015-01-19 18:05:29 -0800362 bestdiv &= div_mask(divider->width);
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400363 bestdiv = _get_div(divider->table, bestdiv, divider->flags,
364 divider->width);
Brian Norris9556f9d2015-04-13 16:03:21 -0700365 return DIV_ROUND_UP_ULL((u64)*prate, bestdiv);
Stephen Boydbca96902015-01-19 18:05:29 -0800366 }
367
368 return divider_round_rate(hw, rate, prate, divider->table,
369 divider->width, divider->flags);
370}
371
372int divider_get_val(unsigned long rate, unsigned long parent_rate,
373 const struct clk_div_table *table, u8 width,
374 unsigned long flags)
375{
376 unsigned int div, value;
377
Brian Norris9556f9d2015-04-13 16:03:21 -0700378 div = DIV_ROUND_UP_ULL((u64)parent_rate, rate);
Stephen Boydbca96902015-01-19 18:05:29 -0800379
380 if (!_is_valid_div(table, div, flags))
381 return -EINVAL;
382
Jim Quinlanafe76c8f2015-05-15 15:45:47 -0400383 value = _get_val(table, div, flags, width);
Stephen Boydbca96902015-01-19 18:05:29 -0800384
385 return min_t(unsigned int, value, div_mask(width));
386}
387EXPORT_SYMBOL_GPL(divider_get_val);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700388
Shawn Guo1c0035d2012-04-12 20:50:18 +0800389static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
390 unsigned long parent_rate)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700391{
392 struct clk_divider *divider = to_clk_divider(hw);
Stephen Boydbca96902015-01-19 18:05:29 -0800393 unsigned int value;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700394 unsigned long flags = 0;
395 u32 val;
396
Stephen Boydbca96902015-01-19 18:05:29 -0800397 value = divider_get_val(rate, parent_rate, divider->table,
398 divider->width, divider->flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700399
400 if (divider->lock)
401 spin_lock_irqsave(divider->lock, flags);
Stephen Boyd661e2182015-07-24 12:21:12 -0700402 else
403 __acquire(divider->lock);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700404
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800405 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
Stephen Boydbca96902015-01-19 18:05:29 -0800406 val = div_mask(divider->width) << (divider->shift + 16);
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800407 } else {
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200408 val = clk_readl(divider->reg);
Stephen Boydbca96902015-01-19 18:05:29 -0800409 val &= ~(div_mask(divider->width) << divider->shift);
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800410 }
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530411 val |= value << divider->shift;
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200412 clk_writel(val, divider->reg);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700413
414 if (divider->lock)
415 spin_unlock_irqrestore(divider->lock, flags);
Stephen Boyd661e2182015-07-24 12:21:12 -0700416 else
417 __release(divider->lock);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700418
419 return 0;
420}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700421
Shawn Guo822c2502012-03-27 15:23:22 +0800422const struct clk_ops clk_divider_ops = {
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700423 .recalc_rate = clk_divider_recalc_rate,
424 .round_rate = clk_divider_round_rate,
425 .set_rate = clk_divider_set_rate,
426};
427EXPORT_SYMBOL_GPL(clk_divider_ops);
428
Heiko Stuebner50359812016-01-21 21:53:09 +0100429const struct clk_ops clk_divider_ro_ops = {
430 .recalc_rate = clk_divider_recalc_rate,
431 .round_rate = clk_divider_round_rate,
432};
433EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
434
Stephen Boydeb7d2642016-02-06 23:26:37 -0800435static struct clk_hw *_register_divider(struct device *dev, const char *name,
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700436 const char *parent_name, unsigned long flags,
437 void __iomem *reg, u8 shift, u8 width,
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530438 u8 clk_divider_flags, const struct clk_div_table *table,
439 spinlock_t *lock)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700440{
441 struct clk_divider *div;
Stephen Boydeb7d2642016-02-06 23:26:37 -0800442 struct clk_hw *hw;
Stephen Boyd5cb05a12016-05-16 11:05:16 +0530443 struct clk_init_data init = {};
Stephen Boydeb7d2642016-02-06 23:26:37 -0800444 int ret;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700445
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800446 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
447 if (width + shift > 16) {
448 pr_warn("divider value exceeds LOWORD field\n");
449 return ERR_PTR(-EINVAL);
450 }
451 }
452
Mike Turquette27d54592012-03-26 17:51:03 -0700453 /* allocate the divider */
Stephen Boydd122db72015-05-14 16:47:10 -0700454 div = kzalloc(sizeof(*div), GFP_KERNEL);
455 if (!div)
Mike Turquette27d54592012-03-26 17:51:03 -0700456 return ERR_PTR(-ENOMEM);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700457
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700458 init.name = name;
Heiko Stuebner50359812016-01-21 21:53:09 +0100459 if (clk_divider_flags & CLK_DIVIDER_READ_ONLY)
460 init.ops = &clk_divider_ro_ops;
461 else
462 init.ops = &clk_divider_ops;
Rajendra Nayakf7d8caa2012-06-01 14:02:47 +0530463 init.flags = flags | CLK_IS_BASIC;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700464 init.parent_names = (parent_name ? &parent_name: NULL);
465 init.num_parents = (parent_name ? 1 : 0);
466
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700467 /* struct clk_divider assignments */
468 div->reg = reg;
469 div->shift = shift;
470 div->width = width;
471 div->flags = clk_divider_flags;
472 div->lock = lock;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700473 div->hw.init = &init;
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530474 div->table = table;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700475
Mike Turquette27d54592012-03-26 17:51:03 -0700476 /* register the clock */
Stephen Boydeb7d2642016-02-06 23:26:37 -0800477 hw = &div->hw;
478 ret = clk_hw_register(dev, hw);
479 if (ret) {
Mike Turquette27d54592012-03-26 17:51:03 -0700480 kfree(div);
Stephen Boydeb7d2642016-02-06 23:26:37 -0800481 hw = ERR_PTR(ret);
482 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700483
Stephen Boydeb7d2642016-02-06 23:26:37 -0800484 return hw;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700485}
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530486
487/**
488 * clk_register_divider - register a divider clock with the clock framework
489 * @dev: device registering this clock
490 * @name: name of this clock
491 * @parent_name: name of clock's parent
492 * @flags: framework-specific flags
493 * @reg: register address to adjust divider
494 * @shift: number of bits to shift the bitfield
495 * @width: width of the bitfield
496 * @clk_divider_flags: divider-specific flags for this clock
497 * @lock: shared register lock for this clock
498 */
499struct clk *clk_register_divider(struct device *dev, const char *name,
500 const char *parent_name, unsigned long flags,
501 void __iomem *reg, u8 shift, u8 width,
502 u8 clk_divider_flags, spinlock_t *lock)
503{
Stephen Boydeb7d2642016-02-06 23:26:37 -0800504 struct clk_hw *hw;
505
506 hw = _register_divider(dev, name, parent_name, flags, reg, shift,
507 width, clk_divider_flags, NULL, lock);
508 if (IS_ERR(hw))
509 return ERR_CAST(hw);
510 return hw->clk;
511}
512EXPORT_SYMBOL_GPL(clk_register_divider);
513
514/**
515 * clk_hw_register_divider - register a divider clock with the clock framework
516 * @dev: device registering this clock
517 * @name: name of this clock
518 * @parent_name: name of clock's parent
519 * @flags: framework-specific flags
520 * @reg: register address to adjust divider
521 * @shift: number of bits to shift the bitfield
522 * @width: width of the bitfield
523 * @clk_divider_flags: divider-specific flags for this clock
524 * @lock: shared register lock for this clock
525 */
526struct clk_hw *clk_hw_register_divider(struct device *dev, const char *name,
527 const char *parent_name, unsigned long flags,
528 void __iomem *reg, u8 shift, u8 width,
529 u8 clk_divider_flags, spinlock_t *lock)
530{
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530531 return _register_divider(dev, name, parent_name, flags, reg, shift,
532 width, clk_divider_flags, NULL, lock);
533}
Stephen Boydeb7d2642016-02-06 23:26:37 -0800534EXPORT_SYMBOL_GPL(clk_hw_register_divider);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530535
536/**
537 * clk_register_divider_table - register a table based divider clock with
538 * the clock framework
539 * @dev: device registering this clock
540 * @name: name of this clock
541 * @parent_name: name of clock's parent
542 * @flags: framework-specific flags
543 * @reg: register address to adjust divider
544 * @shift: number of bits to shift the bitfield
545 * @width: width of the bitfield
546 * @clk_divider_flags: divider-specific flags for this clock
547 * @table: array of divider/value pairs ending with a div set to 0
548 * @lock: shared register lock for this clock
549 */
550struct clk *clk_register_divider_table(struct device *dev, const char *name,
551 const char *parent_name, unsigned long flags,
552 void __iomem *reg, u8 shift, u8 width,
553 u8 clk_divider_flags, const struct clk_div_table *table,
554 spinlock_t *lock)
555{
Stephen Boydeb7d2642016-02-06 23:26:37 -0800556 struct clk_hw *hw;
557
558 hw = _register_divider(dev, name, parent_name, flags, reg, shift,
559 width, clk_divider_flags, table, lock);
560 if (IS_ERR(hw))
561 return ERR_CAST(hw);
562 return hw->clk;
563}
564EXPORT_SYMBOL_GPL(clk_register_divider_table);
565
566/**
567 * clk_hw_register_divider_table - register a table based divider clock with
568 * the clock framework
569 * @dev: device registering this clock
570 * @name: name of this clock
571 * @parent_name: name of clock's parent
572 * @flags: framework-specific flags
573 * @reg: register address to adjust divider
574 * @shift: number of bits to shift the bitfield
575 * @width: width of the bitfield
576 * @clk_divider_flags: divider-specific flags for this clock
577 * @table: array of divider/value pairs ending with a div set to 0
578 * @lock: shared register lock for this clock
579 */
580struct clk_hw *clk_hw_register_divider_table(struct device *dev,
581 const char *name, const char *parent_name, unsigned long flags,
582 void __iomem *reg, u8 shift, u8 width,
583 u8 clk_divider_flags, const struct clk_div_table *table,
584 spinlock_t *lock)
585{
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530586 return _register_divider(dev, name, parent_name, flags, reg, shift,
587 width, clk_divider_flags, table, lock);
588}
Stephen Boydeb7d2642016-02-06 23:26:37 -0800589EXPORT_SYMBOL_GPL(clk_hw_register_divider_table);
Krzysztof Kozlowski4e3c0212015-01-05 10:52:40 +0100590
591void clk_unregister_divider(struct clk *clk)
592{
593 struct clk_divider *div;
594 struct clk_hw *hw;
595
596 hw = __clk_get_hw(clk);
597 if (!hw)
598 return;
599
600 div = to_clk_divider(hw);
601
602 clk_unregister(clk);
603 kfree(div);
604}
605EXPORT_SYMBOL_GPL(clk_unregister_divider);
Stephen Boydeb7d2642016-02-06 23:26:37 -0800606
607/**
608 * clk_hw_unregister_divider - unregister a clk divider
609 * @hw: hardware-specific clock data to unregister
610 */
611void clk_hw_unregister_divider(struct clk_hw *hw)
612{
613 struct clk_divider *div;
614
615 div = to_clk_divider(hw);
616
617 clk_hw_unregister(hw);
618 kfree(div);
619}
620EXPORT_SYMBOL_GPL(clk_hw_unregister_divider);