Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (C) 2000-2008 Alacritech, Inc. All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above |
| 12 | * copyright notice, this list of conditions and the following |
| 13 | * disclaimer in the documentation and/or other materials provided |
| 14 | * with the distribution. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY |
| 17 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
| 19 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |
| 21 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |
| 22 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 24 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| 25 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT |
| 26 | * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | * |
| 29 | * The views and conclusions contained in the software and documentation |
| 30 | * are those of the authors and should not be interpreted as representing |
| 31 | * official policies, either expressed or implied, of Alacritech, Inc. |
| 32 | * |
| 33 | **************************************************************************/ |
| 34 | |
| 35 | /* |
| 36 | * FILENAME: sxg.c |
| 37 | * |
| 38 | * The SXG driver for Alacritech's 10Gbe products. |
| 39 | * |
| 40 | * NOTE: This is the standard, non-accelerated version of Alacritech's |
| 41 | * IS-NIC driver. |
| 42 | */ |
| 43 | |
| 44 | #include <linux/kernel.h> |
| 45 | #include <linux/string.h> |
| 46 | #include <linux/errno.h> |
| 47 | #include <linux/module.h> |
| 48 | #include <linux/moduleparam.h> |
| 49 | #include <linux/ioport.h> |
| 50 | #include <linux/slab.h> |
| 51 | #include <linux/interrupt.h> |
| 52 | #include <linux/timer.h> |
| 53 | #include <linux/pci.h> |
| 54 | #include <linux/spinlock.h> |
| 55 | #include <linux/init.h> |
| 56 | #include <linux/netdevice.h> |
| 57 | #include <linux/etherdevice.h> |
| 58 | #include <linux/ethtool.h> |
| 59 | #include <linux/skbuff.h> |
| 60 | #include <linux/delay.h> |
| 61 | #include <linux/types.h> |
| 62 | #include <linux/dma-mapping.h> |
| 63 | #include <linux/mii.h> |
| 64 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 65 | #define SLIC_GET_STATS_ENABLED 0 |
| 66 | #define LINUX_FREES_ADAPTER_RESOURCES 1 |
| 67 | #define SXG_OFFLOAD_IP_CHECKSUM 0 |
| 68 | #define SXG_POWER_MANAGEMENT_ENABLED 0 |
| 69 | #define VPCI 0 |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 70 | #define ATK_DEBUG 1 |
| 71 | |
| 72 | #include "sxg_os.h" |
| 73 | #include "sxghw.h" |
| 74 | #include "sxghif.h" |
| 75 | #include "sxg.h" |
| 76 | #include "sxgdbg.h" |
| 77 | |
| 78 | #include "sxgphycode.h" |
| 79 | #include "saharadbgdownload.h" |
| 80 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 81 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, u32 Size, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 82 | enum sxg_buffer_type BufferType); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 83 | static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
| 84 | void *RcvBlock, |
| 85 | dma_addr_t PhysicalAddress, |
| 86 | u32 Length); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 87 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 88 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 89 | dma_addr_t PhysicalAddress, |
| 90 | u32 Length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 91 | |
| 92 | static void sxg_mcast_init_crc32(void); |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 93 | static int sxg_entry_open(struct net_device *dev); |
| 94 | static int sxg_entry_halt(struct net_device *dev); |
| 95 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
| 96 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 97 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 98 | static void sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
| 99 | struct sxg_scatter_gather *SxgSgl); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 100 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 101 | static void sxg_handle_interrupt(struct adapter_t *adapter); |
| 102 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId); |
| 103 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId); |
| 104 | static void sxg_complete_slow_send(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 105 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 106 | struct sxg_event *Event); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 107 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus); |
| 108 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 109 | struct ether_header *EtherHdr, ushort length); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 110 | |
| 111 | #if SLIC_GET_STATS_ENABLED |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 112 | static struct net_device_stats *sxg_get_stats(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 113 | #endif |
| 114 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 115 | void SxgFreeResources(struct adapter_t *adapter); |
| 116 | void SxgFreeRcvBlocks(struct adapter_t *adapter); |
| 117 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 118 | #define XXXTODO 0 |
| 119 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 120 | static int sxg_mac_set_address(struct net_device *dev, void *ptr); |
| 121 | static void sxg_mcast_set_list(struct net_device *dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 122 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 123 | static void sxg_adapter_set_hwaddr(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 124 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 125 | static void sxg_unmap_mmio_space(struct adapter_t *adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 126 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 127 | static int sxg_initialize_adapter(struct adapter_t *adapter); |
| 128 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter); |
| 129 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 130 | unsigned char Index); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 131 | static int sxg_initialize_link(struct adapter_t *adapter); |
| 132 | static int sxg_phy_init(struct adapter_t *adapter); |
| 133 | static void sxg_link_event(struct adapter_t *adapter); |
| 134 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 135 | static void sxg_link_state(struct adapter_t *adapter, |
| 136 | enum SXG_LINK_STATE LinkState); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 137 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 138 | u32 DevAddr, u32 RegAddr, u32 Value); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 139 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 140 | u32 DevAddr, u32 RegAddr, u32 *pValue); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 141 | |
| 142 | static unsigned int sxg_first_init = 1; |
| 143 | static char *sxg_banner = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 144 | "Alacritech SLIC Technology(tm) Server and Storage \ |
| 145 | 10Gbe Accelerator (Non-Accelerated)\n"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 146 | |
| 147 | static int sxg_debug = 1; |
| 148 | static int debug = -1; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 149 | static struct net_device *head_netdevice = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 150 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 151 | static struct sxgbase_driver sxg_global = { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 152 | .dynamic_intagg = 1, |
| 153 | }; |
| 154 | static int intagg_delay = 100; |
| 155 | static u32 dynamic_intagg = 0; |
| 156 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame^] | 157 | char sxg_driver_name[] = "sxg"; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 158 | #define DRV_AUTHOR "Alacritech, Inc. Engineering" |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 159 | #define DRV_DESCRIPTION \ |
| 160 | "Alacritech SLIC Techonology(tm) Non-Accelerated 10Gbe Driver" |
| 161 | #define DRV_COPYRIGHT \ |
| 162 | "Copyright 2000-2008 Alacritech, Inc. All rights reserved." |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 163 | |
| 164 | MODULE_AUTHOR(DRV_AUTHOR); |
| 165 | MODULE_DESCRIPTION(DRV_DESCRIPTION); |
| 166 | MODULE_LICENSE("GPL"); |
| 167 | |
| 168 | module_param(dynamic_intagg, int, 0); |
| 169 | MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); |
| 170 | module_param(intagg_delay, int, 0); |
| 171 | MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); |
| 172 | |
| 173 | static struct pci_device_id sxg_pci_tbl[] __devinitdata = { |
| 174 | {PCI_DEVICE(SXG_VENDOR_ID, SXG_DEVICE_ID)}, |
| 175 | {0,} |
| 176 | }; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 177 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 178 | MODULE_DEVICE_TABLE(pci, sxg_pci_tbl); |
| 179 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 180 | static inline void sxg_reg32_write(void __iomem *reg, u32 value, bool flush) |
| 181 | { |
| 182 | writel(value, reg); |
| 183 | if (flush) |
| 184 | mb(); |
| 185 | } |
| 186 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 187 | static inline void sxg_reg64_write(struct adapter_t *adapter, void __iomem *reg, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 188 | u64 value, u32 cpu) |
| 189 | { |
| 190 | u32 value_high = (u32) (value >> 32); |
| 191 | u32 value_low = (u32) (value & 0x00000000FFFFFFFF); |
| 192 | unsigned long flags; |
| 193 | |
| 194 | spin_lock_irqsave(&adapter->Bit64RegLock, flags); |
| 195 | writel(value_high, (void __iomem *)(&adapter->UcodeRegs[cpu].Upper)); |
| 196 | writel(value_low, reg); |
| 197 | spin_unlock_irqrestore(&adapter->Bit64RegLock, flags); |
| 198 | } |
| 199 | |
| 200 | static void sxg_init_driver(void) |
| 201 | { |
| 202 | if (sxg_first_init) { |
| 203 | DBG_ERROR("sxg: %s sxg_first_init set jiffies[%lx]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 204 | __func__, jiffies); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 205 | sxg_first_init = 0; |
| 206 | spin_lock_init(&sxg_global.driver_lock); |
| 207 | } |
| 208 | } |
| 209 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 210 | static void sxg_dbg_macaddrs(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 211 | { |
| 212 | DBG_ERROR(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 213 | adapter->netdev->name, adapter->currmacaddr[0], |
| 214 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 215 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 216 | adapter->currmacaddr[5]); |
| 217 | DBG_ERROR(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
| 218 | adapter->netdev->name, adapter->macaddr[0], |
| 219 | adapter->macaddr[1], adapter->macaddr[2], |
| 220 | adapter->macaddr[3], adapter->macaddr[4], |
| 221 | adapter->macaddr[5]); |
| 222 | return; |
| 223 | } |
| 224 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 225 | /* SXG Globals */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 226 | static struct sxg_driver SxgDriver; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 227 | |
| 228 | #ifdef ATKDBG |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 229 | static struct sxg_trace_buffer LSxgTraceBuffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 230 | #endif /* ATKDBG */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 231 | static struct sxg_trace_buffer *SxgTraceBuffer = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 232 | |
| 233 | /* |
| 234 | * sxg_download_microcode |
| 235 | * |
| 236 | * Download Microcode to Sahara adapter |
| 237 | * |
| 238 | * Arguments - |
| 239 | * adapter - A pointer to our adapter structure |
| 240 | * UcodeSel - microcode file selection |
| 241 | * |
| 242 | * Return |
| 243 | * int |
| 244 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 245 | static bool sxg_download_microcode(struct adapter_t *adapter, |
| 246 | enum SXG_UCODE_SEL UcodeSel) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 247 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 248 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 249 | u32 Section; |
| 250 | u32 ThisSectionSize; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 251 | u32 *Instruction = NULL; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 252 | u32 BaseAddress, AddressOffset, Address; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 253 | /* u32 Failure; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 254 | u32 ValueRead; |
| 255 | u32 i; |
| 256 | u32 numSections = 0; |
| 257 | u32 sectionSize[16]; |
| 258 | u32 sectionStart[16]; |
| 259 | |
| 260 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DnldUcod", |
| 261 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 262 | DBG_ERROR("sxg: %s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 263 | |
| 264 | switch (UcodeSel) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 265 | case SXG_UCODE_SAHARA: /* Sahara operational ucode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 266 | numSections = SNumSections; |
| 267 | for (i = 0; i < numSections; i++) { |
| 268 | sectionSize[i] = SSectionSize[i]; |
| 269 | sectionStart[i] = SSectionStart[i]; |
| 270 | } |
| 271 | break; |
| 272 | default: |
| 273 | printk(KERN_ERR KBUILD_MODNAME |
| 274 | ": Woah, big error with the microcode!\n"); |
| 275 | break; |
| 276 | } |
| 277 | |
| 278 | DBG_ERROR("sxg: RESET THE CARD\n"); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 279 | /* First, reset the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 280 | WRITE_REG(HwRegs->Reset, 0xDEAD, FLUSH); |
| 281 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 282 | /* |
| 283 | * Download each section of the microcode as specified in |
| 284 | * its download file. The *download.c file is generated using |
| 285 | * the saharaobjtoc facility which converts the metastep .obj |
| 286 | * file to a .c file which contains a two dimentional array. |
| 287 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 288 | for (Section = 0; Section < numSections; Section++) { |
| 289 | DBG_ERROR("sxg: SECTION # %d\n", Section); |
| 290 | switch (UcodeSel) { |
| 291 | case SXG_UCODE_SAHARA: |
| 292 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 293 | break; |
| 294 | default: |
| 295 | ASSERT(0); |
| 296 | break; |
| 297 | } |
| 298 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 299 | /* Size in instructions */ |
| 300 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 301 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 302 | AddressOffset++) { |
| 303 | Address = BaseAddress + AddressOffset; |
| 304 | ASSERT((Address & ~MICROCODE_ADDRESS_MASK) == 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 305 | /* Write instruction bits 31 - 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 306 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 307 | /* Write instruction bits 63-32 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 308 | WRITE_REG(HwRegs->UcodeDataMiddle, *(Instruction + 1), |
| 309 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 310 | /* Write instruction bits 95-64 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 311 | WRITE_REG(HwRegs->UcodeDataHigh, *(Instruction + 2), |
| 312 | FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 313 | /* Write instruction address with the WRITE bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 314 | WRITE_REG(HwRegs->UcodeAddr, |
| 315 | (Address | MICROCODE_ADDRESS_WRITE), FLUSH); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 316 | /* |
| 317 | * Sahara bug in the ucode download logic - the write to DataLow |
| 318 | * for the next instruction could get corrupted. To avoid this, |
| 319 | * write to DataLow again for this instruction (which may get |
| 320 | * corrupted, but it doesn't matter), then increment the address |
| 321 | * and write the data for the next instruction to DataLow. That |
| 322 | * write should succeed. |
| 323 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 324 | WRITE_REG(HwRegs->UcodeDataLow, *Instruction, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 325 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 326 | Instruction += 3; |
| 327 | } |
| 328 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 329 | /* |
| 330 | * Now repeat the entire operation reading the instruction back and |
| 331 | * checking for parity errors |
| 332 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 333 | for (Section = 0; Section < numSections; Section++) { |
| 334 | DBG_ERROR("sxg: check SECTION # %d\n", Section); |
| 335 | switch (UcodeSel) { |
| 336 | case SXG_UCODE_SAHARA: |
| 337 | Instruction = (u32 *) & SaharaUCode[Section][0]; |
| 338 | break; |
| 339 | default: |
| 340 | ASSERT(0); |
| 341 | break; |
| 342 | } |
| 343 | BaseAddress = sectionStart[Section]; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 344 | /* Size in instructions */ |
| 345 | ThisSectionSize = sectionSize[Section] / 12; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 346 | for (AddressOffset = 0; AddressOffset < ThisSectionSize; |
| 347 | AddressOffset++) { |
| 348 | Address = BaseAddress + AddressOffset; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 349 | /* Write the address with the READ bit set */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 350 | WRITE_REG(HwRegs->UcodeAddr, |
| 351 | (Address | MICROCODE_ADDRESS_READ), FLUSH); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 352 | /* Read it back and check parity bit. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 353 | READ_REG(HwRegs->UcodeAddr, ValueRead); |
| 354 | if (ValueRead & MICROCODE_ADDRESS_PARITY) { |
| 355 | DBG_ERROR("sxg: %s PARITY ERROR\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 356 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 357 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 358 | return FALSE; /* Parity error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 359 | } |
| 360 | ASSERT((ValueRead & MICROCODE_ADDRESS_MASK) == Address); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 361 | /* Read the instruction back and compare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 362 | READ_REG(HwRegs->UcodeDataLow, ValueRead); |
| 363 | if (ValueRead != *Instruction) { |
| 364 | DBG_ERROR("sxg: %s MISCOMPARE LOW\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 365 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 366 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 367 | } |
| 368 | READ_REG(HwRegs->UcodeDataMiddle, ValueRead); |
| 369 | if (ValueRead != *(Instruction + 1)) { |
| 370 | DBG_ERROR("sxg: %s MISCOMPARE MIDDLE\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 371 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 372 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 373 | } |
| 374 | READ_REG(HwRegs->UcodeDataHigh, ValueRead); |
| 375 | if (ValueRead != *(Instruction + 2)) { |
| 376 | DBG_ERROR("sxg: %s MISCOMPARE HIGH\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 377 | __func__); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 378 | return FALSE; /* Miscompare */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 379 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 380 | /* Advance 3 u32S to start of next instruction */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 381 | Instruction += 3; |
| 382 | } |
| 383 | } |
| 384 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 385 | /* Everything OK, Go. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 386 | WRITE_REG(HwRegs->UcodeAddr, MICROCODE_ADDRESS_GO, FLUSH); |
| 387 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 388 | /* |
| 389 | * Poll the CardUp register to wait for microcode to initialize |
| 390 | * Give up after 10,000 attemps (500ms). |
| 391 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 392 | for (i = 0; i < 10000; i++) { |
| 393 | udelay(50); |
| 394 | READ_REG(adapter->UcodeRegs[0].CardUp, ValueRead); |
| 395 | if (ValueRead == 0xCAFE) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 396 | DBG_ERROR("sxg: %s BOO YA 0xCAFE\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 397 | break; |
| 398 | } |
| 399 | } |
| 400 | if (i == 10000) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 401 | DBG_ERROR("sxg: %s TIMEOUT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 402 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 403 | return FALSE; /* Timeout */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 404 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 405 | /* |
| 406 | * Now write the LoadSync register. This is used to |
| 407 | * synchronize with the card so it can scribble on the memory |
| 408 | * that contained 0xCAFE from the "CardUp" step above |
| 409 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 410 | if (UcodeSel == SXG_UCODE_SAHARA) { |
| 411 | WRITE_REG(adapter->UcodeRegs[0].LoadSync, 0, FLUSH); |
| 412 | } |
| 413 | |
| 414 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDnldUcd", |
| 415 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 416 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 417 | |
| 418 | return (TRUE); |
| 419 | } |
| 420 | |
| 421 | /* |
| 422 | * sxg_allocate_resources - Allocate memory and locks |
| 423 | * |
| 424 | * Arguments - |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 425 | * adapter - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 426 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 427 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 428 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 429 | static int sxg_allocate_resources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 430 | { |
| 431 | int status; |
| 432 | u32 i; |
| 433 | u32 RssIds, IsrCount; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 434 | /* struct sxg_xmt_ring *XmtRing; */ |
| 435 | /* struct sxg_rcv_ring *RcvRing; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 436 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 437 | DBG_ERROR("%s ENTER\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 438 | |
| 439 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocRes", |
| 440 | adapter, 0, 0, 0); |
| 441 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 442 | /* Windows tells us how many CPUs it plans to use for */ |
| 443 | /* RSS */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 444 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
| 445 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 446 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 447 | DBG_ERROR("%s Setup the spinlocks\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 448 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 449 | /* Allocate spinlocks and initialize listheads first. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 450 | spin_lock_init(&adapter->RcvQLock); |
| 451 | spin_lock_init(&adapter->SglQLock); |
| 452 | spin_lock_init(&adapter->XmtZeroLock); |
| 453 | spin_lock_init(&adapter->Bit64RegLock); |
| 454 | spin_lock_init(&adapter->AdapterLock); |
| 455 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 456 | DBG_ERROR("%s Setup the lists\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 457 | |
| 458 | InitializeListHead(&adapter->FreeRcvBuffers); |
| 459 | InitializeListHead(&adapter->FreeRcvBlocks); |
| 460 | InitializeListHead(&adapter->AllRcvBlocks); |
| 461 | InitializeListHead(&adapter->FreeSglBuffers); |
| 462 | InitializeListHead(&adapter->AllSglBuffers); |
| 463 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 464 | /* |
| 465 | * Mark these basic allocations done. This flags essentially |
| 466 | * tells the SxgFreeResources routine that it can grab spinlocks |
| 467 | * and reference listheads. |
| 468 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 469 | adapter->BasicAllocations = TRUE; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 470 | /* |
| 471 | * Main allocation loop. Start with the maximum supported by |
| 472 | * the microcode and back off if memory allocation |
| 473 | * fails. If we hit a minimum, fail. |
| 474 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 475 | |
| 476 | for (;;) { |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 477 | DBG_ERROR("%s Allocate XmtRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 478 | (unsigned int)(sizeof(struct sxg_xmt_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 479 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 480 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 481 | * Start with big items first - receive and transmit rings. |
| 482 | * At the moment I'm going to keep the ring size fixed and |
| 483 | * adjust the TCBs if we fail. Later we might |
| 484 | * consider reducing the ring size as well.. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 485 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 486 | adapter->XmtRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 487 | sizeof(struct sxg_xmt_ring) * |
| 488 | 1, |
| 489 | &adapter->PXmtRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 490 | DBG_ERROR("%s XmtRings[%p]\n", __func__, adapter->XmtRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 491 | |
| 492 | if (!adapter->XmtRings) { |
| 493 | goto per_tcb_allocation_failed; |
| 494 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 495 | memset(adapter->XmtRings, 0, sizeof(struct sxg_xmt_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 496 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 497 | DBG_ERROR("%s Allocate RcvRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 498 | (unsigned int)(sizeof(struct sxg_rcv_ring) * 1)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 499 | adapter->RcvRings = |
| 500 | pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 501 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 502 | &adapter->PRcvRings); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 503 | DBG_ERROR("%s RcvRings[%p]\n", __func__, adapter->RcvRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 504 | if (!adapter->RcvRings) { |
| 505 | goto per_tcb_allocation_failed; |
| 506 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 507 | memset(adapter->RcvRings, 0, sizeof(struct sxg_rcv_ring) * 1); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 508 | break; |
| 509 | |
| 510 | per_tcb_allocation_failed: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 511 | /* an allocation failed. Free any successful allocations. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 512 | if (adapter->XmtRings) { |
| 513 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 514 | sizeof(struct sxg_xmt_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 515 | adapter->XmtRings, |
| 516 | adapter->PXmtRings); |
| 517 | adapter->XmtRings = NULL; |
| 518 | } |
| 519 | if (adapter->RcvRings) { |
| 520 | pci_free_consistent(adapter->pcidev, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 521 | sizeof(struct sxg_rcv_ring) * 1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 522 | adapter->RcvRings, |
| 523 | adapter->PRcvRings); |
| 524 | adapter->RcvRings = NULL; |
| 525 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 526 | /* Loop around and try again.... */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 527 | } |
| 528 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 529 | DBG_ERROR("%s Initialize RCV ZERO and XMT ZERO rings\n", __func__); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 530 | /* Initialize rcv zero and xmt zero rings */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 531 | SXG_INITIALIZE_RING(adapter->RcvRingZeroInfo, SXG_RCV_RING_SIZE); |
| 532 | SXG_INITIALIZE_RING(adapter->XmtRingZeroInfo, SXG_XMT_RING_SIZE); |
| 533 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 534 | /* Sanity check receive data structure format */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 535 | /* ASSERT((adapter->ReceiveBufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 536 | (adapter->ReceiveBufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 537 | ASSERT(sizeof(struct sxg_rcv_descriptor_block) == |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 538 | SXG_RCV_DESCRIPTOR_BLOCK_SIZE); |
| 539 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 540 | /* |
| 541 | * Allocate receive data buffers. We allocate a block of buffers and |
| 542 | * a corresponding descriptor block at once. See sxghw.h:SXG_RCV_BLOCK |
| 543 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 544 | for (i = 0; i < SXG_INITIAL_RCV_DATA_BUFFERS; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 545 | i += SXG_RCV_DESCRIPTORS_PER_BLOCK) { |
| 546 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 547 | SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 548 | SXG_BUFFER_TYPE_RCV); |
| 549 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 550 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 551 | * NBL resource allocation can fail in the 'AllocateComplete' routine, |
| 552 | * which doesn't return status. Make sure we got the number of buffers |
| 553 | * we requested |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 554 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 555 | if (adapter->FreeRcvBufferCount < SXG_INITIAL_RCV_DATA_BUFFERS) { |
| 556 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF6", |
| 557 | adapter, adapter->FreeRcvBufferCount, SXG_MAX_ENTRIES, |
| 558 | 0); |
| 559 | return (STATUS_RESOURCES); |
| 560 | } |
| 561 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 562 | DBG_ERROR("%s Allocate EventRings size[%x]\n", __func__, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 563 | (unsigned int)(sizeof(struct sxg_event_ring) * RssIds)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 564 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 565 | /* Allocate event queues. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 566 | adapter->EventRings = pci_alloc_consistent(adapter->pcidev, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 567 | sizeof(struct sxg_event_ring) * |
| 568 | RssIds, |
| 569 | &adapter->PEventRings); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 570 | |
| 571 | if (!adapter->EventRings) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 572 | /* Caller will call SxgFreeAdapter to clean up above |
| 573 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 574 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF8", |
| 575 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 576 | status = STATUS_RESOURCES; |
| 577 | goto per_tcb_allocation_failed; |
| 578 | } |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 579 | memset(adapter->EventRings, 0, sizeof(struct sxg_event_ring) * RssIds); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 580 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 581 | DBG_ERROR("%s Allocate ISR size[%x]\n", __func__, IsrCount); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 582 | /* Allocate ISR */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 583 | adapter->Isr = pci_alloc_consistent(adapter->pcidev, |
| 584 | IsrCount, &adapter->PIsr); |
| 585 | if (!adapter->Isr) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 586 | /* Caller will call SxgFreeAdapter to clean up above |
| 587 | * allocations */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 588 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF9", |
| 589 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 590 | status = STATUS_RESOURCES; |
| 591 | goto per_tcb_allocation_failed; |
| 592 | } |
| 593 | memset(adapter->Isr, 0, sizeof(u32) * IsrCount); |
| 594 | |
Greg Kroah-Hartman | d78404c | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 595 | DBG_ERROR("%s Allocate shared XMT ring zero index location size[%x]\n", |
| 596 | __func__, (unsigned int)sizeof(u32)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 597 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 598 | /* Allocate shared XMT ring zero index location */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 599 | adapter->XmtRingZeroIndex = pci_alloc_consistent(adapter->pcidev, |
| 600 | sizeof(u32), |
| 601 | &adapter-> |
| 602 | PXmtRingZeroIndex); |
| 603 | if (!adapter->XmtRingZeroIndex) { |
| 604 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAResF10", |
| 605 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 606 | status = STATUS_RESOURCES; |
| 607 | goto per_tcb_allocation_failed; |
| 608 | } |
| 609 | memset(adapter->XmtRingZeroIndex, 0, sizeof(u32)); |
| 610 | |
| 611 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlcResS", |
| 612 | adapter, SXG_MAX_ENTRIES, 0, 0); |
| 613 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 614 | DBG_ERROR("%s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 615 | return (STATUS_SUCCESS); |
| 616 | } |
| 617 | |
| 618 | /* |
| 619 | * sxg_config_pci - |
| 620 | * |
| 621 | * Set up PCI Configuration space |
| 622 | * |
| 623 | * Arguments - |
| 624 | * pcidev - A pointer to our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 625 | */ |
| 626 | static void sxg_config_pci(struct pci_dev *pcidev) |
| 627 | { |
| 628 | u16 pci_command; |
| 629 | u16 new_command; |
| 630 | |
| 631 | pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 632 | DBG_ERROR("sxg: %s PCI command[%4.4x]\n", __func__, pci_command); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 633 | /* Set the command register */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 634 | new_command = pci_command | ( |
| 635 | /* Memory Space Enable */ |
| 636 | PCI_COMMAND_MEMORY | |
| 637 | /* Bus master enable */ |
| 638 | PCI_COMMAND_MASTER | |
| 639 | /* Memory write and invalidate */ |
| 640 | PCI_COMMAND_INVALIDATE | |
| 641 | /* Parity error response */ |
| 642 | PCI_COMMAND_PARITY | |
| 643 | /* System ERR */ |
| 644 | PCI_COMMAND_SERR | |
| 645 | /* Fast back-to-back */ |
| 646 | PCI_COMMAND_FAST_BACK); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 647 | if (pci_command != new_command) { |
| 648 | DBG_ERROR("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 649 | __func__, pci_command, new_command); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 650 | pci_write_config_word(pcidev, PCI_COMMAND, new_command); |
| 651 | } |
| 652 | } |
| 653 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 654 | /* |
| 655 | * sxg_read_config |
| 656 | * @adapter : Pointer to the adapter structure for the card |
| 657 | * This function will read the configuration data from EEPROM/FLASH |
| 658 | */ |
| 659 | static inline int sxg_read_config(struct adapter_t *adapter) |
| 660 | { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 661 | /* struct sxg_config data; */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 662 | struct sw_cfg_data *data; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 663 | dma_addr_t p_addr; |
| 664 | unsigned long status; |
| 665 | unsigned long i; |
| 666 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 667 | data = pci_alloc_consistent(adapter->pcidev, |
| 668 | sizeof(struct sw_cfg_data), &p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 669 | if(!data) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 670 | /* |
| 671 | * We cant get even this much memory. Raise a hell |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 672 | * Get out of here |
| 673 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 674 | printk(KERN_ERR"%s : Could not allocate memory for reading \ |
| 675 | EEPROM\n", __FUNCTION__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 676 | return -ENOMEM; |
| 677 | } |
| 678 | |
| 679 | WRITE_REG(adapter->UcodeRegs[0].ConfigStat, SXG_CFG_TIMEOUT, TRUE); |
| 680 | |
| 681 | WRITE_REG64(adapter, adapter->UcodeRegs[0].Config, p_addr, 0); |
| 682 | for(i=0; i<1000; i++) { |
| 683 | READ_REG(adapter->UcodeRegs[0].ConfigStat, status); |
| 684 | if (status != SXG_CFG_TIMEOUT) |
| 685 | break; |
| 686 | mdelay(1); /* Do we really need this */ |
| 687 | } |
| 688 | |
| 689 | switch(status) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 690 | /* Config read from EEPROM succeeded */ |
| 691 | case SXG_CFG_LOAD_EEPROM: |
| 692 | /* Config read from Flash succeeded */ |
| 693 | case SXG_CFG_LOAD_FLASH: |
| 694 | /* Copy the MAC address to adapter structure */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 695 | /* TODO: We are not doing the remaining part : FRU, |
| 696 | * etc |
| 697 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 698 | memcpy(adapter->macaddr, data->MacAddr[0].MacAddr, |
| 699 | sizeof(struct sxg_config_mac)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 700 | break; |
| 701 | case SXG_CFG_TIMEOUT: |
| 702 | case SXG_CFG_LOAD_INVALID: |
| 703 | case SXG_CFG_LOAD_ERROR: |
| 704 | default: /* Fix default handler later */ |
| 705 | printk(KERN_WARNING"%s : We could not read the config \ |
| 706 | word. Status = %ld\n", __FUNCTION__, status); |
| 707 | break; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 708 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 709 | pci_free_consistent(adapter->pcidev, sizeof(struct sw_cfg_data), data, |
| 710 | p_addr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 711 | if (adapter->netdev) { |
| 712 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
| 713 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
| 714 | } |
| 715 | printk("LINSYS : These are the new MAC address\n"); |
| 716 | sxg_dbg_macaddrs(adapter); |
| 717 | |
| 718 | return status; |
| 719 | } |
| 720 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 721 | static int sxg_entry_probe(struct pci_dev *pcidev, |
| 722 | const struct pci_device_id *pci_tbl_entry) |
| 723 | { |
| 724 | static int did_version = 0; |
| 725 | int err; |
| 726 | struct net_device *netdev; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 727 | struct adapter_t *adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 728 | void __iomem *memmapped_ioaddr; |
| 729 | u32 status = 0; |
| 730 | ulong mmio_start = 0; |
| 731 | ulong mmio_len = 0; |
| 732 | |
| 733 | DBG_ERROR("sxg: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 734 | __func__, jiffies, smp_processor_id()); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 735 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 736 | /* Initialize trace buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 737 | #ifdef ATKDBG |
| 738 | SxgTraceBuffer = &LSxgTraceBuffer; |
| 739 | SXG_TRACE_INIT(SxgTraceBuffer, TRACE_NOISY); |
| 740 | #endif |
| 741 | |
| 742 | sxg_global.dynamic_intagg = dynamic_intagg; |
| 743 | |
| 744 | err = pci_enable_device(pcidev); |
| 745 | |
| 746 | DBG_ERROR("Call pci_enable_device(%p) status[%x]\n", pcidev, err); |
| 747 | if (err) { |
| 748 | return err; |
| 749 | } |
| 750 | |
| 751 | if (sxg_debug > 0 && did_version++ == 0) { |
| 752 | printk(KERN_INFO "%s\n", sxg_banner); |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame^] | 753 | printk(KERN_INFO "%s\n", SXG_DRV_VERSION); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 754 | } |
| 755 | |
| 756 | if (!(err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK))) { |
| 757 | DBG_ERROR("pci_set_dma_mask(DMA_64BIT_MASK) successful\n"); |
| 758 | } else { |
| 759 | if ((err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK))) { |
| 760 | DBG_ERROR |
| 761 | ("No usable DMA configuration, aborting err[%x]\n", |
| 762 | err); |
| 763 | return err; |
| 764 | } |
| 765 | DBG_ERROR("pci_set_dma_mask(DMA_32BIT_MASK) successful\n"); |
| 766 | } |
| 767 | |
| 768 | DBG_ERROR("Call pci_request_regions\n"); |
| 769 | |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame^] | 770 | err = pci_request_regions(pcidev, sxg_driver_name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 771 | if (err) { |
| 772 | DBG_ERROR("pci_request_regions FAILED err[%x]\n", err); |
| 773 | return err; |
| 774 | } |
| 775 | |
| 776 | DBG_ERROR("call pci_set_master\n"); |
| 777 | pci_set_master(pcidev); |
| 778 | |
| 779 | DBG_ERROR("call alloc_etherdev\n"); |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 780 | netdev = alloc_etherdev(sizeof(struct adapter_t)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 781 | if (!netdev) { |
| 782 | err = -ENOMEM; |
| 783 | goto err_out_exit_sxg_probe; |
| 784 | } |
| 785 | DBG_ERROR("alloc_etherdev for slic netdev[%p]\n", netdev); |
| 786 | |
| 787 | SET_NETDEV_DEV(netdev, &pcidev->dev); |
| 788 | |
| 789 | pci_set_drvdata(pcidev, netdev); |
| 790 | adapter = netdev_priv(netdev); |
| 791 | adapter->netdev = netdev; |
| 792 | adapter->pcidev = pcidev; |
| 793 | |
| 794 | mmio_start = pci_resource_start(pcidev, 0); |
| 795 | mmio_len = pci_resource_len(pcidev, 0); |
| 796 | |
| 797 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 798 | mmio_start, mmio_len); |
| 799 | |
| 800 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 801 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 802 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 803 | if (!memmapped_ioaddr) { |
| 804 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 805 | __func__, mmio_len, mmio_start); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 806 | goto err_out_free_mmio_region; |
| 807 | } |
| 808 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 809 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, start[%lx] \ |
| 810 | len[%lx], IRQ %d.\n", __func__, memmapped_ioaddr, mmio_start, |
| 811 | mmio_len, pcidev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 812 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 813 | adapter->HwRegs = (void *)memmapped_ioaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 814 | adapter->base_addr = memmapped_ioaddr; |
| 815 | |
| 816 | mmio_start = pci_resource_start(pcidev, 2); |
| 817 | mmio_len = pci_resource_len(pcidev, 2); |
| 818 | |
| 819 | DBG_ERROR("sxg: call ioremap(mmio_start[%lx], mmio_len[%lx])\n", |
| 820 | mmio_start, mmio_len); |
| 821 | |
| 822 | memmapped_ioaddr = ioremap(mmio_start, mmio_len); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 823 | DBG_ERROR("sxg: %s MEMMAPPED_IOADDR [%p]\n", __func__, |
| 824 | memmapped_ioaddr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 825 | if (!memmapped_ioaddr) { |
| 826 | DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 827 | __func__, mmio_len, mmio_start); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 828 | goto err_out_free_mmio_region; |
| 829 | } |
| 830 | |
| 831 | DBG_ERROR("sxg: %s found Alacritech SXG PCI, MMIO at %p, " |
| 832 | "start[%lx] len[%lx], IRQ %d.\n", __func__, |
| 833 | memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq); |
| 834 | |
| 835 | adapter->UcodeRegs = (void *)memmapped_ioaddr; |
| 836 | |
| 837 | adapter->State = SXG_STATE_INITIALIZING; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 838 | /* |
| 839 | * Maintain a list of all adapters anchored by |
| 840 | * the global SxgDriver structure. |
| 841 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 842 | adapter->Next = SxgDriver.Adapters; |
| 843 | SxgDriver.Adapters = adapter; |
| 844 | adapter->AdapterID = ++SxgDriver.AdapterID; |
| 845 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 846 | /* Initialize CRC table used to determine multicast hash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 847 | sxg_mcast_init_crc32(); |
| 848 | |
| 849 | adapter->JumboEnabled = FALSE; |
| 850 | adapter->RssEnabled = FALSE; |
| 851 | if (adapter->JumboEnabled) { |
| 852 | adapter->FrameSize = JUMBOMAXFRAME; |
| 853 | adapter->ReceiveBufferSize = SXG_RCV_JUMBO_BUFFER_SIZE; |
| 854 | } else { |
| 855 | adapter->FrameSize = ETHERMAXFRAME; |
| 856 | adapter->ReceiveBufferSize = SXG_RCV_DATA_BUFFER_SIZE; |
| 857 | } |
| 858 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 859 | /* |
| 860 | * status = SXG_READ_EEPROM(adapter); |
| 861 | * if (!status) { |
| 862 | * goto sxg_init_bad; |
| 863 | * } |
| 864 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 865 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 866 | DBG_ERROR("sxg: %s ENTER sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 867 | sxg_config_pci(pcidev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 868 | DBG_ERROR("sxg: %s EXIT sxg_config_pci\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 869 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 870 | DBG_ERROR("sxg: %s ENTER sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 871 | sxg_init_driver(); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 872 | DBG_ERROR("sxg: %s EXIT sxg_init_driver\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 873 | |
| 874 | adapter->vendid = pci_tbl_entry->vendor; |
| 875 | adapter->devid = pci_tbl_entry->device; |
| 876 | adapter->subsysid = pci_tbl_entry->subdevice; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 877 | adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); |
| 878 | adapter->functionnumber = (pcidev->devfn & 0x7); |
| 879 | adapter->memorylength = pci_resource_len(pcidev, 0); |
| 880 | adapter->irq = pcidev->irq; |
| 881 | adapter->next_netdevice = head_netdevice; |
| 882 | head_netdevice = netdev; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 883 | adapter->port = 0; /*adapter->functionnumber; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 884 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 885 | /* Allocate memory and other resources */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 886 | DBG_ERROR("sxg: %s ENTER sxg_allocate_resources\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 887 | status = sxg_allocate_resources(adapter); |
| 888 | DBG_ERROR("sxg: %s EXIT sxg_allocate_resources status %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 889 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 890 | if (status != STATUS_SUCCESS) { |
| 891 | goto err_out_unmap; |
| 892 | } |
| 893 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 894 | DBG_ERROR("sxg: %s ENTER sxg_download_microcode\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 895 | if (sxg_download_microcode(adapter, SXG_UCODE_SAHARA)) { |
| 896 | DBG_ERROR("sxg: %s ENTER sxg_adapter_set_hwaddr\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 897 | __func__); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 898 | sxg_read_config(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 899 | sxg_adapter_set_hwaddr(adapter); |
| 900 | } else { |
| 901 | adapter->state = ADAPT_FAIL; |
| 902 | adapter->linkstate = LINK_DOWN; |
| 903 | DBG_ERROR("sxg_download_microcode FAILED status[%x]\n", status); |
| 904 | } |
| 905 | |
| 906 | netdev->base_addr = (unsigned long)adapter->base_addr; |
| 907 | netdev->irq = adapter->irq; |
| 908 | netdev->open = sxg_entry_open; |
| 909 | netdev->stop = sxg_entry_halt; |
| 910 | netdev->hard_start_xmit = sxg_send_packets; |
| 911 | netdev->do_ioctl = sxg_ioctl; |
| 912 | #if XXXTODO |
| 913 | netdev->set_mac_address = sxg_mac_set_address; |
| 914 | #if SLIC_GET_STATS_ENABLED |
| 915 | netdev->get_stats = sxg_get_stats; |
| 916 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 917 | #endif |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 918 | netdev->set_multicast_list = sxg_mcast_set_list; |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame^] | 919 | SET_ETHTOOL_OPS(netdev, &sxg_nic_ethtool_ops); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 920 | |
| 921 | strcpy(netdev->name, "eth%d"); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 922 | /* strcpy(netdev->name, pci_name(pcidev)); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 923 | if ((err = register_netdev(netdev))) { |
| 924 | DBG_ERROR("Cannot register net device, aborting. %s\n", |
| 925 | netdev->name); |
| 926 | goto err_out_unmap; |
| 927 | } |
| 928 | |
| 929 | DBG_ERROR |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 930 | ("sxg: %s addr 0x%lx, irq %d, MAC addr \ |
| 931 | %02X:%02X:%02X:%02X:%02X:%02X\n", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 932 | netdev->name, netdev->base_addr, pcidev->irq, netdev->dev_addr[0], |
| 933 | netdev->dev_addr[1], netdev->dev_addr[2], netdev->dev_addr[3], |
| 934 | netdev->dev_addr[4], netdev->dev_addr[5]); |
| 935 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 936 | /* sxg_init_bad: */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 937 | ASSERT(status == FALSE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 938 | /* sxg_free_adapter(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 939 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 940 | DBG_ERROR("sxg: %s EXIT status[%x] jiffies[%lx] cpu %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 941 | status, jiffies, smp_processor_id()); |
| 942 | return status; |
| 943 | |
| 944 | err_out_unmap: |
| 945 | iounmap((void *)memmapped_ioaddr); |
| 946 | |
| 947 | err_out_free_mmio_region: |
| 948 | release_mem_region(mmio_start, mmio_len); |
| 949 | |
| 950 | err_out_exit_sxg_probe: |
| 951 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 952 | DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 953 | smp_processor_id()); |
| 954 | |
| 955 | return -ENODEV; |
| 956 | } |
| 957 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 958 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 959 | * LINE BASE Interrupt routines.. |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 960 | * |
| 961 | * sxg_disable_interrupt |
| 962 | * |
| 963 | * DisableInterrupt Handler |
| 964 | * |
| 965 | * Arguments: |
| 966 | * |
| 967 | * adapter: Our adapter structure |
| 968 | * |
| 969 | * Return Value: |
| 970 | * None. |
| 971 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 972 | static void sxg_disable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 973 | { |
| 974 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DisIntr", |
| 975 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 976 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 977 | ASSERT(adapter->RssEnabled == FALSE); |
| 978 | ASSERT(adapter->MsiEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 979 | /* Turn off interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 980 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_DISABLE), TRUE); |
| 981 | |
| 982 | adapter->InterruptsEnabled = 0; |
| 983 | |
| 984 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDisIntr", |
| 985 | adapter, adapter->InterruptsEnabled, 0, 0); |
| 986 | } |
| 987 | |
| 988 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 989 | * sxg_enable_interrupt |
| 990 | * |
| 991 | * EnableInterrupt Handler |
| 992 | * |
| 993 | * Arguments: |
| 994 | * |
| 995 | * adapter: Our adapter structure |
| 996 | * |
| 997 | * Return Value: |
| 998 | * None. |
| 999 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1000 | static void sxg_enable_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1001 | { |
| 1002 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "EnIntr", |
| 1003 | adapter, adapter->InterruptsEnabled, 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1004 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1005 | ASSERT(adapter->RssEnabled == FALSE); |
| 1006 | ASSERT(adapter->MsiEnabled == FALSE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1007 | /* Turn on interrupts by writing to the icr register. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1008 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_ENABLE), TRUE); |
| 1009 | |
| 1010 | adapter->InterruptsEnabled = 1; |
| 1011 | |
| 1012 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XEnIntr", |
| 1013 | adapter, 0, 0, 0); |
| 1014 | } |
| 1015 | |
| 1016 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1017 | * sxg_isr - Process an line-based interrupt |
| 1018 | * |
| 1019 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1020 | * Context - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1021 | * QueueDefault - Output parameter to queue to default CPU |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1022 | * TargetCpus - Output bitmap to schedule DPC's |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1023 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1024 | * Return Value: TRUE if our interrupt |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1025 | */ |
| 1026 | static irqreturn_t sxg_isr(int irq, void *dev_id) |
| 1027 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1028 | struct net_device *dev = (struct net_device *) dev_id; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1029 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1030 | /* u32 CpuMask = 0, i; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1031 | |
| 1032 | adapter->Stats.NumInts++; |
| 1033 | if (adapter->Isr[0] == 0) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1034 | /* |
| 1035 | * The SLIC driver used to experience a number of spurious |
| 1036 | * interrupts due to the delay associated with the masking of |
| 1037 | * the interrupt (we'd bounce back in here). If we see that |
| 1038 | * again with Sahara,add a READ_REG of the Icr register after |
| 1039 | * the WRITE_REG below. |
| 1040 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1041 | adapter->Stats.FalseInts++; |
| 1042 | return IRQ_NONE; |
| 1043 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1044 | /* |
| 1045 | * Move the Isr contents and clear the value in |
| 1046 | * shared memory, and mask interrupts |
| 1047 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1048 | adapter->IsrCopy[0] = adapter->Isr[0]; |
| 1049 | adapter->Isr[0] = 0; |
| 1050 | WRITE_REG(adapter->UcodeRegs[0].Icr, SXG_ICR(0, SXG_ICR_MASK), TRUE); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1051 | /* ASSERT(adapter->IsrDpcsPending == 0); */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1052 | #if XXXTODO /* RSS Stuff */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1053 | /* |
| 1054 | * If RSS is enabled and the ISR specifies SXG_ISR_EVENT, then |
| 1055 | * schedule DPC's based on event queues. |
| 1056 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1057 | if (adapter->RssEnabled && (adapter->IsrCopy[0] & SXG_ISR_EVENT)) { |
| 1058 | for (i = 0; |
| 1059 | i < adapter->RssSystemInfo->ProcessorInfo.RssCpuCount; |
| 1060 | i++) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1061 | struct sxg_event_ring *EventRing = |
| 1062 | &adapter->EventRings[i]; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1063 | struct sxg_event *Event = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1064 | &EventRing->Ring[adapter->NextEvent[i]]; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1065 | unsigned char Cpu = |
| 1066 | adapter->RssSystemInfo->RssIdToCpu[i]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1067 | if (Event->Status & EVENT_STATUS_VALID) { |
| 1068 | adapter->IsrDpcsPending++; |
| 1069 | CpuMask |= (1 << Cpu); |
| 1070 | } |
| 1071 | } |
| 1072 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1073 | /* |
| 1074 | * Now, either schedule the CPUs specified by the CpuMask, |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1075 | * or queue default |
| 1076 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1077 | if (CpuMask) { |
| 1078 | *QueueDefault = FALSE; |
| 1079 | } else { |
| 1080 | adapter->IsrDpcsPending = 1; |
| 1081 | *QueueDefault = TRUE; |
| 1082 | } |
| 1083 | *TargetCpus = CpuMask; |
| 1084 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1085 | /* There are no DPCs in Linux, so call the handler now */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1086 | sxg_handle_interrupt(adapter); |
| 1087 | |
| 1088 | return IRQ_HANDLED; |
| 1089 | } |
| 1090 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1091 | int debug_inthandler = 0; |
| 1092 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1093 | static void sxg_handle_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1094 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1095 | /* unsigned char RssId = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1096 | u32 NewIsr; |
| 1097 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1098 | if (++debug_inthandler < 20) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1099 | DBG_ERROR("Enter sxg_handle_interrupt ISR[%x]\n", |
| 1100 | adapter->IsrCopy[0]); |
| 1101 | } |
| 1102 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "HndlIntr", |
| 1103 | adapter, adapter->IsrCopy[0], 0, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1104 | /* For now, RSS is disabled with line based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1105 | ASSERT(adapter->RssEnabled == FALSE); |
| 1106 | ASSERT(adapter->MsiEnabled == FALSE); |
| 1107 | ASSERT(adapter->IsrCopy[0]); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1108 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1109 | /* Always process the event queue. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1110 | sxg_process_event_queue(adapter, |
| 1111 | (adapter->RssEnabled ? /*RssId */ 0 : 0)); |
| 1112 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1113 | #if XXXTODO /* RSS stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1114 | if (--adapter->IsrDpcsPending) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1115 | /* We're done. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1116 | ASSERT(adapter->RssEnabled); |
| 1117 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DPCsPend", |
| 1118 | adapter, 0, 0, 0); |
| 1119 | return; |
| 1120 | } |
| 1121 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1122 | /* Last (or only) DPC processes the ISR and clears the interrupt. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1123 | NewIsr = sxg_process_isr(adapter, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1124 | /* Reenable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1125 | adapter->IsrCopy[0] = 0; |
| 1126 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ClearIsr", |
| 1127 | adapter, NewIsr, 0, 0); |
| 1128 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1129 | if (debug_inthandler < 20) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1130 | DBG_ERROR |
| 1131 | ("Exit sxg_handle_interrupt2 after enabling interrupt\n"); |
| 1132 | } |
| 1133 | |
| 1134 | WRITE_REG(adapter->UcodeRegs[0].Isr, NewIsr, TRUE); |
| 1135 | |
| 1136 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XHndlInt", |
| 1137 | adapter, 0, 0, 0); |
| 1138 | } |
| 1139 | |
| 1140 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1141 | * sxg_process_isr - Process an interrupt. Called from the line-based and |
| 1142 | * message based interrupt DPC routines |
| 1143 | * |
| 1144 | * Arguments: |
| 1145 | * adapter - Our adapter structure |
| 1146 | * Queue - The ISR that needs processing |
| 1147 | * |
| 1148 | * Return Value: |
| 1149 | * None |
| 1150 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1151 | static int sxg_process_isr(struct adapter_t *adapter, u32 MessageId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1152 | { |
| 1153 | u32 Isr = adapter->IsrCopy[MessageId]; |
| 1154 | u32 NewIsr = 0; |
| 1155 | |
| 1156 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "ProcIsr", |
| 1157 | adapter, Isr, 0, 0); |
| 1158 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1159 | DBG_ERROR("%s: Entering with %d ISR value\n", __FUNCTION__, Isr); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1160 | /* Error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1161 | if (Isr & SXG_ISR_ERR) { |
| 1162 | if (Isr & SXG_ISR_PDQF) { |
| 1163 | adapter->Stats.PdqFull++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1164 | DBG_ERROR("%s: SXG_ISR_ERR PDQF!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1165 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1166 | /* No host buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1167 | if (Isr & SXG_ISR_RMISS) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1168 | /* |
| 1169 | * There is a bunch of code in the SLIC driver which |
| 1170 | * attempts to process more receive events per DPC |
| 1171 | * if we start to fall behind. We'll probablyd |
| 1172 | * need to do something similar here, but hold |
| 1173 | * off for now. I don't want to make the code more |
| 1174 | * complicated than strictly needed. |
| 1175 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1176 | adapter->Stats.RcvNoBuffer++; |
| 1177 | if (adapter->Stats.RcvNoBuffer < 5) { |
| 1178 | DBG_ERROR("%s: SXG_ISR_ERR RMISS!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1179 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1180 | } |
| 1181 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1182 | /* Card crash */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1183 | if (Isr & SXG_ISR_DEAD) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1184 | /* |
| 1185 | * Set aside the crash info and set the adapter state |
| 1186 | * to RESET |
| 1187 | */ |
| 1188 | adapter->CrashCpu = (unsigned char) |
| 1189 | ((Isr & SXG_ISR_CPU) >> SXG_ISR_CPU_SHIFT); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1190 | adapter->CrashLocation = (ushort) (Isr & SXG_ISR_CRASH); |
| 1191 | adapter->Dead = TRUE; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1192 | DBG_ERROR("%s: ISR_DEAD %x, CPU: %d\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1193 | adapter->CrashLocation, adapter->CrashCpu); |
| 1194 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1195 | /* Event ring full */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1196 | if (Isr & SXG_ISR_ERFULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1197 | /* |
| 1198 | * Same issue as RMISS, really. This means the |
| 1199 | * host is falling behind the card. Need to increase |
| 1200 | * event ring size, process more events per interrupt, |
| 1201 | * and/or reduce/remove interrupt aggregation. |
| 1202 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1203 | adapter->Stats.EventRingFull++; |
| 1204 | DBG_ERROR("%s: SXG_ISR_ERR EVENT RING FULL!!\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1205 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1206 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1207 | /* Transmit drop - no DRAM buffers or XMT error */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1208 | if (Isr & SXG_ISR_XDROP) { |
| 1209 | adapter->Stats.XmtDrops++; |
| 1210 | adapter->Stats.XmtErrors++; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1211 | DBG_ERROR("%s: SXG_ISR_ERR XDROP!!\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1212 | } |
| 1213 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1214 | /* Slowpath send completions */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1215 | if (Isr & SXG_ISR_SPSEND) { |
| 1216 | sxg_complete_slow_send(adapter); |
| 1217 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1218 | /* Dump */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1219 | if (Isr & SXG_ISR_UPC) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1220 | /* Maybe change when debug is added.. */ |
| 1221 | ASSERT(adapter->DumpCmdRunning); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1222 | adapter->DumpCmdRunning = FALSE; |
| 1223 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1224 | /* Link event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1225 | if (Isr & SXG_ISR_LINK) { |
| 1226 | sxg_link_event(adapter); |
| 1227 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1228 | /* Debug - breakpoint hit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1229 | if (Isr & SXG_ISR_BREAK) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1230 | /* |
| 1231 | * At the moment AGDB isn't written to support interactive |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1232 | * debug sessions. When it is, this interrupt will be used to |
| 1233 | * signal AGDB that it has hit a breakpoint. For now, ASSERT. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1234 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1235 | ASSERT(0); |
| 1236 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1237 | /* Heartbeat response */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1238 | if (Isr & SXG_ISR_PING) { |
| 1239 | adapter->PingOutstanding = FALSE; |
| 1240 | } |
| 1241 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XProcIsr", |
| 1242 | adapter, Isr, NewIsr, 0); |
| 1243 | |
| 1244 | return (NewIsr); |
| 1245 | } |
| 1246 | |
| 1247 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1248 | * sxg_process_event_queue - Process our event queue |
| 1249 | * |
| 1250 | * Arguments: |
| 1251 | * - adapter - Adapter structure |
| 1252 | * - RssId - The event queue requiring processing |
| 1253 | * |
| 1254 | * Return Value: |
| 1255 | * None. |
| 1256 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1257 | static u32 sxg_process_event_queue(struct adapter_t *adapter, u32 RssId) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1258 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1259 | struct sxg_event_ring *EventRing = &adapter->EventRings[RssId]; |
| 1260 | struct sxg_event *Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1261 | u32 EventsProcessed = 0, Batches = 0; |
| 1262 | u32 num_skbs = 0; |
| 1263 | struct sk_buff *skb; |
| 1264 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
| 1265 | struct sk_buff *prev_skb = NULL; |
| 1266 | struct sk_buff *IndicationList[SXG_RCV_ARRAYSIZE]; |
| 1267 | u32 Index; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1268 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1269 | #endif |
| 1270 | u32 ReturnStatus = 0; |
| 1271 | |
| 1272 | ASSERT((adapter->State == SXG_STATE_RUNNING) || |
| 1273 | (adapter->State == SXG_STATE_PAUSING) || |
| 1274 | (adapter->State == SXG_STATE_PAUSED) || |
| 1275 | (adapter->State == SXG_STATE_HALTING)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1276 | /* |
| 1277 | * We may still have unprocessed events on the queue if |
| 1278 | * the card crashed. Don't process them. |
| 1279 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1280 | if (adapter->Dead) { |
| 1281 | return (0); |
| 1282 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1283 | /* |
| 1284 | * In theory there should only be a single processor that |
| 1285 | * accesses this queue, and only at interrupt-DPC time. So/ |
| 1286 | * we shouldn't need a lock for any of this. |
| 1287 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1288 | while (Event->Status & EVENT_STATUS_VALID) { |
| 1289 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "Event", |
| 1290 | Event, Event->Code, Event->Status, |
| 1291 | adapter->NextEvent); |
| 1292 | switch (Event->Code) { |
| 1293 | case EVENT_CODE_BUFFERS: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1294 | /* struct sxg_ring_info Head & Tail == unsigned char */ |
| 1295 | ASSERT(!(Event->CommandIndex & 0xFF00)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1296 | sxg_complete_descriptor_blocks(adapter, |
| 1297 | Event->CommandIndex); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1298 | break; |
| 1299 | case EVENT_CODE_SLOWRCV: |
| 1300 | --adapter->RcvBuffersOnCard; |
| 1301 | if ((skb = sxg_slow_receive(adapter, Event))) { |
| 1302 | u32 rx_bytes; |
| 1303 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1304 | /* Add it to our indication list */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1305 | SXG_ADD_RCV_PACKET(adapter, skb, prev_skb, |
| 1306 | IndicationList, num_skbs); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1307 | /* |
| 1308 | * Linux, we just pass up each skb to the |
| 1309 | * protocol above at this point, there is no |
| 1310 | * capability of an indication list. |
| 1311 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1312 | #else |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1313 | /* CHECK skb_pull(skb, INIC_RCVBUF_HEADSIZE); */ |
| 1314 | /* (rcvbuf->length & IRHDDR_FLEN_MSK); */ |
| 1315 | rx_bytes = Event->Length; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1316 | adapter->stats.rx_packets++; |
| 1317 | adapter->stats.rx_bytes += rx_bytes; |
| 1318 | #if SXG_OFFLOAD_IP_CHECKSUM |
| 1319 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1320 | #endif |
| 1321 | skb->dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1322 | netif_rx(skb); |
| 1323 | #endif |
| 1324 | } |
| 1325 | break; |
| 1326 | default: |
| 1327 | DBG_ERROR("%s: ERROR Invalid EventCode %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1328 | __func__, Event->Code); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1329 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1330 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1331 | /* |
| 1332 | * See if we need to restock card receive buffers. |
| 1333 | * There are two things to note here: |
| 1334 | * First - This test is not SMP safe. The |
| 1335 | * adapter->BuffersOnCard field is protected via atomic |
| 1336 | * interlocked calls, but we do not protect it with respect |
| 1337 | * to these tests. The only way to do that is with a lock, |
| 1338 | * and I don't want to grab a lock every time we adjust the |
| 1339 | * BuffersOnCard count. Instead, we allow the buffer |
| 1340 | * replenishment to be off once in a while. The worst that |
| 1341 | * can happen is the card is given on more-or-less descriptor |
| 1342 | * block than the arbitrary value we've chosen. No big deal |
| 1343 | * In short DO NOT ADD A LOCK HERE, OR WHERE RcvBuffersOnCard |
| 1344 | * is adjusted. |
| 1345 | * Second - We expect this test to rarely |
| 1346 | * evaluate to true. We attempt to refill descriptor blocks |
| 1347 | * as they are returned to us (sxg_complete_descriptor_blocks) |
| 1348 | * so The only time this should evaluate to true is when |
| 1349 | * sxg_complete_descriptor_blocks failed to allocate |
| 1350 | * receive buffers. |
| 1351 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1352 | if (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) { |
| 1353 | sxg_stock_rcv_buffers(adapter); |
| 1354 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1355 | /* |
| 1356 | * It's more efficient to just set this to zero. |
| 1357 | * But clearing the top bit saves potential debug info... |
| 1358 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1359 | Event->Status &= ~EVENT_STATUS_VALID; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1360 | /* Advance to the next event */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1361 | SXG_ADVANCE_INDEX(adapter->NextEvent[RssId], EVENT_RING_SIZE); |
| 1362 | Event = &EventRing->Ring[adapter->NextEvent[RssId]]; |
| 1363 | EventsProcessed++; |
| 1364 | if (EventsProcessed == EVENT_RING_BATCH) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1365 | /* Release a batch of events back to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1366 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1367 | EVENT_RING_BATCH, FALSE); |
| 1368 | EventsProcessed = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1369 | /* |
| 1370 | * If we've processed our batch limit, break out of the |
| 1371 | * loop and return SXG_ISR_EVENT to arrange for us to |
| 1372 | * be called again |
| 1373 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1374 | if (Batches++ == EVENT_BATCH_LIMIT) { |
| 1375 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1376 | TRACE_NOISY, "EvtLimit", Batches, |
| 1377 | adapter->NextEvent, 0, 0); |
| 1378 | ReturnStatus = SXG_ISR_EVENT; |
| 1379 | break; |
| 1380 | } |
| 1381 | } |
| 1382 | } |
| 1383 | #ifdef LINUX_HANDLES_RCV_INDICATION_LISTS |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1384 | /* Indicate any received dumb-nic frames */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1385 | SXG_INDICATE_PACKETS(adapter, IndicationList, num_skbs); |
| 1386 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1387 | /* Release events back to the card. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1388 | if (EventsProcessed) { |
| 1389 | WRITE_REG(adapter->UcodeRegs[RssId].EventRelease, |
| 1390 | EventsProcessed, FALSE); |
| 1391 | } |
| 1392 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XPrcEvnt", |
| 1393 | Batches, EventsProcessed, adapter->NextEvent, num_skbs); |
| 1394 | |
| 1395 | return (ReturnStatus); |
| 1396 | } |
| 1397 | |
| 1398 | /* |
| 1399 | * sxg_complete_slow_send - Complete slowpath or dumb-nic sends |
| 1400 | * |
| 1401 | * Arguments - |
| 1402 | * adapter - A pointer to our adapter structure |
| 1403 | |
| 1404 | * Return |
| 1405 | * None |
| 1406 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1407 | static void sxg_complete_slow_send(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1408 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1409 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 1410 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1411 | u32 *ContextType; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1412 | struct sxg_cmd *XmtCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1413 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1414 | /* |
| 1415 | * NOTE - This lock is dropped and regrabbed in this loop. |
| 1416 | * This means two different processors can both be running/ |
| 1417 | * through this loop. Be *very* careful. |
| 1418 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1419 | spin_lock(&adapter->XmtZeroLock); |
| 1420 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnds", |
| 1421 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1422 | |
| 1423 | while (XmtRingInfo->Tail != *adapter->XmtRingZeroIndex) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1424 | /* |
| 1425 | * Locate the current Cmd (ring descriptor entry), and |
| 1426 | * associated SGL, and advance the tail |
| 1427 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1428 | SXG_RETURN_CMD(XmtRing, XmtRingInfo, XmtCmd, ContextType); |
| 1429 | ASSERT(ContextType); |
| 1430 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1431 | XmtRingInfo->Head, XmtRingInfo->Tail, XmtCmd, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1432 | /* Clear the SGL field. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1433 | XmtCmd->Sgl = 0; |
| 1434 | |
| 1435 | switch (*ContextType) { |
| 1436 | case SXG_SGL_DUMB: |
| 1437 | { |
| 1438 | struct sk_buff *skb; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1439 | struct sxg_scatter_gather *SxgSgl = |
| 1440 | (struct sxg_scatter_gather *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1441 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1442 | /* Dumb-nic send. Command context is the dumb-nic SGL */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1443 | skb = (struct sk_buff *)ContextType; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1444 | skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1445 | /* Complete the send */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1446 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, |
| 1447 | TRACE_IMPORTANT, "DmSndCmp", skb, 0, |
| 1448 | 0, 0); |
| 1449 | ASSERT(adapter->Stats.XmtQLen); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1450 | adapter->Stats.XmtQLen--;/* within XmtZeroLock */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1451 | adapter->Stats.XmtOk++; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1452 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1453 | * Now drop the lock and complete the send |
| 1454 | * back to Microsoft. We need to drop the lock |
| 1455 | * because Microsoft can come back with a |
| 1456 | * chimney send, which results in a double trip |
| 1457 | * in SxgTcpOuput |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1458 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1459 | spin_unlock(&adapter->XmtZeroLock); |
| 1460 | SXG_COMPLETE_DUMB_SEND(adapter, skb); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1461 | /* and reacquire.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1462 | spin_lock(&adapter->XmtZeroLock); |
| 1463 | } |
| 1464 | break; |
| 1465 | default: |
| 1466 | ASSERT(0); |
| 1467 | } |
| 1468 | } |
| 1469 | spin_unlock(&adapter->XmtZeroLock); |
| 1470 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpSnd", |
| 1471 | adapter, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
| 1472 | } |
| 1473 | |
| 1474 | /* |
| 1475 | * sxg_slow_receive |
| 1476 | * |
| 1477 | * Arguments - |
| 1478 | * adapter - A pointer to our adapter structure |
| 1479 | * Event - Receive event |
| 1480 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1481 | * Return - skb |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1482 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1483 | static struct sk_buff *sxg_slow_receive(struct adapter_t *adapter, |
| 1484 | struct sxg_event *Event) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1485 | { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1486 | u32 BufferSize = adapter->ReceiveBufferSize; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1487 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1488 | struct sk_buff *Packet; |
| 1489 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1490 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) Event->HostHandle; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1491 | ASSERT(RcvDataBufferHdr); |
| 1492 | ASSERT(RcvDataBufferHdr->State == SXG_BUFFER_ONCARD); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1493 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "SlowRcv", Event, |
| 1494 | RcvDataBufferHdr, RcvDataBufferHdr->State, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1495 | /*RcvDataBufferHdr->VirtualAddress*/ 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1496 | /* Drop rcv frames in non-running state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1497 | switch (adapter->State) { |
| 1498 | case SXG_STATE_RUNNING: |
| 1499 | break; |
| 1500 | case SXG_STATE_PAUSING: |
| 1501 | case SXG_STATE_PAUSED: |
| 1502 | case SXG_STATE_HALTING: |
| 1503 | goto drop; |
| 1504 | default: |
| 1505 | ASSERT(0); |
| 1506 | goto drop; |
| 1507 | } |
| 1508 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1509 | /* |
| 1510 | * memcpy(SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1511 | * RcvDataBufferHdr->VirtualAddress, Event->Length); |
| 1512 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1513 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1514 | /* Change buffer state to UPSTREAM */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1515 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 1516 | if (Event->Status & EVENT_STATUS_RCVERR) { |
| 1517 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvError", |
| 1518 | Event, Event->Status, Event->HostHandle, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1519 | /* XXXTODO - Remove this print later */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1520 | DBG_ERROR("SXG: Receive error %x\n", *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1521 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1522 | sxg_process_rcv_error(adapter, *(u32 *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1523 | SXG_RECEIVE_DATA_LOCATION |
| 1524 | (RcvDataBufferHdr)); |
| 1525 | goto drop; |
| 1526 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1527 | #if XXXTODO /* VLAN stuff */ |
| 1528 | /* If there's a VLAN tag, extract it and validate it */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1529 | if (((struct ether_header *) |
| 1530 | (SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr)))->EtherType |
| 1531 | == ETHERTYPE_VLAN) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1532 | if (SxgExtractVlanHeader(adapter, RcvDataBufferHdr, Event) != |
| 1533 | STATUS_SUCCESS) { |
| 1534 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, |
| 1535 | "BadVlan", Event, |
| 1536 | SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1537 | Event->Length, 0); |
| 1538 | goto drop; |
| 1539 | } |
| 1540 | } |
| 1541 | #endif |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1542 | /* Dumb-nic frame. See if it passes our mac filter and update stats */ |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1543 | |
| 1544 | /* |
| 1545 | * ASK if (!sxg_mac_filter(adapter, |
| 1546 | * SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1547 | * Event->Length)) { |
| 1548 | * SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "RcvFiltr", |
| 1549 | * Event, SXG_RECEIVE_DATA_LOCATION(RcvDataBufferHdr), |
| 1550 | * Event->Length, 0); |
| 1551 | * goto drop; |
| 1552 | * } |
| 1553 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1554 | |
| 1555 | Packet = RcvDataBufferHdr->SxgDumbRcvPacket; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1556 | SXG_ADJUST_RCV_PACKET(Packet, RcvDataBufferHdr, Event); |
| 1557 | Packet->protocol = eth_type_trans(Packet, adapter->netdev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1558 | |
| 1559 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumbRcv", |
| 1560 | RcvDataBufferHdr, Packet, Event->Length, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1561 | /* Lastly adjust the receive packet length. */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1562 | RcvDataBufferHdr->SxgDumbRcvPacket = NULL; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1563 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 1564 | if (RcvDataBufferHdr->skb) |
| 1565 | { |
| 1566 | spin_lock(&adapter->RcvQLock); |
| 1567 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1568 | adapter->RcvBuffersOnCard ++; |
| 1569 | spin_unlock(&adapter->RcvQLock); |
| 1570 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1571 | return (Packet); |
| 1572 | |
| 1573 | drop: |
| 1574 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DropRcv", |
| 1575 | RcvDataBufferHdr, Event->Length, 0, 0); |
| 1576 | adapter->Stats.RcvDiscards++; |
| 1577 | spin_lock(&adapter->RcvQLock); |
| 1578 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 1579 | spin_unlock(&adapter->RcvQLock); |
| 1580 | return (NULL); |
| 1581 | } |
| 1582 | |
| 1583 | /* |
| 1584 | * sxg_process_rcv_error - process receive error and update |
| 1585 | * stats |
| 1586 | * |
| 1587 | * Arguments: |
| 1588 | * adapter - Adapter structure |
| 1589 | * ErrorStatus - 4-byte receive error status |
| 1590 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1591 | * Return Value : None |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1592 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1593 | static void sxg_process_rcv_error(struct adapter_t *adapter, u32 ErrorStatus) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1594 | { |
| 1595 | u32 Error; |
| 1596 | |
| 1597 | adapter->Stats.RcvErrors++; |
| 1598 | |
| 1599 | if (ErrorStatus & SXG_RCV_STATUS_TRANSPORT_ERROR) { |
| 1600 | Error = ErrorStatus & SXG_RCV_STATUS_TRANSPORT_MASK; |
| 1601 | switch (Error) { |
| 1602 | case SXG_RCV_STATUS_TRANSPORT_CSUM: |
| 1603 | adapter->Stats.TransportCsum++; |
| 1604 | break; |
| 1605 | case SXG_RCV_STATUS_TRANSPORT_UFLOW: |
| 1606 | adapter->Stats.TransportUflow++; |
| 1607 | break; |
| 1608 | case SXG_RCV_STATUS_TRANSPORT_HDRLEN: |
| 1609 | adapter->Stats.TransportHdrLen++; |
| 1610 | break; |
| 1611 | } |
| 1612 | } |
| 1613 | if (ErrorStatus & SXG_RCV_STATUS_NETWORK_ERROR) { |
| 1614 | Error = ErrorStatus & SXG_RCV_STATUS_NETWORK_MASK; |
| 1615 | switch (Error) { |
| 1616 | case SXG_RCV_STATUS_NETWORK_CSUM: |
| 1617 | adapter->Stats.NetworkCsum++; |
| 1618 | break; |
| 1619 | case SXG_RCV_STATUS_NETWORK_UFLOW: |
| 1620 | adapter->Stats.NetworkUflow++; |
| 1621 | break; |
| 1622 | case SXG_RCV_STATUS_NETWORK_HDRLEN: |
| 1623 | adapter->Stats.NetworkHdrLen++; |
| 1624 | break; |
| 1625 | } |
| 1626 | } |
| 1627 | if (ErrorStatus & SXG_RCV_STATUS_PARITY) { |
| 1628 | adapter->Stats.Parity++; |
| 1629 | } |
| 1630 | if (ErrorStatus & SXG_RCV_STATUS_LINK_ERROR) { |
| 1631 | Error = ErrorStatus & SXG_RCV_STATUS_LINK_MASK; |
| 1632 | switch (Error) { |
| 1633 | case SXG_RCV_STATUS_LINK_PARITY: |
| 1634 | adapter->Stats.LinkParity++; |
| 1635 | break; |
| 1636 | case SXG_RCV_STATUS_LINK_EARLY: |
| 1637 | adapter->Stats.LinkEarly++; |
| 1638 | break; |
| 1639 | case SXG_RCV_STATUS_LINK_BUFOFLOW: |
| 1640 | adapter->Stats.LinkBufOflow++; |
| 1641 | break; |
| 1642 | case SXG_RCV_STATUS_LINK_CODE: |
| 1643 | adapter->Stats.LinkCode++; |
| 1644 | break; |
| 1645 | case SXG_RCV_STATUS_LINK_DRIBBLE: |
| 1646 | adapter->Stats.LinkDribble++; |
| 1647 | break; |
| 1648 | case SXG_RCV_STATUS_LINK_CRC: |
| 1649 | adapter->Stats.LinkCrc++; |
| 1650 | break; |
| 1651 | case SXG_RCV_STATUS_LINK_OFLOW: |
| 1652 | adapter->Stats.LinkOflow++; |
| 1653 | break; |
| 1654 | case SXG_RCV_STATUS_LINK_UFLOW: |
| 1655 | adapter->Stats.LinkUflow++; |
| 1656 | break; |
| 1657 | } |
| 1658 | } |
| 1659 | } |
| 1660 | |
| 1661 | /* |
| 1662 | * sxg_mac_filter |
| 1663 | * |
| 1664 | * Arguments: |
| 1665 | * adapter - Adapter structure |
| 1666 | * pether - Ethernet header |
| 1667 | * length - Frame length |
| 1668 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1669 | * Return Value : TRUE if the frame is to be allowed |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1670 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1671 | static bool sxg_mac_filter(struct adapter_t *adapter, |
| 1672 | struct ether_header *EtherHdr, ushort length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1673 | { |
| 1674 | bool EqualAddr; |
| 1675 | |
| 1676 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 1677 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1678 | /* broadcast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1679 | if (adapter->MacFilter & MAC_BCAST) { |
| 1680 | adapter->Stats.DumbRcvBcastPkts++; |
| 1681 | adapter->Stats.DumbRcvBcastBytes += length; |
| 1682 | adapter->Stats.DumbRcvPkts++; |
| 1683 | adapter->Stats.DumbRcvBytes += length; |
| 1684 | return (TRUE); |
| 1685 | } |
| 1686 | } else { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1687 | /* multicast */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1688 | if (adapter->MacFilter & MAC_ALLMCAST) { |
| 1689 | adapter->Stats.DumbRcvMcastPkts++; |
| 1690 | adapter->Stats.DumbRcvMcastBytes += length; |
| 1691 | adapter->Stats.DumbRcvPkts++; |
| 1692 | adapter->Stats.DumbRcvBytes += length; |
| 1693 | return (TRUE); |
| 1694 | } |
| 1695 | if (adapter->MacFilter & MAC_MCAST) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1696 | struct sxg_multicast_address *MulticastAddrs = |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1697 | adapter->MulticastAddrs; |
| 1698 | while (MulticastAddrs) { |
| 1699 | ETHER_EQ_ADDR(MulticastAddrs->Address, |
| 1700 | EtherHdr->ether_dhost, |
| 1701 | EqualAddr); |
| 1702 | if (EqualAddr) { |
| 1703 | adapter->Stats. |
| 1704 | DumbRcvMcastPkts++; |
| 1705 | adapter->Stats. |
| 1706 | DumbRcvMcastBytes += length; |
| 1707 | adapter->Stats.DumbRcvPkts++; |
| 1708 | adapter->Stats.DumbRcvBytes += |
| 1709 | length; |
| 1710 | return (TRUE); |
| 1711 | } |
| 1712 | MulticastAddrs = MulticastAddrs->Next; |
| 1713 | } |
| 1714 | } |
| 1715 | } |
| 1716 | } else if (adapter->MacFilter & MAC_DIRECTED) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1717 | /* |
| 1718 | * Not broadcast or multicast. Must be directed at us or |
| 1719 | * the card is in promiscuous mode. Either way, consider it |
| 1720 | * ours if MAC_DIRECTED is set |
| 1721 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1722 | adapter->Stats.DumbRcvUcastPkts++; |
| 1723 | adapter->Stats.DumbRcvUcastBytes += length; |
| 1724 | adapter->Stats.DumbRcvPkts++; |
| 1725 | adapter->Stats.DumbRcvBytes += length; |
| 1726 | return (TRUE); |
| 1727 | } |
| 1728 | if (adapter->MacFilter & MAC_PROMISC) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1729 | /* Whatever it is, keep it. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1730 | adapter->Stats.DumbRcvPkts++; |
| 1731 | adapter->Stats.DumbRcvBytes += length; |
| 1732 | return (TRUE); |
| 1733 | } |
| 1734 | adapter->Stats.RcvDiscards++; |
| 1735 | return (FALSE); |
| 1736 | } |
| 1737 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1738 | static int sxg_register_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1739 | { |
| 1740 | if (!adapter->intrregistered) { |
| 1741 | int retval; |
| 1742 | |
| 1743 | DBG_ERROR |
| 1744 | ("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x] %x\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1745 | __func__, adapter, adapter->netdev->irq, NR_IRQS); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1746 | |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1747 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 1748 | sxg_global.flags); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1749 | |
| 1750 | retval = request_irq(adapter->netdev->irq, |
| 1751 | &sxg_isr, |
| 1752 | IRQF_SHARED, |
| 1753 | adapter->netdev->name, adapter->netdev); |
| 1754 | |
| 1755 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 1756 | |
| 1757 | if (retval) { |
| 1758 | DBG_ERROR("sxg: request_irq (%s) FAILED [%x]\n", |
| 1759 | adapter->netdev->name, retval); |
| 1760 | return (retval); |
| 1761 | } |
| 1762 | adapter->intrregistered = 1; |
| 1763 | adapter->IntRegistered = TRUE; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1764 | /* Disable RSS with line-based interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1765 | adapter->MsiEnabled = FALSE; |
| 1766 | adapter->RssEnabled = FALSE; |
| 1767 | DBG_ERROR("sxg: %s AllocAdaptRsrcs adapter[%p] dev->irq[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1768 | __func__, adapter, adapter->netdev->irq); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1769 | } |
| 1770 | return (STATUS_SUCCESS); |
| 1771 | } |
| 1772 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1773 | static void sxg_deregister_interrupt(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1774 | { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1775 | DBG_ERROR("sxg: %s ENTER adapter[%p]\n", __func__, adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1776 | #if XXXTODO |
| 1777 | slic_init_cleanup(adapter); |
| 1778 | #endif |
| 1779 | memset(&adapter->stats, 0, sizeof(struct net_device_stats)); |
| 1780 | adapter->error_interrupts = 0; |
| 1781 | adapter->rcv_interrupts = 0; |
| 1782 | adapter->xmit_interrupts = 0; |
| 1783 | adapter->linkevent_interrupts = 0; |
| 1784 | adapter->upr_interrupts = 0; |
| 1785 | adapter->num_isrs = 0; |
| 1786 | adapter->xmit_completes = 0; |
| 1787 | adapter->rcv_broadcasts = 0; |
| 1788 | adapter->rcv_multicasts = 0; |
| 1789 | adapter->rcv_unicasts = 0; |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1790 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1791 | } |
| 1792 | |
| 1793 | /* |
| 1794 | * sxg_if_init |
| 1795 | * |
| 1796 | * Perform initialization of our slic interface. |
| 1797 | * |
| 1798 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1799 | static int sxg_if_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1800 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1801 | struct net_device *dev = adapter->netdev; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1802 | int status = 0; |
| 1803 | |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1804 | DBG_ERROR("sxg: %s (%s) ENTER states[%d:%d] flags[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1805 | __func__, adapter->netdev->name, |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 1806 | adapter->state, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1807 | adapter->linkstate, dev->flags); |
| 1808 | |
| 1809 | /* adapter should be down at this point */ |
| 1810 | if (adapter->state != ADAPT_DOWN) { |
| 1811 | DBG_ERROR("sxg_if_init adapter->state != ADAPT_DOWN\n"); |
| 1812 | return (-EIO); |
| 1813 | } |
| 1814 | ASSERT(adapter->linkstate == LINK_DOWN); |
| 1815 | |
| 1816 | adapter->devflags_prev = dev->flags; |
| 1817 | adapter->macopts = MAC_DIRECTED; |
| 1818 | if (dev->flags) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1819 | DBG_ERROR("sxg: %s (%s) Set MAC options: ", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1820 | adapter->netdev->name); |
| 1821 | if (dev->flags & IFF_BROADCAST) { |
| 1822 | adapter->macopts |= MAC_BCAST; |
| 1823 | DBG_ERROR("BCAST "); |
| 1824 | } |
| 1825 | if (dev->flags & IFF_PROMISC) { |
| 1826 | adapter->macopts |= MAC_PROMISC; |
| 1827 | DBG_ERROR("PROMISC "); |
| 1828 | } |
| 1829 | if (dev->flags & IFF_ALLMULTI) { |
| 1830 | adapter->macopts |= MAC_ALLMCAST; |
| 1831 | DBG_ERROR("ALL_MCAST "); |
| 1832 | } |
| 1833 | if (dev->flags & IFF_MULTICAST) { |
| 1834 | adapter->macopts |= MAC_MCAST; |
| 1835 | DBG_ERROR("MCAST "); |
| 1836 | } |
| 1837 | DBG_ERROR("\n"); |
| 1838 | } |
| 1839 | status = sxg_register_interrupt(adapter); |
| 1840 | if (status != STATUS_SUCCESS) { |
| 1841 | DBG_ERROR("sxg_if_init: sxg_register_interrupt FAILED %x\n", |
| 1842 | status); |
| 1843 | sxg_deregister_interrupt(adapter); |
| 1844 | return (status); |
| 1845 | } |
| 1846 | |
| 1847 | adapter->state = ADAPT_UP; |
| 1848 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 1849 | /* clear any pending events, then enable interrupts */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1850 | DBG_ERROR("sxg: %s ENABLE interrupts(slic)\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1851 | |
| 1852 | return (STATUS_SUCCESS); |
| 1853 | } |
| 1854 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1855 | static int sxg_entry_open(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1856 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1857 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1858 | int status; |
| 1859 | |
| 1860 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1861 | DBG_ERROR("sxg: %s adapter->activated[%d]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1862 | adapter->activated); |
| 1863 | DBG_ERROR |
| 1864 | ("sxg: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] port[%d]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1865 | __func__, adapter->netdev->name, jiffies, smp_processor_id(), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1866 | adapter->netdev, adapter, adapter->port); |
| 1867 | |
| 1868 | netif_stop_queue(adapter->netdev); |
| 1869 | |
| 1870 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
| 1871 | if (!adapter->activated) { |
| 1872 | sxg_global.num_sxg_ports_active++; |
| 1873 | adapter->activated = 1; |
| 1874 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1875 | /* Initialize the adapter */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1876 | DBG_ERROR("sxg: %s ENTER sxg_initialize_adapter\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1877 | status = sxg_initialize_adapter(adapter); |
| 1878 | DBG_ERROR("sxg: %s EXIT sxg_initialize_adapter status[%x]\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1879 | __func__, status); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1880 | |
| 1881 | if (status == STATUS_SUCCESS) { |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1882 | DBG_ERROR("sxg: %s ENTER sxg_if_init\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1883 | status = sxg_if_init(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1884 | DBG_ERROR("sxg: %s EXIT sxg_if_init status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1885 | status); |
| 1886 | } |
| 1887 | |
| 1888 | if (status != STATUS_SUCCESS) { |
| 1889 | if (adapter->activated) { |
| 1890 | sxg_global.num_sxg_ports_active--; |
| 1891 | adapter->activated = 0; |
| 1892 | } |
| 1893 | spin_unlock_irqrestore(&sxg_global.driver_lock, |
| 1894 | sxg_global.flags); |
| 1895 | return (status); |
| 1896 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1897 | DBG_ERROR("sxg: %s ENABLE ALL INTERRUPTS\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1898 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 1899 | /* Enable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1900 | SXG_ENABLE_ALL_INTERRUPTS(adapter); |
| 1901 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1902 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1903 | |
| 1904 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
| 1905 | return STATUS_SUCCESS; |
| 1906 | } |
| 1907 | |
| 1908 | static void __devexit sxg_entry_remove(struct pci_dev *pcidev) |
| 1909 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1910 | struct net_device *dev = pci_get_drvdata(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1911 | u32 mmio_start = 0; |
| 1912 | unsigned int mmio_len = 0; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1913 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1914 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1915 | set_bit(ADAPT_DOWN, &adapter->state); |
| 1916 | flush_scheduled_work(); |
| 1917 | |
| 1918 | /* Deallocate Resources */ |
| 1919 | |
| 1920 | SxgFreeResources(adapter); |
| 1921 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1922 | ASSERT(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1923 | DBG_ERROR("sxg: %s ENTER dev[%p] adapter[%p]\n", __func__, dev, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1924 | adapter); |
| 1925 | sxg_deregister_interrupt(adapter); |
| 1926 | sxg_unmap_mmio_space(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1927 | DBG_ERROR("sxg: %s unregister_netdev\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1928 | |
| 1929 | mmio_start = pci_resource_start(pcidev, 0); |
| 1930 | mmio_len = pci_resource_len(pcidev, 0); |
| 1931 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1932 | DBG_ERROR("sxg: %s rel_region(0) start[%x] len[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1933 | mmio_start, mmio_len); |
| 1934 | release_mem_region(mmio_start, mmio_len); |
| 1935 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1936 | /* |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1937 | DBG_ERROR("sxg: %s iounmap dev->base_addr[%x]\n", __func__, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 1938 | (unsigned int)dev->base_addr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1939 | iounmap((char *)dev->base_addr); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1940 | */ |
| 1941 | mmio_start = pci_resource_start(pcidev, 2); |
| 1942 | mmio_len = pci_resource_len(pcidev, 2); |
| 1943 | |
| 1944 | DBG_ERROR("sxg: %s rel_region(2) start[%x] len[%x]\n", __FUNCTION__, |
| 1945 | mmio_start, mmio_len); |
| 1946 | release_mem_region(mmio_start, mmio_len); |
| 1947 | |
| 1948 | iounmap((char *)dev->base_addr); |
| 1949 | unregister_netdev(dev); |
| 1950 | //pci_release_regions(pcidev); |
| 1951 | //free_netdev(dev); |
| 1952 | pci_disable_device(pcidev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1953 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1954 | DBG_ERROR("sxg: %s deallocate device\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1955 | kfree(dev); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1956 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1957 | } |
| 1958 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1959 | static int sxg_entry_halt(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1960 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 1961 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1962 | |
| 1963 | spin_lock_irqsave(&sxg_global.driver_lock, sxg_global.flags); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1964 | DBG_ERROR("sxg: %s (%s) ENTER\n", __func__, dev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1965 | |
| 1966 | netif_stop_queue(adapter->netdev); |
| 1967 | adapter->state = ADAPT_DOWN; |
| 1968 | adapter->linkstate = LINK_DOWN; |
| 1969 | adapter->devflags_prev = 0; |
| 1970 | DBG_ERROR("sxg: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1971 | __func__, dev->name, adapter, adapter->state); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1972 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 1973 | DBG_ERROR("sxg: %s (%s) EXIT\n", __func__, dev->name); |
| 1974 | DBG_ERROR("sxg: %s EXIT\n", __func__); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1975 | |
| 1976 | /* Disable interrupts */ |
| 1977 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 1978 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1979 | spin_unlock_irqrestore(&sxg_global.driver_lock, sxg_global.flags); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 1980 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1981 | return (STATUS_SUCCESS); |
| 1982 | } |
| 1983 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 1984 | static int sxg_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1985 | { |
| 1986 | ASSERT(rq); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1987 | /* DBG_ERROR("sxg: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1988 | switch (cmd) { |
| 1989 | case SIOCSLICSETINTAGG: |
| 1990 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1991 | /* struct adapter_t *adapter = (struct adapter_t *) |
| 1992 | * netdev_priv(dev); |
| 1993 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 1994 | u32 data[7]; |
| 1995 | u32 intagg; |
| 1996 | |
| 1997 | if (copy_from_user(data, rq->ifr_data, 28)) { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 1998 | DBG_ERROR("copy_from_user FAILED getting \ |
| 1999 | initial params\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2000 | return -EFAULT; |
| 2001 | } |
| 2002 | intagg = data[0]; |
| 2003 | printk(KERN_EMERG |
| 2004 | "%s: set interrupt aggregation to %d\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2005 | __func__, intagg); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2006 | return 0; |
| 2007 | } |
| 2008 | |
| 2009 | default: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2010 | /* DBG_ERROR("sxg: %s UNSUPPORTED[%x]\n", __func__, cmd); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2011 | return -EOPNOTSUPP; |
| 2012 | } |
| 2013 | return 0; |
| 2014 | } |
| 2015 | |
| 2016 | #define NORMAL_ETHFRAME 0 |
| 2017 | |
| 2018 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2019 | * sxg_send_packets - Send a skb packet |
| 2020 | * |
| 2021 | * Arguments: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2022 | * skb - The packet to send |
| 2023 | * dev - Our linux net device that refs our adapter |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2024 | * |
| 2025 | * Return: |
| 2026 | * 0 regardless of outcome XXXTODO refer to e1000 driver |
| 2027 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2028 | static int sxg_send_packets(struct sk_buff *skb, struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2029 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2030 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2031 | u32 status = STATUS_SUCCESS; |
| 2032 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2033 | /* |
| 2034 | * DBG_ERROR("sxg: %s ENTER sxg_send_packets skb[%p]\n", __FUNCTION__, |
| 2035 | * skb); |
| 2036 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2037 | printk("ASK:sxg_send_packets: skb[%p]\n", skb); |
| 2038 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2039 | /* Check the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2040 | switch (adapter->State) { |
| 2041 | case SXG_STATE_INITIALIZING: |
| 2042 | case SXG_STATE_HALTED: |
| 2043 | case SXG_STATE_SHUTDOWN: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2044 | ASSERT(0); /* unexpected */ |
| 2045 | /* fall through */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2046 | case SXG_STATE_RESETTING: |
| 2047 | case SXG_STATE_SLEEP: |
| 2048 | case SXG_STATE_BOOTDIAG: |
| 2049 | case SXG_STATE_DIAG: |
| 2050 | case SXG_STATE_HALTING: |
| 2051 | status = STATUS_FAILURE; |
| 2052 | break; |
| 2053 | case SXG_STATE_RUNNING: |
| 2054 | if (adapter->LinkState != SXG_LINK_UP) { |
| 2055 | status = STATUS_FAILURE; |
| 2056 | } |
| 2057 | break; |
| 2058 | default: |
| 2059 | ASSERT(0); |
| 2060 | status = STATUS_FAILURE; |
| 2061 | } |
| 2062 | if (status != STATUS_SUCCESS) { |
| 2063 | goto xmit_fail; |
| 2064 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2065 | /* send a packet */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2066 | status = sxg_transmit_packet(adapter, skb); |
| 2067 | if (status == STATUS_SUCCESS) { |
| 2068 | goto xmit_done; |
| 2069 | } |
| 2070 | |
| 2071 | xmit_fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2072 | /* reject & complete all the packets if they cant be sent */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2073 | if (status != STATUS_SUCCESS) { |
| 2074 | #if XXXTODO |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2075 | /* sxg_send_packets_fail(adapter, skb, status); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2076 | #else |
| 2077 | SXG_DROP_DUMB_SEND(adapter, skb); |
| 2078 | adapter->stats.tx_dropped++; |
| 2079 | #endif |
| 2080 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2081 | DBG_ERROR("sxg: %s EXIT sxg_send_packets status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2082 | status); |
| 2083 | |
| 2084 | xmit_done: |
| 2085 | return 0; |
| 2086 | } |
| 2087 | |
| 2088 | /* |
| 2089 | * sxg_transmit_packet |
| 2090 | * |
| 2091 | * This function transmits a single packet. |
| 2092 | * |
| 2093 | * Arguments - |
| 2094 | * adapter - Pointer to our adapter structure |
| 2095 | * skb - The packet to be sent |
| 2096 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2097 | * Return - STATUS of send |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2098 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2099 | static int sxg_transmit_packet(struct adapter_t *adapter, struct sk_buff *skb) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2100 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2101 | struct sxg_x64_sgl *pSgl; |
| 2102 | struct sxg_scatter_gather *SxgSgl; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2103 | /* void *SglBuffer; */ |
| 2104 | /* u32 SglBufferLength; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2105 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2106 | /* |
| 2107 | * The vast majority of work is done in the shared |
| 2108 | * sxg_dumb_sgl routine. |
| 2109 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2110 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSend", |
| 2111 | adapter, skb, 0, 0); |
| 2112 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2113 | /* Allocate a SGL buffer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2114 | SXG_GET_SGL_BUFFER(adapter, SxgSgl); |
| 2115 | if (!SxgSgl) { |
| 2116 | adapter->Stats.NoSglBuf++; |
| 2117 | adapter->Stats.XmtErrors++; |
| 2118 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "SndPktF1", |
| 2119 | adapter, skb, 0, 0); |
| 2120 | return (STATUS_RESOURCES); |
| 2121 | } |
| 2122 | ASSERT(SxgSgl->adapter == adapter); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 2123 | /*SglBuffer = SXG_SGL_BUFFER(SxgSgl); |
| 2124 | SglBufferLength = SXG_SGL_BUF_SIZE; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2125 | SxgSgl->VlanTag.VlanTci = 0; |
| 2126 | SxgSgl->VlanTag.VlanTpid = 0; |
| 2127 | SxgSgl->Type = SXG_SGL_DUMB; |
| 2128 | SxgSgl->DumbPacket = skb; |
| 2129 | pSgl = NULL; |
| 2130 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2131 | /* Call the common sxg_dumb_sgl routine to complete the send. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2132 | sxg_dumb_sgl(pSgl, SxgSgl); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2133 | /* Return success sxg_dumb_sgl (or something later) will complete it.*/ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2134 | return (STATUS_SUCCESS); |
| 2135 | } |
| 2136 | |
| 2137 | /* |
| 2138 | * sxg_dumb_sgl |
| 2139 | * |
| 2140 | * Arguments: |
| 2141 | * pSgl - |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2142 | * SxgSgl - struct sxg_scatter_gather |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2143 | * |
| 2144 | * Return Value: |
| 2145 | * None. |
| 2146 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2147 | static void sxg_dumb_sgl(struct sxg_x64_sgl *pSgl, |
| 2148 | struct sxg_scatter_gather *SxgSgl) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2149 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2150 | struct adapter_t *adapter = SxgSgl->adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2151 | struct sk_buff *skb = SxgSgl->DumbPacket; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2152 | /* For now, all dumb-nic sends go on RSS queue zero */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2153 | struct sxg_xmt_ring *XmtRing = &adapter->XmtRings[0]; |
| 2154 | struct sxg_ring_info *XmtRingInfo = &adapter->XmtRingZeroInfo; |
| 2155 | struct sxg_cmd *XmtCmd = NULL; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2156 | /* u32 Index = 0; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2157 | u32 DataLength = skb->len; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2158 | /* unsigned int BufLen; */ |
| 2159 | /* u32 SglOffset; */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2160 | u64 phys_addr; |
| 2161 | |
| 2162 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbSgl", |
| 2163 | pSgl, SxgSgl, 0, 0); |
| 2164 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2165 | /* Set aside a pointer to the sgl */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2166 | SxgSgl->pSgl = pSgl; |
| 2167 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2168 | /* Sanity check that our SGL format is as we expect. */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2169 | ASSERT(sizeof(struct sxg_x64_sge) == sizeof(struct sxg_x64_sge)); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2170 | /* Shouldn't be a vlan tag on this frame */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2171 | ASSERT(SxgSgl->VlanTag.VlanTci == 0); |
| 2172 | ASSERT(SxgSgl->VlanTag.VlanTpid == 0); |
| 2173 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2174 | /* |
| 2175 | * From here below we work with the SGL placed in our |
| 2176 | * buffer. |
| 2177 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2178 | |
| 2179 | SxgSgl->Sgl.NumberOfElements = 1; |
| 2180 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2181 | /* Grab the spinlock and acquire a command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2182 | spin_lock(&adapter->XmtZeroLock); |
| 2183 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2184 | if (XmtCmd == NULL) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2185 | /* |
| 2186 | * Call sxg_complete_slow_send to see if we can |
| 2187 | * free up any XmtRingZero entries and then try again |
| 2188 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2189 | spin_unlock(&adapter->XmtZeroLock); |
| 2190 | sxg_complete_slow_send(adapter); |
| 2191 | spin_lock(&adapter->XmtZeroLock); |
| 2192 | SXG_GET_CMD(XmtRing, XmtRingInfo, XmtCmd, SxgSgl); |
| 2193 | if (XmtCmd == NULL) { |
| 2194 | adapter->Stats.XmtZeroFull++; |
| 2195 | goto abortcmd; |
| 2196 | } |
| 2197 | } |
| 2198 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DumbCmd", |
| 2199 | XmtCmd, XmtRingInfo->Head, XmtRingInfo->Tail, 0); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2200 | /* Update stats */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2201 | adapter->Stats.DumbXmtPkts++; |
| 2202 | adapter->Stats.DumbXmtBytes += DataLength; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2203 | #if XXXTODO /* Stats stuff */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2204 | if (SXG_MULTICAST_PACKET(EtherHdr)) { |
| 2205 | if (SXG_BROADCAST_PACKET(EtherHdr)) { |
| 2206 | adapter->Stats.DumbXmtBcastPkts++; |
| 2207 | adapter->Stats.DumbXmtBcastBytes += DataLength; |
| 2208 | } else { |
| 2209 | adapter->Stats.DumbXmtMcastPkts++; |
| 2210 | adapter->Stats.DumbXmtMcastBytes += DataLength; |
| 2211 | } |
| 2212 | } else { |
| 2213 | adapter->Stats.DumbXmtUcastPkts++; |
| 2214 | adapter->Stats.DumbXmtUcastBytes += DataLength; |
| 2215 | } |
| 2216 | #endif |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2217 | /* |
| 2218 | * Fill in the command |
| 2219 | * Copy out the first SGE to the command and adjust for offset |
| 2220 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2221 | phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2222 | PCI_DMA_TODEVICE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2223 | memset(XmtCmd, '\0', sizeof(*XmtCmd)); |
| 2224 | XmtCmd->Buffer.FirstSgeAddress = phys_addr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2225 | XmtCmd->Buffer.FirstSgeLength = DataLength; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2226 | XmtCmd->Buffer.SgeOffset = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2227 | XmtCmd->Buffer.TotalLength = DataLength; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2228 | XmtCmd->SgEntries = 1; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2229 | XmtCmd->Flags = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2230 | /* |
| 2231 | * Advance transmit cmd descripter by 1. |
| 2232 | * NOTE - See comments in SxgTcpOutput where we write |
| 2233 | * to the XmtCmd register regarding CPU ID values and/or |
| 2234 | * multiple commands. |
| 2235 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2236 | WRITE_REG(adapter->UcodeRegs[0].XmtCmd, 1, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2237 | adapter->Stats.XmtQLen++; /* Stats within lock */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2238 | spin_unlock(&adapter->XmtZeroLock); |
| 2239 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XDumSgl2", |
| 2240 | XmtCmd, pSgl, SxgSgl, 0); |
| 2241 | return; |
| 2242 | |
| 2243 | abortcmd: |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2244 | /* |
| 2245 | * NOTE - Only jump to this label AFTER grabbing the |
| 2246 | * XmtZeroLock, and DO NOT DROP IT between the |
| 2247 | * command allocation and the following abort. |
| 2248 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2249 | if (XmtCmd) { |
| 2250 | SXG_ABORT_CMD(XmtRingInfo); |
| 2251 | } |
| 2252 | spin_unlock(&adapter->XmtZeroLock); |
| 2253 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2254 | /* |
| 2255 | * failsgl: |
| 2256 | * Jump to this label if failure occurs before the |
| 2257 | * XmtZeroLock is grabbed |
| 2258 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2259 | adapter->Stats.XmtErrors++; |
| 2260 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "DumSGFal", |
| 2261 | pSgl, SxgSgl, XmtRingInfo->Head, XmtRingInfo->Tail); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2262 | /* SxgSgl->DumbPacket is the skb */ |
| 2263 | SXG_COMPLETE_DUMB_SEND(adapter, SxgSgl->DumbPacket); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2264 | } |
| 2265 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2266 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2267 | * Link management functions |
| 2268 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2269 | * sxg_initialize_link - Initialize the link stuff |
| 2270 | * |
| 2271 | * Arguments - |
| 2272 | * adapter - A pointer to our adapter structure |
| 2273 | * |
| 2274 | * Return |
| 2275 | * status |
| 2276 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2277 | static int sxg_initialize_link(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2278 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2279 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2280 | u32 Value; |
| 2281 | u32 ConfigData; |
| 2282 | u32 MaxFrame; |
| 2283 | int status; |
| 2284 | |
| 2285 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitLink", |
| 2286 | adapter, 0, 0, 0); |
| 2287 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2288 | /* Reset PHY and XGXS module */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2289 | WRITE_REG(HwRegs->LinkStatus, LS_SERDES_POWER_DOWN, TRUE); |
| 2290 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2291 | /* Reset transmit configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2292 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_RESET, TRUE); |
| 2293 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2294 | /* Reset receive configuration register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2295 | WRITE_REG(HwRegs->RcvConfig, RCV_CONFIG_RESET, TRUE); |
| 2296 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2297 | /* Reset all MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2298 | WRITE_REG(HwRegs->MacConfig0, AXGMAC_CFG0_SUB_RESET, TRUE); |
| 2299 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2300 | /* |
| 2301 | * Link address 0 |
| 2302 | * XXXTODO - This assumes the MAC address (0a:0b:0c:0d:0e:0f) |
| 2303 | * is stored with the first nibble (0a) in the byte 0 |
| 2304 | * of the Mac address. Possibly reverse? |
| 2305 | */ |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2306 | Value = *(u32 *) adapter->macaddr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2307 | WRITE_REG(HwRegs->LinkAddress0Low, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2308 | /* also write the MAC address to the MAC. Endian is reversed. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2309 | WRITE_REG(HwRegs->MacAddressLow, ntohl(Value), TRUE); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2310 | Value = (*(u16 *) & adapter->macaddr[4] & 0x0000FFFF); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2311 | WRITE_REG(HwRegs->LinkAddress0High, Value | LINK_ADDRESS_ENABLE, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2312 | /* endian swap for the MAC (put high bytes in bits [31:16], swapped) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2313 | Value = ntohl(Value); |
| 2314 | WRITE_REG(HwRegs->MacAddressHigh, Value, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2315 | /* Link address 1 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2316 | WRITE_REG(HwRegs->LinkAddress1Low, 0, TRUE); |
| 2317 | WRITE_REG(HwRegs->LinkAddress1High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2318 | /* Link address 2 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2319 | WRITE_REG(HwRegs->LinkAddress2Low, 0, TRUE); |
| 2320 | WRITE_REG(HwRegs->LinkAddress2High, 0, TRUE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2321 | /* Link address 3 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2322 | WRITE_REG(HwRegs->LinkAddress3Low, 0, TRUE); |
| 2323 | WRITE_REG(HwRegs->LinkAddress3High, 0, TRUE); |
| 2324 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2325 | /* Enable MAC modules */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2326 | WRITE_REG(HwRegs->MacConfig0, 0, TRUE); |
| 2327 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2328 | /* Configure MAC */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2329 | WRITE_REG(HwRegs->MacConfig1, ( |
| 2330 | /* Allow sending of pause */ |
| 2331 | AXGMAC_CFG1_XMT_PAUSE | |
| 2332 | /* Enable XMT */ |
| 2333 | AXGMAC_CFG1_XMT_EN | |
| 2334 | /* Enable detection of pause */ |
| 2335 | AXGMAC_CFG1_RCV_PAUSE | |
| 2336 | /* Enable receive */ |
| 2337 | AXGMAC_CFG1_RCV_EN | |
| 2338 | /* short frame detection */ |
| 2339 | AXGMAC_CFG1_SHORT_ASSERT | |
| 2340 | /* Verify frame length */ |
| 2341 | AXGMAC_CFG1_CHECK_LEN | |
| 2342 | /* Generate FCS */ |
| 2343 | AXGMAC_CFG1_GEN_FCS | |
| 2344 | /* Pad frames to 64 bytes */ |
| 2345 | AXGMAC_CFG1_PAD_64), |
| 2346 | TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2347 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2348 | /* Set AXGMAC max frame length if jumbo. Not needed for standard MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2349 | if (adapter->JumboEnabled) { |
| 2350 | WRITE_REG(HwRegs->MacMaxFrameLen, AXGMAC_MAXFRAME_JUMBO, TRUE); |
| 2351 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2352 | /* |
| 2353 | * AMIIM Configuration Register - |
| 2354 | * The value placed in the AXGMAC_AMIIM_CFG_HALF_CLOCK portion |
| 2355 | * (bottom bits) of this register is used to determine the MDC frequency |
| 2356 | * as specified in the A-XGMAC Design Document. This value must not be |
| 2357 | * zero. The following value (62 or 0x3E) is based on our MAC transmit |
| 2358 | * clock frequency (MTCLK) of 312.5 MHz. Given a maximum MDIO clock |
| 2359 | * frequency of 2.5 MHz (see the PHY spec), we get: |
| 2360 | * 312.5/(2*(X+1)) < 2.5 ==> X = 62. |
| 2361 | * This value happens to be the default value for this register, so we |
| 2362 | * really don't have to do this. |
| 2363 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2364 | WRITE_REG(HwRegs->MacAmiimConfig, 0x0000003E, TRUE); |
| 2365 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2366 | /* Power up and enable PHY and XAUI/XGXS/Serdes logic */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2367 | WRITE_REG(HwRegs->LinkStatus, |
| 2368 | (LS_PHY_CLR_RESET | |
| 2369 | LS_XGXS_ENABLE | |
| 2370 | LS_XGXS_CTL | LS_PHY_CLK_EN | LS_ATTN_ALARM), TRUE); |
| 2371 | DBG_ERROR("After Power Up and enable PHY in sxg_initialize_link\n"); |
| 2372 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2373 | /* |
| 2374 | * Per information given by Aeluros, wait 100 ms after removing reset. |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2375 | * It's not enough to wait for the self-clearing reset bit in reg 0 to |
| 2376 | * clear. |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2377 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2378 | mdelay(100); |
| 2379 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2380 | /* Verify the PHY has come up by checking that the Reset bit has |
| 2381 | * cleared. |
| 2382 | */ |
| 2383 | status = sxg_read_mdio_reg(adapter, |
| 2384 | MIIM_DEV_PHY_PMA, /* PHY PMA/PMD module */ |
| 2385 | PHY_PMA_CONTROL1, /* PMA/PMD control register */ |
| 2386 | &Value); |
| 2387 | DBG_ERROR("After sxg_read_mdio_reg Value[%x] fail=%x\n", Value, |
| 2388 | (Value & PMA_CONTROL1_RESET)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2389 | if (status != STATUS_SUCCESS) |
| 2390 | return (STATUS_FAILURE); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2391 | if (Value & PMA_CONTROL1_RESET) /* reset complete if bit is 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2392 | return (STATUS_FAILURE); |
| 2393 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2394 | /* The SERDES should be initialized by now - confirm */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2395 | READ_REG(HwRegs->LinkStatus, Value); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2396 | if (Value & LS_SERDES_DOWN) /* verify SERDES is initialized */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2397 | return (STATUS_FAILURE); |
| 2398 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2399 | /* The XAUI link should also be up - confirm */ |
| 2400 | if (!(Value & LS_XAUI_LINK_UP)) /* verify XAUI link is up */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2401 | return (STATUS_FAILURE); |
| 2402 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2403 | /* Initialize the PHY */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2404 | status = sxg_phy_init(adapter); |
| 2405 | if (status != STATUS_SUCCESS) |
| 2406 | return (STATUS_FAILURE); |
| 2407 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2408 | /* Enable the Link Alarm */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2409 | |
| 2410 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2411 | * LASI_CONTROL - LASI control register |
| 2412 | * LASI_CTL_LS_ALARM_ENABLE - enable link alarm bit |
| 2413 | */ |
| 2414 | status = sxg_write_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2415 | LASI_CONTROL, |
| 2416 | LASI_CTL_LS_ALARM_ENABLE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2417 | if (status != STATUS_SUCCESS) |
| 2418 | return (STATUS_FAILURE); |
| 2419 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2420 | /* XXXTODO - temporary - verify bit is set */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2421 | |
| 2422 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2423 | * LASI_CONTROL - LASI control register |
| 2424 | */ |
| 2425 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2426 | LASI_CONTROL, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2427 | &Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2428 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2429 | if (status != STATUS_SUCCESS) |
| 2430 | return (STATUS_FAILURE); |
| 2431 | if (!(Value & LASI_CTL_LS_ALARM_ENABLE)) { |
| 2432 | DBG_ERROR("Error! LASI Control Alarm Enable bit not set!\n"); |
| 2433 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2434 | /* Enable receive */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2435 | MaxFrame = adapter->JumboEnabled ? JUMBOMAXFRAME : ETHERMAXFRAME; |
| 2436 | ConfigData = (RCV_CONFIG_ENABLE | |
| 2437 | RCV_CONFIG_ENPARSE | |
| 2438 | RCV_CONFIG_RCVBAD | |
| 2439 | RCV_CONFIG_RCVPAUSE | |
| 2440 | RCV_CONFIG_TZIPV6 | |
| 2441 | RCV_CONFIG_TZIPV4 | |
| 2442 | RCV_CONFIG_HASH_16 | |
| 2443 | RCV_CONFIG_SOCKET | RCV_CONFIG_BUFSIZE(MaxFrame)); |
| 2444 | WRITE_REG(HwRegs->RcvConfig, ConfigData, TRUE); |
| 2445 | |
| 2446 | WRITE_REG(HwRegs->XmtConfig, XMT_CONFIG_ENABLE, TRUE); |
| 2447 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2448 | /* Mark the link as down. We'll get a link event when it comes up. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2449 | sxg_link_state(adapter, SXG_LINK_DOWN); |
| 2450 | |
| 2451 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInitLnk", |
| 2452 | adapter, 0, 0, 0); |
| 2453 | return (STATUS_SUCCESS); |
| 2454 | } |
| 2455 | |
| 2456 | /* |
| 2457 | * sxg_phy_init - Initialize the PHY |
| 2458 | * |
| 2459 | * Arguments - |
| 2460 | * adapter - A pointer to our adapter structure |
| 2461 | * |
| 2462 | * Return |
| 2463 | * status |
| 2464 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2465 | static int sxg_phy_init(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2466 | { |
| 2467 | u32 Value; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2468 | struct phy_ucode *p; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2469 | int status; |
| 2470 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2471 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2472 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2473 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module |
| 2474 | * 0xC205 - PHY ID register (?) |
| 2475 | * &Value - XXXTODO - add def |
| 2476 | */ |
| 2477 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2478 | 0xC205, |
| 2479 | &Value); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2480 | if (status != STATUS_SUCCESS) |
| 2481 | return (STATUS_FAILURE); |
| 2482 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2483 | if (Value == 0x0012) { |
| 2484 | /* 0x0012 == AEL2005C PHY(?) - XXXTODO - add def */ |
| 2485 | DBG_ERROR("AEL2005C PHY detected. Downloading PHY \ |
| 2486 | microcode.\n"); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2487 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2488 | /* Initialize AEL2005C PHY and download PHY microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2489 | for (p = PhyUcode; p->Addr != 0xFFFF; p++) { |
| 2490 | if (p->Addr == 0) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2491 | /* if address == 0, data == sleep time in ms */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2492 | mdelay(p->Data); |
| 2493 | } else { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2494 | /* write the given data to the specified address */ |
| 2495 | status = sxg_write_mdio_reg(adapter, |
| 2496 | MIIM_DEV_PHY_PMA, |
| 2497 | /* PHY address */ |
| 2498 | p->Addr, |
| 2499 | /* PHY data */ |
| 2500 | p->Data); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2501 | if (status != STATUS_SUCCESS) |
| 2502 | return (STATUS_FAILURE); |
| 2503 | } |
| 2504 | } |
| 2505 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2506 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2507 | |
| 2508 | return (STATUS_SUCCESS); |
| 2509 | } |
| 2510 | |
| 2511 | /* |
| 2512 | * sxg_link_event - Process a link event notification from the card |
| 2513 | * |
| 2514 | * Arguments - |
| 2515 | * adapter - A pointer to our adapter structure |
| 2516 | * |
| 2517 | * Return |
| 2518 | * None |
| 2519 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2520 | static void sxg_link_event(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2521 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2522 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2523 | enum SXG_LINK_STATE LinkState; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2524 | int status; |
| 2525 | u32 Value; |
| 2526 | |
| 2527 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "LinkEvnt", |
| 2528 | adapter, 0, 0, 0); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2529 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2530 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2531 | /* Check the Link Status register. We should have a Link Alarm. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2532 | READ_REG(HwRegs->LinkStatus, Value); |
| 2533 | if (Value & LS_LINK_ALARM) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2534 | /* |
| 2535 | * We got a Link Status alarm. First, pause to let the |
| 2536 | * link state settle (it can bounce a number of times) |
| 2537 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2538 | mdelay(10); |
| 2539 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2540 | /* Now clear the alarm by reading the LASI status register. */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2541 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 2542 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2543 | /* LASI status register */ |
| 2544 | LASI_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2545 | &Value); |
| 2546 | if (status != STATUS_SUCCESS) { |
| 2547 | DBG_ERROR("Error reading LASI Status MDIO register!\n"); |
| 2548 | sxg_link_state(adapter, SXG_LINK_DOWN); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2549 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2550 | } |
| 2551 | ASSERT(Value & LASI_STATUS_LS_ALARM); |
| 2552 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2553 | /* Now get and set the link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2554 | LinkState = sxg_get_link_state(adapter); |
| 2555 | sxg_link_state(adapter, LinkState); |
| 2556 | DBG_ERROR("SXG: Link Alarm occurred. Link is %s\n", |
| 2557 | ((LinkState == SXG_LINK_UP) ? "UP" : "DOWN")); |
| 2558 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2559 | /* |
| 2560 | * XXXTODO - Assuming Link Attention is only being generated |
| 2561 | * for the Link Alarm pin (and not for a XAUI Link Status change) |
| 2562 | * , then it's impossible to get here. Yet we've gotten here |
| 2563 | * twice (under extreme conditions - bouncing the link up and |
| 2564 | * down many times a second). Needs further investigation. |
| 2565 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2566 | DBG_ERROR("SXG: sxg_link_event: Can't get here!\n"); |
| 2567 | DBG_ERROR("SXG: Link Status == 0x%08X.\n", Value); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2568 | /* ASSERT(0); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2569 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2570 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2571 | |
| 2572 | } |
| 2573 | |
| 2574 | /* |
| 2575 | * sxg_get_link_state - Determine if the link is up or down |
| 2576 | * |
| 2577 | * Arguments - |
| 2578 | * adapter - A pointer to our adapter structure |
| 2579 | * |
| 2580 | * Return |
| 2581 | * Link State |
| 2582 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2583 | static enum SXG_LINK_STATE sxg_get_link_state(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2584 | { |
| 2585 | int status; |
| 2586 | u32 Value; |
| 2587 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2588 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2589 | |
| 2590 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "GetLink", |
| 2591 | adapter, 0, 0, 0); |
| 2592 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2593 | /* |
| 2594 | * Per the Xenpak spec (and the IEEE 10Gb spec?), the link is up if |
| 2595 | * the following 3 bits (from 3 different MDIO registers) are all true. |
| 2596 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2597 | |
| 2598 | /* MIIM_DEV_PHY_PMA - PHY PMA/PMD module */ |
| 2599 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PMA, |
| 2600 | /* PMA/PMD Receive Signal Detect register */ |
| 2601 | PHY_PMA_RCV_DET, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2602 | &Value); |
| 2603 | if (status != STATUS_SUCCESS) |
| 2604 | goto bad; |
| 2605 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2606 | /* If PMA/PMD receive signal detect is 0, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2607 | if (!(Value & PMA_RCV_DETECT)) |
| 2608 | return (SXG_LINK_DOWN); |
| 2609 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2610 | /* MIIM_DEV_PHY_PCS - PHY PCS module */ |
| 2611 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_PCS, |
| 2612 | /* PCS 10GBASE-R Status 1 register */ |
| 2613 | PHY_PCS_10G_STATUS1, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2614 | &Value); |
| 2615 | if (status != STATUS_SUCCESS) |
| 2616 | goto bad; |
| 2617 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2618 | /* If PCS is not locked to receive blocks, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2619 | if (!(Value & PCS_10B_BLOCK_LOCK)) |
| 2620 | return (SXG_LINK_DOWN); |
| 2621 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2622 | status = sxg_read_mdio_reg(adapter, MIIM_DEV_PHY_XS,/* PHY XS module */ |
| 2623 | /* XS Lane Status register */ |
| 2624 | PHY_XS_LANE_STATUS, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2625 | &Value); |
| 2626 | if (status != STATUS_SUCCESS) |
| 2627 | goto bad; |
| 2628 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2629 | /* If XS transmit lanes are not aligned, then the link is down */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2630 | if (!(Value & XS_LANE_ALIGN)) |
| 2631 | return (SXG_LINK_DOWN); |
| 2632 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2633 | /* All 3 bits are true, so the link is up */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2634 | DBG_ERROR("EXIT %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2635 | |
| 2636 | return (SXG_LINK_UP); |
| 2637 | |
| 2638 | bad: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2639 | /* An error occurred reading an MDIO register. This shouldn't happen. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2640 | DBG_ERROR("Error reading an MDIO register!\n"); |
| 2641 | ASSERT(0); |
| 2642 | return (SXG_LINK_DOWN); |
| 2643 | } |
| 2644 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2645 | static void sxg_indicate_link_state(struct adapter_t *adapter, |
| 2646 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2647 | { |
| 2648 | if (adapter->LinkState == SXG_LINK_UP) { |
| 2649 | DBG_ERROR("%s: LINK now UP, call netif_start_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2650 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2651 | netif_start_queue(adapter->netdev); |
| 2652 | } else { |
| 2653 | DBG_ERROR("%s: LINK now DOWN, call netif_stop_queue\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2654 | __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2655 | netif_stop_queue(adapter->netdev); |
| 2656 | } |
| 2657 | } |
| 2658 | |
| 2659 | /* |
| 2660 | * sxg_link_state - Set the link state and if necessary, indicate. |
| 2661 | * This routine the central point of processing for all link state changes. |
| 2662 | * Nothing else in the driver should alter the link state or perform |
| 2663 | * link state indications |
| 2664 | * |
| 2665 | * Arguments - |
| 2666 | * adapter - A pointer to our adapter structure |
| 2667 | * LinkState - The link state |
| 2668 | * |
| 2669 | * Return |
| 2670 | * None |
| 2671 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2672 | static void sxg_link_state(struct adapter_t *adapter, |
| 2673 | enum SXG_LINK_STATE LinkState) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2674 | { |
| 2675 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "LnkINDCT", |
| 2676 | adapter, LinkState, adapter->LinkState, adapter->State); |
| 2677 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2678 | DBG_ERROR("ENTER %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2679 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2680 | /* |
| 2681 | * Hold the adapter lock during this routine. Maybe move |
| 2682 | * the lock to the caller. |
| 2683 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2684 | spin_lock(&adapter->AdapterLock); |
| 2685 | if (LinkState == adapter->LinkState) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2686 | /* Nothing changed.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2687 | spin_unlock(&adapter->AdapterLock); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2688 | DBG_ERROR("EXIT #0 %s. Link status = %d\n", |
| 2689 | __func__, LinkState); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2690 | return; |
| 2691 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2692 | /* Save the adapter state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2693 | adapter->LinkState = LinkState; |
| 2694 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2695 | /* Drop the lock and indicate link state */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2696 | spin_unlock(&adapter->AdapterLock); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 2697 | DBG_ERROR("EXIT #1 %s\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2698 | |
| 2699 | sxg_indicate_link_state(adapter, LinkState); |
| 2700 | } |
| 2701 | |
| 2702 | /* |
| 2703 | * sxg_write_mdio_reg - Write to a register on the MDIO bus |
| 2704 | * |
| 2705 | * Arguments - |
| 2706 | * adapter - A pointer to our adapter structure |
| 2707 | * DevAddr - MDIO device number being addressed |
| 2708 | * RegAddr - register address for the specified MDIO device |
| 2709 | * Value - value to write to the MDIO register |
| 2710 | * |
| 2711 | * Return |
| 2712 | * status |
| 2713 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2714 | static int sxg_write_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2715 | u32 DevAddr, u32 RegAddr, u32 Value) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2716 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2717 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2718 | /* Address operation (written to MIIM field reg) */ |
| 2719 | u32 AddrOp; |
| 2720 | /* Write operation (written to MIIM field reg) */ |
| 2721 | u32 WriteOp; |
| 2722 | u32 Cmd;/* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2723 | u32 ValueRead; |
| 2724 | u32 Timeout; |
| 2725 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2726 | /* DBG_ERROR("ENTER %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2727 | |
| 2728 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 2729 | adapter, 0, 0, 0); |
| 2730 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2731 | /* Ensure values don't exceed field width */ |
| 2732 | DevAddr &= 0x001F; /* 5-bit field */ |
| 2733 | RegAddr &= 0xFFFF; /* 16-bit field */ |
| 2734 | Value &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2735 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2736 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2737 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2738 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2739 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2740 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 2741 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2742 | /* Set MIIM field register bits for an MIIM write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2743 | WriteOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2744 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2745 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2746 | (MIIM_OP_WRITE << AXGMAC_AMIIM_FIELD_OP_SHIFT) | Value; |
| 2747 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2748 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2749 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 2750 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2751 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2752 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2753 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2754 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2755 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 2756 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2757 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2758 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2759 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2760 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2761 | Timeout = SXG_LINK_TIMEOUT; |
| 2762 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2763 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2764 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2765 | if (--Timeout == 0) { |
| 2766 | return (STATUS_FAILURE); |
| 2767 | } |
| 2768 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2769 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2770 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2771 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2772 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2773 | /* MIIM write to set up an MDIO write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2774 | WRITE_REG(HwRegs->MacAmiimField, WriteOp, TRUE); |
| 2775 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2776 | /* Write to MIIM Command Register to execute the write operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2777 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2778 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2779 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2780 | Timeout = SXG_LINK_TIMEOUT; |
| 2781 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2782 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2783 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2784 | if (--Timeout == 0) { |
| 2785 | return (STATUS_FAILURE); |
| 2786 | } |
| 2787 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2788 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2789 | /* DBG_ERROR("EXIT %s\n", __func__); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2790 | |
| 2791 | return (STATUS_SUCCESS); |
| 2792 | } |
| 2793 | |
| 2794 | /* |
| 2795 | * sxg_read_mdio_reg - Read a register on the MDIO bus |
| 2796 | * |
| 2797 | * Arguments - |
| 2798 | * adapter - A pointer to our adapter structure |
| 2799 | * DevAddr - MDIO device number being addressed |
| 2800 | * RegAddr - register address for the specified MDIO device |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2801 | * pValue - pointer to where to put data read from the MDIO register |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2802 | * |
| 2803 | * Return |
| 2804 | * status |
| 2805 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2806 | static int sxg_read_mdio_reg(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 2807 | u32 DevAddr, u32 RegAddr, u32 *pValue) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2808 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2809 | struct sxg_hw_regs *HwRegs = adapter->HwRegs; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2810 | u32 AddrOp; /* Address operation (written to MIIM field reg) */ |
| 2811 | u32 ReadOp; /* Read operation (written to MIIM field reg) */ |
| 2812 | u32 Cmd; /* Command (written to MIIM command reg) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2813 | u32 ValueRead; |
| 2814 | u32 Timeout; |
| 2815 | |
| 2816 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "WrtMDIO", |
| 2817 | adapter, 0, 0, 0); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2818 | DBG_ERROR("ENTER %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2819 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2820 | /* Ensure values don't exceed field width */ |
| 2821 | DevAddr &= 0x001F; /* 5-bit field */ |
| 2822 | RegAddr &= 0xFFFF; /* 16-bit field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2823 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2824 | /* Set MIIM field register bits for an MIIM address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2825 | AddrOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2826 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2827 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2828 | (MIIM_OP_ADDR << AXGMAC_AMIIM_FIELD_OP_SHIFT) | RegAddr; |
| 2829 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2830 | /* Set MIIM field register bits for an MIIM read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2831 | ReadOp = (MIIM_PORT_NUM << AXGMAC_AMIIM_FIELD_PORT_SHIFT) | |
| 2832 | (DevAddr << AXGMAC_AMIIM_FIELD_DEV_SHIFT) | |
| 2833 | (MIIM_TA_10GB << AXGMAC_AMIIM_FIELD_TA_SHIFT) | |
| 2834 | (MIIM_OP_READ << AXGMAC_AMIIM_FIELD_OP_SHIFT); |
| 2835 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2836 | /* Set MIIM command register bits to execute an MIIM command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2837 | Cmd = AXGMAC_AMIIM_CMD_START | AXGMAC_AMIIM_CMD_10G_OPERATION; |
| 2838 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2839 | /* Reset the command register command bit (in case it's not 0) */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2840 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2841 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2842 | /* MIIM write to set the address of the specified MDIO register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2843 | WRITE_REG(HwRegs->MacAmiimField, AddrOp, TRUE); |
| 2844 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2845 | /* Write to MIIM Command Register to execute to address operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2846 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2847 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2848 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2849 | Timeout = SXG_LINK_TIMEOUT; |
| 2850 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2851 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2852 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2853 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2854 | DBG_ERROR("EXIT %s with STATUS_FAILURE 1\n", __FUNCTION__); |
| 2855 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2856 | return (STATUS_FAILURE); |
| 2857 | } |
| 2858 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2859 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2860 | /* Reset the command register command bit */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2861 | WRITE_REG(HwRegs->MacAmiimCmd, 0, TRUE); |
| 2862 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2863 | /* MIIM write to set up an MDIO register read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2864 | WRITE_REG(HwRegs->MacAmiimField, ReadOp, TRUE); |
| 2865 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2866 | /* Write to MIIM Command Register to execute the read operation */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2867 | WRITE_REG(HwRegs->MacAmiimCmd, Cmd, TRUE); |
| 2868 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2869 | /* Poll AMIIM Indicator register to wait for completion */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2870 | Timeout = SXG_LINK_TIMEOUT; |
| 2871 | do { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2872 | udelay(100); /* Timeout in 100us units */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2873 | READ_REG(HwRegs->MacAmiimIndicator, ValueRead); |
| 2874 | if (--Timeout == 0) { |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 2875 | DBG_ERROR("EXIT %s with STATUS_FAILURE 2\n", __FUNCTION__); |
| 2876 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2877 | return (STATUS_FAILURE); |
| 2878 | } |
| 2879 | } while (ValueRead & AXGMAC_AMIIM_INDC_BUSY); |
| 2880 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2881 | /* Read the MDIO register data back from the field register */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2882 | READ_REG(HwRegs->MacAmiimField, *pValue); |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 2883 | *pValue &= 0xFFFF; /* data is in the lower 16 bits */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2884 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2885 | DBG_ERROR("EXIT %s\n", __FUNCTION__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2886 | |
| 2887 | return (STATUS_SUCCESS); |
| 2888 | } |
| 2889 | |
| 2890 | /* |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2891 | * Functions to obtain the CRC corresponding to the destination mac address. |
| 2892 | * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using |
| 2893 | * the polynomial: |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2894 | * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 |
| 2895 | * + x^4 + x^2 + x^1. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2896 | * |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2897 | * After the CRC for the 6 bytes is generated (but before the value is |
| 2898 | * complemented), we must then transpose the value and return bits 30-23. |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2899 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2900 | static u32 sxg_crc_table[256];/* Table of CRC's for all possible byte values */ |
| 2901 | static u32 sxg_crc_init; /* Is table initialized */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2902 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2903 | /* Contruct the CRC32 table */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2904 | static void sxg_mcast_init_crc32(void) |
| 2905 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2906 | u32 c; /* CRC shit reg */ |
| 2907 | u32 e = 0; /* Poly X-or pattern */ |
| 2908 | int i; /* counter */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2909 | int k; /* byte being shifted into crc */ |
| 2910 | |
| 2911 | static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 }; |
| 2912 | |
| 2913 | for (i = 0; i < sizeof(p) / sizeof(int); i++) { |
| 2914 | e |= 1L << (31 - p[i]); |
| 2915 | } |
| 2916 | |
| 2917 | for (i = 1; i < 256; i++) { |
| 2918 | c = i; |
| 2919 | for (k = 8; k; k--) { |
| 2920 | c = c & 1 ? (c >> 1) ^ e : c >> 1; |
| 2921 | } |
| 2922 | sxg_crc_table[i] = c; |
| 2923 | } |
| 2924 | } |
| 2925 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2926 | /* |
| 2927 | * Return the MAC hast as described above. |
| 2928 | */ |
| 2929 | static unsigned char sxg_mcast_get_mac_hash(char *macaddr) |
| 2930 | { |
| 2931 | u32 crc; |
| 2932 | char *p; |
| 2933 | int i; |
| 2934 | unsigned char machash = 0; |
| 2935 | |
| 2936 | if (!sxg_crc_init) { |
| 2937 | sxg_mcast_init_crc32(); |
| 2938 | sxg_crc_init = 1; |
| 2939 | } |
| 2940 | |
| 2941 | crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */ |
| 2942 | for (i = 0, p = macaddr; i < 6; ++p, ++i) { |
| 2943 | crc = (crc >> 8) ^ sxg_crc_table[(crc ^ *p) & 0xFF]; |
| 2944 | } |
| 2945 | |
| 2946 | /* Return bits 1-8, transposed */ |
| 2947 | for (i = 1; i < 9; i++) { |
| 2948 | machash |= (((crc >> i) & 1) << (8 - i)); |
| 2949 | } |
| 2950 | |
| 2951 | return (machash); |
| 2952 | } |
| 2953 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 2954 | static void sxg_mcast_set_mask(struct adapter_t *adapter) |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2955 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 2956 | struct sxg_ucode_regs *sxg_regs = adapter->UcodeRegs; |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2957 | |
| 2958 | DBG_ERROR("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__, |
| 2959 | adapter->netdev->name, (unsigned int)adapter->MacFilter, |
| 2960 | adapter->MulticastMask); |
| 2961 | |
| 2962 | if (adapter->MacFilter & (MAC_ALLMCAST | MAC_PROMISC)) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2963 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2964 | * Turn on all multicast addresses. We have to do this for |
| 2965 | * promiscuous mode as well as ALLMCAST mode. It saves the |
| 2966 | * Microcode from having keep state about the MAC configuration |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2967 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2968 | /* DBG_ERROR("sxg: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n |
| 2969 | * SLUT MODE!!!\n",__func__); |
| 2970 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2971 | WRITE_REG(sxg_regs->McastLow, 0xFFFFFFFF, FLUSH); |
| 2972 | WRITE_REG(sxg_regs->McastHigh, 0xFFFFFFFF, FLUSH); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2973 | /* DBG_ERROR("%s (%s) WRITE to slic_regs slic_mcastlow&high \ |
| 2974 | * 0xFFFFFFFF\n",__func__, adapter->netdev->name); |
| 2975 | */ |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2976 | |
| 2977 | } else { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 2978 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 2979 | * Commit our multicast mast to the SLIC by writing to the |
| 2980 | * multicast address mask registers |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 2981 | */ |
| 2982 | DBG_ERROR("%s (%s) WRITE mcastlow[%lx] mcasthigh[%lx]\n", |
| 2983 | __func__, adapter->netdev->name, |
| 2984 | ((ulong) (adapter->MulticastMask & 0xFFFFFFFF)), |
| 2985 | ((ulong) |
| 2986 | ((adapter->MulticastMask >> 32) & 0xFFFFFFFF))); |
| 2987 | |
| 2988 | WRITE_REG(sxg_regs->McastLow, |
| 2989 | (u32) (adapter->MulticastMask & 0xFFFFFFFF), FLUSH); |
| 2990 | WRITE_REG(sxg_regs->McastHigh, |
| 2991 | (u32) ((adapter-> |
| 2992 | MulticastMask >> 32) & 0xFFFFFFFF), FLUSH); |
| 2993 | } |
| 2994 | } |
| 2995 | |
| 2996 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 2997 | * Allocate a mcast_address structure to hold the multicast address. |
| 2998 | * Link it in. |
| 2999 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3000 | static int sxg_mcast_add_list(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3001 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3002 | struct mcast_address *mcaddr, *mlist; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3003 | bool equaladdr; |
| 3004 | |
| 3005 | /* Check to see if it already exists */ |
| 3006 | mlist = adapter->mcastaddrs; |
| 3007 | while (mlist) { |
| 3008 | ETHER_EQ_ADDR(mlist->address, address, equaladdr); |
| 3009 | if (equaladdr) { |
| 3010 | return (STATUS_SUCCESS); |
| 3011 | } |
| 3012 | mlist = mlist->next; |
| 3013 | } |
| 3014 | |
| 3015 | /* Doesn't already exist. Allocate a structure to hold it */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3016 | mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3017 | if (mcaddr == NULL) |
| 3018 | return 1; |
| 3019 | |
| 3020 | memcpy(mcaddr->address, address, 6); |
| 3021 | |
| 3022 | mcaddr->next = adapter->mcastaddrs; |
| 3023 | adapter->mcastaddrs = mcaddr; |
| 3024 | |
| 3025 | return (STATUS_SUCCESS); |
| 3026 | } |
| 3027 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3028 | static void sxg_mcast_set_bit(struct adapter_t *adapter, char *address) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3029 | { |
| 3030 | unsigned char crcpoly; |
| 3031 | |
| 3032 | /* Get the CRC polynomial for the mac address */ |
| 3033 | crcpoly = sxg_mcast_get_mac_hash(address); |
| 3034 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3035 | /* |
| 3036 | * We only have space on the SLIC for 64 entries. Lop |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3037 | * off the top two bits. (2^6 = 64) |
| 3038 | */ |
| 3039 | crcpoly &= 0x3F; |
| 3040 | |
| 3041 | /* OR in the new bit into our 64 bit mask. */ |
| 3042 | adapter->MulticastMask |= (u64) 1 << crcpoly; |
| 3043 | } |
| 3044 | |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3045 | static void sxg_mcast_set_list(struct net_device *dev) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3046 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3047 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3048 | |
| 3049 | ASSERT(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3050 | if (dev->flags & IFF_PROMISC) { |
| 3051 | adapter->MacFilter |= MAC_PROMISC; |
| 3052 | } |
| 3053 | //XXX handle other flags as well |
| 3054 | sxg_mcast_set_mask(adapter); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3055 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3056 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3057 | static void sxg_unmap_mmio_space(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3058 | { |
| 3059 | #if LINUX_FREES_ADAPTER_RESOURCES |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3060 | /* |
| 3061 | * if (adapter->Regs) { |
| 3062 | * iounmap(adapter->Regs); |
| 3063 | * } |
| 3064 | * adapter->slic_regs = NULL; |
| 3065 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3066 | #endif |
| 3067 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3068 | /* |
| 3069 | void SxgFreeRcvBlocks(struct adapter_t *adapter) |
| 3070 | { |
| 3071 | u32 i; |
| 3072 | struct list_entry *ple; |
| 3073 | struct sxg_rcv_block_hdr *Hdr; |
| 3074 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3075 | u32 FreeBuffers = 0, FreeBlocks = 0; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3076 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3077 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FrRcvBlk", |
| 3078 | adapter, 0, 0, 0); |
| 3079 | |
| 3080 | ASSERT((adapter->State == SXG_STATE_INITIALIZING) || |
| 3081 | (pAdapt->State == SXG_STATE_HALTING)); |
| 3082 | |
| 3083 | for(i = 0; i < SXG_MAX_CPU; i++) { |
| 3084 | FreeBuffers += pAdapt->PerCpuResources[i].FreeReceiveBuffers.Count; |
| 3085 | FreeBlocks += pAdapt->PerCpuResources[i].FreeReceiveBlocks.Count; |
| 3086 | pAdapt->PerCpuResources[i].FreeReceiveBuffers.Count = 0; |
| 3087 | pAdapt->PerCpuResources[i].FreeReceiveBuffers.FreeList = NULL; |
| 3088 | pAdapt->PerCpuResources[i].FreeReceiveBlocks.Count = 0; |
| 3089 | pAdapt->PerCpuResources[i].FreeReceiveBlocks.FreeList = NULL; |
| 3090 | } |
| 3091 | FreeBuffers += pAdapt->GlobalResources.FreeReceiveBuffers.Count; |
| 3092 | FreeBlocks += pAdapt->GlobalResources.FreeReceiveBlocks.Count; |
| 3093 | pAdapt->GlobalResources.FreeReceiveBuffers.Count = 0; |
| 3094 | pAdapt->GlobalResources.FreeReceiveBuffers.FreeList = NULL; |
| 3095 | pAdapt->GlobalResources.FreeReceiveBlocks.Count = 0; |
| 3096 | pAdapt->GlobalResources.FreeReceiveBlocks.FreeList = NULL; |
| 3097 | ASSERT(FreeBlocks == pAdapt->AllRcvBlockCount); // See SXG_RCV_BLOCK |
| 3098 | ASSERT(FreeBuffers == |
| 3099 | (pAdapt->AllRcvBlockCount * SXG_RCV_DESCRIPTORS_PER_BLOCK)); // See SXG_RCV_BLOCK |
| 3100 | |
| 3101 | while(!(IsListEmpty(&pAdapt->AllRcvBlocks))) { |
| 3102 | ple = RemoveHeadList(&pAdapt->AllRcvBlocks); |
| 3103 | Hdr = CONTAINING_RECORD(ple, SXG_RCV_BLOCK_HDR, AllList); |
| 3104 | NdisMFreeSharedMemory(pAdapt->MiniportHandle, |
| 3105 | SXG_RCV_BLOCK_SIZE(pAdapt->ReceiveBufferSize), |
| 3106 | TRUE, |
| 3107 | Hdr->VirtualAddress, |
| 3108 | Hdr->PhysicalAddress); |
| 3109 | pAdapt->AllRcvBlockCount--; |
| 3110 | } |
| 3111 | ASSERT(pAdapt->AllRcvBlockCount == 0); |
| 3112 | SLIC_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFrRBlk", |
| 3113 | pAdapt, 0, 0, 0); |
| 3114 | } |
| 3115 | */ |
| 3116 | //#if XXXTODO |
| 3117 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3118 | /* |
| 3119 | * SxgFreeResources - Free everything allocated in SxgAllocateResources |
| 3120 | * |
| 3121 | * Arguments - |
| 3122 | * adapter - A pointer to our adapter structure |
| 3123 | * |
| 3124 | * Return |
| 3125 | * none |
| 3126 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3127 | void SxgFreeResources(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3128 | { |
| 3129 | u32 RssIds, IsrCount; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3130 | u32 i; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3131 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3132 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FreeRes", |
| 3133 | adapter, adapter->MaxTcbs, 0, 0); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3134 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3135 | RssIds = SXG_RSS_CPU_COUNT(adapter); |
| 3136 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 3137 | |
| 3138 | if (adapter->BasicAllocations == FALSE) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3139 | /* |
| 3140 | * No allocations have been made, including spinlocks, |
| 3141 | * or listhead initializations. Return. |
| 3142 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3143 | return; |
| 3144 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3145 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3146 | if (!(IsListEmpty(&adapter->AllRcvBlocks))) { |
| 3147 | SxgFreeRcvBlocks(adapter); |
| 3148 | } |
| 3149 | if (!(IsListEmpty(&adapter->AllSglBuffers))) { |
| 3150 | SxgFreeSglBuffers(adapter); |
| 3151 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3152 | */ |
| 3153 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3154 | if (adapter->XmtRingZeroIndex) { |
| 3155 | pci_free_consistent(adapter->pcidev, |
| 3156 | sizeof(u32), |
| 3157 | adapter->XmtRingZeroIndex, |
| 3158 | adapter->PXmtRingZeroIndex); |
| 3159 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3160 | printk("VSS Free Isr\n"); |
| 3161 | if (adapter->Isr) { |
| 3162 | pci_free_consistent(adapter->pcidev, |
| 3163 | sizeof(u32) * IsrCount, |
| 3164 | adapter->Isr, adapter->PIsr); |
| 3165 | } |
| 3166 | |
| 3167 | printk("VSS Free EventRings\n"); |
| 3168 | if (adapter->EventRings) { |
| 3169 | pci_free_consistent(adapter->pcidev, |
| 3170 | sizeof(struct sxg_event_ring) * RssIds, |
| 3171 | adapter->EventRings, adapter->PEventRings); |
| 3172 | } |
| 3173 | /* |
| 3174 | printk("VSS Free RcvRings\n"); |
| 3175 | if (adapter->RcvRings) { |
| 3176 | pci_free_consistent(adapter->pcidev, |
| 3177 | sizeof(struct sxg_rcv_ring) * 4096, |
| 3178 | adapter->RcvRings, |
| 3179 | adapter->PRcvRings); |
| 3180 | adapter->RcvRings = NULL; |
| 3181 | } |
| 3182 | |
| 3183 | printk("VSS Free XmtRings\n"); |
| 3184 | if(adapter->XmtRings) { |
| 3185 | pci_free_consistent(adapter->pcidev, |
| 3186 | sizeof(struct sxg_xmt_ring) * 4096, |
| 3187 | adapter->XmtRings, |
| 3188 | adapter->PXmtRings); |
| 3189 | adapter->XmtRings = NULL; |
| 3190 | } |
| 3191 | |
| 3192 | */ |
| 3193 | |
| 3194 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3195 | |
| 3196 | SXG_FREE_PACKET_POOL(adapter->PacketPoolHandle); |
| 3197 | SXG_FREE_BUFFER_POOL(adapter->BufferPoolHandle); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3198 | */ |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3199 | /* Unmap register spaces */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3200 | // SxgUnmapResources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3201 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3202 | /* Deregister DMA */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3203 | /* if (adapter->DmaHandle) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3204 | SXG_DEREGISTER_DMA(adapter->DmaHandle); |
| 3205 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3206 | */ /* Deregister interrupt */ |
| 3207 | // SxgDeregisterInterrupt(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3208 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3209 | /* Possibly free system info (5.2 only) */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3210 | // SXG_RELEASE_SYSTEM_INFO(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3211 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3212 | //SxgDiagFreeResources(adapter); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3213 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3214 | // SxgFreeMCastAddrs(adapter); |
| 3215 | /* |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3216 | if (SXG_TIMER_ALLOCATED(adapter->ResetTimer)) { |
| 3217 | SXG_CANCEL_TIMER(adapter->ResetTimer, TimerCancelled); |
| 3218 | SXG_FREE_TIMER(adapter->ResetTimer); |
| 3219 | } |
| 3220 | if (SXG_TIMER_ALLOCATED(adapter->RssTimer)) { |
| 3221 | SXG_CANCEL_TIMER(adapter->RssTimer, TimerCancelled); |
| 3222 | SXG_FREE_TIMER(adapter->RssTimer); |
| 3223 | } |
| 3224 | if (SXG_TIMER_ALLOCATED(adapter->OffloadTimer)) { |
| 3225 | SXG_CANCEL_TIMER(adapter->OffloadTimer, TimerCancelled); |
| 3226 | SXG_FREE_TIMER(adapter->OffloadTimer); |
| 3227 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3228 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3229 | adapter->BasicAllocations = FALSE; |
| 3230 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3231 | /* SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFreeRes", |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3232 | adapter, adapter->MaxTcbs, 0, 0); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3233 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3234 | } |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3235 | // #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3236 | |
| 3237 | /* |
| 3238 | * sxg_allocate_complete - |
| 3239 | * |
| 3240 | * This routine is called when a memory allocation has completed. |
| 3241 | * |
| 3242 | * Arguments - |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3243 | * struct adapter_t * - Our adapter structure |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3244 | * VirtualAddress - Memory virtual address |
| 3245 | * PhysicalAddress - Memory physical address |
| 3246 | * Length - Length of memory allocated (or 0) |
| 3247 | * Context - The type of buffer allocated |
| 3248 | * |
| 3249 | * Return |
| 3250 | * None. |
| 3251 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3252 | static void sxg_allocate_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3253 | void *VirtualAddress, |
| 3254 | dma_addr_t PhysicalAddress, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3255 | u32 Length, enum sxg_buffer_type Context) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3256 | { |
| 3257 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocCmp", |
| 3258 | adapter, VirtualAddress, Length, Context); |
| 3259 | ASSERT(adapter->AllocationsPending); |
| 3260 | --adapter->AllocationsPending; |
| 3261 | |
| 3262 | switch (Context) { |
| 3263 | |
| 3264 | case SXG_BUFFER_TYPE_RCV: |
| 3265 | sxg_allocate_rcvblock_complete(adapter, |
| 3266 | VirtualAddress, |
| 3267 | PhysicalAddress, Length); |
| 3268 | break; |
| 3269 | case SXG_BUFFER_TYPE_SGL: |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3270 | sxg_allocate_sgl_buffer_complete(adapter, (struct sxg_scatter_gather *) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3271 | VirtualAddress, |
| 3272 | PhysicalAddress, Length); |
| 3273 | break; |
| 3274 | } |
| 3275 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocCmp", |
| 3276 | adapter, VirtualAddress, Length, Context); |
| 3277 | } |
| 3278 | |
| 3279 | /* |
| 3280 | * sxg_allocate_buffer_memory - Shared memory allocation routine used for |
| 3281 | * synchronous and asynchronous buffer allocations |
| 3282 | * |
| 3283 | * Arguments - |
| 3284 | * adapter - A pointer to our adapter structure |
| 3285 | * Size - block size to allocate |
| 3286 | * BufferType - Type of buffer to allocate |
| 3287 | * |
| 3288 | * Return |
| 3289 | * int |
| 3290 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3291 | static int sxg_allocate_buffer_memory(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3292 | u32 Size, enum sxg_buffer_type BufferType) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3293 | { |
| 3294 | int status; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3295 | void *Buffer; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3296 | dma_addr_t pBuffer; |
| 3297 | |
| 3298 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AllocMem", |
| 3299 | adapter, Size, BufferType, 0); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3300 | /* |
| 3301 | * Grab the adapter lock and check the state. If we're in anything other |
| 3302 | * than INITIALIZING or RUNNING state, fail. This is to prevent |
| 3303 | * allocations in an improper driver state |
| 3304 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3305 | spin_lock(&adapter->AdapterLock); |
| 3306 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3307 | /* |
| 3308 | * Increment the AllocationsPending count while holding |
| 3309 | * the lock. Pause processing relies on this |
| 3310 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3311 | ++adapter->AllocationsPending; |
| 3312 | spin_unlock(&adapter->AdapterLock); |
| 3313 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3314 | /* At initialization time allocate resources synchronously. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3315 | Buffer = pci_alloc_consistent(adapter->pcidev, Size, &pBuffer); |
| 3316 | if (Buffer == NULL) { |
| 3317 | spin_lock(&adapter->AdapterLock); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3318 | /* |
| 3319 | * Decrement the AllocationsPending count while holding |
| 3320 | * the lock. Pause processing relies on this |
| 3321 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3322 | --adapter->AllocationsPending; |
| 3323 | spin_unlock(&adapter->AdapterLock); |
| 3324 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlcMemF1", |
| 3325 | adapter, Size, BufferType, 0); |
| 3326 | return (STATUS_RESOURCES); |
| 3327 | } |
| 3328 | sxg_allocate_complete(adapter, Buffer, pBuffer, Size, BufferType); |
| 3329 | status = STATUS_SUCCESS; |
| 3330 | |
| 3331 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlocMem", |
| 3332 | adapter, Size, BufferType, status); |
| 3333 | return (status); |
| 3334 | } |
| 3335 | |
| 3336 | /* |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3337 | * sxg_allocate_rcvblock_complete - Complete a receive descriptor |
| 3338 | * block allocation |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3339 | * |
| 3340 | * Arguments - |
| 3341 | * adapter - A pointer to our adapter structure |
| 3342 | * RcvBlock - receive block virtual address |
| 3343 | * PhysicalAddress - Physical address |
| 3344 | * Length - Memory length |
| 3345 | * |
| 3346 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3347 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3348 | static void sxg_allocate_rcvblock_complete(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3349 | void *RcvBlock, |
| 3350 | dma_addr_t PhysicalAddress, |
| 3351 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3352 | { |
| 3353 | u32 i; |
| 3354 | u32 BufferSize = adapter->ReceiveBufferSize; |
| 3355 | u64 Paddr; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3356 | void *temp_RcvBlock; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3357 | struct sxg_rcv_block_hdr *RcvBlockHdr; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3358 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3359 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3360 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3361 | |
| 3362 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlRcvBlk", |
| 3363 | adapter, RcvBlock, Length, 0); |
| 3364 | if (RcvBlock == NULL) { |
| 3365 | goto fail; |
| 3366 | } |
| 3367 | memset(RcvBlock, 0, Length); |
| 3368 | ASSERT((BufferSize == SXG_RCV_DATA_BUFFER_SIZE) || |
| 3369 | (BufferSize == SXG_RCV_JUMBO_BUFFER_SIZE)); |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3370 | ASSERT(Length == SXG_RCV_BLOCK_SIZE(SXG_RCV_DATA_HDR_SIZE)); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3371 | /* |
| 3372 | * First, initialize the contained pool of receive data buffers. |
| 3373 | * This initialization requires NBL/NB/MDL allocations, if any of them |
| 3374 | * fail, free the block and return without queueing the shared memory |
| 3375 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3376 | //RcvDataBuffer = RcvBlock; |
| 3377 | temp_RcvBlock = RcvBlock; |
| 3378 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3379 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3380 | RcvDataBufferHdr = (struct sxg_rcv_data_buffer_hdr *) |
| 3381 | temp_RcvBlock; |
| 3382 | /* For FREE macro assertion */ |
| 3383 | RcvDataBufferHdr->State = SXG_BUFFER_UPSTREAM; |
| 3384 | SXG_ALLOCATE_RCV_PACKET(adapter, RcvDataBufferHdr, BufferSize); |
| 3385 | if (RcvDataBufferHdr->SxgDumbRcvPacket == NULL) |
| 3386 | goto fail; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3387 | |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3388 | } |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3389 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3390 | /* |
| 3391 | * Place this entire block of memory on the AllRcvBlocks queue so it |
| 3392 | * can be free later |
| 3393 | */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3394 | |
| 3395 | RcvBlockHdr = (struct sxg_rcv_block_hdr *) ((unsigned char *)RcvBlock + |
| 3396 | SXG_RCV_BLOCK_HDR_OFFSET(SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3397 | RcvBlockHdr->VirtualAddress = RcvBlock; |
| 3398 | RcvBlockHdr->PhysicalAddress = PhysicalAddress; |
| 3399 | spin_lock(&adapter->RcvQLock); |
| 3400 | adapter->AllRcvBlockCount++; |
| 3401 | InsertTailList(&adapter->AllRcvBlocks, &RcvBlockHdr->AllList); |
| 3402 | spin_unlock(&adapter->RcvQLock); |
| 3403 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3404 | /* Now free the contained receive data buffers that we |
| 3405 | * initialized above */ |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3406 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3407 | for (i = 0, Paddr = PhysicalAddress; |
| 3408 | i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3409 | i++, Paddr += SXG_RCV_DATA_HDR_SIZE, |
| 3410 | temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
| 3411 | RcvDataBufferHdr = |
| 3412 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3413 | spin_lock(&adapter->RcvQLock); |
| 3414 | SXG_FREE_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3415 | spin_unlock(&adapter->RcvQLock); |
| 3416 | } |
| 3417 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3418 | /* Locate the descriptor block and put it on a separate free queue */ |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3419 | RcvDescriptorBlock = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3420 | (struct sxg_rcv_descriptor_block *) ((unsigned char *)RcvBlock + |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3421 | SXG_RCV_DESCRIPTOR_BLOCK_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3422 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3423 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3424 | (struct sxg_rcv_descriptor_block_hdr *) ((unsigned char *)RcvBlock + |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3425 | SXG_RCV_DESCRIPTOR_BLOCK_HDR_OFFSET |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3426 | (SXG_RCV_DATA_HDR_SIZE)); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3427 | RcvDescriptorBlockHdr->VirtualAddress = RcvDescriptorBlock; |
| 3428 | RcvDescriptorBlockHdr->PhysicalAddress = Paddr; |
| 3429 | spin_lock(&adapter->RcvQLock); |
| 3430 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, RcvDescriptorBlockHdr); |
| 3431 | spin_unlock(&adapter->RcvQLock); |
| 3432 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlRBlk", |
| 3433 | adapter, RcvBlock, Length, 0); |
| 3434 | return; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3435 | fail: |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3436 | /* Free any allocated resources */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3437 | if (RcvBlock) { |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3438 | temp_RcvBlock = RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3439 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3440 | i++, temp_RcvBlock += SXG_RCV_DATA_HDR_SIZE) { |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3441 | RcvDataBufferHdr = |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3442 | (struct sxg_rcv_data_buffer_hdr *)temp_RcvBlock; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3443 | SXG_FREE_RCV_PACKET(RcvDataBufferHdr); |
| 3444 | } |
| 3445 | pci_free_consistent(adapter->pcidev, |
| 3446 | Length, RcvBlock, PhysicalAddress); |
| 3447 | } |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3448 | DBG_ERROR("%s: OUT OF RESOURCES\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3449 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_IMPORTANT, "RcvAFail", |
| 3450 | adapter, adapter->FreeRcvBufferCount, |
| 3451 | adapter->FreeRcvBlockCount, adapter->AllRcvBlockCount); |
| 3452 | adapter->Stats.NoMem++; |
| 3453 | } |
| 3454 | |
| 3455 | /* |
| 3456 | * sxg_allocate_sgl_buffer_complete - Complete a SGL buffer allocation |
| 3457 | * |
| 3458 | * Arguments - |
| 3459 | * adapter - A pointer to our adapter structure |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3460 | * SxgSgl - struct sxg_scatter_gather buffer |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3461 | * PhysicalAddress - Physical address |
| 3462 | * Length - Memory length |
| 3463 | * |
| 3464 | * Return |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3465 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3466 | static void sxg_allocate_sgl_buffer_complete(struct adapter_t *adapter, |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3467 | struct sxg_scatter_gather *SxgSgl, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3468 | dma_addr_t PhysicalAddress, |
| 3469 | u32 Length) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3470 | { |
| 3471 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "AlSglCmp", |
| 3472 | adapter, SxgSgl, Length, 0); |
| 3473 | spin_lock(&adapter->SglQLock); |
| 3474 | adapter->AllSglBufferCount++; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3475 | memset(SxgSgl, 0, sizeof(struct sxg_scatter_gather)); |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3476 | /* *PhysicalAddress; */ |
| 3477 | SxgSgl->PhysicalAddress = PhysicalAddress; |
| 3478 | /* Initialize backpointer once */ |
| 3479 | SxgSgl->adapter = adapter; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3480 | InsertTailList(&adapter->AllSglBuffers, &SxgSgl->AllList); |
| 3481 | spin_unlock(&adapter->SglQLock); |
| 3482 | SxgSgl->State = SXG_BUFFER_BUSY; |
| 3483 | SXG_FREE_SGL_BUFFER(adapter, SxgSgl, NULL); |
| 3484 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XAlSgl", |
| 3485 | adapter, SxgSgl, Length, 0); |
| 3486 | } |
| 3487 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3488 | |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3489 | static void sxg_adapter_set_hwaddr(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3490 | { |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3491 | /* |
| 3492 | * DBG_ERROR ("%s ENTER card->config_set[%x] port[%d] physport[%d] \ |
| 3493 | * funct#[%d]\n", __func__, card->config_set, |
| 3494 | * adapter->port, adapter->physport, adapter->functionnumber); |
| 3495 | * |
| 3496 | * sxg_dbg_macaddrs(adapter); |
| 3497 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3498 | /* DBG_ERROR ("%s AFTER copying from config.macinfo into currmacaddr\n", |
| 3499 | * __FUNCTION__); |
| 3500 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3501 | |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3502 | /* sxg_dbg_macaddrs(adapter); */ |
| 3503 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3504 | if (!(adapter->currmacaddr[0] || |
| 3505 | adapter->currmacaddr[1] || |
| 3506 | adapter->currmacaddr[2] || |
| 3507 | adapter->currmacaddr[3] || |
| 3508 | adapter->currmacaddr[4] || adapter->currmacaddr[5])) { |
| 3509 | memcpy(adapter->currmacaddr, adapter->macaddr, 6); |
| 3510 | } |
| 3511 | if (adapter->netdev) { |
| 3512 | memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 6); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3513 | memcpy(adapter->netdev->perm_addr, adapter->currmacaddr, 6); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3514 | } |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3515 | /* DBG_ERROR ("%s EXIT port %d\n", __func__, adapter->port); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3516 | sxg_dbg_macaddrs(adapter); |
| 3517 | |
| 3518 | } |
| 3519 | |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3520 | #if XXXTODO |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3521 | static int sxg_mac_set_address(struct net_device *dev, void *ptr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3522 | { |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3523 | struct adapter_t *adapter = (struct adapter_t *) netdev_priv(dev); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3524 | struct sockaddr *addr = ptr; |
| 3525 | |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3526 | DBG_ERROR("%s ENTER (%s)\n", __func__, adapter->netdev->name); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3527 | |
| 3528 | if (netif_running(dev)) { |
| 3529 | return -EBUSY; |
| 3530 | } |
| 3531 | if (!adapter) { |
| 3532 | return -EBUSY; |
| 3533 | } |
| 3534 | DBG_ERROR("sxg: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3535 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3536 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 3537 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 3538 | adapter->currmacaddr[5]); |
| 3539 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
| 3540 | memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); |
| 3541 | DBG_ERROR("sxg: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3542 | __func__, adapter->netdev->name, adapter->currmacaddr[0], |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3543 | adapter->currmacaddr[1], adapter->currmacaddr[2], |
| 3544 | adapter->currmacaddr[3], adapter->currmacaddr[4], |
| 3545 | adapter->currmacaddr[5]); |
| 3546 | |
| 3547 | sxg_config_set(adapter, TRUE); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3548 | return 0; |
| 3549 | } |
Greg Kroah-Hartman | c6c25ed | 2008-10-21 10:41:45 -0700 | [diff] [blame] | 3550 | #endif |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3551 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3552 | /* |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3553 | * SXG DRIVER FUNCTIONS (below) |
| 3554 | * |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3555 | * sxg_initialize_adapter - Initialize adapter |
| 3556 | * |
| 3557 | * Arguments - |
| 3558 | * adapter - A pointer to our adapter structure |
| 3559 | * |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3560 | * Return - int |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3561 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3562 | static int sxg_initialize_adapter(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3563 | { |
| 3564 | u32 RssIds, IsrCount; |
| 3565 | u32 i; |
| 3566 | int status; |
| 3567 | |
| 3568 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "InitAdpt", |
| 3569 | adapter, 0, 0, 0); |
| 3570 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3571 | RssIds = 1; /* XXXTODO SXG_RSS_CPU_COUNT(adapter); */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3572 | IsrCount = adapter->MsiEnabled ? RssIds : 1; |
| 3573 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3574 | /* |
| 3575 | * Sanity check SXG_UCODE_REGS structure definition to |
| 3576 | * make sure the length is correct |
| 3577 | */ |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3578 | ASSERT(sizeof(struct sxg_ucode_regs) == SXG_REGISTER_SIZE_PER_CPU); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3579 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3580 | /* Disable interrupts */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3581 | SXG_DISABLE_ALL_INTERRUPTS(adapter); |
| 3582 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3583 | /* Set MTU */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3584 | ASSERT((adapter->FrameSize == ETHERMAXFRAME) || |
| 3585 | (adapter->FrameSize == JUMBOMAXFRAME)); |
| 3586 | WRITE_REG(adapter->UcodeRegs[0].LinkMtu, adapter->FrameSize, TRUE); |
| 3587 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3588 | /* Set event ring base address and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3589 | WRITE_REG64(adapter, |
| 3590 | adapter->UcodeRegs[0].EventBase, adapter->PEventRings, 0); |
| 3591 | WRITE_REG(adapter->UcodeRegs[0].EventSize, EVENT_RING_SIZE, TRUE); |
| 3592 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3593 | /* Per-ISR initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3594 | for (i = 0; i < IsrCount; i++) { |
| 3595 | u64 Addr; |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3596 | /* Set interrupt status pointer */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3597 | Addr = adapter->PIsr + (i * sizeof(u32)); |
| 3598 | WRITE_REG64(adapter, adapter->UcodeRegs[i].Isp, Addr, i); |
| 3599 | } |
| 3600 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3601 | /* XMT ring zero index */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3602 | WRITE_REG64(adapter, |
| 3603 | adapter->UcodeRegs[0].SPSendIndex, |
| 3604 | adapter->PXmtRingZeroIndex, 0); |
| 3605 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3606 | /* Per-RSS initialization */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3607 | for (i = 0; i < RssIds; i++) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3608 | /* Release all event ring entries to the Microcode */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3609 | WRITE_REG(adapter->UcodeRegs[i].EventRelease, EVENT_RING_SIZE, |
| 3610 | TRUE); |
| 3611 | } |
| 3612 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3613 | /* Transmit ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3614 | WRITE_REG64(adapter, |
| 3615 | adapter->UcodeRegs[0].XmtBase, adapter->PXmtRings, 0); |
| 3616 | WRITE_REG(adapter->UcodeRegs[0].XmtSize, SXG_XMT_RING_SIZE, TRUE); |
| 3617 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3618 | /* Receive ring base and size */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3619 | WRITE_REG64(adapter, |
| 3620 | adapter->UcodeRegs[0].RcvBase, adapter->PRcvRings, 0); |
| 3621 | WRITE_REG(adapter->UcodeRegs[0].RcvSize, SXG_RCV_RING_SIZE, TRUE); |
| 3622 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3623 | /* Populate the card with receive buffers */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3624 | sxg_stock_rcv_buffers(adapter); |
| 3625 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3626 | /* |
| 3627 | * Initialize checksum offload capabilities. At the moment we always |
| 3628 | * enable IP and TCP receive checksums on the card. Depending on the |
| 3629 | * checksum configuration specified by the user, we can choose to |
| 3630 | * report or ignore the checksum information provided by the card. |
| 3631 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3632 | WRITE_REG(adapter->UcodeRegs[0].ReceiveChecksum, |
| 3633 | SXG_RCV_TCP_CSUM_ENABLED | SXG_RCV_IP_CSUM_ENABLED, TRUE); |
| 3634 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3635 | /* Initialize the MAC, XAUI */ |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3636 | DBG_ERROR("sxg: %s ENTER sxg_initialize_link\n", __func__); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3637 | status = sxg_initialize_link(adapter); |
Harvey Harrison | e88bd23 | 2008-10-17 14:46:10 -0700 | [diff] [blame] | 3638 | DBG_ERROR("sxg: %s EXIT sxg_initialize_link status[%x]\n", __func__, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3639 | status); |
| 3640 | if (status != STATUS_SUCCESS) { |
| 3641 | return (status); |
| 3642 | } |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3643 | /* |
| 3644 | * Initialize Dead to FALSE. |
| 3645 | * SlicCheckForHang or SlicDumpThread will take it from here. |
| 3646 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3647 | adapter->Dead = FALSE; |
| 3648 | adapter->PingOutstanding = FALSE; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3649 | adapter->State = SXG_STATE_RUNNING; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3650 | |
| 3651 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XInit", |
| 3652 | adapter, 0, 0, 0); |
| 3653 | return (STATUS_SUCCESS); |
| 3654 | } |
| 3655 | |
| 3656 | /* |
| 3657 | * sxg_fill_descriptor_block - Populate a descriptor block and give it to |
| 3658 | * the card. The caller should hold the RcvQLock |
| 3659 | * |
| 3660 | * Arguments - |
| 3661 | * adapter - A pointer to our adapter structure |
| 3662 | * RcvDescriptorBlockHdr - Descriptor block to fill |
| 3663 | * |
| 3664 | * Return |
| 3665 | * status |
| 3666 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3667 | static int sxg_fill_descriptor_block(struct adapter_t *adapter, |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3668 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3669 | { |
| 3670 | u32 i; |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3671 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 3672 | struct sxg_rcv_data_buffer_hdr *RcvDataBufferHdr; |
| 3673 | struct sxg_rcv_descriptor_block *RcvDescriptorBlock; |
| 3674 | struct sxg_cmd *RingDescriptorCmd; |
| 3675 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3676 | |
| 3677 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "FilBlk", |
| 3678 | adapter, adapter->RcvBuffersOnCard, |
| 3679 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3680 | |
| 3681 | ASSERT(RcvDescriptorBlockHdr); |
| 3682 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3683 | /* |
| 3684 | * If we don't have the resources to fill the descriptor block, |
| 3685 | * return failure |
| 3686 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3687 | if ((adapter->FreeRcvBufferCount < SXG_RCV_DESCRIPTORS_PER_BLOCK) || |
| 3688 | SXG_RING_FULL(RcvRingInfo)) { |
| 3689 | adapter->Stats.NoMem++; |
| 3690 | return (STATUS_FAILURE); |
| 3691 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3692 | /* Get a ring descriptor command */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3693 | SXG_GET_CMD(RingZero, |
| 3694 | RcvRingInfo, RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3695 | ASSERT(RingDescriptorCmd); |
| 3696 | RcvDescriptorBlockHdr->State = SXG_BUFFER_ONCARD; |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3697 | RcvDescriptorBlock = (struct sxg_rcv_descriptor_block *) |
| 3698 | RcvDescriptorBlockHdr->VirtualAddress; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3699 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3700 | /* Fill in the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3701 | for (i = 0; i < SXG_RCV_DESCRIPTORS_PER_BLOCK; i++) { |
| 3702 | SXG_GET_RCV_DATA_BUFFER(adapter, RcvDataBufferHdr); |
| 3703 | ASSERT(RcvDataBufferHdr); |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3704 | ASSERT(RcvDataBufferHdr->SxgDumbRcvPacket); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3705 | SXG_REINIATIALIZE_PACKET(RcvDataBufferHdr->SxgDumbRcvPacket); |
| 3706 | RcvDataBufferHdr->State = SXG_BUFFER_ONCARD; |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3707 | RcvDescriptorBlock->Descriptors[i].VirtualAddress = |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3708 | (void *)RcvDataBufferHdr; |
Mithlesh Thukral | 1323e5f | 2009-01-05 21:13:23 +0530 | [diff] [blame] | 3709 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3710 | RcvDescriptorBlock->Descriptors[i].PhysicalAddress = |
| 3711 | RcvDataBufferHdr->PhysicalAddress; |
| 3712 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3713 | /* Add the descriptor block to receive descriptor ring 0 */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3714 | RingDescriptorCmd->Sgl = RcvDescriptorBlockHdr->PhysicalAddress; |
| 3715 | |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3716 | /* |
| 3717 | * RcvBuffersOnCard is not protected via the receive lock (see |
| 3718 | * sxg_process_event_queue) We don't want to grap a lock every time a |
| 3719 | * buffer is returned to us, so we use atomic interlocked functions |
| 3720 | * instead. |
| 3721 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3722 | adapter->RcvBuffersOnCard += SXG_RCV_DESCRIPTORS_PER_BLOCK; |
| 3723 | |
| 3724 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "DscBlk", |
| 3725 | RcvDescriptorBlockHdr, |
| 3726 | RingDescriptorCmd, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3727 | |
| 3728 | WRITE_REG(adapter->UcodeRegs[0].RcvCmd, 1, true); |
| 3729 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlk", |
| 3730 | adapter, adapter->RcvBuffersOnCard, |
| 3731 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3732 | return (STATUS_SUCCESS); |
| 3733 | } |
| 3734 | |
| 3735 | /* |
| 3736 | * sxg_stock_rcv_buffers - Stock the card with receive buffers |
| 3737 | * |
| 3738 | * Arguments - |
| 3739 | * adapter - A pointer to our adapter structure |
| 3740 | * |
| 3741 | * Return |
| 3742 | * None |
| 3743 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3744 | static void sxg_stock_rcv_buffers(struct adapter_t *adapter) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3745 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3746 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3747 | |
| 3748 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "StockBuf", |
| 3749 | adapter, adapter->RcvBuffersOnCard, |
| 3750 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3751 | /* |
| 3752 | * First, see if we've got less than our minimum threshold of |
| 3753 | * receive buffers, there isn't an allocation in progress, and |
| 3754 | * we haven't exceeded our maximum.. get another block of buffers |
| 3755 | * None of this needs to be SMP safe. It's round numbers. |
| 3756 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3757 | if ((adapter->FreeRcvBufferCount < SXG_MIN_RCV_DATA_BUFFERS) && |
| 3758 | (adapter->AllRcvBlockCount < SXG_MAX_RCV_BLOCKS) && |
| 3759 | (adapter->AllocationsPending == 0)) { |
| 3760 | sxg_allocate_buffer_memory(adapter, |
Mithlesh Thukral | d0128aa | 2009-01-05 21:18:04 +0530 | [diff] [blame] | 3761 | SXG_RCV_BLOCK_SIZE |
| 3762 | (SXG_RCV_DATA_HDR_SIZE), |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3763 | SXG_BUFFER_TYPE_RCV); |
| 3764 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3765 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3766 | spin_lock(&adapter->RcvQLock); |
| 3767 | while (adapter->RcvBuffersOnCard < SXG_RCV_DATA_BUFFERS) { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3768 | struct list_entry *_ple; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3769 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3770 | /* Get a descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3771 | RcvDescriptorBlockHdr = NULL; |
| 3772 | if (adapter->FreeRcvBlockCount) { |
| 3773 | _ple = RemoveHeadList(&adapter->FreeRcvBlocks); |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3774 | RcvDescriptorBlockHdr = |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3775 | container_of(_ple, struct sxg_rcv_descriptor_block_hdr, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3776 | FreeList); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3777 | adapter->FreeRcvBlockCount--; |
| 3778 | RcvDescriptorBlockHdr->State = SXG_BUFFER_BUSY; |
| 3779 | } |
| 3780 | |
| 3781 | if (RcvDescriptorBlockHdr == NULL) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3782 | /* Bail out.. */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3783 | adapter->Stats.NoMem++; |
| 3784 | break; |
| 3785 | } |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3786 | /* Fill in the descriptor block and give it to the card */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3787 | if (sxg_fill_descriptor_block(adapter, RcvDescriptorBlockHdr) == |
| 3788 | STATUS_FAILURE) { |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3789 | /* Free the descriptor block */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3790 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 3791 | RcvDescriptorBlockHdr); |
| 3792 | break; |
| 3793 | } |
| 3794 | } |
| 3795 | spin_unlock(&adapter->RcvQLock); |
| 3796 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XFilBlks", |
| 3797 | adapter, adapter->RcvBuffersOnCard, |
| 3798 | adapter->FreeRcvBufferCount, adapter->AllRcvBlockCount); |
| 3799 | } |
| 3800 | |
| 3801 | /* |
| 3802 | * sxg_complete_descriptor_blocks - Return descriptor blocks that have been |
| 3803 | * completed by the microcode |
| 3804 | * |
| 3805 | * Arguments - |
| 3806 | * adapter - A pointer to our adapter structure |
| 3807 | * Index - Where the microcode is up to |
| 3808 | * |
| 3809 | * Return |
| 3810 | * None |
| 3811 | */ |
J.R. Mauro | 73b0706 | 2008-10-28 18:42:02 -0400 | [diff] [blame] | 3812 | static void sxg_complete_descriptor_blocks(struct adapter_t *adapter, |
J.R. Mauro | 5c7514e | 2008-10-05 20:38:52 -0400 | [diff] [blame] | 3813 | unsigned char Index) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3814 | { |
Mithlesh Thukral | 942798b | 2009-01-05 21:14:34 +0530 | [diff] [blame] | 3815 | struct sxg_rcv_ring *RingZero = &adapter->RcvRings[0]; |
| 3816 | struct sxg_ring_info *RcvRingInfo = &adapter->RcvRingZeroInfo; |
| 3817 | struct sxg_rcv_descriptor_block_hdr *RcvDescriptorBlockHdr; |
| 3818 | struct sxg_cmd *RingDescriptorCmd; |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3819 | |
| 3820 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlks", |
| 3821 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3822 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3823 | /* Now grab the RcvQLock lock and proceed */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3824 | spin_lock(&adapter->RcvQLock); |
| 3825 | ASSERT(Index != RcvRingInfo->Tail); |
| 3826 | while (RcvRingInfo->Tail != Index) { |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3827 | /* |
| 3828 | * Locate the current Cmd (ring descriptor entry), and |
| 3829 | * associated receive descriptor block, and advance |
| 3830 | * the tail |
| 3831 | */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3832 | SXG_RETURN_CMD(RingZero, |
| 3833 | RcvRingInfo, |
| 3834 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3835 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "CmpRBlk", |
| 3836 | RcvRingInfo->Head, RcvRingInfo->Tail, |
| 3837 | RingDescriptorCmd, RcvDescriptorBlockHdr); |
| 3838 | |
J.R. Mauro | b243c4a | 2008-10-20 19:28:58 -0400 | [diff] [blame] | 3839 | /* Clear the SGL field */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3840 | RingDescriptorCmd->Sgl = 0; |
Mithlesh Thukral | ddd6f0a | 2009-01-05 21:15:29 +0530 | [diff] [blame] | 3841 | /* |
| 3842 | * Attempt to refill it and hand it right back to the |
| 3843 | * card. If we fail to refill it, free the descriptor block |
| 3844 | * header. The card will be restocked later via the |
| 3845 | * RcvBuffersOnCard test |
| 3846 | */ |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3847 | if (sxg_fill_descriptor_block(adapter, |
| 3848 | RcvDescriptorBlockHdr) == STATUS_FAILURE) |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3849 | SXG_FREE_RCV_DESCRIPTOR_BLOCK(adapter, |
| 3850 | RcvDescriptorBlockHdr); |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3851 | } |
| 3852 | spin_unlock(&adapter->RcvQLock); |
| 3853 | SXG_TRACE(TRACE_SXG, SxgTraceBuffer, TRACE_NOISY, "XCRBlks", |
| 3854 | adapter, Index, RcvRingInfo->Head, RcvRingInfo->Tail); |
| 3855 | } |
| 3856 | |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3857 | static struct pci_driver sxg_driver = { |
Mithlesh Thukral | 371d7a9 | 2009-01-19 20:22:34 +0530 | [diff] [blame^] | 3858 | .name = sxg_driver_name, |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3859 | .id_table = sxg_pci_tbl, |
| 3860 | .probe = sxg_entry_probe, |
| 3861 | .remove = sxg_entry_remove, |
| 3862 | #if SXG_POWER_MANAGEMENT_ENABLED |
| 3863 | .suspend = sxgpm_suspend, |
| 3864 | .resume = sxgpm_resume, |
| 3865 | #endif |
Mithlesh Thukral | cb636fe | 2009-01-05 21:16:56 +0530 | [diff] [blame] | 3866 | /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */ |
Greg Kroah-Hartman | 5db6b77 | 2008-08-21 14:04:55 -0700 | [diff] [blame] | 3867 | }; |
| 3868 | |
| 3869 | static int __init sxg_module_init(void) |
| 3870 | { |
| 3871 | sxg_init_driver(); |
| 3872 | |
| 3873 | if (debug >= 0) |
| 3874 | sxg_debug = debug; |
| 3875 | |
| 3876 | return pci_register_driver(&sxg_driver); |
| 3877 | } |
| 3878 | |
| 3879 | static void __exit sxg_module_cleanup(void) |
| 3880 | { |
| 3881 | pci_unregister_driver(&sxg_driver); |
| 3882 | } |
| 3883 | |
| 3884 | module_init(sxg_module_init); |
| 3885 | module_exit(sxg_module_cleanup); |