blob: a7422e52d8836f8333137b79c631f7f0d0467db9 [file] [log] [blame]
Ron Rindjunsky1053d352008-05-05 10:22:43 +08001/******************************************************************************
2 *
Reinette Chatre01f81622009-01-08 10:20:02 -08003 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
Ron Rindjunsky1053d352008-05-05 10:22:43 +08004 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080025 * Intel Linux Wireless <ilw@linux.intel.com>
Ron Rindjunsky1053d352008-05-05 10:22:43 +080026 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
Tomas Winklerfd4abac2008-05-15 13:54:07 +080030#include <linux/etherdevice.h>
Ron Rindjunsky1053d352008-05-05 10:22:43 +080031#include <net/mac80211.h>
32#include "iwl-eeprom.h"
33#include "iwl-dev.h"
34#include "iwl-core.h"
35#include "iwl-sta.h"
36#include "iwl-io.h"
37#include "iwl-helpers.h"
38
Tomas Winkler30e553e2008-05-29 16:35:16 +080039static const u16 default_tid_to_tx_fifo[] = {
40 IWL_TX_FIFO_AC1,
41 IWL_TX_FIFO_AC0,
42 IWL_TX_FIFO_AC0,
43 IWL_TX_FIFO_AC1,
44 IWL_TX_FIFO_AC2,
45 IWL_TX_FIFO_AC2,
46 IWL_TX_FIFO_AC3,
47 IWL_TX_FIFO_AC3,
48 IWL_TX_FIFO_NONE,
49 IWL_TX_FIFO_NONE,
50 IWL_TX_FIFO_NONE,
51 IWL_TX_FIFO_NONE,
52 IWL_TX_FIFO_NONE,
53 IWL_TX_FIFO_NONE,
54 IWL_TX_FIFO_NONE,
55 IWL_TX_FIFO_NONE,
56 IWL_TX_FIFO_AC3
57};
58
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -080059static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv,
60 struct iwl_dma_ptr *ptr, size_t size)
61{
62 ptr->addr = pci_alloc_consistent(priv->pci_dev, size, &ptr->dma);
63 if (!ptr->addr)
64 return -ENOMEM;
65 ptr->size = size;
66 return 0;
67}
68
69static inline void iwl_free_dma_ptr(struct iwl_priv *priv,
70 struct iwl_dma_ptr *ptr)
71{
72 if (unlikely(!ptr->addr))
73 return;
74
75 pci_free_consistent(priv->pci_dev, ptr->size, ptr->addr, ptr->dma);
76 memset(ptr, 0, sizeof(*ptr));
77}
78
Tomas Winklerfd4abac2008-05-15 13:54:07 +080079/**
80 * iwl_txq_update_write_ptr - Send new write index to hardware
81 */
82int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
83{
84 u32 reg = 0;
85 int ret = 0;
86 int txq_id = txq->q.id;
87
88 if (txq->need_update == 0)
89 return ret;
90
91 /* if we're trying to save power */
92 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
93 /* wake up nic if it's powered down ...
94 * uCode will wake up, and interrupt us again, so next
95 * time we'll skip this part. */
96 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
97
98 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
Tomas Winklere1623442009-01-27 14:27:56 -080099 IWL_DEBUG_INFO(priv, "Requesting wakeup, GP1 = 0x%x\n", reg);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800100 iwl_set_bit(priv, CSR_GP_CNTRL,
101 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
102 return ret;
103 }
104
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800105 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
106 txq->q.write_ptr | (txq_id << 8));
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800107
108 /* else not in power-save mode, uCode will never sleep when we're
109 * trying to tx (during RFKILL, we're not trying to tx). */
110 } else
111 iwl_write32(priv, HBUS_TARG_WRPTR,
112 txq->q.write_ptr | (txq_id << 8));
113
114 txq->need_update = 0;
115
116 return ret;
117}
118EXPORT_SYMBOL(iwl_txq_update_write_ptr);
119
120
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800121/**
122 * iwl_tx_queue_free - Deallocate DMA queue.
123 * @txq: Transmit queue to deallocate.
124 *
125 * Empty queue by removing and destroying all BD's.
126 * Free all buffers.
127 * 0-fill, but do not free "txq" descriptor structure.
128 */
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800129void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800130{
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800131 struct iwl_tx_queue *txq = &priv->txq[txq_id];
Tomas Winkler443cfd42008-05-15 13:53:57 +0800132 struct iwl_queue *q = &txq->q;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800133 struct pci_dev *dev = priv->pci_dev;
Tomas Winkler961ba602008-10-14 12:32:44 -0700134 int i, len;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800135
136 if (q->n_bd == 0)
137 return;
138
139 /* first, empty all BD's */
140 for (; q->write_ptr != q->read_ptr;
141 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -0800142 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800143
Johannes Bergc2acea82009-07-24 11:13:05 -0700144 len = sizeof(struct iwl_device_cmd) * q->n_window;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800145
146 /* De-alloc array of command/tx buffers */
Tomas Winkler961ba602008-10-14 12:32:44 -0700147 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800148 kfree(txq->cmd[i]);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800149
150 /* De-alloc circular buffer of TFDs */
151 if (txq->q.n_bd)
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800152 pci_free_consistent(dev, priv->hw_params.tfd_size *
Tomas Winkler499b1882008-10-14 12:32:48 -0700153 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800154
155 /* De-alloc array of per-TFD driver data */
156 kfree(txq->txb);
157 txq->txb = NULL;
158
Johannes Bergc2acea82009-07-24 11:13:05 -0700159 /* deallocate arrays */
160 kfree(txq->cmd);
161 kfree(txq->meta);
162 txq->cmd = NULL;
163 txq->meta = NULL;
164
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800165 /* 0-fill queue descriptor structure */
166 memset(txq, 0, sizeof(*txq));
167}
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800168EXPORT_SYMBOL(iwl_tx_queue_free);
Tomas Winkler961ba602008-10-14 12:32:44 -0700169
170/**
171 * iwl_cmd_queue_free - Deallocate DMA queue.
172 * @txq: Transmit queue to deallocate.
173 *
174 * Empty queue by removing and destroying all BD's.
175 * Free all buffers.
176 * 0-fill, but do not free "txq" descriptor structure.
177 */
Abhijeet Kolekar3e5d2382009-03-17 21:51:49 -0700178void iwl_cmd_queue_free(struct iwl_priv *priv)
Tomas Winkler961ba602008-10-14 12:32:44 -0700179{
180 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
181 struct iwl_queue *q = &txq->q;
182 struct pci_dev *dev = priv->pci_dev;
183 int i, len;
184
185 if (q->n_bd == 0)
186 return;
187
Johannes Bergc2acea82009-07-24 11:13:05 -0700188 len = sizeof(struct iwl_device_cmd) * q->n_window;
Tomas Winkler961ba602008-10-14 12:32:44 -0700189 len += IWL_MAX_SCAN_SIZE;
190
191 /* De-alloc array of command/tx buffers */
192 for (i = 0; i <= TFD_CMD_SLOTS; i++)
193 kfree(txq->cmd[i]);
194
195 /* De-alloc circular buffer of TFDs */
196 if (txq->q.n_bd)
Abhijeet Kolekar3e5d2382009-03-17 21:51:49 -0700197 pci_free_consistent(dev, priv->hw_params.tfd_size *
Tomas Winkler499b1882008-10-14 12:32:48 -0700198 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
Tomas Winkler961ba602008-10-14 12:32:44 -0700199
200 /* 0-fill queue descriptor structure */
201 memset(txq, 0, sizeof(*txq));
202}
Abhijeet Kolekar3e5d2382009-03-17 21:51:49 -0700203EXPORT_SYMBOL(iwl_cmd_queue_free);
204
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800205/*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
206 * DMA services
207 *
208 * Theory of operation
209 *
210 * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
211 * of buffer descriptors, each of which points to one or more data buffers for
212 * the device to read from or fill. Driver and device exchange status of each
213 * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
214 * entries in each circular buffer, to protect against confusing empty and full
215 * queue states.
216 *
217 * The device reads or writes the data in the queues via the device's several
218 * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
219 *
220 * For Tx queue, there are low mark and high mark limits. If, after queuing
221 * the packet for Tx, free space become < low mark, Tx queue stopped. When
222 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
223 * Tx queue resumed.
224 *
225 * See more detailed info in iwl-4965-hw.h.
226 ***************************************************/
227
228int iwl_queue_space(const struct iwl_queue *q)
229{
230 int s = q->read_ptr - q->write_ptr;
231
232 if (q->read_ptr > q->write_ptr)
233 s -= q->n_bd;
234
235 if (s <= 0)
236 s += q->n_window;
237 /* keep some reserve to not confuse empty and full situations */
238 s -= 2;
239 if (s < 0)
240 s = 0;
241 return s;
242}
243EXPORT_SYMBOL(iwl_queue_space);
244
245
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800246/**
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800247 * iwl_queue_init - Initialize queue's high/low-water and read/write indexes
248 */
Tomas Winkler443cfd42008-05-15 13:53:57 +0800249static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800250 int count, int slots_num, u32 id)
251{
252 q->n_bd = count;
253 q->n_window = slots_num;
254 q->id = id;
255
256 /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
257 * and iwl_queue_dec_wrap are broken. */
258 BUG_ON(!is_power_of_2(count));
259
260 /* slots_num must be power-of-two size, otherwise
261 * get_cmd_index is broken. */
262 BUG_ON(!is_power_of_2(slots_num));
263
264 q->low_mark = q->n_window / 4;
265 if (q->low_mark < 4)
266 q->low_mark = 4;
267
268 q->high_mark = q->n_window / 8;
269 if (q->high_mark < 2)
270 q->high_mark = 2;
271
272 q->write_ptr = q->read_ptr = 0;
273
274 return 0;
275}
276
277/**
278 * iwl_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
279 */
280static int iwl_tx_queue_alloc(struct iwl_priv *priv,
Ron Rindjunsky16466902008-05-05 10:22:50 +0800281 struct iwl_tx_queue *txq, u32 id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800282{
283 struct pci_dev *dev = priv->pci_dev;
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800284 size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800285
286 /* Driver private data, only for Tx (not command) queues,
287 * not shared with device. */
288 if (id != IWL_CMD_QUEUE_NUM) {
289 txq->txb = kmalloc(sizeof(txq->txb[0]) *
290 TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
291 if (!txq->txb) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800292 IWL_ERR(priv, "kmalloc for auxiliary BD "
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800293 "structures failed\n");
294 goto error;
295 }
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800296 } else {
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800297 txq->txb = NULL;
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800298 }
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800299
300 /* Circular buffer of transmit frame descriptors (TFDs),
301 * shared with device */
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800302 txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800303
Tomas Winkler499b1882008-10-14 12:32:48 -0700304 if (!txq->tfds) {
Winkler, Tomas3978e5b2009-01-23 13:45:23 -0800305 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800306 goto error;
307 }
308 txq->q.id = id;
309
310 return 0;
311
312 error:
313 kfree(txq->txb);
314 txq->txb = NULL;
315
316 return -ENOMEM;
317}
318
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800319/**
320 * iwl_tx_queue_init - Allocate and initialize one tx/cmd queue
321 */
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800322int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
323 int slots_num, u32 txq_id)
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800324{
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800325 int i, len;
Tomas Winkler73b7d742008-09-03 11:18:48 +0800326 int ret;
Johannes Bergc2acea82009-07-24 11:13:05 -0700327 int actual_slots = slots_num;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800328
329 /*
330 * Alloc buffer array for commands (Tx or other types of commands).
331 * For the command queue (#4), allocate command space + one big
332 * command for scan, since scan command is very huge; the system will
333 * not have two scans at the same time, so only one is needed.
334 * For normal Tx queues (all other queues), no super-size command
335 * space is needed.
336 */
Johannes Bergc2acea82009-07-24 11:13:05 -0700337 if (txq_id == IWL_CMD_QUEUE_NUM)
338 actual_slots++;
339
340 txq->meta = kzalloc(sizeof(struct iwl_cmd_meta) * actual_slots,
341 GFP_KERNEL);
342 txq->cmd = kzalloc(sizeof(struct iwl_device_cmd *) * actual_slots,
343 GFP_KERNEL);
344
345 if (!txq->meta || !txq->cmd)
346 goto out_free_arrays;
347
348 len = sizeof(struct iwl_device_cmd);
349 for (i = 0; i < actual_slots; i++) {
350 /* only happens for cmd queue */
351 if (i == slots_num)
352 len += IWL_MAX_SCAN_SIZE;
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800353
John W. Linville49898852008-09-02 15:07:18 -0400354 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800355 if (!txq->cmd[i])
Tomas Winkler73b7d742008-09-03 11:18:48 +0800356 goto err;
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800357 }
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800358
359 /* Alloc driver data array and TFD circular buffer */
Tomas Winkler73b7d742008-09-03 11:18:48 +0800360 ret = iwl_tx_queue_alloc(priv, txq, txq_id);
361 if (ret)
362 goto err;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800363
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800364 txq->need_update = 0;
365
Johannes Berg45af8192009-06-19 13:52:43 -0700366 /* aggregation TX queues will get their ID when aggregation begins */
367 if (txq_id <= IWL_TX_FIFO_AC3)
368 txq->swq_id = txq_id;
369
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800370 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
371 * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
372 BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
373
374 /* Initialize queue's high/low-water marks, and head/tail indexes */
375 iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
376
377 /* Tell device where to find queue */
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800378 priv->cfg->ops->lib->txq_init(priv, txq);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800379
380 return 0;
Tomas Winkler73b7d742008-09-03 11:18:48 +0800381err:
Johannes Bergc2acea82009-07-24 11:13:05 -0700382 for (i = 0; i < actual_slots; i++)
Tomas Winkler73b7d742008-09-03 11:18:48 +0800383 kfree(txq->cmd[i]);
Johannes Bergc2acea82009-07-24 11:13:05 -0700384out_free_arrays:
385 kfree(txq->meta);
386 kfree(txq->cmd);
Tomas Winkler73b7d742008-09-03 11:18:48 +0800387
Tomas Winkler73b7d742008-09-03 11:18:48 +0800388 return -ENOMEM;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800389}
Samuel Ortiza8e74e272009-01-23 13:45:14 -0800390EXPORT_SYMBOL(iwl_tx_queue_init);
391
Tomas Winklerda1bc452008-05-29 16:35:00 +0800392/**
393 * iwl_hw_txq_ctx_free - Free TXQ Context
394 *
395 * Destroy all TX DMA queues and structures
396 */
397void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
398{
399 int txq_id;
400
401 /* Tx queues */
402 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
Tomas Winkler961ba602008-10-14 12:32:44 -0700403 if (txq_id == IWL_CMD_QUEUE_NUM)
404 iwl_cmd_queue_free(priv);
405 else
406 iwl_tx_queue_free(priv, txq_id);
Tomas Winklerda1bc452008-05-29 16:35:00 +0800407
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800408 iwl_free_dma_ptr(priv, &priv->kw);
409
410 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
Tomas Winklerda1bc452008-05-29 16:35:00 +0800411}
412EXPORT_SYMBOL(iwl_hw_txq_ctx_free);
413
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800414/**
415 * iwl_txq_ctx_reset - Reset TX queue context
Tomas Winklera96a27f2008-10-23 23:48:56 -0700416 * Destroys all DMA structures and initialize them again
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800417 *
418 * @param priv
419 * @return error code
420 */
421int iwl_txq_ctx_reset(struct iwl_priv *priv)
422{
423 int ret = 0;
424 int txq_id, slots_num;
Tomas Winklerda1bc452008-05-29 16:35:00 +0800425 unsigned long flags;
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800426
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800427 /* Free all tx/cmd queues and keep-warm buffer */
428 iwl_hw_txq_ctx_free(priv);
429
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800430 ret = iwl_alloc_dma_ptr(priv, &priv->scd_bc_tbls,
431 priv->hw_params.scd_bc_tbls_size);
432 if (ret) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800433 IWL_ERR(priv, "Scheduler BC Table allocation failed\n");
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800434 goto error_bc_tbls;
435 }
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800436 /* Alloc keep-warm buffer */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800437 ret = iwl_alloc_dma_ptr(priv, &priv->kw, IWL_KW_SIZE);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800438 if (ret) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800439 IWL_ERR(priv, "Keep Warm allocation failed\n");
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800440 goto error_kw;
441 }
Tomas Winklerda1bc452008-05-29 16:35:00 +0800442 spin_lock_irqsave(&priv->lock, flags);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800443
444 /* Turn off all Tx DMA fifos */
Tomas Winklerda1bc452008-05-29 16:35:00 +0800445 priv->cfg->ops->lib->txq_set_sched(priv, 0);
446
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800447 /* Tell NIC where to find the "keep warm" buffer */
448 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
449
Tomas Winklerda1bc452008-05-29 16:35:00 +0800450 spin_unlock_irqrestore(&priv->lock, flags);
451
Tomas Winklerda1bc452008-05-29 16:35:00 +0800452 /* Alloc and init all Tx queues, including the command queue (#4) */
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800453 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
454 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
455 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
456 ret = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
457 txq_id);
458 if (ret) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800459 IWL_ERR(priv, "Tx %d queue init failed\n", txq_id);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800460 goto error;
461 }
462 }
463
464 return ret;
465
466 error:
467 iwl_hw_txq_ctx_free(priv);
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800468 iwl_free_dma_ptr(priv, &priv->kw);
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800469 error_kw:
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800470 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
471 error_bc_tbls:
Ron Rindjunsky1053d352008-05-05 10:22:43 +0800472 return ret;
473}
Emmanuel Grumbacha33c2f42008-09-03 11:26:56 +0800474
Tomas Winklerda1bc452008-05-29 16:35:00 +0800475/**
476 * iwl_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
477 */
478void iwl_txq_ctx_stop(struct iwl_priv *priv)
479{
Zhu Yif3f911d2008-12-02 12:14:04 -0800480 int ch;
Tomas Winklerda1bc452008-05-29 16:35:00 +0800481 unsigned long flags;
482
Tomas Winklerda1bc452008-05-29 16:35:00 +0800483 /* Turn off all Tx DMA fifos */
484 spin_lock_irqsave(&priv->lock, flags);
Tomas Winklerda1bc452008-05-29 16:35:00 +0800485
486 priv->cfg->ops->lib->txq_set_sched(priv, 0);
487
488 /* Stop each Tx DMA channel, and wait for it to be idle */
Zhu Yif3f911d2008-12-02 12:14:04 -0800489 for (ch = 0; ch < priv->hw_params.dma_chnl_num; ch++) {
490 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
Tomas Winklerda1bc452008-05-29 16:35:00 +0800491 iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
Zhu Yif3f911d2008-12-02 12:14:04 -0800492 FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
Zhu, Yif0566582008-12-05 07:58:38 -0800493 1000);
Tomas Winklerda1bc452008-05-29 16:35:00 +0800494 }
Tomas Winklerda1bc452008-05-29 16:35:00 +0800495 spin_unlock_irqrestore(&priv->lock, flags);
496
497 /* Deallocate memory for all Tx queues */
498 iwl_hw_txq_ctx_free(priv);
499}
500EXPORT_SYMBOL(iwl_txq_ctx_stop);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800501
502/*
503 * handle build REPLY_TX command notification.
504 */
505static void iwl_tx_cmd_build_basic(struct iwl_priv *priv,
506 struct iwl_tx_cmd *tx_cmd,
Johannes Berge039fa42008-05-15 12:55:29 +0200507 struct ieee80211_tx_info *info,
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800508 struct ieee80211_hdr *hdr,
Rami Rosen0e7690f2008-12-18 18:04:51 +0200509 u8 std_id)
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800510{
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700511 __le16 fc = hdr->frame_control;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800512 __le32 tx_flags = tx_cmd->tx_flags;
513
514 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
Johannes Berge039fa42008-05-15 12:55:29 +0200515 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800516 tx_flags |= TX_CMD_FLG_ACK_MSK;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700517 if (ieee80211_is_mgmt(fc))
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800518 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700519 if (ieee80211_is_probe_resp(fc) &&
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800520 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
521 tx_flags |= TX_CMD_FLG_TSF_MSK;
522 } else {
523 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
524 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
525 }
526
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700527 if (ieee80211_is_back_req(fc))
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800528 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
529
530
531 tx_cmd->sta_id = std_id;
Harvey Harrison8b7b1e02008-06-11 14:21:56 -0700532 if (ieee80211_has_morefrags(fc))
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800533 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
534
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700535 if (ieee80211_is_data_qos(fc)) {
536 u8 *qc = ieee80211_get_qos_ctl(hdr);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800537 tx_cmd->tid_tspec = qc[0] & 0xf;
538 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
539 } else {
540 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
541 }
542
Emmanuel Grumbacha326a5d2008-07-11 11:53:31 +0800543 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800544
545 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
546 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
547
548 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700549 if (ieee80211_is_mgmt(fc)) {
550 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800551 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
552 else
553 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
554 } else {
555 tx_cmd->timeout.pm_frame_timeout = 0;
556 }
557
558 tx_cmd->driver_txop = 0;
559 tx_cmd->tx_flags = tx_flags;
560 tx_cmd->next_frame_len = 0;
561}
562
563#define RTS_HCCA_RETRY_LIMIT 3
564#define RTS_DFAULT_RETRY_LIMIT 60
565
566static void iwl_tx_cmd_build_rate(struct iwl_priv *priv,
567 struct iwl_tx_cmd *tx_cmd,
Johannes Berge039fa42008-05-15 12:55:29 +0200568 struct ieee80211_tx_info *info,
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700569 __le16 fc, int is_hcca)
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800570{
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700571 u32 rate_flags;
Tomas Winkler76eff182008-10-14 12:32:45 -0700572 int rate_idx;
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700573 u8 rts_retry_limit;
574 u8 data_retry_limit;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800575 u8 rate_plcp;
Johannes Berg2e92e6f2008-05-15 12:55:27 +0200576
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700577 /* Set retry limit on DATA packets and Probe Responses*/
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800578 if (priv->data_retry_limit != -1)
579 data_retry_limit = priv->data_retry_limit;
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700580 else if (ieee80211_is_probe_resp(fc))
581 data_retry_limit = 3;
582 else
583 data_retry_limit = IWL_DEFAULT_TX_RETRY;
584 tx_cmd->data_retry_limit = data_retry_limit;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800585
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700586 /* Set retry limit on RTS packets */
587 rts_retry_limit = (is_hcca) ? RTS_HCCA_RETRY_LIMIT :
588 RTS_DFAULT_RETRY_LIMIT;
589 if (data_retry_limit < rts_retry_limit)
590 rts_retry_limit = data_retry_limit;
591 tx_cmd->rts_retry_limit = rts_retry_limit;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800592
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700593 /* DATA packets will use the uCode station table for rate/antenna
594 * selection */
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800595 if (ieee80211_is_data(fc)) {
596 tx_cmd->initial_rate_index = 0;
597 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700598 return;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800599 }
600
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700601 /**
602 * If the current TX rate stored in mac80211 has the MCS bit set, it's
603 * not really a TX rate. Thus, we use the lowest supported rate for
604 * this band. Also use the lowest supported rate if the stored rate
605 * index is invalid.
606 */
607 rate_idx = info->control.rates[0].idx;
608 if (info->control.rates[0].flags & IEEE80211_TX_RC_MCS ||
609 (rate_idx < 0) || (rate_idx > IWL_RATE_COUNT_LEGACY))
610 rate_idx = rate_lowest_index(&priv->bands[info->band],
611 info->control.sta);
612 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
613 if (info->band == IEEE80211_BAND_5GHZ)
614 rate_idx += IWL_FIRST_OFDM_RATE;
615 /* Get PLCP rate for tx_cmd->rate_n_flags */
616 rate_plcp = iwl_rates[rate_idx].plcp;
617 /* Zero out flags for this packet */
618 rate_flags = 0;
619
620 /* Set CCK flag as needed */
621 if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
622 rate_flags |= RATE_MCS_CCK_MSK;
623
624 /* Set up RTS and CTS flags for certain packets */
625 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
626 case cpu_to_le16(IEEE80211_STYPE_AUTH):
627 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
628 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
629 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
630 if (tx_cmd->tx_flags & TX_CMD_FLG_RTS_MSK) {
631 tx_cmd->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
632 tx_cmd->tx_flags |= TX_CMD_FLG_CTS_MSK;
633 }
634 break;
635 default:
636 break;
637 }
638
639 /* Set up antennas */
640 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
641 rate_flags |= iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
642
643 /* Set the rate in the TX cmd */
Tomas Winklere7d326a2008-06-12 09:47:11 +0800644 tx_cmd->rate_n_flags = iwl_hw_set_rate_n_flags(rate_plcp, rate_flags);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800645}
646
647static void iwl_tx_cmd_build_hwcrypto(struct iwl_priv *priv,
Johannes Berge039fa42008-05-15 12:55:29 +0200648 struct ieee80211_tx_info *info,
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800649 struct iwl_tx_cmd *tx_cmd,
650 struct sk_buff *skb_frag,
651 int sta_id)
652{
Johannes Berge039fa42008-05-15 12:55:29 +0200653 struct ieee80211_key_conf *keyconf = info->control.hw_key;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800654
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +0800655 switch (keyconf->alg) {
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800656 case ALG_CCMP:
657 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +0800658 memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
Johannes Berge039fa42008-05-15 12:55:29 +0200659 if (info->flags & IEEE80211_TX_CTL_AMPDU)
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800660 tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
Tomas Winklere1623442009-01-27 14:27:56 -0800661 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800662 break;
663
664 case ALG_TKIP:
665 tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +0800666 ieee80211_get_tkip_key(keyconf, skb_frag,
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800667 IEEE80211_TKIP_P2_KEY, tx_cmd->key);
Tomas Winklere1623442009-01-27 14:27:56 -0800668 IWL_DEBUG_TX(priv, "tx_cmd with tkip hwcrypto\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800669 break;
670
671 case ALG_WEP:
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800672 tx_cmd->sec_ctl |= (TX_CMD_SEC_WEP |
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +0800673 (keyconf->keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
674
675 if (keyconf->keylen == WEP_KEY_LEN_128)
676 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
677
678 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800679
Tomas Winklere1623442009-01-27 14:27:56 -0800680 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
Emmanuel Grumbachccc038a2008-05-15 13:54:09 +0800681 "with key %d\n", keyconf->keyidx);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800682 break;
683
684 default:
Tomas Winkler978785a2008-12-19 10:37:31 +0800685 IWL_ERR(priv, "Unknown encode alg %d\n", keyconf->alg);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800686 break;
687 }
688}
689
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800690/*
691 * start REPLY_TX command process
692 */
Johannes Berge039fa42008-05-15 12:55:29 +0200693int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800694{
695 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Johannes Berge039fa42008-05-15 12:55:29 +0200696 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
Tomas Winklerf3674222008-08-04 16:00:44 +0800697 struct iwl_tx_queue *txq;
698 struct iwl_queue *q;
Johannes Bergc2acea82009-07-24 11:13:05 -0700699 struct iwl_device_cmd *out_cmd;
700 struct iwl_cmd_meta *out_meta;
Tomas Winklerf3674222008-08-04 16:00:44 +0800701 struct iwl_tx_cmd *tx_cmd;
702 int swq_id, txq_id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800703 dma_addr_t phys_addr;
704 dma_addr_t txcmd_phys;
705 dma_addr_t scratch_phys;
Tomas Winklerb88b15d2008-10-14 12:32:49 -0700706 u16 len, len_org;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800707 u16 seq_number = 0;
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700708 __le16 fc;
Rami Rosen0e7690f2008-12-18 18:04:51 +0200709 u8 hdr_len;
Tomas Winklerf3674222008-08-04 16:00:44 +0800710 u8 sta_id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800711 u8 wait_write_ptr = 0;
712 u8 tid = 0;
713 u8 *qc = NULL;
714 unsigned long flags;
715 int ret;
716
717 spin_lock_irqsave(&priv->lock, flags);
718 if (iwl_is_rfkill(priv)) {
Tomas Winklere1623442009-01-27 14:27:56 -0800719 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800720 goto drop_unlock;
721 }
722
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700723 fc = hdr->frame_control;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800724
725#ifdef CONFIG_IWLWIFI_DEBUG
726 if (ieee80211_is_auth(fc))
Tomas Winklere1623442009-01-27 14:27:56 -0800727 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700728 else if (ieee80211_is_assoc_req(fc))
Tomas Winklere1623442009-01-27 14:27:56 -0800729 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700730 else if (ieee80211_is_reassoc_req(fc))
Tomas Winklere1623442009-01-27 14:27:56 -0800731 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800732#endif
733
Gábor Stefanikaa065262009-08-21 20:44:09 +0200734 /* drop all non-injected data frame if we are not associated */
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700735 if (ieee80211_is_data(fc) &&
Gábor Stefanikaa065262009-08-21 20:44:09 +0200736 !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
Stefanik Gábord10c4ec2008-09-03 11:26:59 +0800737 (!iwl_is_associated(priv) ||
Johannes Berg05c914f2008-09-11 00:01:58 +0200738 ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id) ||
Stefanik Gábord10c4ec2008-09-03 11:26:59 +0800739 !priv->assoc_station_added)) {
Tomas Winklere1623442009-01-27 14:27:56 -0800740 IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800741 goto drop_unlock;
742 }
743
Harvey Harrison7294ec92008-07-15 18:43:59 -0700744 hdr_len = ieee80211_hdrlen(fc);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800745
746 /* Find (or create) index into station table for destination station */
Gábor Stefanikaa065262009-08-21 20:44:09 +0200747 if (info->flags & IEEE80211_TX_CTL_INJECTED)
748 sta_id = priv->hw_params.bcast_sta_id;
749 else
750 sta_id = iwl_get_sta_id(priv, hdr);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800751 if (sta_id == IWL_INVALID_STATION) {
Tomas Winklere1623442009-01-27 14:27:56 -0800752 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
Johannes Berge1749612008-10-27 15:59:26 -0700753 hdr->addr1);
Johannes Berg3995bd92009-07-24 11:13:14 -0700754 goto drop_unlock;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800755 }
756
Tomas Winklere1623442009-01-27 14:27:56 -0800757 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800758
Johannes Berg45af8192009-06-19 13:52:43 -0700759 txq_id = skb_get_queue_mapping(skb);
Harvey Harrisonfd7c8a42008-06-11 14:21:56 -0700760 if (ieee80211_is_data_qos(fc)) {
761 qc = ieee80211_get_qos_ctl(hdr);
Harvey Harrison7294ec92008-07-15 18:43:59 -0700762 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
Reinette Chatree6a6cf42009-08-13 13:30:50 -0700763 if (unlikely(tid >= MAX_TID_COUNT))
764 goto drop_unlock;
Tomas Winklerf3674222008-08-04 16:00:44 +0800765 seq_number = priv->stations[sta_id].tid[tid].seq_number;
766 seq_number &= IEEE80211_SCTL_SEQ;
767 hdr->seq_ctrl = hdr->seq_ctrl &
Harvey Harrisonc1b4aa32009-01-29 13:26:44 -0800768 cpu_to_le16(IEEE80211_SCTL_FRAG);
Tomas Winklerf3674222008-08-04 16:00:44 +0800769 hdr->seq_ctrl |= cpu_to_le16(seq_number);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800770 seq_number += 0x10;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800771 /* aggregation is on for this <sta,tid> */
Johannes Berg45af8192009-06-19 13:52:43 -0700772 if (info->flags & IEEE80211_TX_CTL_AMPDU)
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800773 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800774 }
775
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800776 txq = &priv->txq[txq_id];
Johannes Berg45af8192009-06-19 13:52:43 -0700777 swq_id = txq->swq_id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800778 q = &txq->q;
779
Johannes Berg3995bd92009-07-24 11:13:14 -0700780 if (unlikely(iwl_queue_space(q) < q->high_mark))
781 goto drop_unlock;
782
783 if (ieee80211_is_data_qos(fc))
784 priv->stations[sta_id].tid[tid].tfds_in_queue++;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800785
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800786 /* Set up driver data for this TFD */
787 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
788 txq->txb[q->write_ptr].skb[0] = skb;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800789
790 /* Set up first empty entry in queue's array of Tx/cmd buffers */
Tomas Winklerb88b15d2008-10-14 12:32:49 -0700791 out_cmd = txq->cmd[q->write_ptr];
Johannes Bergc2acea82009-07-24 11:13:05 -0700792 out_meta = &txq->meta[q->write_ptr];
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800793 tx_cmd = &out_cmd->cmd.tx;
794 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
795 memset(tx_cmd, 0, sizeof(struct iwl_tx_cmd));
796
797 /*
798 * Set up the Tx-command (not MAC!) header.
799 * Store the chosen Tx queue and TFD index within the sequence field;
800 * after Tx, uCode's Tx response will return this value so driver can
801 * locate the frame within the tx queue and do post-tx processing.
802 */
803 out_cmd->hdr.cmd = REPLY_TX;
804 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
805 INDEX_TO_SEQ(q->write_ptr)));
806
807 /* Copy MAC header from skb into command buffer */
808 memcpy(tx_cmd->hdr, hdr, hdr_len);
809
Reinette Chatredf833b12009-04-21 10:55:48 -0700810
811 /* Total # bytes to be transmitted */
812 len = (u16)skb->len;
813 tx_cmd->len = cpu_to_le16(len);
814
815 if (info->control.hw_key)
816 iwl_tx_cmd_build_hwcrypto(priv, info, tx_cmd, skb, sta_id);
817
818 /* TODO need this for burst mode later on */
819 iwl_tx_cmd_build_basic(priv, tx_cmd, info, hdr, sta_id);
Wey-Yi Guy20594eb2009-08-07 15:41:39 -0700820 iwl_dbg_log_tx_data_frame(priv, len, hdr);
Reinette Chatredf833b12009-04-21 10:55:48 -0700821
822 /* set is_hcca to 0; it probably will never be implemented */
Daniel C Halperinb58ef2142009-08-28 09:44:46 -0700823 iwl_tx_cmd_build_rate(priv, tx_cmd, info, fc, 0);
Reinette Chatredf833b12009-04-21 10:55:48 -0700824
Wey-Yi Guy22fdf3c2009-08-07 15:41:40 -0700825 iwl_update_stats(priv, true, fc, len);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800826 /*
827 * Use the first empty entry in this queue's command buffer array
828 * to contain the Tx command and MAC header concatenated together
829 * (payload data will be in another buffer).
830 * Size of this varies, due to varying MAC header length.
831 * If end is not dword aligned, we'll have 2 extra bytes at the end
832 * of the MAC header (device reads on dword boundaries).
833 * We'll tell device about this padding later.
834 */
835 len = sizeof(struct iwl_tx_cmd) +
836 sizeof(struct iwl_cmd_header) + hdr_len;
837
838 len_org = len;
839 len = (len + 3) & ~3;
840
841 if (len_org != len)
842 len_org = 1;
843 else
844 len_org = 0;
845
Reinette Chatredf833b12009-04-21 10:55:48 -0700846 /* Tell NIC about any 2-byte padding after MAC header */
847 if (len_org)
848 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
849
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800850 /* Physical address of this Tx command's header (not MAC header!),
851 * within command buffer array. */
Tomas Winkler499b1882008-10-14 12:32:48 -0700852 txcmd_phys = pci_map_single(priv->pci_dev,
Reinette Chatredf833b12009-04-21 10:55:48 -0700853 &out_cmd->hdr, len,
Fenghua Yu96891ce2009-02-18 15:54:33 -0800854 PCI_DMA_BIDIRECTIONAL);
Johannes Bergc2acea82009-07-24 11:13:05 -0700855 pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
856 pci_unmap_len_set(out_meta, len, len);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800857 /* Add buffer containing Tx command and MAC(!) header to TFD's
858 * first entry */
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -0800859 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
860 txcmd_phys, len, 1, 0);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800861
Reinette Chatredf833b12009-04-21 10:55:48 -0700862 if (!ieee80211_has_morefrags(hdr->frame_control)) {
863 txq->need_update = 1;
864 if (qc)
865 priv->stations[sta_id].tid[tid].seq_number = seq_number;
866 } else {
867 wait_write_ptr = 1;
868 txq->need_update = 0;
869 }
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800870
871 /* Set up TFD's 2nd entry to point directly to remainder of skb,
872 * if any (802.11 null frames have no payload). */
873 len = skb->len - hdr_len;
874 if (len) {
875 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
876 len, PCI_DMA_TODEVICE);
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -0800877 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
878 phys_addr, len,
879 0, 0);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800880 }
881
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800882 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
Reinette Chatredf833b12009-04-21 10:55:48 -0700883 offsetof(struct iwl_tx_cmd, scratch);
884
885 len = sizeof(struct iwl_tx_cmd) +
886 sizeof(struct iwl_cmd_header) + hdr_len;
887 /* take back ownership of DMA buffer to enable update */
888 pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys,
889 len, PCI_DMA_BIDIRECTIONAL);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800890 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
Tomas Winkler499b1882008-10-14 12:32:48 -0700891 tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800892
Reinette Chatred2ee9cd2009-04-21 10:55:47 -0700893 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
894 le16_to_cpu(out_cmd->hdr.sequence));
895 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
Reinette Chatre3d816c72009-08-07 15:41:37 -0700896 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd, sizeof(*tx_cmd));
897 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800898
899 /* Set up entry for this TFD in Tx byte-count array */
Reinette Chatre7b80ece2009-07-09 10:33:39 -0700900 if (info->flags & IEEE80211_TX_CTL_AMPDU)
901 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq,
Reinette Chatredf833b12009-04-21 10:55:48 -0700902 le16_to_cpu(tx_cmd->len));
903
904 pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys,
905 len, PCI_DMA_BIDIRECTIONAL);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800906
907 /* Tell device the write index *just past* this latest filled TFD */
908 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
909 ret = iwl_txq_update_write_ptr(priv, txq);
910 spin_unlock_irqrestore(&priv->lock, flags);
911
912 if (ret)
913 return ret;
914
Tomas Winkler143b09e2008-07-24 21:33:42 +0300915 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800916 if (wait_write_ptr) {
917 spin_lock_irqsave(&priv->lock, flags);
918 txq->need_update = 1;
919 iwl_txq_update_write_ptr(priv, txq);
920 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winkler143b09e2008-07-24 21:33:42 +0300921 } else {
Johannes Berge4e72fb2009-03-23 17:28:42 +0100922 iwl_stop_queue(priv, txq->swq_id);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800923 }
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800924 }
925
926 return 0;
927
928drop_unlock:
929 spin_unlock_irqrestore(&priv->lock, flags);
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800930 return -1;
931}
932EXPORT_SYMBOL(iwl_tx_skb);
933
934/*************** HOST COMMAND QUEUE FUNCTIONS *****/
935
936/**
937 * iwl_enqueue_hcmd - enqueue a uCode command
938 * @priv: device private data point
939 * @cmd: a point to the ucode command structure
940 *
941 * The function returns < 0 values to indicate the operation is
942 * failed. On success, it turns the index (> 0) of command in the
943 * command queue.
944 */
945int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
946{
947 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
948 struct iwl_queue *q = &txq->q;
Johannes Bergc2acea82009-07-24 11:13:05 -0700949 struct iwl_device_cmd *out_cmd;
950 struct iwl_cmd_meta *out_meta;
Tomas Winklerf3674222008-08-04 16:00:44 +0800951 dma_addr_t phys_addr;
952 unsigned long flags;
953 int len, ret;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800954 u32 idx;
955 u16 fix_size;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800956
957 cmd->len = priv->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
958 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
959
960 /* If any of the command structures end up being larger than
961 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
962 * we will need to increase the size of the TFD entries */
963 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
Johannes Bergc2acea82009-07-24 11:13:05 -0700964 !(cmd->flags & CMD_SIZE_HUGE));
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800965
966 if (iwl_is_rfkill(priv)) {
Reinette Chatre4c423a22009-07-17 09:30:26 -0700967 IWL_DEBUG_INFO(priv, "Not sending command - RF KILL\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800968 return -EIO;
969 }
970
Johannes Bergc2acea82009-07-24 11:13:05 -0700971 if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +0800972 IWL_ERR(priv, "No space for Tx\n");
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800973 return -ENOSPC;
974 }
975
976 spin_lock_irqsave(&priv->hcmd_lock, flags);
977
Johannes Bergc2acea82009-07-24 11:13:05 -0700978 idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
Gregory Greenmanda99c4b2008-08-04 16:00:40 +0800979 out_cmd = txq->cmd[idx];
Johannes Bergc2acea82009-07-24 11:13:05 -0700980 out_meta = &txq->meta[idx];
981
Daniel C Halperin8ce73f32009-07-31 14:28:06 -0700982 memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
Johannes Bergc2acea82009-07-24 11:13:05 -0700983 out_meta->flags = cmd->flags;
984 if (cmd->flags & CMD_WANT_SKB)
985 out_meta->source = cmd;
986 if (cmd->flags & CMD_ASYNC)
987 out_meta->callback = cmd->callback;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800988
989 out_cmd->hdr.cmd = cmd->id;
Tomas Winklerfd4abac2008-05-15 13:54:07 +0800990 memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
991
992 /* At this point, the out_cmd now has all of the incoming cmd
993 * information */
994
995 out_cmd->hdr.flags = 0;
996 out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
997 INDEX_TO_SEQ(q->write_ptr));
Johannes Bergc2acea82009-07-24 11:13:05 -0700998 if (cmd->flags & CMD_SIZE_HUGE)
Tomas Winkler9734cb22008-09-03 11:26:52 +0800999 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
Johannes Bergc2acea82009-07-24 11:13:05 -07001000 len = sizeof(struct iwl_device_cmd);
Reinette Chatredf833b12009-04-21 10:55:48 -07001001 len += (idx == TFD_CMD_SLOTS) ? IWL_MAX_SCAN_SIZE : 0;
Tomas Winkler499b1882008-10-14 12:32:48 -07001002
Tomas Winklerfd4abac2008-05-15 13:54:07 +08001003
Esti Kummerded2ae72008-08-04 16:00:45 +08001004#ifdef CONFIG_IWLWIFI_DEBUG
1005 switch (out_cmd->hdr.cmd) {
1006 case REPLY_TX_LINK_QUALITY_CMD:
1007 case SENSITIVITY_CMD:
Tomas Winklere1623442009-01-27 14:27:56 -08001008 IWL_DEBUG_HC_DUMP(priv, "Sending command %s (#%x), seq: 0x%04X, "
Esti Kummerded2ae72008-08-04 16:00:45 +08001009 "%d bytes at %d[%d]:%d\n",
1010 get_cmd_string(out_cmd->hdr.cmd),
1011 out_cmd->hdr.cmd,
1012 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
1013 q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
1014 break;
1015 default:
Tomas Winklere1623442009-01-27 14:27:56 -08001016 IWL_DEBUG_HC(priv, "Sending command %s (#%x), seq: 0x%04X, "
Esti Kummerded2ae72008-08-04 16:00:45 +08001017 "%d bytes at %d[%d]:%d\n",
1018 get_cmd_string(out_cmd->hdr.cmd),
1019 out_cmd->hdr.cmd,
1020 le16_to_cpu(out_cmd->hdr.sequence), fix_size,
1021 q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
1022 }
1023#endif
Tomas Winklerfd4abac2008-05-15 13:54:07 +08001024 txq->need_update = 1;
1025
Samuel Ortiz518099a2009-01-19 15:30:27 -08001026 if (priv->cfg->ops->lib->txq_update_byte_cnt_tbl)
1027 /* Set up entry in queue's byte count circular buffer */
1028 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
Tomas Winklerfd4abac2008-05-15 13:54:07 +08001029
Reinette Chatredf833b12009-04-21 10:55:48 -07001030 phys_addr = pci_map_single(priv->pci_dev, &out_cmd->hdr,
1031 fix_size, PCI_DMA_BIDIRECTIONAL);
Johannes Bergc2acea82009-07-24 11:13:05 -07001032 pci_unmap_addr_set(out_meta, mapping, phys_addr);
1033 pci_unmap_len_set(out_meta, len, fix_size);
Reinette Chatredf833b12009-04-21 10:55:48 -07001034
1035 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1036 phys_addr, fix_size, 1,
1037 U32_PAD(cmd->len));
1038
Tomas Winklerfd4abac2008-05-15 13:54:07 +08001039 /* Increment and update queue's write index */
1040 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
1041 ret = iwl_txq_update_write_ptr(priv, txq);
1042
1043 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
1044 return ret ? ret : idx;
1045}
1046
Tomas Winkler17b88922008-05-29 16:35:12 +08001047int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1048{
1049 struct iwl_tx_queue *txq = &priv->txq[txq_id];
1050 struct iwl_queue *q = &txq->q;
1051 struct iwl_tx_info *tx_info;
1052 int nfreed = 0;
1053
1054 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001055 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
Tomas Winkler17b88922008-05-29 16:35:12 +08001056 "is out of range [0-%d] %d %d.\n", txq_id,
1057 index, q->n_bd, q->write_ptr, q->read_ptr);
1058 return 0;
1059 }
1060
Tomas Winkler499b1882008-10-14 12:32:48 -07001061 for (index = iwl_queue_inc_wrap(index, q->n_bd);
1062 q->read_ptr != index;
1063 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
Tomas Winkler17b88922008-05-29 16:35:12 +08001064
1065 tx_info = &txq->txb[txq->q.read_ptr];
1066 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
1067 tx_info->skb[0] = NULL;
Tomas Winkler17b88922008-05-29 16:35:12 +08001068
Tomas Winkler972cf442008-05-29 16:35:13 +08001069 if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl)
1070 priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq);
1071
Samuel Ortiz7aaa1d72009-01-19 15:30:26 -08001072 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
Tomas Winkler17b88922008-05-29 16:35:12 +08001073 nfreed++;
1074 }
1075 return nfreed;
1076}
1077EXPORT_SYMBOL(iwl_tx_queue_reclaim);
1078
1079
1080/**
1081 * iwl_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
1082 *
1083 * When FW advances 'R' index, all entries between old and new 'R' index
1084 * need to be reclaimed. As result, some free space forms. If there is
1085 * enough free space (> low mark), wake the stack that feeds us.
1086 */
Tomas Winkler499b1882008-10-14 12:32:48 -07001087static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
1088 int idx, int cmd_idx)
Tomas Winkler17b88922008-05-29 16:35:12 +08001089{
1090 struct iwl_tx_queue *txq = &priv->txq[txq_id];
1091 struct iwl_queue *q = &txq->q;
1092 int nfreed = 0;
1093
Tomas Winkler499b1882008-10-14 12:32:48 -07001094 if ((idx >= q->n_bd) || (iwl_queue_used(q, idx) == 0)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001095 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
Tomas Winkler17b88922008-05-29 16:35:12 +08001096 "is out of range [0-%d] %d %d.\n", txq_id,
Tomas Winkler499b1882008-10-14 12:32:48 -07001097 idx, q->n_bd, q->write_ptr, q->read_ptr);
Tomas Winkler17b88922008-05-29 16:35:12 +08001098 return;
1099 }
1100
Tomas Winkler499b1882008-10-14 12:32:48 -07001101 pci_unmap_single(priv->pci_dev,
Johannes Bergc2acea82009-07-24 11:13:05 -07001102 pci_unmap_addr(&txq->meta[cmd_idx], mapping),
1103 pci_unmap_len(&txq->meta[cmd_idx], len),
Fenghua Yu96891ce2009-02-18 15:54:33 -08001104 PCI_DMA_BIDIRECTIONAL);
Tomas Winkler17b88922008-05-29 16:35:12 +08001105
Tomas Winkler499b1882008-10-14 12:32:48 -07001106 for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
1107 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1108
1109 if (nfreed++ > 0) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001110 IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", idx,
Tomas Winkler17b88922008-05-29 16:35:12 +08001111 q->write_ptr, q->read_ptr);
1112 queue_work(priv->workqueue, &priv->restart);
1113 }
Gregory Greenmanda99c4b2008-08-04 16:00:40 +08001114
Tomas Winkler17b88922008-05-29 16:35:12 +08001115 }
1116}
1117
1118/**
1119 * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
1120 * @rxb: Rx buffer to reclaim
1121 *
1122 * If an Rx buffer has an async callback associated with it the callback
1123 * will be executed. The attached skb (if present) will only be freed
1124 * if the callback returns 1
1125 */
1126void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1127{
1128 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1129 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1130 int txq_id = SEQ_TO_QUEUE(sequence);
1131 int index = SEQ_TO_INDEX(sequence);
Tomas Winkler17b88922008-05-29 16:35:12 +08001132 int cmd_index;
Tomas Winkler9734cb22008-09-03 11:26:52 +08001133 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
Johannes Bergc2acea82009-07-24 11:13:05 -07001134 struct iwl_device_cmd *cmd;
1135 struct iwl_cmd_meta *meta;
Tomas Winkler17b88922008-05-29 16:35:12 +08001136
1137 /* If a Tx command is being handled and it isn't in the actual
1138 * command queue then there a command routing bug has been introduced
1139 * in the queue management code. */
Johannes Berg55d6a3c2008-09-23 19:18:43 +02001140 if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
Winkler, Tomas01ef93232008-11-07 09:58:45 -08001141 "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
1142 txq_id, sequence,
1143 priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
1144 priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
Reinette Chatreec741162009-07-24 11:13:08 -07001145 iwl_print_hex_error(priv, pkt, 32);
Johannes Berg55d6a3c2008-09-23 19:18:43 +02001146 return;
Winkler, Tomas01ef93232008-11-07 09:58:45 -08001147 }
Tomas Winkler17b88922008-05-29 16:35:12 +08001148
1149 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
Gregory Greenmanda99c4b2008-08-04 16:00:40 +08001150 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
Johannes Bergc2acea82009-07-24 11:13:05 -07001151 meta = &priv->txq[IWL_CMD_QUEUE_NUM].meta[cmd_index];
Tomas Winkler17b88922008-05-29 16:35:12 +08001152
1153 /* Input error checking is done when commands are added to queue. */
Johannes Bergc2acea82009-07-24 11:13:05 -07001154 if (meta->flags & CMD_WANT_SKB) {
1155 meta->source->reply_skb = rxb->skb;
Tomas Winkler17b88922008-05-29 16:35:12 +08001156 rxb->skb = NULL;
Johannes Berg5696aea2009-07-24 11:13:06 -07001157 } else if (meta->callback)
1158 meta->callback(priv, cmd, rxb->skb);
Tomas Winkler17b88922008-05-29 16:35:12 +08001159
Tomas Winkler499b1882008-10-14 12:32:48 -07001160 iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index);
Tomas Winkler17b88922008-05-29 16:35:12 +08001161
Johannes Bergc2acea82009-07-24 11:13:05 -07001162 if (!(meta->flags & CMD_ASYNC)) {
Tomas Winkler17b88922008-05-29 16:35:12 +08001163 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1164 wake_up_interruptible(&priv->wait_command_queue);
1165 }
1166}
1167EXPORT_SYMBOL(iwl_tx_cmd_complete);
1168
Tomas Winkler30e553e2008-05-29 16:35:16 +08001169/*
1170 * Find first available (lowest unused) Tx Queue, mark it "active".
1171 * Called only when finding queue for aggregation.
1172 * Should never return anything < 7, because they should already
1173 * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
1174 */
1175static int iwl_txq_ctx_activate_free(struct iwl_priv *priv)
1176{
1177 int txq_id;
1178
1179 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
1180 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
1181 return txq_id;
1182 return -1;
1183}
1184
1185int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1186{
1187 int sta_id;
1188 int tx_fifo;
1189 int txq_id;
1190 int ret;
1191 unsigned long flags;
1192 struct iwl_tid_data *tid_data;
Tomas Winkler30e553e2008-05-29 16:35:16 +08001193
1194 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
1195 tx_fifo = default_tid_to_tx_fifo[tid];
1196 else
1197 return -EINVAL;
1198
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001199 IWL_WARN(priv, "%s on ra = %pM tid = %d\n",
Johannes Berge1749612008-10-27 15:59:26 -07001200 __func__, ra, tid);
Tomas Winkler30e553e2008-05-29 16:35:16 +08001201
1202 sta_id = iwl_find_station(priv, ra);
Wey-Yi Guy3eb92962009-04-01 14:33:25 -07001203 if (sta_id == IWL_INVALID_STATION) {
1204 IWL_ERR(priv, "Start AGG on invalid station\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001205 return -ENXIO;
Wey-Yi Guy3eb92962009-04-01 14:33:25 -07001206 }
Roel Kluin082e7082009-07-25 23:34:31 +02001207 if (unlikely(tid >= MAX_TID_COUNT))
1208 return -EINVAL;
Tomas Winkler30e553e2008-05-29 16:35:16 +08001209
1210 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001211 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001212 return -ENXIO;
1213 }
1214
1215 txq_id = iwl_txq_ctx_activate_free(priv);
Wey-Yi Guy3eb92962009-04-01 14:33:25 -07001216 if (txq_id == -1) {
1217 IWL_ERR(priv, "No free aggregation queue available\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001218 return -ENXIO;
Wey-Yi Guy3eb92962009-04-01 14:33:25 -07001219 }
Tomas Winkler30e553e2008-05-29 16:35:16 +08001220
1221 spin_lock_irqsave(&priv->sta_lock, flags);
1222 tid_data = &priv->stations[sta_id].tid[tid];
1223 *ssn = SEQ_TO_SN(tid_data->seq_number);
1224 tid_data->agg.txq_id = txq_id;
Johannes Berg45af8192009-06-19 13:52:43 -07001225 priv->txq[txq_id].swq_id = iwl_virtual_agg_queue_num(tx_fifo, txq_id);
Tomas Winkler30e553e2008-05-29 16:35:16 +08001226 spin_unlock_irqrestore(&priv->sta_lock, flags);
1227
1228 ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo,
1229 sta_id, tid, *ssn);
1230 if (ret)
1231 return ret;
1232
1233 if (tid_data->tfds_in_queue == 0) {
Wey-Yi Guy3eb92962009-04-01 14:33:25 -07001234 IWL_DEBUG_HT(priv, "HW queue is empty\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001235 tid_data->agg.state = IWL_AGG_ON;
1236 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid);
1237 } else {
Tomas Winklere1623442009-01-27 14:27:56 -08001238 IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n",
Tomas Winkler30e553e2008-05-29 16:35:16 +08001239 tid_data->tfds_in_queue);
1240 tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
1241 }
1242 return ret;
1243}
1244EXPORT_SYMBOL(iwl_tx_agg_start);
1245
1246int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid)
1247{
1248 int tx_fifo_id, txq_id, sta_id, ssn = -1;
1249 struct iwl_tid_data *tid_data;
1250 int ret, write_ptr, read_ptr;
1251 unsigned long flags;
Tomas Winkler30e553e2008-05-29 16:35:16 +08001252
1253 if (!ra) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001254 IWL_ERR(priv, "ra = NULL\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001255 return -EINVAL;
1256 }
1257
Reinette Chatree6a6cf42009-08-13 13:30:50 -07001258 if (unlikely(tid >= MAX_TID_COUNT))
1259 return -EINVAL;
1260
Tomas Winkler30e553e2008-05-29 16:35:16 +08001261 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
1262 tx_fifo_id = default_tid_to_tx_fifo[tid];
1263 else
1264 return -EINVAL;
1265
1266 sta_id = iwl_find_station(priv, ra);
1267
Wey-Yi Guya2f1cbe2009-03-17 21:51:52 -07001268 if (sta_id == IWL_INVALID_STATION) {
1269 IWL_ERR(priv, "Invalid station for AGG tid %d\n", tid);
Tomas Winkler30e553e2008-05-29 16:35:16 +08001270 return -ENXIO;
Wey-Yi Guya2f1cbe2009-03-17 21:51:52 -07001271 }
Tomas Winkler30e553e2008-05-29 16:35:16 +08001272
1273 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
Winkler, Tomas39aadf82008-12-19 10:37:32 +08001274 IWL_WARN(priv, "Stopping AGG while state not IWL_AGG_ON\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001275
1276 tid_data = &priv->stations[sta_id].tid[tid];
1277 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
1278 txq_id = tid_data->agg.txq_id;
1279 write_ptr = priv->txq[txq_id].q.write_ptr;
1280 read_ptr = priv->txq[txq_id].q.read_ptr;
1281
1282 /* The queue is not empty */
1283 if (write_ptr != read_ptr) {
Tomas Winklere1623442009-01-27 14:27:56 -08001284 IWL_DEBUG_HT(priv, "Stopping a non empty AGG HW QUEUE\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001285 priv->stations[sta_id].tid[tid].agg.state =
1286 IWL_EMPTYING_HW_QUEUE_DELBA;
1287 return 0;
1288 }
1289
Tomas Winklere1623442009-01-27 14:27:56 -08001290 IWL_DEBUG_HT(priv, "HW queue is empty\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001291 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
1292
1293 spin_lock_irqsave(&priv->lock, flags);
1294 ret = priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn,
1295 tx_fifo_id);
1296 spin_unlock_irqrestore(&priv->lock, flags);
1297
1298 if (ret)
1299 return ret;
1300
1301 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
1302
1303 return 0;
1304}
1305EXPORT_SYMBOL(iwl_tx_agg_stop);
1306
1307int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id)
1308{
1309 struct iwl_queue *q = &priv->txq[txq_id].q;
1310 u8 *addr = priv->stations[sta_id].sta.sta.addr;
1311 struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
1312
1313 switch (priv->stations[sta_id].tid[tid].agg.state) {
1314 case IWL_EMPTYING_HW_QUEUE_DELBA:
1315 /* We are reclaiming the last packet of the */
1316 /* aggregated HW queue */
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001317 if ((txq_id == tid_data->agg.txq_id) &&
1318 (q->read_ptr == q->write_ptr)) {
Tomas Winkler30e553e2008-05-29 16:35:16 +08001319 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
1320 int tx_fifo = default_tid_to_tx_fifo[tid];
Tomas Winklere1623442009-01-27 14:27:56 -08001321 IWL_DEBUG_HT(priv, "HW queue empty: continue DELBA flow\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001322 priv->cfg->ops->lib->txq_agg_disable(priv, txq_id,
1323 ssn, tx_fifo);
1324 tid_data->agg.state = IWL_AGG_OFF;
1325 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
1326 }
1327 break;
1328 case IWL_EMPTYING_HW_QUEUE_ADDBA:
1329 /* We are reclaiming the last packet of the queue */
1330 if (tid_data->tfds_in_queue == 0) {
Tomas Winklere1623442009-01-27 14:27:56 -08001331 IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n");
Tomas Winkler30e553e2008-05-29 16:35:16 +08001332 tid_data->agg.state = IWL_AGG_ON;
1333 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
1334 }
1335 break;
1336 }
1337 return 0;
1338}
1339EXPORT_SYMBOL(iwl_txq_check_empty);
Tomas Winkler30e553e2008-05-29 16:35:16 +08001340
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001341/**
1342 * iwl_tx_status_reply_compressed_ba - Update tx status from block-ack
1343 *
1344 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
1345 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
1346 */
1347static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv,
1348 struct iwl_ht_agg *agg,
1349 struct iwl_compressed_ba_resp *ba_resp)
1350
1351{
1352 int i, sh, ack;
1353 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
1354 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
1355 u64 bitmap;
1356 int successes = 0;
1357 struct ieee80211_tx_info *info;
1358
1359 if (unlikely(!agg->wait_for_ba)) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001360 IWL_ERR(priv, "Received BA when not expected\n");
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001361 return -EINVAL;
1362 }
1363
1364 /* Mark that the expected block-ack response arrived */
1365 agg->wait_for_ba = 0;
Tomas Winklere1623442009-01-27 14:27:56 -08001366 IWL_DEBUG_TX_REPLY(priv, "BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001367
1368 /* Calculate shift to align block-ack bits with our Tx window bits */
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001369 sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl >> 4);
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001370 if (sh < 0) /* tbw something is wrong with indices */
1371 sh += 0x100;
1372
1373 /* don't use 64-bit values for now */
1374 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
1375
1376 if (agg->frame_count > (64 - sh)) {
Tomas Winklere1623442009-01-27 14:27:56 -08001377 IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size");
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001378 return -1;
1379 }
1380
1381 /* check for success or failure according to the
1382 * transmitted bitmap and block-ack bitmap */
1383 bitmap &= agg->bitmap;
1384
1385 /* For each frame attempted in aggregation,
1386 * update driver's record of tx frame's status. */
1387 for (i = 0; i < agg->frame_count ; i++) {
Emmanuel Grumbach4aa41f12008-07-18 13:53:09 +08001388 ack = bitmap & (1ULL << i);
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001389 successes += !!ack;
Tomas Winklere1623442009-01-27 14:27:56 -08001390 IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n",
Abhijeet Kolekarc3056062008-11-12 13:14:08 -08001391 ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff,
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001392 agg->start_idx + i);
1393 }
1394
1395 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
1396 memset(&info->status, 0, sizeof(info->status));
1397 info->flags = IEEE80211_TX_STAT_ACK;
1398 info->flags |= IEEE80211_TX_STAT_AMPDU;
1399 info->status.ampdu_ack_map = successes;
1400 info->status.ampdu_ack_len = agg->frame_count;
1401 iwl_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
1402
Tomas Winklere1623442009-01-27 14:27:56 -08001403 IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap);
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001404
1405 return 0;
1406}
1407
1408/**
1409 * iwl_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
1410 *
1411 * Handles block-acknowledge notification from device, which reports success
1412 * of frames sent via aggregation.
1413 */
1414void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
1415 struct iwl_rx_mem_buffer *rxb)
1416{
1417 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
1418 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001419 struct iwl_tx_queue *txq = NULL;
1420 struct iwl_ht_agg *agg;
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001421 int index;
1422 int sta_id;
1423 int tid;
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001424
1425 /* "flow" corresponds to Tx queue */
1426 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
1427
1428 /* "ssn" is start of block-ack Tx window, corresponds to index
1429 * (in Tx queue's circular buffer) of first TFD/frame in window */
1430 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
1431
1432 if (scd_flow >= priv->hw_params.max_txq_num) {
Winkler, Tomas15b16872008-12-19 10:37:33 +08001433 IWL_ERR(priv,
1434 "BUG_ON scd_flow is bigger than number of queues\n");
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001435 return;
1436 }
1437
1438 txq = &priv->txq[scd_flow];
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001439 sta_id = ba_resp->sta_id;
1440 tid = ba_resp->tid;
1441 agg = &priv->stations[sta_id].tid[tid].agg;
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001442
1443 /* Find index just before block-ack window */
1444 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
1445
1446 /* TODO: Need to get this copy more safely - now good for debug */
1447
Tomas Winklere1623442009-01-27 14:27:56 -08001448 IWL_DEBUG_TX_REPLY(priv, "REPLY_COMPRESSED_BA [%d] Received from %pM, "
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001449 "sta_id = %d\n",
1450 agg->wait_for_ba,
Johannes Berge1749612008-10-27 15:59:26 -07001451 (u8 *) &ba_resp->sta_addr_lo32,
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001452 ba_resp->sta_id);
Tomas Winklere1623442009-01-27 14:27:56 -08001453 IWL_DEBUG_TX_REPLY(priv, "TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001454 "%d, scd_ssn = %d\n",
1455 ba_resp->tid,
1456 ba_resp->seq_ctl,
1457 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
1458 ba_resp->scd_flow,
1459 ba_resp->scd_ssn);
Tomas Winklere1623442009-01-27 14:27:56 -08001460 IWL_DEBUG_TX_REPLY(priv, "DAT start_idx = %d, bitmap = 0x%llx \n",
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001461 agg->start_idx,
1462 (unsigned long long)agg->bitmap);
1463
1464 /* Update driver's record of ACK vs. not for each frame in window */
1465 iwl_tx_status_reply_compressed_ba(priv, agg, ba_resp);
1466
1467 /* Release all TFDs before the SSN, i.e. all TFDs in front of
1468 * block-ack window (we assume that they've been successfully
1469 * transmitted ... if not, it's too late anyway). */
1470 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
1471 /* calculate mac80211 ampdu sw queue to wake */
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001472 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001473 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001474
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001475 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
1476 priv->mac80211_registered &&
1477 (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
Johannes Berge4e72fb2009-03-23 17:28:42 +01001478 iwl_wake_queue(priv, txq->swq_id);
Tomas Winkler3fd07a12008-10-23 23:48:49 -07001479
1480 iwl_txq_check_empty(priv, sta_id, tid, scd_flow);
Emmanuel Grumbach653fa4a2008-06-30 17:23:11 +08001481 }
1482}
1483EXPORT_SYMBOL(iwl_rx_reply_compressed_ba);
1484
Helmut Schaa994d31f2008-07-02 12:17:06 +02001485#ifdef CONFIG_IWLWIFI_DEBUG
Tomas Winklera332f8d2008-05-29 16:35:08 +08001486#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
1487
1488const char *iwl_get_tx_fail_reason(u32 status)
1489{
1490 switch (status & TX_STATUS_MSK) {
1491 case TX_STATUS_SUCCESS:
1492 return "SUCCESS";
1493 TX_STATUS_ENTRY(SHORT_LIMIT);
1494 TX_STATUS_ENTRY(LONG_LIMIT);
1495 TX_STATUS_ENTRY(FIFO_UNDERRUN);
1496 TX_STATUS_ENTRY(MGMNT_ABORT);
1497 TX_STATUS_ENTRY(NEXT_FRAG);
1498 TX_STATUS_ENTRY(LIFE_EXPIRE);
1499 TX_STATUS_ENTRY(DEST_PS);
1500 TX_STATUS_ENTRY(ABORTED);
1501 TX_STATUS_ENTRY(BT_RETRY);
1502 TX_STATUS_ENTRY(STA_INVALID);
1503 TX_STATUS_ENTRY(FRAG_DROPPED);
1504 TX_STATUS_ENTRY(TID_DISABLE);
1505 TX_STATUS_ENTRY(FRAME_FLUSHED);
1506 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
1507 TX_STATUS_ENTRY(TX_LOCKED);
1508 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
1509 }
1510
1511 return "UNKNOWN";
1512}
1513EXPORT_SYMBOL(iwl_get_tx_fail_reason);
1514#endif /* CONFIG_IWLWIFI_DEBUG */