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Jaecheol Leea125a172012-01-07 20:18:35 +09001/*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
Jaecheol Leea125a172012-01-07 20:18:35 +090012#include <linux/kernel.h>
Paul Gortmaker743492c2015-06-03 15:45:21 -040013#include <linux/module.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090014#include <linux/err.h>
15#include <linux/clk.h>
16#include <linux/io.h>
17#include <linux/slab.h>
18#include <linux/regulator/consumer.h>
19#include <linux/cpufreq.h>
Lukasz Majewskid568b6f2013-11-28 13:42:42 +010020#include <linux/platform_device.h>
Jonghwan Choibe1f7c82014-05-17 08:19:30 +090021#include <linux/of.h>
Lukasz Majewskie725d262015-01-23 13:14:20 +010022#include <linux/cpu_cooling.h>
23#include <linux/cpu.h>
Jaecheol Leea125a172012-01-07 20:18:35 +090024
Kukjin Kimc4aaa292012-12-28 16:29:10 -080025#include "exynos-cpufreq.h"
26
Jaecheol Leea125a172012-01-07 20:18:35 +090027static struct exynos_dvfs_info *exynos_info;
Lukasz Majewskie725d262015-01-23 13:14:20 +010028static struct thermal_cooling_device *cdev;
Jaecheol Leea125a172012-01-07 20:18:35 +090029static struct regulator *arm_regulator;
Jaecheol Leea125a172012-01-07 20:18:35 +090030static unsigned int locking_frequency;
Jaecheol Leea125a172012-01-07 20:18:35 +090031
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080032static int exynos_cpufreq_get_index(unsigned int freq)
Jaecheol Leea125a172012-01-07 20:18:35 +090033{
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080034 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
Stratos Karafotis041526f2014-04-25 23:15:38 +030035 struct cpufreq_frequency_table *pos;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080036
Stratos Karafotis041526f2014-04-25 23:15:38 +030037 cpufreq_for_each_entry(pos, freq_table)
38 if (pos->frequency == freq)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080039 break;
40
Stratos Karafotis041526f2014-04-25 23:15:38 +030041 if (pos->frequency == CPUFREQ_TABLE_END)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080042 return -EINVAL;
43
Stratos Karafotis041526f2014-04-25 23:15:38 +030044 return pos - freq_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080045}
46
47static int exynos_cpufreq_scale(unsigned int target_freq)
48{
Jaecheol Leea125a172012-01-07 20:18:35 +090049 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
50 unsigned int *volt_table = exynos_info->volt_table;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080051 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
52 unsigned int arm_volt, safe_arm_volt = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090053 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
Chanwoo Choie5eaa442014-04-18 11:20:33 +090054 struct device *dev = exynos_info->dev;
Viresh Kumard4019f02013-08-14 19:38:24 +053055 unsigned int old_freq;
Sachin Kamatd271d072013-01-25 10:18:09 -080056 int index, old_index;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080057 int ret = 0;
Jaecheol Leea125a172012-01-07 20:18:35 +090058
Viresh Kumard4019f02013-08-14 19:38:24 +053059 old_freq = policy->cur;
Jaecheol Leea125a172012-01-07 20:18:35 +090060
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000061 /*
62 * The policy max have been changed so that we cannot get proper
63 * old_index with cpufreq_frequency_table_target(). Thus, ignore
LABBE Corentin05851232013-09-26 16:50:21 +020064 * policy and get the index from the raw frequency table.
Jonghwa Lee53df1ad2012-07-20 02:54:02 +000065 */
Viresh Kumard4019f02013-08-14 19:38:24 +053066 old_index = exynos_cpufreq_get_index(old_freq);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080067 if (old_index < 0) {
68 ret = old_index;
Jaecheol Leea125a172012-01-07 20:18:35 +090069 goto out;
70 }
71
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080072 index = exynos_cpufreq_get_index(target_freq);
73 if (index < 0) {
74 ret = index;
Jaecheol Leea125a172012-01-07 20:18:35 +090075 goto out;
76 }
77
Jaecheol Leea125a172012-01-07 20:18:35 +090078 /*
79 * ARM clock source will be changed APLL to MPLL temporary
80 * To support this level, need to control regulator for
81 * required voltage level
82 */
83 if (exynos_info->need_apll_change != NULL) {
84 if (exynos_info->need_apll_change(old_index, index) &&
85 (freq_table[index].frequency < mpll_freq_khz) &&
86 (freq_table[old_index].frequency < mpll_freq_khz))
87 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
88 }
89 arm_volt = volt_table[index];
90
Jaecheol Leea125a172012-01-07 20:18:35 +090091 /* When the new frequency is higher than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053092 if ((target_freq > old_freq) && !safe_arm_volt) {
Jaecheol Leea125a172012-01-07 20:18:35 +090093 /* Firstly, voltage up to increase frequency */
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080094 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
95 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +090096 dev_err(dev, "failed to set cpu voltage to %d\n",
97 arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +053098 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -080099 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900100 }
101
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800102 if (safe_arm_volt) {
103 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900104 safe_arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800105 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900106 dev_err(dev, "failed to set cpu voltage to %d\n",
107 safe_arm_volt);
Viresh Kumard4019f02013-08-14 19:38:24 +0530108 return ret;
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800109 }
110 }
Jonghwan Choi857d90f2012-12-23 15:57:39 -0800111
112 exynos_info->set_freq(old_index, index);
Jaecheol Leea125a172012-01-07 20:18:35 +0900113
Jaecheol Leea125a172012-01-07 20:18:35 +0900114 /* When the new frequency is lower than current frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530115 if ((target_freq < old_freq) ||
116 ((target_freq > old_freq) && safe_arm_volt)) {
Jaecheol Leea125a172012-01-07 20:18:35 +0900117 /* down the voltage after frequency change */
Manish Badarkhe006454a2013-10-09 20:43:37 +0530118 ret = regulator_set_voltage(arm_regulator, arm_volt,
Jaecheol Leea125a172012-01-07 20:18:35 +0900119 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800120 if (ret) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900121 dev_err(dev, "failed to set cpu voltage to %d\n",
122 arm_volt);
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800123 goto out;
124 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900125 }
126
127out:
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800128 cpufreq_cpu_put(policy);
129
130 return ret;
131}
132
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530133static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
Jonghwan Choi0e0e4252012-12-23 15:57:48 -0800134{
Viresh Kumard248bb82014-03-04 11:00:28 +0800135 return exynos_cpufreq_scale(exynos_info->freq_table[index].frequency);
Jaecheol Leea125a172012-01-07 20:18:35 +0900136}
137
Jaecheol Leea125a172012-01-07 20:18:35 +0900138static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
139{
Viresh Kumar652ed952014-01-09 20:38:43 +0530140 policy->clk = exynos_info->cpu_clk;
Viresh Kumard248bb82014-03-04 11:00:28 +0800141 policy->suspend_freq = locking_frequency;
Viresh Kumarb249aba2013-10-03 20:29:13 +0530142 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
Jaecheol Leea125a172012-01-07 20:18:35 +0900143}
144
145static struct cpufreq_driver exynos_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +0530146 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Viresh Kumareea61812013-10-03 20:28:06 +0530147 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +0530148 .target_index = exynos_target,
Viresh Kumar652ed952014-01-09 20:38:43 +0530149 .get = cpufreq_generic_get,
Jaecheol Leea125a172012-01-07 20:18:35 +0900150 .init = exynos_cpufreq_cpu_init,
151 .name = "exynos_cpufreq",
Viresh Kumareea61812013-10-03 20:28:06 +0530152 .attr = cpufreq_generic_attr,
Lukasz Majewskic683c2c2013-12-20 15:24:52 +0100153#ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
154 .boost_supported = true,
155#endif
Jaecheol Leea125a172012-01-07 20:18:35 +0900156#ifdef CONFIG_PM
Viresh Kumard248bb82014-03-04 11:00:28 +0800157 .suspend = cpufreq_generic_suspend,
Jaecheol Leea125a172012-01-07 20:18:35 +0900158#endif
159};
160
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100161static int exynos_cpufreq_probe(struct platform_device *pdev)
Jaecheol Leea125a172012-01-07 20:18:35 +0900162{
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100163 struct device_node *cpu0;
Jaecheol Leea125a172012-01-07 20:18:35 +0900164 int ret = -EINVAL;
165
Viresh Kumard5b73cd2013-08-06 22:53:06 +0530166 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
Jaecheol Leea125a172012-01-07 20:18:35 +0900167 if (!exynos_info)
168 return -ENOMEM;
169
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900170 exynos_info->dev = &pdev->dev;
171
Thomas Abraham8eb92ab2015-04-03 18:43:49 +0200172 if (of_machine_is_compatible("samsung,exynos4212")) {
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900173 exynos_info->type = EXYNOS_SOC_4212;
Jaecheol Leea35c5052012-03-10 02:59:22 -0800174 ret = exynos4x12_cpufreq_init(exynos_info);
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900175 } else if (of_machine_is_compatible("samsung,exynos4412")) {
176 exynos_info->type = EXYNOS_SOC_4412;
177 ret = exynos4x12_cpufreq_init(exynos_info);
178 } else if (of_machine_is_compatible("samsung,exynos5250")) {
179 exynos_info->type = EXYNOS_SOC_5250;
Jaecheol Lee562a6cb2012-03-10 03:00:02 -0800180 ret = exynos5250_cpufreq_init(exynos_info);
Jonghwan Choibe1f7c82014-05-17 08:19:30 +0900181 } else {
182 pr_err("%s: Unknown SoC type\n", __func__);
183 return -ENODEV;
184 }
Jaecheol Leea125a172012-01-07 20:18:35 +0900185
186 if (ret)
187 goto err_vdd_arm;
188
189 if (exynos_info->set_freq == NULL) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900190 dev_err(&pdev->dev, "No set_freq function (ERR)\n");
Jaecheol Leea125a172012-01-07 20:18:35 +0900191 goto err_vdd_arm;
192 }
193
194 arm_regulator = regulator_get(NULL, "vdd_arm");
195 if (IS_ERR(arm_regulator)) {
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900196 dev_err(&pdev->dev, "failed to get resource vdd_arm\n");
Jaecheol Leea125a172012-01-07 20:18:35 +0900197 goto err_vdd_arm;
198 }
199
Viresh Kumard248bb82014-03-04 11:00:28 +0800200 /* Done here as we want to capture boot frequency */
Viresh Kumar652ed952014-01-09 20:38:43 +0530201 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
Jonghwan Choi6e45eb12013-01-18 11:09:01 -0800202
Lukasz Majewskie725d262015-01-23 13:14:20 +0100203 ret = cpufreq_register_driver(&exynos_driver);
204 if (ret)
205 goto err_cpufreq_reg;
Jaecheol Leea125a172012-01-07 20:18:35 +0900206
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100207 cpu0 = of_get_cpu_node(0, NULL);
208 if (!cpu0) {
209 pr_err("failed to find cpu0 node\n");
Lukasz Majewskie725d262015-01-23 13:14:20 +0100210 return 0;
211 }
212
Lukasz Majewski0fc83922015-02-05 16:45:06 +0100213 if (of_find_property(cpu0, "#cooling-cells", NULL)) {
214 cdev = of_cpufreq_cooling_register(cpu0,
Lukasz Majewskie725d262015-01-23 13:14:20 +0100215 cpu_present_mask);
216 if (IS_ERR(cdev))
217 pr_err("running cpufreq without cooling device: %ld\n",
218 PTR_ERR(cdev));
219 }
Lukasz Majewskie725d262015-01-23 13:14:20 +0100220
221 return 0;
222
223err_cpufreq_reg:
Chanwoo Choie5eaa442014-04-18 11:20:33 +0900224 dev_err(&pdev->dev, "failed to register cpufreq driver\n");
Jonghwan Choi184cddd2012-12-23 15:51:40 -0800225 regulator_put(arm_regulator);
Jaecheol Leea125a172012-01-07 20:18:35 +0900226err_vdd_arm:
227 kfree(exynos_info);
Jaecheol Leea125a172012-01-07 20:18:35 +0900228 return -EINVAL;
229}
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100230
231static struct platform_driver exynos_cpufreq_platdrv = {
232 .driver = {
233 .name = "exynos-cpufreq",
Lukasz Majewskid568b6f2013-11-28 13:42:42 +0100234 },
235 .probe = exynos_cpufreq_probe,
236};
237module_platform_driver(exynos_cpufreq_platdrv);