Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * PowerPC64 port by Mike Corrigan and Dave Engebretsen |
| 3 | * {mikejc|engebret}@us.ibm.com |
| 4 | * |
| 5 | * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com> |
| 6 | * |
| 7 | * SMP scalability work: |
| 8 | * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM |
| 9 | * |
| 10 | * Module name: htab.c |
| 11 | * |
| 12 | * Description: |
| 13 | * PowerPC Hashed Page Table functions |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License |
| 17 | * as published by the Free Software Foundation; either version |
| 18 | * 2 of the License, or (at your option) any later version. |
| 19 | */ |
| 20 | |
| 21 | #undef DEBUG |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 22 | #undef DEBUG_LOW |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | #include <linux/spinlock.h> |
| 25 | #include <linux/errno.h> |
| 26 | #include <linux/sched.h> |
| 27 | #include <linux/proc_fs.h> |
| 28 | #include <linux/stat.h> |
| 29 | #include <linux/sysctl.h> |
Paul Gortmaker | 66b15db | 2011-05-27 10:46:24 -0400 | [diff] [blame] | 30 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | #include <linux/ctype.h> |
| 32 | #include <linux/cache.h> |
| 33 | #include <linux/init.h> |
| 34 | #include <linux/signal.h> |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 35 | #include <linux/memblock.h> |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 36 | #include <linux/context_tracking.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <asm/processor.h> |
| 39 | #include <asm/pgtable.h> |
| 40 | #include <asm/mmu.h> |
| 41 | #include <asm/mmu_context.h> |
| 42 | #include <asm/page.h> |
| 43 | #include <asm/types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <asm/uaccess.h> |
| 45 | #include <asm/machdep.h> |
David S. Miller | d9b2b2a | 2008-02-13 16:56:49 -0800 | [diff] [blame] | 46 | #include <asm/prom.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include <asm/tlbflush.h> |
| 48 | #include <asm/io.h> |
| 49 | #include <asm/eeh.h> |
| 50 | #include <asm/tlb.h> |
| 51 | #include <asm/cacheflush.h> |
| 52 | #include <asm/cputable.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | #include <asm/sections.h> |
Benjamin Herrenschmidt | d0f13e3 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 54 | #include <asm/spu.h> |
will schmidt | aa39be0 | 2007-10-30 06:24:19 +1100 | [diff] [blame] | 55 | #include <asm/udbg.h> |
Anton Blanchard | b68a70c | 2011-04-04 23:56:18 +0000 | [diff] [blame] | 56 | #include <asm/code-patching.h> |
Mahesh Salgaonkar | 3ccc00a | 2012-02-20 02:15:03 +0000 | [diff] [blame] | 57 | #include <asm/fadump.h> |
Stephen Rothwell | f533927 | 2012-03-15 18:18:00 +0000 | [diff] [blame] | 58 | #include <asm/firmware.h> |
Michael Neuling | bc2a940 | 2013-02-13 16:21:40 +0000 | [diff] [blame] | 59 | #include <asm/tm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
| 61 | #ifdef DEBUG |
| 62 | #define DBG(fmt...) udbg_printf(fmt) |
| 63 | #else |
| 64 | #define DBG(fmt...) |
| 65 | #endif |
| 66 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 67 | #ifdef DEBUG_LOW |
| 68 | #define DBG_LOW(fmt...) udbg_printf(fmt) |
| 69 | #else |
| 70 | #define DBG_LOW(fmt...) |
| 71 | #endif |
| 72 | |
| 73 | #define KB (1024) |
| 74 | #define MB (1024*KB) |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 75 | #define GB (1024L*MB) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | /* |
| 78 | * Note: pte --> Linux PTE |
| 79 | * HPTE --> PowerPC Hashed Page Table Entry |
| 80 | * |
| 81 | * Execution context: |
| 82 | * htab_initialize is called with the MMU off (of course), but |
| 83 | * the kernel has been copied down to zero so it can directly |
| 84 | * reference global data. At this point it is very difficult |
| 85 | * to print debug info. |
| 86 | * |
| 87 | */ |
| 88 | |
| 89 | #ifdef CONFIG_U3_DART |
| 90 | extern unsigned long dart_tablebase; |
| 91 | #endif /* CONFIG_U3_DART */ |
| 92 | |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 93 | static unsigned long _SDR1; |
| 94 | struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT]; |
| 95 | |
David Gibson | 8e561e7 | 2007-06-13 14:52:56 +1000 | [diff] [blame] | 96 | struct hash_pte *htab_address; |
Michael Ellerman | 337a712 | 2006-02-21 17:22:55 +1100 | [diff] [blame] | 97 | unsigned long htab_size_bytes; |
David Gibson | 96e2844 | 2005-07-13 01:11:42 -0700 | [diff] [blame] | 98 | unsigned long htab_hash_mask; |
Alexander Graf | 4ab79aa | 2009-10-30 05:47:19 +0000 | [diff] [blame] | 99 | EXPORT_SYMBOL_GPL(htab_hash_mask); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 100 | int mmu_linear_psize = MMU_PAGE_4K; |
| 101 | int mmu_virtual_psize = MMU_PAGE_4K; |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 102 | int mmu_vmalloc_psize = MMU_PAGE_4K; |
Benjamin Herrenschmidt | cec08e7 | 2008-04-30 15:41:48 +1000 | [diff] [blame] | 103 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
| 104 | int mmu_vmemmap_psize = MMU_PAGE_4K; |
| 105 | #endif |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 106 | int mmu_io_psize = MMU_PAGE_4K; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 107 | int mmu_kernel_ssize = MMU_SEGSIZE_256M; |
| 108 | int mmu_highuser_ssize = MMU_SEGSIZE_256M; |
Michael Neuling | 584f8b7 | 2007-12-06 17:24:48 +1100 | [diff] [blame] | 109 | u16 mmu_slb_size = 64; |
Alexander Graf | 4ab79aa | 2009-10-30 05:47:19 +0000 | [diff] [blame] | 110 | EXPORT_SYMBOL_GPL(mmu_slb_size); |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 111 | #ifdef CONFIG_PPC_64K_PAGES |
| 112 | int mmu_ci_restrictions; |
| 113 | #endif |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 114 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 115 | static u8 *linear_map_hash_slots; |
| 116 | static unsigned long linear_map_hash_count; |
Michael Ellerman | ed16669 | 2007-04-18 11:50:09 +1000 | [diff] [blame] | 117 | static DEFINE_SPINLOCK(linear_map_hash_lock); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 118 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 120 | /* There are definitions of page sizes arrays to be used when none |
| 121 | * is provided by the firmware. |
| 122 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 124 | /* Pre-POWER4 CPUs (4k pages only) |
| 125 | */ |
Michael Ellerman | 09de9ff | 2008-05-08 14:27:07 +1000 | [diff] [blame] | 126 | static struct mmu_psize_def mmu_psize_defaults_old[] = { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 127 | [MMU_PAGE_4K] = { |
| 128 | .shift = 12, |
| 129 | .sllp = 0, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 130 | .penc = {[MMU_PAGE_4K] = 0, [1 ... MMU_PAGE_COUNT - 1] = -1}, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 131 | .avpnm = 0, |
| 132 | .tlbiel = 0, |
| 133 | }, |
| 134 | }; |
| 135 | |
| 136 | /* POWER4, GPUL, POWER5 |
| 137 | * |
| 138 | * Support for 16Mb large pages |
| 139 | */ |
Michael Ellerman | 09de9ff | 2008-05-08 14:27:07 +1000 | [diff] [blame] | 140 | static struct mmu_psize_def mmu_psize_defaults_gp[] = { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 141 | [MMU_PAGE_4K] = { |
| 142 | .shift = 12, |
| 143 | .sllp = 0, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 144 | .penc = {[MMU_PAGE_4K] = 0, [1 ... MMU_PAGE_COUNT - 1] = -1}, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 145 | .avpnm = 0, |
| 146 | .tlbiel = 1, |
| 147 | }, |
| 148 | [MMU_PAGE_16M] = { |
| 149 | .shift = 24, |
| 150 | .sllp = SLB_VSID_L, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 151 | .penc = {[0 ... MMU_PAGE_16M - 1] = -1, [MMU_PAGE_16M] = 0, |
| 152 | [MMU_PAGE_16M + 1 ... MMU_PAGE_COUNT - 1] = -1 }, |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 153 | .avpnm = 0x1UL, |
| 154 | .tlbiel = 0, |
| 155 | }, |
| 156 | }; |
| 157 | |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 158 | static unsigned long htab_convert_pte_flags(unsigned long pteflags) |
| 159 | { |
| 160 | unsigned long rflags = pteflags & 0x1fa; |
| 161 | |
| 162 | /* _PAGE_EXEC -> NOEXEC */ |
| 163 | if ((pteflags & _PAGE_EXEC) == 0) |
| 164 | rflags |= HPTE_R_N; |
| 165 | |
| 166 | /* PP bits. PAGE_USER is already PP bit 0x2, so we only |
| 167 | * need to add in 0x1 if it's a read-only user page |
| 168 | */ |
| 169 | if ((pteflags & _PAGE_USER) && !((pteflags & _PAGE_RW) && |
| 170 | (pteflags & _PAGE_DIRTY))) |
| 171 | rflags |= 1; |
Aneesh Kumar K.V | c8c06f5 | 2013-11-18 14:58:10 +0530 | [diff] [blame] | 172 | /* |
| 173 | * Always add "C" bit for perf. Memory coherence is always enabled |
| 174 | */ |
| 175 | return rflags | HPTE_R_C | HPTE_R_M; |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 176 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 177 | |
| 178 | int htab_bolt_mapping(unsigned long vstart, unsigned long vend, |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 179 | unsigned long pstart, unsigned long prot, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 180 | int psize, int ssize) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 182 | unsigned long vaddr, paddr; |
| 183 | unsigned int step, shift; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 184 | int ret = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 186 | shift = mmu_psize_defs[psize].shift; |
| 187 | step = 1 << shift; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 189 | prot = htab_convert_pte_flags(prot); |
| 190 | |
| 191 | DBG("htab_bolt_mapping(%lx..%lx -> %lx (%lx,%d,%d)\n", |
| 192 | vstart, vend, pstart, prot, psize, ssize); |
| 193 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 194 | for (vaddr = vstart, paddr = pstart; vaddr < vend; |
| 195 | vaddr += step, paddr += step) { |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 196 | unsigned long hash, hpteg; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 197 | unsigned long vsid = get_kernel_vsid(vaddr, ssize); |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 198 | unsigned long vpn = hpt_vpn(vaddr, vsid, ssize); |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 199 | unsigned long tprot = prot; |
| 200 | |
Aneesh Kumar K.V | c60ac56 | 2013-03-13 03:34:54 +0000 | [diff] [blame] | 201 | /* |
| 202 | * If we hit a bad address return error. |
| 203 | */ |
| 204 | if (!vsid) |
| 205 | return -1; |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 206 | /* Make kernel text executable */ |
Paul Mackerras | 549e815 | 2008-08-30 11:43:47 +1000 | [diff] [blame] | 207 | if (overlaps_kernel_text(vaddr, vaddr + step)) |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 208 | tprot &= ~HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | |
Mahesh Salgaonkar | 429d2e8 | 2014-01-31 00:31:04 +0530 | [diff] [blame^] | 210 | /* |
| 211 | * If relocatable, check if it overlaps interrupt vectors that |
| 212 | * are copied down to real 0. For relocatable kernel |
| 213 | * (e.g. kdump case) we copy interrupt vectors down to real |
| 214 | * address 0. Mark that region as executable. This is |
| 215 | * because on p8 system with relocation on exception feature |
| 216 | * enabled, exceptions are raised with MMU (IR=DR=1) ON. Hence |
| 217 | * in order to execute the interrupt handlers in virtual |
| 218 | * mode the vector region need to be marked as executable. |
| 219 | */ |
| 220 | if ((PHYSICAL_START > MEMORY_START) && |
| 221 | overlaps_interrupt_vector_text(vaddr, vaddr + step)) |
| 222 | tprot &= ~HPTE_R_N; |
| 223 | |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 224 | hash = hpt_hash(vpn, shift, ssize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 225 | hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP); |
| 226 | |
Michael Ellerman | c30a4df | 2006-06-23 18:16:39 +1000 | [diff] [blame] | 227 | BUG_ON(!ppc_md.hpte_insert); |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 228 | ret = ppc_md.hpte_insert(hpteg, vpn, paddr, tprot, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 229 | HPTE_V_BOLTED, psize, psize, ssize); |
Michael Ellerman | c30a4df | 2006-06-23 18:16:39 +1000 | [diff] [blame] | 230 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 231 | if (ret < 0) |
| 232 | break; |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 233 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 234 | if ((paddr >> PAGE_SHIFT) < linear_map_hash_count) |
| 235 | linear_map_hash_slots[paddr >> PAGE_SHIFT] = ret | 0x80; |
| 236 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 238 | return ret < 0 ? ret : 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 239 | } |
| 240 | |
Stephen Rothwell | ae86f00 | 2008-03-27 16:08:57 +1100 | [diff] [blame] | 241 | #ifdef CONFIG_MEMORY_HOTPLUG |
Badari Pulavarty | 52db9b4 | 2008-03-28 11:37:21 +1100 | [diff] [blame] | 242 | static int htab_remove_mapping(unsigned long vstart, unsigned long vend, |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 243 | int psize, int ssize) |
| 244 | { |
| 245 | unsigned long vaddr; |
| 246 | unsigned int step, shift; |
| 247 | |
| 248 | shift = mmu_psize_defs[psize].shift; |
| 249 | step = 1 << shift; |
| 250 | |
| 251 | if (!ppc_md.hpte_removebolted) { |
Badari Pulavarty | 52db9b4 | 2008-03-28 11:37:21 +1100 | [diff] [blame] | 252 | printk(KERN_WARNING "Platform doesn't implement " |
| 253 | "hpte_removebolted\n"); |
| 254 | return -EINVAL; |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 255 | } |
| 256 | |
| 257 | for (vaddr = vstart; vaddr < vend; vaddr += step) |
| 258 | ppc_md.hpte_removebolted(vaddr, psize, ssize); |
Badari Pulavarty | 52db9b4 | 2008-03-28 11:37:21 +1100 | [diff] [blame] | 259 | |
| 260 | return 0; |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 261 | } |
Stephen Rothwell | ae86f00 | 2008-03-27 16:08:57 +1100 | [diff] [blame] | 262 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 263 | |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 264 | static int __init htab_dt_scan_seg_sizes(unsigned long node, |
| 265 | const char *uname, int depth, |
| 266 | void *data) |
| 267 | { |
| 268 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 269 | __be32 *prop; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 270 | unsigned long size = 0; |
| 271 | |
| 272 | /* We are scanning "cpu" nodes only */ |
| 273 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 274 | return 0; |
| 275 | |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 276 | prop = of_get_flat_dt_prop(node, "ibm,processor-segment-sizes", &size); |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 277 | if (prop == NULL) |
| 278 | return 0; |
| 279 | for (; size >= 4; size -= 4, ++prop) { |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 280 | if (be32_to_cpu(prop[0]) == 40) { |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 281 | DBG("1T segment support detected\n"); |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 282 | cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT; |
Olof Johansson | f553400 | 2007-10-12 16:44:55 +1000 | [diff] [blame] | 283 | return 1; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 284 | } |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 285 | } |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 286 | cur_cpu_spec->mmu_features &= ~MMU_FTR_NO_SLBIE_B; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 287 | return 0; |
| 288 | } |
| 289 | |
| 290 | static void __init htab_init_seg_sizes(void) |
| 291 | { |
| 292 | of_scan_flat_dt(htab_dt_scan_seg_sizes, NULL); |
| 293 | } |
| 294 | |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 295 | static int __init get_idx_from_shift(unsigned int shift) |
| 296 | { |
| 297 | int idx = -1; |
| 298 | |
| 299 | switch (shift) { |
| 300 | case 0xc: |
| 301 | idx = MMU_PAGE_4K; |
| 302 | break; |
| 303 | case 0x10: |
| 304 | idx = MMU_PAGE_64K; |
| 305 | break; |
| 306 | case 0x14: |
| 307 | idx = MMU_PAGE_1M; |
| 308 | break; |
| 309 | case 0x18: |
| 310 | idx = MMU_PAGE_16M; |
| 311 | break; |
| 312 | case 0x22: |
| 313 | idx = MMU_PAGE_16G; |
| 314 | break; |
| 315 | } |
| 316 | return idx; |
| 317 | } |
| 318 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 319 | static int __init htab_dt_scan_page_sizes(unsigned long node, |
| 320 | const char *uname, int depth, |
| 321 | void *data) |
| 322 | { |
| 323 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 324 | __be32 *prop; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 325 | unsigned long size = 0; |
| 326 | |
| 327 | /* We are scanning "cpu" nodes only */ |
| 328 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 329 | return 0; |
| 330 | |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 331 | prop = of_get_flat_dt_prop(node, "ibm,segment-page-sizes", &size); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 332 | if (prop != NULL) { |
Aneesh Kumar K.V | 3dc4fec | 2013-04-28 09:37:38 +0000 | [diff] [blame] | 333 | pr_info("Page sizes from device-tree:\n"); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 334 | size /= 4; |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 335 | cur_cpu_spec->mmu_features &= ~(MMU_FTR_16M_PAGE); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 336 | while(size > 0) { |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 337 | unsigned int base_shift = be32_to_cpu(prop[0]); |
| 338 | unsigned int slbenc = be32_to_cpu(prop[1]); |
| 339 | unsigned int lpnum = be32_to_cpu(prop[2]); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 340 | struct mmu_psize_def *def; |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 341 | int idx, base_idx; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 342 | |
| 343 | size -= 3; prop += 3; |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 344 | base_idx = get_idx_from_shift(base_shift); |
| 345 | if (base_idx < 0) { |
| 346 | /* |
| 347 | * skip the pte encoding also |
| 348 | */ |
| 349 | prop += lpnum * 2; size -= lpnum * 2; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 350 | continue; |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 351 | } |
| 352 | def = &mmu_psize_defs[base_idx]; |
| 353 | if (base_idx == MMU_PAGE_16M) |
| 354 | cur_cpu_spec->mmu_features |= MMU_FTR_16M_PAGE; |
| 355 | |
| 356 | def->shift = base_shift; |
| 357 | if (base_shift <= 23) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 358 | def->avpnm = 0; |
| 359 | else |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 360 | def->avpnm = (1 << (base_shift - 23)) - 1; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 361 | def->sllp = slbenc; |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 362 | /* |
| 363 | * We don't know for sure what's up with tlbiel, so |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 364 | * for now we only set it for 4K and 64K pages |
| 365 | */ |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 366 | if (base_idx == MMU_PAGE_4K || base_idx == MMU_PAGE_64K) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 367 | def->tlbiel = 1; |
| 368 | else |
| 369 | def->tlbiel = 0; |
| 370 | |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 371 | while (size > 0 && lpnum) { |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 372 | unsigned int shift = be32_to_cpu(prop[0]); |
| 373 | int penc = be32_to_cpu(prop[1]); |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 374 | |
| 375 | prop += 2; size -= 2; |
| 376 | lpnum--; |
| 377 | |
| 378 | idx = get_idx_from_shift(shift); |
| 379 | if (idx < 0) |
| 380 | continue; |
| 381 | |
| 382 | if (penc == -1) |
| 383 | pr_err("Invalid penc for base_shift=%d " |
| 384 | "shift=%d\n", base_shift, shift); |
| 385 | |
| 386 | def->penc[idx] = penc; |
Aneesh Kumar K.V | 3dc4fec | 2013-04-28 09:37:38 +0000 | [diff] [blame] | 387 | pr_info("base_shift=%d: shift=%d, sllp=0x%04lx," |
| 388 | " avpnm=0x%08lx, tlbiel=%d, penc=%d\n", |
| 389 | base_shift, shift, def->sllp, |
| 390 | def->avpnm, def->tlbiel, def->penc[idx]); |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 391 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 392 | } |
| 393 | return 1; |
| 394 | } |
| 395 | return 0; |
| 396 | } |
| 397 | |
Tony Breeds | e16a9c0 | 2008-07-31 13:51:42 +1000 | [diff] [blame] | 398 | #ifdef CONFIG_HUGETLB_PAGE |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 399 | /* Scan for 16G memory blocks that have been set aside for huge pages |
| 400 | * and reserve those blocks for 16G huge pages. |
| 401 | */ |
| 402 | static int __init htab_dt_scan_hugepage_blocks(unsigned long node, |
| 403 | const char *uname, int depth, |
| 404 | void *data) { |
| 405 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 406 | __be64 *addr_prop; |
| 407 | __be32 *page_count_prop; |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 408 | unsigned int expected_pages; |
| 409 | long unsigned int phys_addr; |
| 410 | long unsigned int block_size; |
| 411 | |
| 412 | /* We are scanning "memory" nodes only */ |
| 413 | if (type == NULL || strcmp(type, "memory") != 0) |
| 414 | return 0; |
| 415 | |
| 416 | /* This property is the log base 2 of the number of virtual pages that |
| 417 | * will represent this memory block. */ |
| 418 | page_count_prop = of_get_flat_dt_prop(node, "ibm,expected#pages", NULL); |
| 419 | if (page_count_prop == NULL) |
| 420 | return 0; |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 421 | expected_pages = (1 << be32_to_cpu(page_count_prop[0])); |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 422 | addr_prop = of_get_flat_dt_prop(node, "reg", NULL); |
| 423 | if (addr_prop == NULL) |
| 424 | return 0; |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 425 | phys_addr = be64_to_cpu(addr_prop[0]); |
| 426 | block_size = be64_to_cpu(addr_prop[1]); |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 427 | if (block_size != (16 * GB)) |
| 428 | return 0; |
| 429 | printk(KERN_INFO "Huge page(16GB) memory: " |
| 430 | "addr = 0x%lX size = 0x%lX pages = %d\n", |
| 431 | phys_addr, block_size, expected_pages); |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 432 | if (phys_addr + (16 * GB) <= memblock_end_of_DRAM()) { |
| 433 | memblock_reserve(phys_addr, block_size * expected_pages); |
Jon Tollefson | 4792adb | 2008-10-21 15:27:36 +0000 | [diff] [blame] | 434 | add_gpage(phys_addr, block_size, expected_pages); |
| 435 | } |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 436 | return 0; |
| 437 | } |
Tony Breeds | e16a9c0 | 2008-07-31 13:51:42 +1000 | [diff] [blame] | 438 | #endif /* CONFIG_HUGETLB_PAGE */ |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 439 | |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 440 | static void mmu_psize_set_default_penc(void) |
| 441 | { |
| 442 | int bpsize, apsize; |
| 443 | for (bpsize = 0; bpsize < MMU_PAGE_COUNT; bpsize++) |
| 444 | for (apsize = 0; apsize < MMU_PAGE_COUNT; apsize++) |
| 445 | mmu_psize_defs[bpsize].penc[apsize] = -1; |
| 446 | } |
| 447 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 448 | static void __init htab_init_page_sizes(void) |
| 449 | { |
| 450 | int rc; |
| 451 | |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 452 | /* se the invalid penc to -1 */ |
| 453 | mmu_psize_set_default_penc(); |
| 454 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 455 | /* Default to 4K pages only */ |
| 456 | memcpy(mmu_psize_defs, mmu_psize_defaults_old, |
| 457 | sizeof(mmu_psize_defaults_old)); |
| 458 | |
| 459 | /* |
| 460 | * Try to find the available page sizes in the device-tree |
| 461 | */ |
| 462 | rc = of_scan_flat_dt(htab_dt_scan_page_sizes, NULL); |
| 463 | if (rc != 0) /* Found */ |
| 464 | goto found; |
| 465 | |
| 466 | /* |
| 467 | * Not in the device-tree, let's fallback on known size |
| 468 | * list for 16M capable GP & GR |
| 469 | */ |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 470 | if (mmu_has_feature(MMU_FTR_16M_PAGE)) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 471 | memcpy(mmu_psize_defs, mmu_psize_defaults_gp, |
| 472 | sizeof(mmu_psize_defaults_gp)); |
| 473 | found: |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 474 | #ifndef CONFIG_DEBUG_PAGEALLOC |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 475 | /* |
| 476 | * Pick a size for the linear mapping. Currently, we only support |
| 477 | * 16M, 1M and 4K which is the default |
| 478 | */ |
| 479 | if (mmu_psize_defs[MMU_PAGE_16M].shift) |
| 480 | mmu_linear_psize = MMU_PAGE_16M; |
| 481 | else if (mmu_psize_defs[MMU_PAGE_1M].shift) |
| 482 | mmu_linear_psize = MMU_PAGE_1M; |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 483 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 484 | |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 485 | #ifdef CONFIG_PPC_64K_PAGES |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 486 | /* |
| 487 | * Pick a size for the ordinary pages. Default is 4K, we support |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 488 | * 64K for user mappings and vmalloc if supported by the processor. |
| 489 | * We only use 64k for ioremap if the processor |
| 490 | * (and firmware) support cache-inhibited large pages. |
| 491 | * If not, we use 4k and set mmu_ci_restrictions so that |
| 492 | * hash_page knows to switch processes that use cache-inhibited |
| 493 | * mappings to 4k pages. |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 494 | */ |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 495 | if (mmu_psize_defs[MMU_PAGE_64K].shift) { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 496 | mmu_virtual_psize = MMU_PAGE_64K; |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 497 | mmu_vmalloc_psize = MMU_PAGE_64K; |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 498 | if (mmu_linear_psize == MMU_PAGE_4K) |
| 499 | mmu_linear_psize = MMU_PAGE_64K; |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 500 | if (mmu_has_feature(MMU_FTR_CI_LARGE_PAGE)) { |
Paul Mackerras | cfe666b | 2008-03-24 17:41:22 +1100 | [diff] [blame] | 501 | /* |
| 502 | * Don't use 64k pages for ioremap on pSeries, since |
| 503 | * that would stop us accessing the HEA ethernet. |
| 504 | */ |
| 505 | if (!machine_is(pseries)) |
| 506 | mmu_io_psize = MMU_PAGE_64K; |
| 507 | } else |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 508 | mmu_ci_restrictions = 1; |
| 509 | } |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 510 | #endif /* CONFIG_PPC_64K_PAGES */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 511 | |
Benjamin Herrenschmidt | cec08e7 | 2008-04-30 15:41:48 +1000 | [diff] [blame] | 512 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
| 513 | /* We try to use 16M pages for vmemmap if that is supported |
| 514 | * and we have at least 1G of RAM at boot |
| 515 | */ |
| 516 | if (mmu_psize_defs[MMU_PAGE_16M].shift && |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 517 | memblock_phys_mem_size() >= 0x40000000) |
Benjamin Herrenschmidt | cec08e7 | 2008-04-30 15:41:48 +1000 | [diff] [blame] | 518 | mmu_vmemmap_psize = MMU_PAGE_16M; |
| 519 | else if (mmu_psize_defs[MMU_PAGE_64K].shift) |
| 520 | mmu_vmemmap_psize = MMU_PAGE_64K; |
| 521 | else |
| 522 | mmu_vmemmap_psize = MMU_PAGE_4K; |
| 523 | #endif /* CONFIG_SPARSEMEM_VMEMMAP */ |
| 524 | |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 525 | printk(KERN_DEBUG "Page orders: linear mapping = %d, " |
Benjamin Herrenschmidt | cec08e7 | 2008-04-30 15:41:48 +1000 | [diff] [blame] | 526 | "virtual = %d, io = %d" |
| 527 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
| 528 | ", vmemmap = %d" |
| 529 | #endif |
| 530 | "\n", |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 531 | mmu_psize_defs[mmu_linear_psize].shift, |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 532 | mmu_psize_defs[mmu_virtual_psize].shift, |
Benjamin Herrenschmidt | cec08e7 | 2008-04-30 15:41:48 +1000 | [diff] [blame] | 533 | mmu_psize_defs[mmu_io_psize].shift |
| 534 | #ifdef CONFIG_SPARSEMEM_VMEMMAP |
| 535 | ,mmu_psize_defs[mmu_vmemmap_psize].shift |
| 536 | #endif |
| 537 | ); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 538 | |
| 539 | #ifdef CONFIG_HUGETLB_PAGE |
Jon Tollefson | 658013e | 2008-07-23 21:27:54 -0700 | [diff] [blame] | 540 | /* Reserve 16G huge page memory sections for huge pages */ |
| 541 | of_scan_flat_dt(htab_dt_scan_hugepage_blocks, NULL); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 542 | #endif /* CONFIG_HUGETLB_PAGE */ |
| 543 | } |
| 544 | |
| 545 | static int __init htab_dt_scan_pftsize(unsigned long node, |
| 546 | const char *uname, int depth, |
| 547 | void *data) |
| 548 | { |
| 549 | char *type = of_get_flat_dt_prop(node, "device_type", NULL); |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 550 | __be32 *prop; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 551 | |
| 552 | /* We are scanning "cpu" nodes only */ |
| 553 | if (type == NULL || strcmp(type, "cpu") != 0) |
| 554 | return 0; |
| 555 | |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 556 | prop = of_get_flat_dt_prop(node, "ibm,pft-size", NULL); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 557 | if (prop != NULL) { |
| 558 | /* pft_size[0] is the NUMA CEC cookie */ |
Anton Blanchard | 12f04f2 | 2013-09-23 12:04:36 +1000 | [diff] [blame] | 559 | ppc64_pft_size = be32_to_cpu(prop[1]); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 560 | return 1; |
| 561 | } |
| 562 | return 0; |
| 563 | } |
| 564 | |
| 565 | static unsigned long __init htab_get_table_size(void) |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 566 | { |
Anton Blanchard | 13870b6 | 2009-02-13 11:57:30 +0000 | [diff] [blame] | 567 | unsigned long mem_size, rnd_mem_size, pteg_count, psize; |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 568 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 569 | /* If hash size isn't already provided by the platform, we try to |
Adrian Bunk | 943ffb5 | 2006-01-10 00:10:13 +0100 | [diff] [blame] | 570 | * retrieve it from the device-tree. If it's not there neither, we |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 571 | * calculate it now based on the total RAM size |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 572 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 573 | if (ppc64_pft_size == 0) |
| 574 | of_scan_flat_dt(htab_dt_scan_pftsize, NULL); |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 575 | if (ppc64_pft_size) |
| 576 | return 1UL << ppc64_pft_size; |
| 577 | |
| 578 | /* round mem_size up to next power of 2 */ |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 579 | mem_size = memblock_phys_mem_size(); |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 580 | rnd_mem_size = 1UL << __ilog2(mem_size); |
| 581 | if (rnd_mem_size < mem_size) |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 582 | rnd_mem_size <<= 1; |
| 583 | |
| 584 | /* # pages / 2 */ |
Anton Blanchard | 13870b6 | 2009-02-13 11:57:30 +0000 | [diff] [blame] | 585 | psize = mmu_psize_defs[mmu_virtual_psize].shift; |
| 586 | pteg_count = max(rnd_mem_size >> (psize + 1), 1UL << 11); |
Paul Mackerras | 3eac8c6 | 2005-10-12 16:58:53 +1000 | [diff] [blame] | 587 | |
| 588 | return pteg_count << 7; |
| 589 | } |
| 590 | |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 591 | #ifdef CONFIG_MEMORY_HOTPLUG |
Anton Blanchard | a119409 | 2011-08-10 20:44:24 +0000 | [diff] [blame] | 592 | int create_section_mapping(unsigned long start, unsigned long end) |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 593 | { |
Anton Blanchard | a119409 | 2011-08-10 20:44:24 +0000 | [diff] [blame] | 594 | return htab_bolt_mapping(start, end, __pa(start), |
David Gibson | f5ea64d | 2008-10-12 17:54:24 +0000 | [diff] [blame] | 595 | pgprot_val(PAGE_KERNEL), mmu_linear_psize, |
Anton Blanchard | a119409 | 2011-08-10 20:44:24 +0000 | [diff] [blame] | 596 | mmu_kernel_ssize); |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 597 | } |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 598 | |
Badari Pulavarty | 52db9b4 | 2008-03-28 11:37:21 +1100 | [diff] [blame] | 599 | int remove_section_mapping(unsigned long start, unsigned long end) |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 600 | { |
Badari Pulavarty | 52db9b4 | 2008-03-28 11:37:21 +1100 | [diff] [blame] | 601 | return htab_remove_mapping(start, end, mmu_linear_psize, |
| 602 | mmu_kernel_ssize); |
Badari Pulavarty | f8c8803 | 2008-01-29 09:19:24 +1100 | [diff] [blame] | 603 | } |
Mike Kravetz | 54b7924 | 2005-11-07 16:25:48 -0800 | [diff] [blame] | 604 | #endif /* CONFIG_MEMORY_HOTPLUG */ |
| 605 | |
Anton Blanchard | b68a70c | 2011-04-04 23:56:18 +0000 | [diff] [blame] | 606 | #define FUNCTION_TEXT(A) ((*(unsigned long *)(A))) |
Michael Ellerman | 7d0daae | 2006-06-23 18:16:38 +1000 | [diff] [blame] | 607 | |
| 608 | static void __init htab_finish_init(void) |
| 609 | { |
| 610 | extern unsigned int *htab_call_hpte_insert1; |
| 611 | extern unsigned int *htab_call_hpte_insert2; |
| 612 | extern unsigned int *htab_call_hpte_remove; |
| 613 | extern unsigned int *htab_call_hpte_updatepp; |
| 614 | |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 615 | #ifdef CONFIG_PPC_HAS_HASH_64K |
Michael Ellerman | 7d0daae | 2006-06-23 18:16:38 +1000 | [diff] [blame] | 616 | extern unsigned int *ht64_call_hpte_insert1; |
| 617 | extern unsigned int *ht64_call_hpte_insert2; |
| 618 | extern unsigned int *ht64_call_hpte_remove; |
| 619 | extern unsigned int *ht64_call_hpte_updatepp; |
| 620 | |
Anton Blanchard | b68a70c | 2011-04-04 23:56:18 +0000 | [diff] [blame] | 621 | patch_branch(ht64_call_hpte_insert1, |
| 622 | FUNCTION_TEXT(ppc_md.hpte_insert), |
| 623 | BRANCH_SET_LINK); |
| 624 | patch_branch(ht64_call_hpte_insert2, |
| 625 | FUNCTION_TEXT(ppc_md.hpte_insert), |
| 626 | BRANCH_SET_LINK); |
| 627 | patch_branch(ht64_call_hpte_remove, |
| 628 | FUNCTION_TEXT(ppc_md.hpte_remove), |
| 629 | BRANCH_SET_LINK); |
| 630 | patch_branch(ht64_call_hpte_updatepp, |
| 631 | FUNCTION_TEXT(ppc_md.hpte_updatepp), |
| 632 | BRANCH_SET_LINK); |
| 633 | |
Jon Tollefson | 5b82583 | 2007-05-17 04:43:02 +1000 | [diff] [blame] | 634 | #endif /* CONFIG_PPC_HAS_HASH_64K */ |
Michael Ellerman | 7d0daae | 2006-06-23 18:16:38 +1000 | [diff] [blame] | 635 | |
Anton Blanchard | b68a70c | 2011-04-04 23:56:18 +0000 | [diff] [blame] | 636 | patch_branch(htab_call_hpte_insert1, |
| 637 | FUNCTION_TEXT(ppc_md.hpte_insert), |
| 638 | BRANCH_SET_LINK); |
| 639 | patch_branch(htab_call_hpte_insert2, |
| 640 | FUNCTION_TEXT(ppc_md.hpte_insert), |
| 641 | BRANCH_SET_LINK); |
| 642 | patch_branch(htab_call_hpte_remove, |
| 643 | FUNCTION_TEXT(ppc_md.hpte_remove), |
| 644 | BRANCH_SET_LINK); |
| 645 | patch_branch(htab_call_hpte_updatepp, |
| 646 | FUNCTION_TEXT(ppc_md.hpte_updatepp), |
| 647 | BRANCH_SET_LINK); |
Michael Ellerman | 7d0daae | 2006-06-23 18:16:38 +1000 | [diff] [blame] | 648 | } |
| 649 | |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 650 | static void __init htab_initialize(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 651 | { |
Michael Ellerman | 337a712 | 2006-02-21 17:22:55 +1100 | [diff] [blame] | 652 | unsigned long table; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 653 | unsigned long pteg_count; |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 654 | unsigned long prot; |
Michael Ellerman | 41d824b | 2008-01-30 01:13:59 +1100 | [diff] [blame] | 655 | unsigned long base = 0, size = 0, limit; |
Benjamin Herrenschmidt | 28be707 | 2010-08-04 13:43:53 +1000 | [diff] [blame] | 656 | struct memblock_region *reg; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 657 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | DBG(" -> htab_initialize()\n"); |
| 659 | |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 660 | /* Initialize segment sizes */ |
| 661 | htab_init_seg_sizes(); |
| 662 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 663 | /* Initialize page sizes */ |
| 664 | htab_init_page_sizes(); |
| 665 | |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 666 | if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) { |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 667 | mmu_kernel_ssize = MMU_SEGSIZE_1T; |
| 668 | mmu_highuser_ssize = MMU_SEGSIZE_1T; |
| 669 | printk(KERN_INFO "Using 1TB segments\n"); |
| 670 | } |
| 671 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | /* |
| 673 | * Calculate the required size of the htab. We want the number of |
| 674 | * PTEGs to equal one half the number of real pages. |
| 675 | */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 676 | htab_size_bytes = htab_get_table_size(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 677 | pteg_count = htab_size_bytes >> 7; |
| 678 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | htab_hash_mask = pteg_count - 1; |
| 680 | |
Michael Ellerman | 57cfb81 | 2006-03-21 20:45:59 +1100 | [diff] [blame] | 681 | if (firmware_has_feature(FW_FEATURE_LPAR)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 682 | /* Using a hypervisor which owns the htab */ |
| 683 | htab_address = NULL; |
| 684 | _SDR1 = 0; |
Mahesh Salgaonkar | 3ccc00a | 2012-02-20 02:15:03 +0000 | [diff] [blame] | 685 | #ifdef CONFIG_FA_DUMP |
| 686 | /* |
| 687 | * If firmware assisted dump is active firmware preserves |
| 688 | * the contents of htab along with entire partition memory. |
| 689 | * Clear the htab if firmware assisted dump is active so |
| 690 | * that we dont end up using old mappings. |
| 691 | */ |
| 692 | if (is_fadump_active() && ppc_md.hpte_clear_all) |
| 693 | ppc_md.hpte_clear_all(); |
| 694 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 695 | } else { |
| 696 | /* Find storage for the HPT. Must be contiguous in |
Michael Ellerman | 41d824b | 2008-01-30 01:13:59 +1100 | [diff] [blame] | 697 | * the absolute address space. On cell we want it to be |
Michael Ellerman | 31bf111 | 2008-03-12 18:03:24 +1100 | [diff] [blame] | 698 | * in the first 2 Gig so we can use it for IOMMU hacks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | */ |
Michael Ellerman | 41d824b | 2008-01-30 01:13:59 +1100 | [diff] [blame] | 700 | if (machine_is(cell)) |
Michael Ellerman | 31bf111 | 2008-03-12 18:03:24 +1100 | [diff] [blame] | 701 | limit = 0x80000000; |
Michael Ellerman | 41d824b | 2008-01-30 01:13:59 +1100 | [diff] [blame] | 702 | else |
Benjamin Herrenschmidt | 27f574c | 2010-07-06 15:39:00 -0700 | [diff] [blame] | 703 | limit = MEMBLOCK_ALLOC_ANYWHERE; |
Michael Ellerman | 41d824b | 2008-01-30 01:13:59 +1100 | [diff] [blame] | 704 | |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 705 | table = memblock_alloc_base(htab_size_bytes, htab_size_bytes, limit); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 706 | |
| 707 | DBG("Hash table allocated at %lx, size: %lx\n", table, |
| 708 | htab_size_bytes); |
| 709 | |
Michael Ellerman | 70267a7 | 2012-07-25 21:19:50 +0000 | [diff] [blame] | 710 | htab_address = __va(table); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | |
| 712 | /* htab absolute addr + encoded htabsize */ |
| 713 | _SDR1 = table + __ilog2(pteg_count) - 11; |
| 714 | |
| 715 | /* Initialize the HPT with no entries */ |
| 716 | memset((void *)table, 0, htab_size_bytes); |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 717 | |
| 718 | /* Set SDR1 */ |
| 719 | mtspr(SPRN_SDR1, _SDR1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | } |
| 721 | |
David Gibson | f5ea64d | 2008-10-12 17:54:24 +0000 | [diff] [blame] | 722 | prot = pgprot_val(PAGE_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 724 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 725 | linear_map_hash_count = memblock_end_of_DRAM() >> PAGE_SHIFT; |
| 726 | linear_map_hash_slots = __va(memblock_alloc_base(linear_map_hash_count, |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 727 | 1, ppc64_rma_size)); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 728 | memset(linear_map_hash_slots, 0, linear_map_hash_count); |
| 729 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
| 730 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 731 | /* On U3 based machines, we need to reserve the DART area and |
| 732 | * _NOT_ map it to avoid cache paradoxes as it's remapped non |
| 733 | * cacheable later on |
| 734 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | |
| 736 | /* create bolted the linear mapping in the hash table */ |
Benjamin Herrenschmidt | 28be707 | 2010-08-04 13:43:53 +1000 | [diff] [blame] | 737 | for_each_memblock(memory, reg) { |
| 738 | base = (unsigned long)__va(reg->base); |
| 739 | size = reg->size; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 740 | |
Sachin P. Sant | 5c33991 | 2009-12-13 21:15:12 +0000 | [diff] [blame] | 741 | DBG("creating mapping for region: %lx..%lx (prot: %lx)\n", |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 742 | base, size, prot); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | |
| 744 | #ifdef CONFIG_U3_DART |
| 745 | /* Do not map the DART space. Fortunately, it will be aligned |
Yinghai Lu | 95f72d1 | 2010-07-12 14:36:09 +1000 | [diff] [blame] | 746 | * in such a way that it will not cross two memblock regions and |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 747 | * will fit within a single 16Mb page. |
| 748 | * The DART space is assumed to be a full 16Mb region even if |
| 749 | * we only use 2Mb of that space. We will use more of it later |
| 750 | * for AGP GART. We have to use a full 16Mb large page. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | */ |
| 752 | DBG("DART base: %lx\n", dart_tablebase); |
| 753 | |
| 754 | if (dart_tablebase != 0 && dart_tablebase >= base |
| 755 | && dart_tablebase < (base + size)) { |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame] | 756 | unsigned long dart_table_end = dart_tablebase + 16 * MB; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 757 | if (base != dart_tablebase) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 758 | BUG_ON(htab_bolt_mapping(base, dart_tablebase, |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 759 | __pa(base), prot, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 760 | mmu_linear_psize, |
| 761 | mmu_kernel_ssize)); |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame] | 762 | if ((base + size) > dart_table_end) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 763 | BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB, |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame] | 764 | base + size, |
| 765 | __pa(dart_table_end), |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 766 | prot, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 767 | mmu_linear_psize, |
| 768 | mmu_kernel_ssize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 769 | continue; |
| 770 | } |
| 771 | #endif /* CONFIG_U3_DART */ |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame] | 772 | BUG_ON(htab_bolt_mapping(base, base + size, __pa(base), |
Paul Mackerras | 9e88ba4 | 2008-08-30 11:26:27 +1000 | [diff] [blame] | 773 | prot, mmu_linear_psize, mmu_kernel_ssize)); |
Benjamin Herrenschmidt | e63075a | 2010-07-06 15:39:01 -0700 | [diff] [blame] | 774 | } |
| 775 | memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 776 | |
| 777 | /* |
| 778 | * If we have a memory_limit and we've allocated TCEs then we need to |
| 779 | * explicitly map the TCE area at the top of RAM. We also cope with the |
| 780 | * case that the TCEs start below memory_limit. |
| 781 | * tce_alloc_start/end are 16MB aligned so the mapping should work |
| 782 | * for either 4K or 16MB pages. |
| 783 | */ |
| 784 | if (tce_alloc_start) { |
Michael Ellerman | b5666f7 | 2005-12-05 10:24:33 -0600 | [diff] [blame] | 785 | tce_alloc_start = (unsigned long)__va(tce_alloc_start); |
| 786 | tce_alloc_end = (unsigned long)__va(tce_alloc_end); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | |
| 788 | if (base + size >= tce_alloc_start) |
| 789 | tce_alloc_start = base + size + 1; |
| 790 | |
Michael Ellerman | caf80e5 | 2006-03-21 20:45:51 +1100 | [diff] [blame] | 791 | BUG_ON(htab_bolt_mapping(tce_alloc_start, tce_alloc_end, |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 792 | __pa(tce_alloc_start), prot, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 793 | mmu_linear_psize, mmu_kernel_ssize)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | } |
| 795 | |
Michael Ellerman | 7d0daae | 2006-06-23 18:16:38 +1000 | [diff] [blame] | 796 | htab_finish_init(); |
| 797 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 798 | DBG(" <- htab_initialize()\n"); |
| 799 | } |
| 800 | #undef KB |
| 801 | #undef MB |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 802 | |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 803 | void __init early_init_mmu(void) |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 804 | { |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 805 | /* Setup initial STAB address in the PACA */ |
| 806 | get_paca()->stab_real = __pa((u64)&initial_stab); |
| 807 | get_paca()->stab_addr = (u64)&initial_stab; |
| 808 | |
| 809 | /* Initialize the MMU Hash table and create the linear mapping |
| 810 | * of memory. Has to be done before stab/slb initialization as |
| 811 | * this is currently where the page size encoding is obtained |
| 812 | */ |
| 813 | htab_initialize(); |
| 814 | |
Stephen Rothwell | f533927 | 2012-03-15 18:18:00 +0000 | [diff] [blame] | 815 | /* Initialize stab / SLB management */ |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 816 | if (mmu_has_feature(MMU_FTR_SLB)) |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 817 | slb_initialize(); |
Benjamin Herrenschmidt | 1393811 | 2013-03-13 09:49:06 +1100 | [diff] [blame] | 818 | else |
| 819 | stab_initialize(get_paca()->stab_real); |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 820 | } |
| 821 | |
| 822 | #ifdef CONFIG_SMP |
Paul Gortmaker | 061d19f | 2013-06-24 15:30:09 -0400 | [diff] [blame] | 823 | void early_init_mmu_secondary(void) |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 824 | { |
| 825 | /* Initialize hash table for that CPU */ |
Michael Ellerman | 57cfb81 | 2006-03-21 20:45:59 +1100 | [diff] [blame] | 826 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 827 | mtspr(SPRN_SDR1, _SDR1); |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 828 | |
| 829 | /* Initialize STAB/SLB. We use a virtual address as it works |
Stephen Rothwell | f533927 | 2012-03-15 18:18:00 +0000 | [diff] [blame] | 830 | * in real mode on pSeries. |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 831 | */ |
Matt Evans | 44ae3ab | 2011-04-06 19:48:50 +0000 | [diff] [blame] | 832 | if (mmu_has_feature(MMU_FTR_SLB)) |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 833 | slb_initialize(); |
| 834 | else |
| 835 | stab_initialize(get_paca()->stab_addr); |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 836 | } |
Benjamin Herrenschmidt | 757c74d | 2009-03-19 19:34:16 +0000 | [diff] [blame] | 837 | #endif /* CONFIG_SMP */ |
Paul Mackerras | 799d604 | 2005-11-10 13:37:51 +1100 | [diff] [blame] | 838 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | /* |
| 840 | * Called by asm hashtable.S for doing lazy icache flush |
| 841 | */ |
| 842 | unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap) |
| 843 | { |
| 844 | struct page *page; |
| 845 | |
Benjamin Herrenschmidt | 76c8e25 | 2005-11-08 11:21:05 +1100 | [diff] [blame] | 846 | if (!pfn_valid(pte_pfn(pte))) |
| 847 | return pp; |
| 848 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | page = pte_page(pte); |
| 850 | |
| 851 | /* page is dirty */ |
| 852 | if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) { |
| 853 | if (trap == 0x400) { |
David Gibson | 0895ecd | 2009-10-26 19:24:31 +0000 | [diff] [blame] | 854 | flush_dcache_icache_page(page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 855 | set_bit(PG_arch_1, &page->flags); |
| 856 | } else |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 857 | pp |= HPTE_R_N; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 858 | } |
| 859 | return pp; |
| 860 | } |
| 861 | |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 862 | #ifdef CONFIG_PPC_MM_SLICES |
| 863 | unsigned int get_paca_psize(unsigned long addr) |
| 864 | { |
Aneesh Kumar K.V | 7aa0727 | 2012-09-10 02:52:52 +0000 | [diff] [blame] | 865 | u64 lpsizes; |
| 866 | unsigned char *hpsizes; |
| 867 | unsigned long index, mask_index; |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 868 | |
| 869 | if (addr < SLICE_LOW_TOP) { |
Aneesh Kumar K.V | 7aa0727 | 2012-09-10 02:52:52 +0000 | [diff] [blame] | 870 | lpsizes = get_paca()->context.low_slices_psize; |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 871 | index = GET_LOW_SLICE_INDEX(addr); |
Aneesh Kumar K.V | 7aa0727 | 2012-09-10 02:52:52 +0000 | [diff] [blame] | 872 | return (lpsizes >> (index * 4)) & 0xF; |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 873 | } |
Aneesh Kumar K.V | 7aa0727 | 2012-09-10 02:52:52 +0000 | [diff] [blame] | 874 | hpsizes = get_paca()->context.high_slices_psize; |
| 875 | index = GET_HIGH_SLICE_INDEX(addr); |
| 876 | mask_index = index & 0x1; |
| 877 | return (hpsizes[index >> 1] >> (mask_index * 4)) & 0xF; |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 878 | } |
| 879 | |
| 880 | #else |
| 881 | unsigned int get_paca_psize(unsigned long addr) |
| 882 | { |
| 883 | return get_paca()->context.user_psize; |
| 884 | } |
| 885 | #endif |
| 886 | |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 887 | /* |
| 888 | * Demote a segment to using 4k pages. |
| 889 | * For now this makes the whole process use 4k pages. |
| 890 | */ |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 891 | #ifdef CONFIG_PPC_64K_PAGES |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 892 | void demote_segment_4k(struct mm_struct *mm, unsigned long addr) |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 893 | { |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 894 | if (get_slice_psize(mm, addr) == MMU_PAGE_4K) |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 895 | return; |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 896 | slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K); |
Geert Uytterhoeven | 1e57ba8 | 2007-07-17 02:35:38 +1000 | [diff] [blame] | 897 | #ifdef CONFIG_SPU_BASE |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 898 | spu_flush_all_slbs(mm); |
| 899 | #endif |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 900 | if (get_paca_psize(addr) != MMU_PAGE_4K) { |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 901 | get_paca()->context = mm->context; |
| 902 | slb_flush_and_rebolt(); |
| 903 | } |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 904 | } |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 905 | #endif /* CONFIG_PPC_64K_PAGES */ |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 906 | |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 907 | #ifdef CONFIG_PPC_SUBPAGE_PROT |
| 908 | /* |
| 909 | * This looks up a 2-bit protection code for a 4k subpage of a 64k page. |
| 910 | * Userspace sets the subpage permissions using the subpage_prot system call. |
| 911 | * |
| 912 | * Result is 0: full permissions, _PAGE_RW: read-only, |
| 913 | * _PAGE_USER or _PAGE_USER|_PAGE_RW: no access. |
| 914 | */ |
David Gibson | d28513b | 2009-11-26 18:56:04 +0000 | [diff] [blame] | 915 | static int subpage_protection(struct mm_struct *mm, unsigned long ea) |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 916 | { |
David Gibson | d28513b | 2009-11-26 18:56:04 +0000 | [diff] [blame] | 917 | struct subpage_prot_table *spt = &mm->context.spt; |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 918 | u32 spp = 0; |
| 919 | u32 **sbpm, *sbpp; |
| 920 | |
| 921 | if (ea >= spt->maxaddr) |
| 922 | return 0; |
Anton Blanchard | b0d436c | 2013-08-07 02:01:24 +1000 | [diff] [blame] | 923 | if (ea < 0x100000000UL) { |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 924 | /* addresses below 4GB use spt->low_prot */ |
| 925 | sbpm = spt->low_prot; |
| 926 | } else { |
| 927 | sbpm = spt->protptrs[ea >> SBP_L3_SHIFT]; |
| 928 | if (!sbpm) |
| 929 | return 0; |
| 930 | } |
| 931 | sbpp = sbpm[(ea >> SBP_L2_SHIFT) & (SBP_L2_COUNT - 1)]; |
| 932 | if (!sbpp) |
| 933 | return 0; |
| 934 | spp = sbpp[(ea >> PAGE_SHIFT) & (SBP_L1_COUNT - 1)]; |
| 935 | |
| 936 | /* extract 2-bit bitfield for this 4k subpage */ |
| 937 | spp >>= 30 - 2 * ((ea >> 12) & 0xf); |
| 938 | |
| 939 | /* turn 0,1,2,3 into combination of _PAGE_USER and _PAGE_RW */ |
| 940 | spp = ((spp & 2) ? _PAGE_USER : 0) | ((spp & 1) ? _PAGE_RW : 0); |
| 941 | return spp; |
| 942 | } |
| 943 | |
| 944 | #else /* CONFIG_PPC_SUBPAGE_PROT */ |
David Gibson | d28513b | 2009-11-26 18:56:04 +0000 | [diff] [blame] | 945 | static inline int subpage_protection(struct mm_struct *mm, unsigned long ea) |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 946 | { |
| 947 | return 0; |
| 948 | } |
| 949 | #endif |
| 950 | |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 951 | void hash_failure_debug(unsigned long ea, unsigned long access, |
| 952 | unsigned long vsid, unsigned long trap, |
Aneesh Kumar K.V | d8139eb | 2013-04-28 09:37:37 +0000 | [diff] [blame] | 953 | int ssize, int psize, int lpsize, unsigned long pte) |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 954 | { |
| 955 | if (!printk_ratelimit()) |
| 956 | return; |
| 957 | pr_info("mm: Hashing failure ! EA=0x%lx access=0x%lx current=%s\n", |
| 958 | ea, access, current->comm); |
Aneesh Kumar K.V | d8139eb | 2013-04-28 09:37:37 +0000 | [diff] [blame] | 959 | pr_info(" trap=0x%lx vsid=0x%lx ssize=%d base psize=%d psize %d pte=0x%lx\n", |
| 960 | trap, vsid, ssize, psize, lpsize, pte); |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 961 | } |
| 962 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 963 | /* Result code is: |
| 964 | * 0 - handled |
| 965 | * 1 - normal page fault |
| 966 | * -1 - critical hash insertion error |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 967 | * -2 - access not permitted by subpage protection mechanism |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 968 | */ |
| 969 | int hash_page(unsigned long ea, unsigned long access, unsigned long trap) |
| 970 | { |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 971 | enum ctx_state prev_state = exception_enter(); |
David Gibson | a1128f8 | 2009-12-16 14:29:56 +0000 | [diff] [blame] | 972 | pgd_t *pgdir; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 973 | unsigned long vsid; |
| 974 | struct mm_struct *mm; |
| 975 | pte_t *ptep; |
David Gibson | a4fe3ce | 2009-10-26 19:24:31 +0000 | [diff] [blame] | 976 | unsigned hugeshift; |
Rusty Russell | 56aa412 | 2009-03-15 18:16:43 +0000 | [diff] [blame] | 977 | const struct cpumask *tmp; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 978 | int rc, user_region = 0, local = 0; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 979 | int psize, ssize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 981 | DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n", |
| 982 | ea, access, trap); |
David Gibson | 1f8d419 | 2005-05-05 16:15:13 -0700 | [diff] [blame] | 983 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 984 | /* Get region & vsid */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 985 | switch (REGION_ID(ea)) { |
| 986 | case USER_REGION_ID: |
| 987 | user_region = 1; |
| 988 | mm = current->mm; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 989 | if (! mm) { |
| 990 | DBG_LOW(" user region with no mm !\n"); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 991 | rc = 1; |
| 992 | goto bail; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 993 | } |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 994 | psize = get_slice_psize(mm, ea); |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 995 | ssize = user_segment_size(ea); |
| 996 | vsid = get_vsid(mm->context.id, ea, ssize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 997 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | case VMALLOC_REGION_ID: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 999 | mm = &init_mm; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1000 | vsid = get_kernel_vsid(ea, mmu_kernel_ssize); |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1001 | if (ea < VMALLOC_END) |
| 1002 | psize = mmu_vmalloc_psize; |
| 1003 | else |
| 1004 | psize = mmu_io_psize; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1005 | ssize = mmu_kernel_ssize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1006 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1007 | default: |
| 1008 | /* Not a valid range |
| 1009 | * Send the problem up to do_page_fault |
| 1010 | */ |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1011 | rc = 1; |
| 1012 | goto bail; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1013 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1014 | DBG_LOW(" mm=%p, mm->pgdir=%p, vsid=%016lx\n", mm, mm->pgd, vsid); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1015 | |
Aneesh Kumar K.V | c60ac56 | 2013-03-13 03:34:54 +0000 | [diff] [blame] | 1016 | /* Bad address. */ |
| 1017 | if (!vsid) { |
| 1018 | DBG_LOW("Bad address!\n"); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1019 | rc = 1; |
| 1020 | goto bail; |
Aneesh Kumar K.V | c60ac56 | 2013-03-13 03:34:54 +0000 | [diff] [blame] | 1021 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1022 | /* Get pgdir */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1023 | pgdir = mm->pgd; |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1024 | if (pgdir == NULL) { |
| 1025 | rc = 1; |
| 1026 | goto bail; |
| 1027 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1028 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1029 | /* Check CPU locality */ |
Rusty Russell | 56aa412 | 2009-03-15 18:16:43 +0000 | [diff] [blame] | 1030 | tmp = cpumask_of(smp_processor_id()); |
| 1031 | if (user_region && cpumask_equal(mm_cpumask(mm), tmp)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1032 | local = 1; |
| 1033 | |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1034 | #ifndef CONFIG_PPC_64K_PAGES |
David Gibson | a4fe3ce | 2009-10-26 19:24:31 +0000 | [diff] [blame] | 1035 | /* If we use 4K pages and our psize is not 4K, then we might |
| 1036 | * be hitting a special driver mapping, and need to align the |
| 1037 | * address before we fetch the PTE. |
| 1038 | * |
| 1039 | * It could also be a hugepage mapping, in which case this is |
| 1040 | * not necessary, but it's not harmful, either. |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1041 | */ |
| 1042 | if (psize != MMU_PAGE_4K) |
| 1043 | ea &= ~((1ul << mmu_psize_defs[psize].shift) - 1); |
| 1044 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 1045 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1046 | /* Get PTE and page size from page tables */ |
David Gibson | a4fe3ce | 2009-10-26 19:24:31 +0000 | [diff] [blame] | 1047 | ptep = find_linux_pte_or_hugepte(pgdir, ea, &hugeshift); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1048 | if (ptep == NULL || !pte_present(*ptep)) { |
| 1049 | DBG_LOW(" no PTE !\n"); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1050 | rc = 1; |
| 1051 | goto bail; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1052 | } |
| 1053 | |
Benjamin Herrenschmidt | ca91e6c | 2010-07-23 08:53:23 +1000 | [diff] [blame] | 1054 | /* Add _PAGE_PRESENT to the required access perm */ |
| 1055 | access |= _PAGE_PRESENT; |
| 1056 | |
| 1057 | /* Pre-check access permissions (will be re-checked atomically |
| 1058 | * in __hash_page_XX but this pre-check is a fast path |
| 1059 | */ |
| 1060 | if (access & ~pte_val(*ptep)) { |
| 1061 | DBG_LOW(" no access !\n"); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1062 | rc = 1; |
| 1063 | goto bail; |
Benjamin Herrenschmidt | ca91e6c | 2010-07-23 08:53:23 +1000 | [diff] [blame] | 1064 | } |
| 1065 | |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1066 | if (hugeshift) { |
Aneesh Kumar K.V | 6d492ec | 2013-06-20 14:30:21 +0530 | [diff] [blame] | 1067 | if (pmd_trans_huge(*(pmd_t *)ptep)) |
| 1068 | rc = __hash_page_thp(ea, access, vsid, (pmd_t *)ptep, |
| 1069 | trap, local, ssize, psize); |
| 1070 | #ifdef CONFIG_HUGETLB_PAGE |
| 1071 | else |
| 1072 | rc = __hash_page_huge(ea, access, vsid, ptep, trap, |
| 1073 | local, ssize, hugeshift, psize); |
| 1074 | #else |
| 1075 | else { |
| 1076 | /* |
| 1077 | * if we have hugeshift, and is not transhuge with |
| 1078 | * hugetlb disabled, something is really wrong. |
| 1079 | */ |
| 1080 | rc = 1; |
| 1081 | WARN_ON(1); |
| 1082 | } |
| 1083 | #endif |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1084 | goto bail; |
| 1085 | } |
David Gibson | a4fe3ce | 2009-10-26 19:24:31 +0000 | [diff] [blame] | 1086 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1087 | #ifndef CONFIG_PPC_64K_PAGES |
| 1088 | DBG_LOW(" i-pte: %016lx\n", pte_val(*ptep)); |
| 1089 | #else |
| 1090 | DBG_LOW(" i-pte: %016lx %016lx\n", pte_val(*ptep), |
| 1091 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 1092 | #endif |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1093 | /* Do actual hashing */ |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1094 | #ifdef CONFIG_PPC_64K_PAGES |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 1095 | /* If _PAGE_4K_PFN is set, make sure this is a 4k segment */ |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 1096 | if ((pte_val(*ptep) & _PAGE_4K_PFN) && psize == MMU_PAGE_64K) { |
Paul Mackerras | 721151d | 2007-04-03 21:24:02 +1000 | [diff] [blame] | 1097 | demote_segment_4k(mm, ea); |
| 1098 | psize = MMU_PAGE_4K; |
| 1099 | } |
| 1100 | |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1101 | /* If this PTE is non-cacheable and we have restrictions on |
| 1102 | * using non cacheable large pages, then we switch to 4k |
| 1103 | */ |
| 1104 | if (mmu_ci_restrictions && psize == MMU_PAGE_64K && |
| 1105 | (pte_val(*ptep) & _PAGE_NO_CACHE)) { |
| 1106 | if (user_region) { |
| 1107 | demote_segment_4k(mm, ea); |
| 1108 | psize = MMU_PAGE_4K; |
| 1109 | } else if (ea < VMALLOC_END) { |
| 1110 | /* |
| 1111 | * some driver did a non-cacheable mapping |
| 1112 | * in vmalloc space, so switch vmalloc |
| 1113 | * to 4k pages |
| 1114 | */ |
| 1115 | printk(KERN_ALERT "Reducing vmalloc segment " |
| 1116 | "to 4kB pages because of " |
| 1117 | "non-cacheable mapping\n"); |
| 1118 | psize = mmu_vmalloc_psize = MMU_PAGE_4K; |
Geert Uytterhoeven | 1e57ba8 | 2007-07-17 02:35:38 +1000 | [diff] [blame] | 1119 | #ifdef CONFIG_SPU_BASE |
Benjamin Herrenschmidt | 94b2a43 | 2007-03-10 00:05:37 +0100 | [diff] [blame] | 1120 | spu_flush_all_slbs(mm); |
| 1121 | #endif |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1122 | } |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1123 | } |
| 1124 | if (user_region) { |
Paul Mackerras | 3a8247c | 2008-06-18 15:29:12 +1000 | [diff] [blame] | 1125 | if (psize != get_paca_psize(ea)) { |
Benjamin Herrenschmidt | f6ab0b9 | 2007-10-29 12:05:18 +1100 | [diff] [blame] | 1126 | get_paca()->context = mm->context; |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1127 | slb_flush_and_rebolt(); |
| 1128 | } |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1129 | } else if (get_paca()->vmalloc_sllp != |
| 1130 | mmu_psize_defs[mmu_vmalloc_psize].sllp) { |
| 1131 | get_paca()->vmalloc_sllp = |
| 1132 | mmu_psize_defs[mmu_vmalloc_psize].sllp; |
Michael Neuling | 67439b7 | 2007-08-03 11:55:39 +1000 | [diff] [blame] | 1133 | slb_vmalloc_update(); |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1134 | } |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1135 | #endif /* CONFIG_PPC_64K_PAGES */ |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1136 | |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1137 | #ifdef CONFIG_PPC_HAS_HASH_64K |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1138 | if (psize == MMU_PAGE_64K) |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1139 | rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1140 | else |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1141 | #endif /* CONFIG_PPC_HAS_HASH_64K */ |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 1142 | { |
David Gibson | a1128f8 | 2009-12-16 14:29:56 +0000 | [diff] [blame] | 1143 | int spp = subpage_protection(mm, ea); |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 1144 | if (access & spp) |
| 1145 | rc = -2; |
| 1146 | else |
| 1147 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, |
| 1148 | local, ssize, spp); |
| 1149 | } |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1150 | |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 1151 | /* Dump some info in case of hash insertion failure, they should |
| 1152 | * never happen so it is really useful to know if/when they do |
| 1153 | */ |
| 1154 | if (rc == -1) |
| 1155 | hash_failure_debug(ea, access, vsid, trap, ssize, psize, |
Aneesh Kumar K.V | d8139eb | 2013-04-28 09:37:37 +0000 | [diff] [blame] | 1156 | psize, pte_val(*ptep)); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1157 | #ifndef CONFIG_PPC_64K_PAGES |
| 1158 | DBG_LOW(" o-pte: %016lx\n", pte_val(*ptep)); |
| 1159 | #else |
| 1160 | DBG_LOW(" o-pte: %016lx %016lx\n", pte_val(*ptep), |
| 1161 | pte_val(*(ptep + PTRS_PER_PTE))); |
| 1162 | #endif |
| 1163 | DBG_LOW(" -> rc=%d\n", rc); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1164 | |
| 1165 | bail: |
| 1166 | exception_exit(prev_state); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1167 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | } |
Arnd Bergmann | 67207b9 | 2005-11-15 15:53:48 -0500 | [diff] [blame] | 1169 | EXPORT_SYMBOL_GPL(hash_page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1170 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1171 | void hash_preload(struct mm_struct *mm, unsigned long ea, |
| 1172 | unsigned long access, unsigned long trap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1173 | { |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 1174 | int hugepage_shift; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1175 | unsigned long vsid; |
Michael Neuling | 0b97fee | 2010-11-17 18:52:45 +0000 | [diff] [blame] | 1176 | pgd_t *pgdir; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1177 | pte_t *ptep; |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1178 | unsigned long flags; |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 1179 | int rc, ssize, local = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1180 | |
Benjamin Herrenschmidt | d0f13e3 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1181 | BUG_ON(REGION_ID(ea) != USER_REGION_ID); |
| 1182 | |
| 1183 | #ifdef CONFIG_PPC_MM_SLICES |
| 1184 | /* We only prefault standard pages for now */ |
Ilpo Järvinen | 2b02d13 | 2007-08-16 08:03:35 +1000 | [diff] [blame] | 1185 | if (unlikely(get_slice_psize(mm, ea) != mm->context.user_psize)) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1186 | return; |
Benjamin Herrenschmidt | d0f13e3 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1187 | #endif |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1188 | |
| 1189 | DBG_LOW("hash_preload(mm=%p, mm->pgdir=%p, ea=%016lx, access=%lx," |
| 1190 | " trap=%lx\n", mm, mm->pgd, ea, access, trap); |
| 1191 | |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1192 | /* Get Linux PTE if available */ |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1193 | pgdir = mm->pgd; |
| 1194 | if (pgdir == NULL) |
| 1195 | return; |
Aneesh Kumar K.V | 0ac52dd | 2013-06-20 14:30:22 +0530 | [diff] [blame] | 1196 | |
| 1197 | /* Get VSID */ |
| 1198 | ssize = user_segment_size(ea); |
| 1199 | vsid = get_vsid(mm->context.id, ea, ssize); |
| 1200 | if (!vsid) |
| 1201 | return; |
| 1202 | /* |
| 1203 | * Hash doesn't like irqs. Walking linux page table with irq disabled |
| 1204 | * saves us from holding multiple locks. |
| 1205 | */ |
| 1206 | local_irq_save(flags); |
| 1207 | |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 1208 | /* |
| 1209 | * THP pages use update_mmu_cache_pmd. We don't do |
| 1210 | * hash preload there. Hence can ignore THP here |
| 1211 | */ |
| 1212 | ptep = find_linux_pte_or_hugepte(pgdir, ea, &hugepage_shift); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1213 | if (!ptep) |
Aneesh Kumar K.V | 0ac52dd | 2013-06-20 14:30:22 +0530 | [diff] [blame] | 1214 | goto out_exit; |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1215 | |
Aneesh Kumar K.V | 12bc9f6 | 2013-06-20 14:30:18 +0530 | [diff] [blame] | 1216 | WARN_ON(hugepage_shift); |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1217 | #ifdef CONFIG_PPC_64K_PAGES |
| 1218 | /* If either _PAGE_4K_PFN or _PAGE_NO_CACHE is set (and we are on |
| 1219 | * a 64K kernel), then we don't preload, hash_page() will take |
| 1220 | * care of it once we actually try to access the page. |
| 1221 | * That way we don't have to duplicate all of the logic for segment |
| 1222 | * page size demotion here |
| 1223 | */ |
| 1224 | if (pte_val(*ptep) & (_PAGE_4K_PFN | _PAGE_NO_CACHE)) |
Aneesh Kumar K.V | 0ac52dd | 2013-06-20 14:30:22 +0530 | [diff] [blame] | 1225 | goto out_exit; |
Benjamin Herrenschmidt | 16f1c74 | 2007-05-08 16:27:27 +1000 | [diff] [blame] | 1226 | #endif /* CONFIG_PPC_64K_PAGES */ |
| 1227 | |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1228 | /* Is that local to this CPU ? */ |
Rusty Russell | 56aa412 | 2009-03-15 18:16:43 +0000 | [diff] [blame] | 1229 | if (cpumask_equal(mm_cpumask(mm), cpumask_of(smp_processor_id()))) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1230 | local = 1; |
Benjamin Herrenschmidt | 16c2d47 | 2007-05-08 16:27:28 +1000 | [diff] [blame] | 1231 | |
| 1232 | /* Hash it in */ |
| 1233 | #ifdef CONFIG_PPC_HAS_HASH_64K |
Paul Mackerras | bf72aeb | 2006-06-15 10:45:18 +1000 | [diff] [blame] | 1234 | if (mm->context.user_psize == MMU_PAGE_64K) |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 1235 | rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1236 | else |
Jon Tollefson | 5b82583 | 2007-05-17 04:43:02 +1000 | [diff] [blame] | 1237 | #endif /* CONFIG_PPC_HAS_HASH_64K */ |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 1238 | rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize, |
Michael Neuling | 1c2c25c | 2010-11-17 16:32:59 +0000 | [diff] [blame] | 1239 | subpage_protection(mm, ea)); |
Benjamin Herrenschmidt | 4b8692c | 2010-07-23 10:31:13 +1000 | [diff] [blame] | 1240 | |
| 1241 | /* Dump some info in case of hash insertion failure, they should |
| 1242 | * never happen so it is really useful to know if/when they do |
| 1243 | */ |
| 1244 | if (rc == -1) |
| 1245 | hash_failure_debug(ea, access, vsid, trap, ssize, |
Aneesh Kumar K.V | d8139eb | 2013-04-28 09:37:37 +0000 | [diff] [blame] | 1246 | mm->context.user_psize, |
| 1247 | mm->context.user_psize, |
| 1248 | pte_val(*ptep)); |
Aneesh Kumar K.V | 0ac52dd | 2013-06-20 14:30:22 +0530 | [diff] [blame] | 1249 | out_exit: |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1250 | local_irq_restore(flags); |
| 1251 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | |
Benjamin Herrenschmidt | f6ab0b9 | 2007-10-29 12:05:18 +1100 | [diff] [blame] | 1253 | /* WARNING: This is called from hash_low_64.S, if you change this prototype, |
| 1254 | * do not forget to update the assembly call site ! |
| 1255 | */ |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1256 | void flush_hash_page(unsigned long vpn, real_pte_t pte, int psize, int ssize, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1257 | int local) |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1258 | { |
| 1259 | unsigned long hash, index, shift, hidx, slot; |
| 1260 | |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1261 | DBG_LOW("flush_hash_page(vpn=%016lx)\n", vpn); |
| 1262 | pte_iterate_hashed_subpages(pte, psize, vpn, index, shift) { |
| 1263 | hash = hpt_hash(vpn, shift, ssize); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1264 | hidx = __rpte_to_hidx(pte, index); |
| 1265 | if (hidx & _PTEIDX_SECONDARY) |
| 1266 | hash = ~hash; |
| 1267 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 1268 | slot += hidx & _PTEIDX_GROUP_IX; |
Sachin P. Sant | 5c33991 | 2009-12-13 21:15:12 +0000 | [diff] [blame] | 1269 | DBG_LOW(" sub %ld: hash=%lx, hidx=%lx\n", index, slot, hidx); |
Aneesh Kumar K.V | db3d853 | 2013-06-20 14:30:13 +0530 | [diff] [blame] | 1270 | /* |
| 1271 | * We use same base page size and actual psize, because we don't |
| 1272 | * use these functions for hugepage |
| 1273 | */ |
| 1274 | ppc_md.hpte_invalidate(slot, vpn, psize, psize, ssize, local); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1275 | } pte_iterate_hashed_end(); |
Michael Neuling | bc2a940 | 2013-02-13 16:21:40 +0000 | [diff] [blame] | 1276 | |
| 1277 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 1278 | /* Transactions are not aborted by tlbiel, only tlbie. |
| 1279 | * Without, syncing a page back to a block device w/ PIO could pick up |
| 1280 | * transactional data (bad!) so we force an abort here. Before the |
| 1281 | * sync the page will be made read-only, which will flush_hash_page. |
| 1282 | * BIG ISSUE here: if the kernel uses a page from userspace without |
| 1283 | * unmapping it first, it may see the speculated version. |
| 1284 | */ |
| 1285 | if (local && cpu_has_feature(CPU_FTR_TM) && |
Michael Neuling | c2fd22d | 2013-05-02 15:36:14 +0000 | [diff] [blame] | 1286 | current->thread.regs && |
Michael Neuling | bc2a940 | 2013-02-13 16:21:40 +0000 | [diff] [blame] | 1287 | MSR_TM_ACTIVE(current->thread.regs->msr)) { |
| 1288 | tm_enable(); |
| 1289 | tm_abort(TM_CAUSE_TLBI); |
| 1290 | } |
| 1291 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1292 | } |
| 1293 | |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 1294 | void flush_hash_range(unsigned long number, int local) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1295 | { |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1296 | if (ppc_md.flush_hash_range) |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 1297 | ppc_md.flush_hash_range(number, local); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 1298 | else { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1299 | int i; |
Benjamin Herrenschmidt | 61b1a94 | 2005-09-20 13:52:50 +1000 | [diff] [blame] | 1300 | struct ppc64_tlb_batch *batch = |
| 1301 | &__get_cpu_var(ppc64_tlb_batch); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | |
| 1303 | for (i = 0; i < number; i++) |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1304 | flush_hash_page(batch->vpn[i], batch->pte[i], |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1305 | batch->psize, batch->ssize, local); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1306 | } |
| 1307 | } |
| 1308 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1309 | /* |
| 1310 | * low_hash_fault is called when we the low level hash code failed |
| 1311 | * to instert a PTE due to an hypervisor error |
| 1312 | */ |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 1313 | void low_hash_fault(struct pt_regs *regs, unsigned long address, int rc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1314 | { |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1315 | enum ctx_state prev_state = exception_enter(); |
| 1316 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1317 | if (user_mode(regs)) { |
Paul Mackerras | fa28237 | 2008-01-24 08:35:13 +1100 | [diff] [blame] | 1318 | #ifdef CONFIG_PPC_SUBPAGE_PROT |
| 1319 | if (rc == -2) |
| 1320 | _exception(SIGSEGV, regs, SEGV_ACCERR, address); |
| 1321 | else |
| 1322 | #endif |
| 1323 | _exception(SIGBUS, regs, BUS_ADRERR, address); |
| 1324 | } else |
| 1325 | bad_page_fault(regs, address, SIGBUS); |
Li Zhong | ba12eed | 2013-05-13 16:16:41 +0000 | [diff] [blame] | 1326 | |
| 1327 | exception_exit(prev_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1328 | } |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1329 | |
Li Zhong | b170bd3 | 2013-04-15 16:53:19 +0000 | [diff] [blame] | 1330 | long hpte_insert_repeating(unsigned long hash, unsigned long vpn, |
| 1331 | unsigned long pa, unsigned long rflags, |
| 1332 | unsigned long vflags, int psize, int ssize) |
| 1333 | { |
| 1334 | unsigned long hpte_group; |
| 1335 | long slot; |
| 1336 | |
| 1337 | repeat: |
| 1338 | hpte_group = ((hash & htab_hash_mask) * |
| 1339 | HPTES_PER_GROUP) & ~0x7UL; |
| 1340 | |
| 1341 | /* Insert into the hash table, primary slot */ |
| 1342 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, vflags, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 1343 | psize, psize, ssize); |
Li Zhong | b170bd3 | 2013-04-15 16:53:19 +0000 | [diff] [blame] | 1344 | |
| 1345 | /* Primary is full, try the secondary */ |
| 1346 | if (unlikely(slot == -1)) { |
| 1347 | hpte_group = ((~hash & htab_hash_mask) * |
| 1348 | HPTES_PER_GROUP) & ~0x7UL; |
| 1349 | slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, |
| 1350 | vflags | HPTE_V_SECONDARY, |
Aneesh Kumar K.V | b1022fb | 2013-04-28 09:37:35 +0000 | [diff] [blame] | 1351 | psize, psize, ssize); |
Li Zhong | b170bd3 | 2013-04-15 16:53:19 +0000 | [diff] [blame] | 1352 | if (slot == -1) { |
| 1353 | if (mftb() & 0x1) |
| 1354 | hpte_group = ((hash & htab_hash_mask) * |
| 1355 | HPTES_PER_GROUP)&~0x7UL; |
| 1356 | |
| 1357 | ppc_md.hpte_remove(hpte_group); |
| 1358 | goto repeat; |
| 1359 | } |
| 1360 | } |
| 1361 | |
| 1362 | return slot; |
| 1363 | } |
| 1364 | |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1365 | #ifdef CONFIG_DEBUG_PAGEALLOC |
| 1366 | static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi) |
| 1367 | { |
Li Zhong | 016af59 | 2013-04-15 16:53:20 +0000 | [diff] [blame] | 1368 | unsigned long hash; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1369 | unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize); |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1370 | unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize); |
Benjamin Herrenschmidt | bc033b6 | 2008-08-05 16:19:56 +1000 | [diff] [blame] | 1371 | unsigned long mode = htab_convert_pte_flags(PAGE_KERNEL); |
Li Zhong | 016af59 | 2013-04-15 16:53:20 +0000 | [diff] [blame] | 1372 | long ret; |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1373 | |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1374 | hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1375 | |
Aneesh Kumar K.V | c60ac56 | 2013-03-13 03:34:54 +0000 | [diff] [blame] | 1376 | /* Don't create HPTE entries for bad address */ |
| 1377 | if (!vsid) |
| 1378 | return; |
Li Zhong | 016af59 | 2013-04-15 16:53:20 +0000 | [diff] [blame] | 1379 | |
| 1380 | ret = hpte_insert_repeating(hash, vpn, __pa(vaddr), mode, |
| 1381 | HPTE_V_BOLTED, |
| 1382 | mmu_linear_psize, mmu_kernel_ssize); |
| 1383 | |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1384 | BUG_ON (ret < 0); |
| 1385 | spin_lock(&linear_map_hash_lock); |
| 1386 | BUG_ON(linear_map_hash_slots[lmi] & 0x80); |
| 1387 | linear_map_hash_slots[lmi] = ret | 0x80; |
| 1388 | spin_unlock(&linear_map_hash_lock); |
| 1389 | } |
| 1390 | |
| 1391 | static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long lmi) |
| 1392 | { |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 1393 | unsigned long hash, hidx, slot; |
| 1394 | unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize); |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1395 | unsigned long vpn = hpt_vpn(vaddr, vsid, mmu_kernel_ssize); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1396 | |
Aneesh Kumar K.V | 5524a27 | 2012-09-10 02:52:50 +0000 | [diff] [blame] | 1397 | hash = hpt_hash(vpn, PAGE_SHIFT, mmu_kernel_ssize); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1398 | spin_lock(&linear_map_hash_lock); |
| 1399 | BUG_ON(!(linear_map_hash_slots[lmi] & 0x80)); |
| 1400 | hidx = linear_map_hash_slots[lmi] & 0x7f; |
| 1401 | linear_map_hash_slots[lmi] = 0; |
| 1402 | spin_unlock(&linear_map_hash_lock); |
| 1403 | if (hidx & _PTEIDX_SECONDARY) |
| 1404 | hash = ~hash; |
| 1405 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; |
| 1406 | slot += hidx & _PTEIDX_GROUP_IX; |
Aneesh Kumar K.V | db3d853 | 2013-06-20 14:30:13 +0530 | [diff] [blame] | 1407 | ppc_md.hpte_invalidate(slot, vpn, mmu_linear_psize, mmu_linear_psize, |
| 1408 | mmu_kernel_ssize, 0); |
Benjamin Herrenschmidt | 370a908 | 2007-04-12 15:30:23 +1000 | [diff] [blame] | 1409 | } |
| 1410 | |
| 1411 | void kernel_map_pages(struct page *page, int numpages, int enable) |
| 1412 | { |
| 1413 | unsigned long flags, vaddr, lmi; |
| 1414 | int i; |
| 1415 | |
| 1416 | local_irq_save(flags); |
| 1417 | for (i = 0; i < numpages; i++, page++) { |
| 1418 | vaddr = (unsigned long)page_address(page); |
| 1419 | lmi = __pa(vaddr) >> PAGE_SHIFT; |
| 1420 | if (lmi >= linear_map_hash_count) |
| 1421 | continue; |
| 1422 | if (enable) |
| 1423 | kernel_map_linear_page(vaddr, lmi); |
| 1424 | else |
| 1425 | kernel_unmap_linear_page(vaddr, lmi); |
| 1426 | } |
| 1427 | local_irq_restore(flags); |
| 1428 | } |
| 1429 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Benjamin Herrenschmidt | cd3db0c | 2010-07-06 15:39:02 -0700 | [diff] [blame] | 1430 | |
| 1431 | void setup_initial_memory_limit(phys_addr_t first_memblock_base, |
| 1432 | phys_addr_t first_memblock_size) |
| 1433 | { |
| 1434 | /* We don't currently support the first MEMBLOCK not mapping 0 |
| 1435 | * physical on those processors |
| 1436 | */ |
| 1437 | BUG_ON(first_memblock_base != 0); |
| 1438 | |
| 1439 | /* On LPAR systems, the first entry is our RMA region, |
| 1440 | * non-LPAR 64-bit hash MMU systems don't have a limitation |
| 1441 | * on real mode access, but using the first entry works well |
| 1442 | * enough. We also clamp it to 1G to avoid some funky things |
| 1443 | * such as RTAS bugs etc... |
| 1444 | */ |
| 1445 | ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000); |
| 1446 | |
| 1447 | /* Finally limit subsequent allocations */ |
| 1448 | memblock_set_current_limit(ppc64_rma_size); |
| 1449 | } |