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gerrit-public.fairphone.software / kernel / msm-4.9 / 44e08e7099c8de226606cfc989b45d6fa27f507f / . / drivers / irqchip / Kconfig
blob: 746daf37454ce78bb93c776a387f17eb703f6d74 [file] [log] [blame]
Thomas Petazzonif6e916b2012-11-20 23:00:52 +0100[diff] [blame]1config IRQCHIP
2 def_bool y
3 depends on OF_IRQ
4
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]5config ARM_GIC
6 bool
7 select IRQ_DOMAIN
Yingjoe Chen9a1091e2014-11-25 16:04:19 +0800[diff] [blame]8 select IRQ_DOMAIN_HIERARCHY
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]9 select MULTI_IRQ_HANDLER
10
Suravee Suthikulpanit853a33c2014-11-25 18:47:22 +0000[diff] [blame]11config ARM_GIC_V2M
12 bool
13 depends on ARM_GIC
14 depends on PCI && PCI_MSI
15 select PCI_MSI_IRQ_DOMAIN
16
Rob Herring81243e42012-11-20 21:21:40 -0600[diff] [blame]17config GIC_NON_BANKED
18 bool
19
Marc Zyngier021f6532014-06-30 16:01:31 +0100[diff] [blame]20config ARM_GIC_V3
21 bool
22 select IRQ_DOMAIN
23 select MULTI_IRQ_HANDLER
Marc Zyngier443acc42014-11-24 14:35:09 +0000[diff] [blame]24 select IRQ_DOMAIN_HIERARCHY
Marc Zyngier021f6532014-06-30 16:01:31 +0100[diff] [blame]25
Marc Zyngier19812722014-11-24 14:35:19 +0000[diff] [blame]26config ARM_GIC_V3_ITS
27 bool
28 select PCI_MSI_IRQ_DOMAIN
Uwe Kleine-König292ec082013-06-26 09:18:48 +0200[diff] [blame]29
Rob Herring44430ec2012-10-27 17:25:26 -0500[diff] [blame]30config ARM_NVIC
31 bool
32 select IRQ_DOMAIN
33 select GENERIC_IRQ_CHIP
34
35config ARM_VIC
36 bool
37 select IRQ_DOMAIN
38 select MULTI_IRQ_HANDLER
39
40config ARM_VIC_NR
41 int
42 default 4 if ARCH_S5PV210
Rob Herring44430ec2012-10-27 17:25:26 -0500[diff] [blame]43 default 2
44 depends on ARM_VIC
45 help
46 The maximum number of VICs available in the system, for
47 power management.
48
Boris BREZILLONb1479eb2014-07-10 19:14:18 +0200[diff] [blame]49config ATMEL_AIC_IRQ
50 bool
51 select GENERIC_IRQ_CHIP
52 select IRQ_DOMAIN
53 select MULTI_IRQ_HANDLER
54 select SPARSE_IRQ
55
56config ATMEL_AIC5_IRQ
57 bool
58 select GENERIC_IRQ_CHIP
59 select IRQ_DOMAIN
60 select MULTI_IRQ_HANDLER
61 select SPARSE_IRQ
62
Kevin Cernekee5f7f0312014-12-25 09:49:06 -0800[diff] [blame]63config BCM7038_L1_IRQ
64 bool
65 select GENERIC_IRQ_CHIP
66 select IRQ_DOMAIN
67
Kevin Cernekeea4fcbb82014-11-06 22:44:27 -0800[diff] [blame]68config BCM7120_L2_IRQ
69 bool
70 select GENERIC_IRQ_CHIP
71 select IRQ_DOMAIN
72
Florian Fainelli7f646e92014-05-23 17:40:53 -0700[diff] [blame]73config BRCMSTB_L2_IRQ
74 bool
Florian Fainelli7f646e92014-05-23 17:40:53 -0700[diff] [blame]75 select GENERIC_IRQ_CHIP
76 select IRQ_DOMAIN
77
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +0200[diff] [blame]78config DW_APB_ICTL
79 bool
Jisheng Zhange1588492014-10-22 20:59:10 +0800[diff] [blame]80 select GENERIC_IRQ_CHIP
Sebastian Hesselbarth350d71b92013-09-09 14:01:20 +0200[diff] [blame]81 select IRQ_DOMAIN
82
James Hoganb6ef9162013-04-22 15:43:50 +0100[diff] [blame]83config IMGPDC_IRQ
84 bool
85 select GENERIC_IRQ_CHIP
86 select IRQ_DOMAIN
87
Ralf Baechle67e38cf2015-05-26 18:20:06 +0200[diff] [blame]88config IRQ_MIPS_CPU
89 bool
90 select GENERIC_IRQ_CHIP
91 select IRQ_DOMAIN
92
Alexander Shiyanafc98d92014-02-02 12:07:46 +0400[diff] [blame]93config CLPS711X_IRQCHIP
94 bool
95 depends on ARCH_CLPS711X
96 select IRQ_DOMAIN
97 select MULTI_IRQ_HANDLER
98 select SPARSE_IRQ
99 default y
100
Stefan Kristiansson4db8e6d2014-05-26 23:31:42 +0300[diff] [blame]101config OR1K_PIC
102 bool
103 select IRQ_DOMAIN
104
Felipe Balbi85980662014-09-15 16:15:02 -0500[diff] [blame]105config OMAP_IRQCHIP
106 bool
107 select GENERIC_IRQ_CHIP
108 select IRQ_DOMAIN
109
Sebastian Hesselbarth9dbd90f2013-06-06 18:27:09 +0200[diff] [blame]110config ORION_IRQCHIP
111 bool
112 select IRQ_DOMAIN
113 select MULTI_IRQ_HANDLER
114
Magnus Damm44358042013-02-18 23:28:34 +0900[diff] [blame]115config RENESAS_INTC_IRQPIN
116 bool
117 select IRQ_DOMAIN
118
Magnus Dammfbc83b72013-02-27 17:15:01 +0900[diff] [blame]119config RENESAS_IRQC
120 bool
121 select IRQ_DOMAIN
122
Lee Jones07088482015-02-18 15:13:58 +0000[diff] [blame]123config ST_IRQCHIP
124 bool
125 select REGMAP
126 select MFD_SYSCON
127 help
128 Enables SysCfg Controlled IRQs on STi based platforms.
129
Christian Ruppertb06eb012013-06-25 18:29:57 +0200[diff] [blame]130config TB10X_IRQC
131 bool
132 select IRQ_DOMAIN
133 select GENERIC_IRQ_CHIP
134
Linus Walleij2389d502012-10-31 22:04:31 +0100[diff] [blame]135config VERSATILE_FPGA_IRQ
136 bool
137 select IRQ_DOMAIN
138
139config VERSATILE_FPGA_IRQ_NR
140 int
141 default 4
142 depends on VERSATILE_FPGA_IRQ
Max Filippov26a8e962013-12-01 12:04:57 +0400[diff] [blame]143
144config XTENSA_MX
145 bool
146 select IRQ_DOMAIN
Sricharan R96ca8482013-12-03 15:57:23 +0530[diff] [blame]147
148config IRQ_CROSSBAR
149 bool
150 help
Masanari Iidaf54619f2014-09-18 12:09:42 +0900[diff] [blame]151 Support for a CROSSBAR ip that precedes the main interrupt controller.
Sricharan R96ca8482013-12-03 15:57:23 +0530[diff] [blame]152 The primary irqchip invokes the crossbar's callback which inturn allocates
153 a free irq and configures the IP. Thus the peripheral interrupts are
154 routed to one of the free irqchip interrupt lines.
Grygorii Strashko89323f82014-07-23 17:40:30 +0300[diff] [blame]155
156config KEYSTONE_IRQ
157 tristate "Keystone 2 IRQ controller IP"
158 depends on ARCH_KEYSTONE
159 help
160 Support for Texas Instruments Keystone 2 IRQ controller IP which
161 is part of the Keystone 2 IPC mechanism
Andrew Bresticker8a19b8f2014-09-18 14:47:19 -0700[diff] [blame]162
163config MIPS_GIC
164 bool
165 select MIPS_CM
Paul Burton44e08e72015-05-24 16:11:31 +0100[diff] [blame^]166
167config INGENIC_IRQ
168 bool
169 depends on MACH_INGENIC
170 default y