Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/drivers/mtd/nand/s3c2410.c |
| 2 | * |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 3 | * Copyright (c) 2004,2005 Simtec Electronics |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 7 | * Samsung S3C2410/S3C240 NAND driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
| 9 | * Changelog: |
| 10 | * 21-Sep-2004 BJD Initial version |
Joe Perches | 8e87d78 | 2008-02-03 17:22:34 +0200 | [diff] [blame] | 11 | * 23-Sep-2004 BJD Multiple device support |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode |
| 13 | * 12-Oct-2004 BJD Fixed errors in use of platform data |
Ben Dooks | 3e4ef3b | 2005-03-17 11:31:30 +0000 | [diff] [blame] | 14 | * 18-Feb-2005 BJD Fix sparse errors |
| 15 | * 14-Mar-2005 BJD Applied tglx's code reduction patch |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 16 | * 02-May-2005 BJD Fixed s3c2440 support |
| 17 | * 02-May-2005 BJD Reduced hwcontrol decode |
| 18 | * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug |
Ben Dooks | fb8d82a | 2005-07-06 21:05:10 +0100 | [diff] [blame] | 19 | * 08-Jul-2005 BJD Fix OOPS when no platform data supplied |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 20 | * 20-Oct-2005 BJD Fix timing calculation bug |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 21 | * 14-Jan-2006 BJD Allow clock to be stopped when idle |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | * This program is free software; you can redistribute it and/or modify |
| 24 | * it under the terms of the GNU General Public License as published by |
| 25 | * the Free Software Foundation; either version 2 of the License, or |
| 26 | * (at your option) any later version. |
| 27 | * |
| 28 | * This program is distributed in the hope that it will be useful, |
| 29 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 30 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 31 | * GNU General Public License for more details. |
| 32 | * |
| 33 | * You should have received a copy of the GNU General Public License |
| 34 | * along with this program; if not, write to the Free Software |
| 35 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 36 | */ |
| 37 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #ifdef CONFIG_MTD_NAND_S3C2410_DEBUG |
| 39 | #define DEBUG |
| 40 | #endif |
| 41 | |
| 42 | #include <linux/module.h> |
| 43 | #include <linux/types.h> |
| 44 | #include <linux/init.h> |
| 45 | #include <linux/kernel.h> |
| 46 | #include <linux/string.h> |
| 47 | #include <linux/ioport.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 48 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | #include <linux/delay.h> |
| 50 | #include <linux/err.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 51 | #include <linux/slab.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 52 | #include <linux/clk.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | |
| 54 | #include <linux/mtd/mtd.h> |
| 55 | #include <linux/mtd/nand.h> |
| 56 | #include <linux/mtd/nand_ecc.h> |
| 57 | #include <linux/mtd/partitions.h> |
| 58 | |
| 59 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
Ben Dooks | b7a7018 | 2007-07-24 13:37:27 +0100 | [diff] [blame] | 61 | #include <asm/plat-s3c/regs-nand.h> |
| 62 | #include <asm/plat-s3c/nand.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | #ifdef CONFIG_MTD_NAND_S3C2410_HWECC |
| 65 | static int hardware_ecc = 1; |
| 66 | #else |
| 67 | static int hardware_ecc = 0; |
| 68 | #endif |
| 69 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 70 | #ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP |
| 71 | static int clock_stop = 1; |
| 72 | #else |
| 73 | static const int clock_stop = 0; |
| 74 | #endif |
| 75 | |
| 76 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | /* new oob placement block for use with hardware ecc generation |
| 78 | */ |
| 79 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 80 | static struct nand_ecclayout nand_hw_eccoob = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 81 | .eccbytes = 3, |
| 82 | .eccpos = {0, 1, 2}, |
| 83 | .oobfree = {{8, 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | /* controller and mtd information */ |
| 87 | |
| 88 | struct s3c2410_nand_info; |
| 89 | |
| 90 | struct s3c2410_nand_mtd { |
| 91 | struct mtd_info mtd; |
| 92 | struct nand_chip chip; |
| 93 | struct s3c2410_nand_set *set; |
| 94 | struct s3c2410_nand_info *info; |
| 95 | int scan_res; |
| 96 | }; |
| 97 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 98 | enum s3c_cpu_type { |
| 99 | TYPE_S3C2410, |
| 100 | TYPE_S3C2412, |
| 101 | TYPE_S3C2440, |
| 102 | }; |
| 103 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | /* overview of the s3c2410 nand state */ |
| 105 | |
| 106 | struct s3c2410_nand_info { |
| 107 | /* mtd info */ |
| 108 | struct nand_hw_control controller; |
| 109 | struct s3c2410_nand_mtd *mtds; |
| 110 | struct s3c2410_platform_nand *platform; |
| 111 | |
| 112 | /* device info */ |
| 113 | struct device *device; |
| 114 | struct resource *area; |
| 115 | struct clk *clk; |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 116 | void __iomem *regs; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 117 | void __iomem *sel_reg; |
| 118 | int sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | int mtd_count; |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 120 | unsigned long save_sel; |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 121 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 122 | enum s3c_cpu_type cpu_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 123 | }; |
| 124 | |
| 125 | /* conversion functions */ |
| 126 | |
| 127 | static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd) |
| 128 | { |
| 129 | return container_of(mtd, struct s3c2410_nand_mtd, mtd); |
| 130 | } |
| 131 | |
| 132 | static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd) |
| 133 | { |
| 134 | return s3c2410_nand_mtd_toours(mtd)->info; |
| 135 | } |
| 136 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 137 | static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 139 | return platform_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
| 141 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 142 | static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 144 | return dev->dev.platform_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | } |
| 146 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 147 | static inline int allow_clk_stop(struct s3c2410_nand_info *info) |
| 148 | { |
| 149 | return clock_stop; |
| 150 | } |
| 151 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | /* timing calculations */ |
| 153 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 154 | #define NS_IN_KHZ 1000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 155 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 156 | static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | { |
| 158 | int result; |
| 159 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 160 | result = (wanted * clk) / NS_IN_KHZ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 161 | result++; |
| 162 | |
| 163 | pr_debug("result %d from %ld, %d\n", result, clk, wanted); |
| 164 | |
| 165 | if (result > max) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 166 | printk("%d ns is too big for current clock rate %ld\n", wanted, clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | return -1; |
| 168 | } |
| 169 | |
| 170 | if (result < 1) |
| 171 | result = 1; |
| 172 | |
| 173 | return result; |
| 174 | } |
| 175 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 176 | #define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | |
| 178 | /* controller setup */ |
| 179 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 180 | static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, |
| 181 | struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 182 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 183 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | unsigned long clkrate = clk_get_rate(info->clk); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 185 | int tacls_max = (info->cpu_type == TYPE_S3C2412) ? 8 : 4; |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 186 | int tacls, twrph0, twrph1; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 187 | unsigned long cfg = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
| 189 | /* calculate the timing information for the controller */ |
| 190 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 191 | clkrate /= 1000; /* turn clock into kHz for ease of use */ |
| 192 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | if (plat != NULL) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 194 | tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); |
| 195 | twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); |
| 196 | twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | } else { |
| 198 | /* default timings */ |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 199 | tacls = tacls_max; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 200 | twrph0 = 8; |
| 201 | twrph1 = 8; |
| 202 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 203 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | if (tacls < 0 || twrph0 < 0 || twrph1 < 0) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 205 | dev_err(info->device, "cannot get suitable timings\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | return -EINVAL; |
| 207 | } |
| 208 | |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 209 | dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 210 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 211 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 212 | switch (info->cpu_type) { |
| 213 | case TYPE_S3C2410: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 214 | cfg = S3C2410_NFCONF_EN; |
| 215 | cfg |= S3C2410_NFCONF_TACLS(tacls - 1); |
| 216 | cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); |
| 217 | cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 218 | break; |
| 219 | |
| 220 | case TYPE_S3C2440: |
| 221 | case TYPE_S3C2412: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 222 | cfg = S3C2440_NFCONF_TACLS(tacls - 1); |
| 223 | cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); |
| 224 | cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 225 | |
| 226 | /* enable the controller and de-assert nFCE */ |
| 227 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 228 | writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 229 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 231 | dev_dbg(info->device, "NF_CONF is 0x%lx\n", cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 232 | |
| 233 | writel(cfg, info->regs + S3C2410_NFCONF); |
| 234 | return 0; |
| 235 | } |
| 236 | |
| 237 | /* select chip */ |
| 238 | |
| 239 | static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) |
| 240 | { |
| 241 | struct s3c2410_nand_info *info; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 242 | struct s3c2410_nand_mtd *nmtd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | struct nand_chip *this = mtd->priv; |
| 244 | unsigned long cur; |
| 245 | |
| 246 | nmtd = this->priv; |
| 247 | info = nmtd->info; |
| 248 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 249 | if (chip != -1 && allow_clk_stop(info)) |
| 250 | clk_enable(info->clk); |
| 251 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 252 | cur = readl(info->sel_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | |
| 254 | if (chip == -1) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 255 | cur |= info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | } else { |
Ben Dooks | fb8d82a | 2005-07-06 21:05:10 +0100 | [diff] [blame] | 257 | if (nmtd->set != NULL && chip > nmtd->set->nr_chips) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 258 | dev_err(info->device, "invalid chip %d\n", chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | return; |
| 260 | } |
| 261 | |
| 262 | if (info->platform != NULL) { |
| 263 | if (info->platform->select_chip != NULL) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 264 | (info->platform->select_chip) (nmtd->set, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | } |
| 266 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 267 | cur &= ~info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | } |
| 269 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 270 | writel(cur, info->sel_reg); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 271 | |
| 272 | if (chip == -1 && allow_clk_stop(info)) |
| 273 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | } |
| 275 | |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 276 | /* s3c2410_nand_hwcontrol |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 277 | * |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 278 | * Issue command and address cycles to the chip |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 279 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 281 | static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 282 | unsigned int ctrl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | { |
| 284 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
David Woodhouse | c9ac597 | 2006-11-30 08:17:38 +0000 | [diff] [blame] | 285 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 286 | if (cmd == NAND_CMD_NONE) |
| 287 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 289 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 290 | writeb(cmd, info->regs + S3C2410_NFCMD); |
| 291 | else |
| 292 | writeb(cmd, info->regs + S3C2410_NFADDR); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 293 | } |
| 294 | |
| 295 | /* command and control functions */ |
| 296 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 297 | static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
| 298 | unsigned int ctrl) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 299 | { |
| 300 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 301 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 302 | if (cmd == NAND_CMD_NONE) |
| 303 | return; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 304 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 305 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 306 | writeb(cmd, info->regs + S3C2440_NFCMD); |
| 307 | else |
| 308 | writeb(cmd, info->regs + S3C2440_NFADDR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | } |
| 310 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | /* s3c2410_nand_devready() |
| 312 | * |
| 313 | * returns 0 if the nand is busy, 1 if it is ready |
| 314 | */ |
| 315 | |
| 316 | static int s3c2410_nand_devready(struct mtd_info *mtd) |
| 317 | { |
| 318 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; |
| 320 | } |
| 321 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 322 | static int s3c2440_nand_devready(struct mtd_info *mtd) |
| 323 | { |
| 324 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 325 | return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY; |
| 326 | } |
| 327 | |
| 328 | static int s3c2412_nand_devready(struct mtd_info *mtd) |
| 329 | { |
| 330 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 331 | return readb(info->regs + S3C2412_NFSTAT) & S3C2412_NFSTAT_READY; |
| 332 | } |
| 333 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | /* ECC handling functions */ |
| 335 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 336 | static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, |
| 337 | u_char *read_ecc, u_char *calc_ecc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | { |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 339 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 340 | unsigned int diff0, diff1, diff2; |
| 341 | unsigned int bit, byte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 343 | pr_debug("%s(%p,%p,%p,%p)\n", __func__, mtd, dat, read_ecc, calc_ecc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 345 | diff0 = read_ecc[0] ^ calc_ecc[0]; |
| 346 | diff1 = read_ecc[1] ^ calc_ecc[1]; |
| 347 | diff2 = read_ecc[2] ^ calc_ecc[2]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 349 | pr_debug("%s: rd %02x%02x%02x calc %02x%02x%02x diff %02x%02x%02x\n", |
| 350 | __func__, |
| 351 | read_ecc[0], read_ecc[1], read_ecc[2], |
| 352 | calc_ecc[0], calc_ecc[1], calc_ecc[2], |
| 353 | diff0, diff1, diff2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 354 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 355 | if (diff0 == 0 && diff1 == 0 && diff2 == 0) |
| 356 | return 0; /* ECC is ok */ |
| 357 | |
Ben Dooks | c45c6c6 | 2008-04-15 11:36:20 +0100 | [diff] [blame] | 358 | /* sometimes people do not think about using the ECC, so check |
| 359 | * to see if we have an 0xff,0xff,0xff read ECC and then ignore |
| 360 | * the error, on the assumption that this is an un-eccd page. |
| 361 | */ |
| 362 | if (read_ecc[0] == 0xff && read_ecc[1] == 0xff && read_ecc[2] == 0xff |
| 363 | && info->platform->ignore_unset_ecc) |
| 364 | return 0; |
| 365 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 366 | /* Can we correct this ECC (ie, one row and column change). |
| 367 | * Note, this is similar to the 256 error code on smartmedia */ |
| 368 | |
| 369 | if (((diff0 ^ (diff0 >> 1)) & 0x55) == 0x55 && |
| 370 | ((diff1 ^ (diff1 >> 1)) & 0x55) == 0x55 && |
| 371 | ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) { |
| 372 | /* calculate the bit position of the error */ |
| 373 | |
Matt Reimer | d0bf379 | 2007-10-18 18:02:43 -0700 | [diff] [blame] | 374 | bit = ((diff2 >> 3) & 1) | |
| 375 | ((diff2 >> 4) & 2) | |
| 376 | ((diff2 >> 5) & 4); |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 377 | |
| 378 | /* calculate the byte position of the error */ |
| 379 | |
Matt Reimer | d0bf379 | 2007-10-18 18:02:43 -0700 | [diff] [blame] | 380 | byte = ((diff2 << 7) & 0x100) | |
| 381 | ((diff1 << 0) & 0x80) | |
| 382 | ((diff1 << 1) & 0x40) | |
| 383 | ((diff1 << 2) & 0x20) | |
| 384 | ((diff1 << 3) & 0x10) | |
| 385 | ((diff0 >> 4) & 0x08) | |
| 386 | ((diff0 >> 3) & 0x04) | |
| 387 | ((diff0 >> 2) & 0x02) | |
| 388 | ((diff0 >> 1) & 0x01); |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 389 | |
| 390 | dev_dbg(info->device, "correcting error bit %d, byte %d\n", |
| 391 | bit, byte); |
| 392 | |
| 393 | dat[byte] ^= (1 << bit); |
| 394 | return 1; |
| 395 | } |
| 396 | |
| 397 | /* if there is only one bit difference in the ECC, then |
| 398 | * one of only a row or column parity has changed, which |
| 399 | * means the error is most probably in the ECC itself */ |
| 400 | |
| 401 | diff0 |= (diff1 << 8); |
| 402 | diff0 |= (diff2 << 16); |
| 403 | |
| 404 | if ((diff0 & ~(1<<fls(diff0))) == 0) |
| 405 | return 1; |
| 406 | |
Matt Reimer | 4fac9f6 | 2007-10-18 18:02:44 -0700 | [diff] [blame] | 407 | return -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | } |
| 409 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 410 | /* ECC functions |
| 411 | * |
| 412 | * These allow the s3c2410 and s3c2440 to use the controller's ECC |
| 413 | * generator block to ECC the data as it passes through] |
| 414 | */ |
| 415 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 416 | static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 417 | { |
| 418 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 419 | unsigned long ctrl; |
| 420 | |
| 421 | ctrl = readl(info->regs + S3C2410_NFCONF); |
| 422 | ctrl |= S3C2410_NFCONF_INITECC; |
| 423 | writel(ctrl, info->regs + S3C2410_NFCONF); |
| 424 | } |
| 425 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 426 | static void s3c2412_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 427 | { |
| 428 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 429 | unsigned long ctrl; |
| 430 | |
| 431 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 432 | writel(ctrl | S3C2412_NFCONT_INIT_MAIN_ECC, info->regs + S3C2440_NFCONT); |
| 433 | } |
| 434 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 435 | static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 436 | { |
| 437 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 438 | unsigned long ctrl; |
| 439 | |
| 440 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 441 | writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); |
| 442 | } |
| 443 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 444 | static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | { |
| 446 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 447 | |
| 448 | ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0); |
| 449 | ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); |
| 450 | ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); |
| 451 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 452 | pr_debug("%s: returning ecc %02x%02x%02x\n", __func__, |
| 453 | ecc_code[0], ecc_code[1], ecc_code[2]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | |
| 455 | return 0; |
| 456 | } |
| 457 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 458 | static int s3c2412_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
| 459 | { |
| 460 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 461 | unsigned long ecc = readl(info->regs + S3C2412_NFMECC0); |
| 462 | |
| 463 | ecc_code[0] = ecc; |
| 464 | ecc_code[1] = ecc >> 8; |
| 465 | ecc_code[2] = ecc >> 16; |
| 466 | |
| 467 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]); |
| 468 | |
| 469 | return 0; |
| 470 | } |
| 471 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 472 | static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 473 | { |
| 474 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 475 | unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); |
| 476 | |
| 477 | ecc_code[0] = ecc; |
| 478 | ecc_code[1] = ecc >> 8; |
| 479 | ecc_code[2] = ecc >> 16; |
| 480 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 481 | pr_debug("%s: returning ecc %06lx\n", __func__, ecc & 0xffffff); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 482 | |
| 483 | return 0; |
| 484 | } |
| 485 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 486 | /* over-ride the standard functions for a little more speed. We can |
| 487 | * use read/write block to move the data buffers to/from the controller |
| 488 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 489 | |
| 490 | static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 491 | { |
| 492 | struct nand_chip *this = mtd->priv; |
| 493 | readsb(this->IO_ADDR_R, buf, len); |
| 494 | } |
| 495 | |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 496 | static void s3c2440_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 497 | { |
| 498 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 499 | readsl(info->regs + S3C2440_NFDATA, buf, len / 4); |
| 500 | } |
| 501 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 502 | static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 503 | { |
| 504 | struct nand_chip *this = mtd->priv; |
| 505 | writesb(this->IO_ADDR_W, buf, len); |
| 506 | } |
| 507 | |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 508 | static void s3c2440_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 509 | { |
| 510 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 511 | writesl(info->regs + S3C2440_NFDATA, buf, len / 4); |
| 512 | } |
| 513 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | /* device management functions */ |
| 515 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 516 | static int s3c2410_nand_remove(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 518 | struct s3c2410_nand_info *info = to_nand_info(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 519 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 520 | platform_set_drvdata(pdev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 521 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 522 | if (info == NULL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 523 | return 0; |
| 524 | |
| 525 | /* first thing we need to do is release all our mtds |
| 526 | * and their partitions, then go through freeing the |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 527 | * resources used |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 529 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | if (info->mtds != NULL) { |
| 531 | struct s3c2410_nand_mtd *ptr = info->mtds; |
| 532 | int mtdno; |
| 533 | |
| 534 | for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) { |
| 535 | pr_debug("releasing mtd %d (%p)\n", mtdno, ptr); |
| 536 | nand_release(&ptr->mtd); |
| 537 | } |
| 538 | |
| 539 | kfree(info->mtds); |
| 540 | } |
| 541 | |
| 542 | /* free the common resources */ |
| 543 | |
| 544 | if (info->clk != NULL && !IS_ERR(info->clk)) { |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 545 | if (!allow_clk_stop(info)) |
| 546 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 547 | clk_put(info->clk); |
| 548 | } |
| 549 | |
| 550 | if (info->regs != NULL) { |
| 551 | iounmap(info->regs); |
| 552 | info->regs = NULL; |
| 553 | } |
| 554 | |
| 555 | if (info->area != NULL) { |
| 556 | release_resource(info->area); |
| 557 | kfree(info->area); |
| 558 | info->area = NULL; |
| 559 | } |
| 560 | |
| 561 | kfree(info); |
| 562 | |
| 563 | return 0; |
| 564 | } |
| 565 | |
| 566 | #ifdef CONFIG_MTD_PARTITIONS |
| 567 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 568 | struct s3c2410_nand_mtd *mtd, |
| 569 | struct s3c2410_nand_set *set) |
| 570 | { |
| 571 | if (set == NULL) |
| 572 | return add_mtd_device(&mtd->mtd); |
| 573 | |
| 574 | if (set->nr_partitions > 0 && set->partitions != NULL) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 575 | return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 576 | } |
| 577 | |
| 578 | return add_mtd_device(&mtd->mtd); |
| 579 | } |
| 580 | #else |
| 581 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 582 | struct s3c2410_nand_mtd *mtd, |
| 583 | struct s3c2410_nand_set *set) |
| 584 | { |
| 585 | return add_mtd_device(&mtd->mtd); |
| 586 | } |
| 587 | #endif |
| 588 | |
| 589 | /* s3c2410_nand_init_chip |
| 590 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 591 | * init a single instance of an chip |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 592 | */ |
| 593 | |
| 594 | static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, |
| 595 | struct s3c2410_nand_mtd *nmtd, |
| 596 | struct s3c2410_nand_set *set) |
| 597 | { |
| 598 | struct nand_chip *chip = &nmtd->chip; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 599 | void __iomem *regs = info->regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 601 | chip->write_buf = s3c2410_nand_write_buf; |
| 602 | chip->read_buf = s3c2410_nand_read_buf; |
| 603 | chip->select_chip = s3c2410_nand_select_chip; |
| 604 | chip->chip_delay = 50; |
| 605 | chip->priv = nmtd; |
| 606 | chip->options = 0; |
| 607 | chip->controller = &info->controller; |
| 608 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 609 | switch (info->cpu_type) { |
| 610 | case TYPE_S3C2410: |
| 611 | chip->IO_ADDR_W = regs + S3C2410_NFDATA; |
| 612 | info->sel_reg = regs + S3C2410_NFCONF; |
| 613 | info->sel_bit = S3C2410_NFCONF_nFCE; |
| 614 | chip->cmd_ctrl = s3c2410_nand_hwcontrol; |
| 615 | chip->dev_ready = s3c2410_nand_devready; |
| 616 | break; |
| 617 | |
| 618 | case TYPE_S3C2440: |
| 619 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 620 | info->sel_reg = regs + S3C2440_NFCONT; |
| 621 | info->sel_bit = S3C2440_NFCONT_nFCE; |
| 622 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 623 | chip->dev_ready = s3c2440_nand_devready; |
Matt Reimer | b773bb2 | 2007-10-18 17:43:07 -0700 | [diff] [blame] | 624 | chip->read_buf = s3c2440_nand_read_buf; |
| 625 | chip->write_buf = s3c2440_nand_write_buf; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 626 | break; |
| 627 | |
| 628 | case TYPE_S3C2412: |
| 629 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 630 | info->sel_reg = regs + S3C2440_NFCONT; |
| 631 | info->sel_bit = S3C2412_NFCONT_nFCE0; |
| 632 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 633 | chip->dev_ready = s3c2412_nand_devready; |
| 634 | |
| 635 | if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT) |
| 636 | dev_info(info->device, "System booted from NAND\n"); |
| 637 | |
| 638 | break; |
| 639 | } |
| 640 | |
| 641 | chip->IO_ADDR_R = chip->IO_ADDR_W; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 642 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 643 | nmtd->info = info; |
| 644 | nmtd->mtd.priv = chip; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 645 | nmtd->mtd.owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 646 | nmtd->set = set; |
| 647 | |
| 648 | if (hardware_ecc) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 649 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 650 | chip->ecc.correct = s3c2410_nand_correct_data; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 651 | chip->ecc.mode = NAND_ECC_HW; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 652 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 653 | switch (info->cpu_type) { |
| 654 | case TYPE_S3C2410: |
| 655 | chip->ecc.hwctl = s3c2410_nand_enable_hwecc; |
| 656 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
| 657 | break; |
| 658 | |
| 659 | case TYPE_S3C2412: |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 660 | chip->ecc.hwctl = s3c2412_nand_enable_hwecc; |
| 661 | chip->ecc.calculate = s3c2412_nand_calculate_ecc; |
| 662 | break; |
| 663 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 664 | case TYPE_S3C2440: |
| 665 | chip->ecc.hwctl = s3c2440_nand_enable_hwecc; |
| 666 | chip->ecc.calculate = s3c2440_nand_calculate_ecc; |
| 667 | break; |
| 668 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 669 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 670 | } else { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 671 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 672 | } |
Ben Dooks | 1c21ab6 | 2008-04-15 11:36:21 +0100 | [diff] [blame] | 673 | |
| 674 | if (set->ecc_layout != NULL) |
| 675 | chip->ecc.layout = set->ecc_layout; |
Ben Dooks | 37e5ffa | 2008-04-15 11:36:22 +0100 | [diff] [blame] | 676 | |
| 677 | if (set->disable_ecc) |
| 678 | chip->ecc.mode = NAND_ECC_NONE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | } |
| 680 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 681 | /* s3c2410_nand_update_chip |
| 682 | * |
| 683 | * post-probe chip update, to change any items, such as the |
| 684 | * layout for large page nand |
| 685 | */ |
| 686 | |
| 687 | static void s3c2410_nand_update_chip(struct s3c2410_nand_info *info, |
| 688 | struct s3c2410_nand_mtd *nmtd) |
| 689 | { |
| 690 | struct nand_chip *chip = &nmtd->chip; |
| 691 | |
Ben Dooks | 451d339 | 2008-05-20 17:32:14 +0100 | [diff] [blame^] | 692 | dev_dbg(info->device, "chip %p => page shift %d\n", |
| 693 | chip, chip->page_shift); |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 694 | |
| 695 | if (hardware_ecc) { |
| 696 | /* change the behaviour depending on wether we are using |
| 697 | * the large or small page nand device */ |
| 698 | |
| 699 | if (chip->page_shift > 10) { |
| 700 | chip->ecc.size = 256; |
| 701 | chip->ecc.bytes = 3; |
| 702 | } else { |
| 703 | chip->ecc.size = 512; |
| 704 | chip->ecc.bytes = 3; |
| 705 | chip->ecc.layout = &nand_hw_eccoob; |
| 706 | } |
| 707 | } |
| 708 | } |
| 709 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | /* s3c2410_nand_probe |
| 711 | * |
| 712 | * called by device layer when it finds a device matching |
| 713 | * one our driver can handled. This code checks to see if |
| 714 | * it can allocate all necessary resources then calls the |
| 715 | * nand layer to look for devices |
| 716 | */ |
| 717 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 718 | static int s3c24xx_nand_probe(struct platform_device *pdev, |
| 719 | enum s3c_cpu_type cpu_type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 721 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 722 | struct s3c2410_nand_info *info; |
| 723 | struct s3c2410_nand_mtd *nmtd; |
| 724 | struct s3c2410_nand_set *sets; |
| 725 | struct resource *res; |
| 726 | int err = 0; |
| 727 | int size; |
| 728 | int nr_sets; |
| 729 | int setno; |
| 730 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 731 | pr_debug("s3c2410_nand_probe(%p)\n", pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
| 733 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
| 734 | if (info == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 735 | dev_err(&pdev->dev, "no memory for flash info\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | err = -ENOMEM; |
| 737 | goto exit_error; |
| 738 | } |
| 739 | |
| 740 | memzero(info, sizeof(*info)); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 741 | platform_set_drvdata(pdev, info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | |
| 743 | spin_lock_init(&info->controller.lock); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 744 | init_waitqueue_head(&info->controller.wq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | |
| 746 | /* get the clock source and enable it */ |
| 747 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 748 | info->clk = clk_get(&pdev->dev, "nand"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 749 | if (IS_ERR(info->clk)) { |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 750 | dev_err(&pdev->dev, "failed to get clock\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 751 | err = -ENOENT; |
| 752 | goto exit_error; |
| 753 | } |
| 754 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 755 | clk_enable(info->clk); |
| 756 | |
| 757 | /* allocate and map the resource */ |
| 758 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 759 | /* currently we assume we have the one resource */ |
| 760 | res = pdev->resource; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 761 | size = res->end - res->start + 1; |
| 762 | |
| 763 | info->area = request_mem_region(res->start, size, pdev->name); |
| 764 | |
| 765 | if (info->area == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 766 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 767 | err = -ENOENT; |
| 768 | goto exit_error; |
| 769 | } |
| 770 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 771 | info->device = &pdev->dev; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 772 | info->platform = plat; |
| 773 | info->regs = ioremap(res->start, size); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 774 | info->cpu_type = cpu_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 775 | |
| 776 | if (info->regs == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 777 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 778 | err = -EIO; |
| 779 | goto exit_error; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 780 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 782 | dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 783 | |
| 784 | /* initialise the hardware */ |
| 785 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 786 | err = s3c2410_nand_inithw(info, pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 787 | if (err != 0) |
| 788 | goto exit_error; |
| 789 | |
| 790 | sets = (plat != NULL) ? plat->sets : NULL; |
| 791 | nr_sets = (plat != NULL) ? plat->nr_sets : 1; |
| 792 | |
| 793 | info->mtd_count = nr_sets; |
| 794 | |
| 795 | /* allocate our information */ |
| 796 | |
| 797 | size = nr_sets * sizeof(*info->mtds); |
| 798 | info->mtds = kmalloc(size, GFP_KERNEL); |
| 799 | if (info->mtds == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 800 | dev_err(&pdev->dev, "failed to allocate mtd storage\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 801 | err = -ENOMEM; |
| 802 | goto exit_error; |
| 803 | } |
| 804 | |
| 805 | memzero(info->mtds, size); |
| 806 | |
| 807 | /* initialise all possible chips */ |
| 808 | |
| 809 | nmtd = info->mtds; |
| 810 | |
| 811 | for (setno = 0; setno < nr_sets; setno++, nmtd++) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 812 | pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 813 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 814 | s3c2410_nand_init_chip(info, nmtd, sets); |
| 815 | |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 816 | nmtd->scan_res = nand_scan_ident(&nmtd->mtd, |
| 817 | (sets) ? sets->nr_chips : 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 818 | |
| 819 | if (nmtd->scan_res == 0) { |
Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 820 | s3c2410_nand_update_chip(info, nmtd); |
| 821 | nand_scan_tail(&nmtd->mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | s3c2410_nand_add_partition(info, nmtd, sets); |
| 823 | } |
| 824 | |
| 825 | if (sets != NULL) |
| 826 | sets++; |
| 827 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 828 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 829 | if (allow_clk_stop(info)) { |
| 830 | dev_info(&pdev->dev, "clock idle support enabled\n"); |
| 831 | clk_disable(info->clk); |
| 832 | } |
| 833 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 834 | pr_debug("initialised ok\n"); |
| 835 | return 0; |
| 836 | |
| 837 | exit_error: |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 838 | s3c2410_nand_remove(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 839 | |
| 840 | if (err == 0) |
| 841 | err = -EINVAL; |
| 842 | return err; |
| 843 | } |
| 844 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 845 | /* PM Support */ |
| 846 | #ifdef CONFIG_PM |
| 847 | |
| 848 | static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm) |
| 849 | { |
| 850 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
| 851 | |
| 852 | if (info) { |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 853 | info->save_sel = readl(info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 854 | |
| 855 | /* For the moment, we must ensure nFCE is high during |
| 856 | * the time we are suspended. This really should be |
| 857 | * handled by suspending the MTDs we are using, but |
| 858 | * that is currently not the case. */ |
| 859 | |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 860 | writel(info->save_sel | info->sel_bit, info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 861 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 862 | if (!allow_clk_stop(info)) |
| 863 | clk_disable(info->clk); |
| 864 | } |
| 865 | |
| 866 | return 0; |
| 867 | } |
| 868 | |
| 869 | static int s3c24xx_nand_resume(struct platform_device *dev) |
| 870 | { |
| 871 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 872 | unsigned long sel; |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 873 | |
| 874 | if (info) { |
| 875 | clk_enable(info->clk); |
| 876 | s3c2410_nand_inithw(info, dev); |
| 877 | |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 878 | /* Restore the state of the nFCE line. */ |
| 879 | |
Ben Dooks | 0916083 | 2008-04-15 11:36:18 +0100 | [diff] [blame] | 880 | sel = readl(info->sel_reg); |
| 881 | sel &= ~info->sel_bit; |
| 882 | sel |= info->save_sel & info->sel_bit; |
| 883 | writel(sel, info->sel_reg); |
Ben Dooks | 03680b1 | 2007-11-19 23:28:07 +0000 | [diff] [blame] | 884 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 885 | if (allow_clk_stop(info)) |
| 886 | clk_disable(info->clk); |
| 887 | } |
| 888 | |
| 889 | return 0; |
| 890 | } |
| 891 | |
| 892 | #else |
| 893 | #define s3c24xx_nand_suspend NULL |
| 894 | #define s3c24xx_nand_resume NULL |
| 895 | #endif |
| 896 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 897 | /* driver device registration */ |
| 898 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 899 | static int s3c2410_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 900 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 901 | return s3c24xx_nand_probe(dev, TYPE_S3C2410); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 902 | } |
| 903 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 904 | static int s3c2440_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 905 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 906 | return s3c24xx_nand_probe(dev, TYPE_S3C2440); |
| 907 | } |
| 908 | |
| 909 | static int s3c2412_nand_probe(struct platform_device *dev) |
| 910 | { |
| 911 | return s3c24xx_nand_probe(dev, TYPE_S3C2412); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 912 | } |
| 913 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 914 | static struct platform_driver s3c2410_nand_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 915 | .probe = s3c2410_nand_probe, |
| 916 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 917 | .suspend = s3c24xx_nand_suspend, |
| 918 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 919 | .driver = { |
| 920 | .name = "s3c2410-nand", |
| 921 | .owner = THIS_MODULE, |
| 922 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | }; |
| 924 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 925 | static struct platform_driver s3c2440_nand_driver = { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 926 | .probe = s3c2440_nand_probe, |
| 927 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 928 | .suspend = s3c24xx_nand_suspend, |
| 929 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 930 | .driver = { |
| 931 | .name = "s3c2440-nand", |
| 932 | .owner = THIS_MODULE, |
| 933 | }, |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 934 | }; |
| 935 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 936 | static struct platform_driver s3c2412_nand_driver = { |
| 937 | .probe = s3c2412_nand_probe, |
| 938 | .remove = s3c2410_nand_remove, |
| 939 | .suspend = s3c24xx_nand_suspend, |
| 940 | .resume = s3c24xx_nand_resume, |
| 941 | .driver = { |
| 942 | .name = "s3c2412-nand", |
| 943 | .owner = THIS_MODULE, |
| 944 | }, |
| 945 | }; |
| 946 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 947 | static int __init s3c2410_nand_init(void) |
| 948 | { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 949 | printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n"); |
| 950 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 951 | platform_driver_register(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 952 | platform_driver_register(&s3c2440_nand_driver); |
| 953 | return platform_driver_register(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 954 | } |
| 955 | |
| 956 | static void __exit s3c2410_nand_exit(void) |
| 957 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 958 | platform_driver_unregister(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 959 | platform_driver_unregister(&s3c2440_nand_driver); |
| 960 | platform_driver_unregister(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 961 | } |
| 962 | |
| 963 | module_init(s3c2410_nand_init); |
| 964 | module_exit(s3c2410_nand_exit); |
| 965 | |
| 966 | MODULE_LICENSE("GPL"); |
| 967 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 968 | MODULE_DESCRIPTION("S3C24XX MTD NAND driver"); |
Kay Sievers | 1ff1842 | 2008-04-18 13:44:27 -0700 | [diff] [blame] | 969 | MODULE_ALIAS("platform:s3c2410-nand"); |
| 970 | MODULE_ALIAS("platform:s3c2412-nand"); |
| 971 | MODULE_ALIAS("platform:s3c2440-nand"); |