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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Jean Delvared05321e2015-02-23 10:05:21 +010026 depends on ARM || ARM64 || COMPILE_TEST
Will Deacone1d3c0f2014-11-14 17:18:23 +000027 help
28 Enable support for the ARM long descriptor pagetable format.
29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
30 sizes at both stage-1 and stage-2, as well as address spaces
31 up to 48-bits in size.
32
Will Deaconfe4b9912014-11-17 23:31:12 +000033config IOMMU_IO_PGTABLE_LPAE_SELFTEST
34 bool "LPAE selftests"
35 depends on IOMMU_IO_PGTABLE_LPAE
36 help
37 Enable self-tests for LPAE page table allocator. This performs
38 a series of page-table consistency checks during boot.
39
40 If unsure, say N here.
41
Will Deaconfdb1d7b2014-11-14 17:16:49 +000042endmenu
43
Robin Murphy114150d2015-01-12 17:51:13 +000044config IOMMU_IOVA
45 bool
46
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030047config OF_IOMMU
48 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010049 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030050
Varun Sethi695093e2013-07-15 10:20:57 +053051config FSL_PAMU
52 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010053 depends on PPC32
54 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053055 select IOMMU_API
56 select GENERIC_ALLOCATOR
57 help
58 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
59 PAMU can authorize memory access, remap the memory address, and remap I/O
60 transaction types.
61
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030062# MSM IOMMU support
63config MSM_IOMMU
64 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010065 depends on ARM
66 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010067 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030068 select IOMMU_API
69 help
70 Support for the IOMMUs found on certain Qualcomm SOCs.
71 These IOMMUs allow virtualization of the address space used by most
72 cores within the multimedia subsystem.
73
74 If unsure, say N here.
75
76config IOMMU_PGTABLES_L2
77 def_bool y
78 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030079
80# AMD IOMMU support
81config AMD_IOMMU
82 bool "AMD IOMMU support"
83 select SWIOTLB
84 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010085 select PCI_ATS
86 select PCI_PRI
87 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030088 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020089 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030090 ---help---
91 With this option you can enable support for AMD IOMMU hardware in
92 your system. An IOMMU is a hardware component which provides
93 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090094 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030095 system from misbehaving device drivers or hardware.
96
97 You can find out if your system has an AMD IOMMU if you look into
98 your BIOS for an option to enable it or if you have an IVRS ACPI
99 table.
100
101config AMD_IOMMU_STATS
102 bool "Export AMD IOMMU statistics to debugfs"
103 depends on AMD_IOMMU
104 select DEBUG_FS
105 ---help---
106 This option enables code in the AMD IOMMU driver to collect various
107 statistics about whats happening in the driver and exports that
108 information to userspace via debugfs.
109 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300110
Joerg Roedele3c495c2011-11-09 12:31:15 +0100111config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800112 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200113 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100114 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100115 ---help---
116 This option enables support for the AMD IOMMUv2 features of the IOMMU
117 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900118 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100119
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300120# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700121config DMAR_TABLE
122 bool
123
124config INTEL_IOMMU
125 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300126 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
127 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000128 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700129 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300130 help
131 DMA remapping (DMAR) devices support enables independent address
132 translations for Direct Memory Access (DMA) from devices.
133 These DMA remapping devices are reported via ACPI tables
134 and include PCI device scope covered by these DMA
135 remapping devices.
136
Suresh Siddhad3f13812011-08-23 17:05:25 -0700137config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300138 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700139 prompt "Enable Intel DMA Remapping Devices by default"
140 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300141 help
142 Selecting this option will enable a DMAR device at boot time if
143 one is found. If this option is not selected, DMAR support can
144 be enabled by passing intel_iommu=on to the kernel.
145
Suresh Siddhad3f13812011-08-23 17:05:25 -0700146config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300147 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700148 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300149 ---help---
150 Current Graphics drivers tend to use physical address
151 for DMA and avoid using DMA APIs. Setting this config
152 option permits the IOMMU driver to set a unity map for
153 all the OS-visible memory. Hence the driver can continue
154 to use physical addresses for DMA, at least until this
155 option is removed in the 2.6.32 kernel.
156
Suresh Siddhad3f13812011-08-23 17:05:25 -0700157config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300158 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700159 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300160 ---help---
161 Floppy disk drivers are known to bypass DMA API calls
162 thereby failing to work when IOMMU is enabled. This
163 workaround will setup a 1:1 mapping for the first
164 16MiB to make floppy (an ISA device) work.
165
Suresh Siddhad3f13812011-08-23 17:05:25 -0700166config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800167 bool "Support for Interrupt Remapping"
168 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700169 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300170 ---help---
171 Supports Interrupt remapping for IO-APIC and MSI devices.
172 To use x2apic mode in the CPU's which support x2APIC enhancements or
173 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200174
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300175# OMAP IOMMU support
176config OMAP_IOMMU
177 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100178 depends on ARM && MMU
179 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300180 select IOMMU_API
181
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300182config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500183 bool "Export OMAP IOMMU internals in DebugFS"
184 depends on OMAP_IOMMU && DEBUG_FS
185 ---help---
186 Select this to see extensive information about
187 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300188
Suman Anna61c75352014-10-22 17:22:30 -0500189 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300190
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800191config ROCKCHIP_IOMMU
192 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100193 depends on ARM
194 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800195 select IOMMU_API
196 select ARM_DMA_USE_IOMMU
197 help
198 Support for IOMMUs found on Rockchip rk32xx SOCs.
199 These IOMMUs allow virtualization of the address space used by most
200 cores within the multimedia subsystem.
201 Say Y here if you are using a Rockchip SoC that includes an IOMMU
202 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300203
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200204config TEGRA_IOMMU_GART
205 bool "Tegra GART IOMMU Support"
206 depends on ARCH_TEGRA_2x_SOC
207 select IOMMU_API
208 help
209 Enables support for remapping discontiguous physical memory
210 shared with the operating system into contiguous I/O virtual
211 space through the GART (Graphics Address Relocation Table)
212 hardware included on Tegra SoCs.
213
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200214config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200215 bool "NVIDIA Tegra SMMU Support"
216 depends on ARCH_TEGRA
217 depends on TEGRA_AHB
218 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200219 select IOMMU_API
220 help
Thierry Reding89184652014-04-16 09:24:44 +0200221 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
222 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200223
KyongHo Cho2a965362012-05-12 05:56:09 +0900224config EXYNOS_IOMMU
225 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100226 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900227 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530228 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900229 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530230 Support for the IOMMU (System MMU) of Samsung Exynos application
231 processor family. This enables H/W multimedia accelerators to see
232 non-linear physical memory chunks as linear memory in their
233 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900234
235 If unsure, say N here.
236
237config EXYNOS_IOMMU_DEBUG
238 bool "Debugging log for Exynos IOMMU"
239 depends on EXYNOS_IOMMU
240 help
241 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530242 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900243
Sachin Kamat5455d702014-05-22 09:50:55 +0530244 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900245
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900246config SHMOBILE_IPMMU
247 bool
248
249config SHMOBILE_IPMMU_TLB
250 bool
251
252config SHMOBILE_IOMMU
253 bool "IOMMU for Renesas IPMMU/IPMMUI"
254 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100255 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100256 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900257 select IOMMU_API
258 select ARM_DMA_USE_IOMMU
259 select SHMOBILE_IPMMU
260 select SHMOBILE_IPMMU_TLB
261 help
262 Support for Renesas IPMMU/IPMMUI. This option enables
263 remapping of DMA memory accesses from all of the IP blocks
264 on the ICB.
265
266 Warning: Drivers (including userspace drivers of UIO
267 devices) of the IP blocks on the ICB *must* use addresses
268 allocated from the IPMMU (iova) for DMA with this option
269 enabled.
270
271 If unsure, say N.
272
273choice
274 prompt "IPMMU/IPMMUI address space size"
275 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
276 depends on SHMOBILE_IOMMU
277 help
278 This option sets IPMMU/IPMMUI address space size by
279 adjusting the 1st level page table size. The page table size
280 is calculated as follows:
281
282 page table size = number of page table entries * 4 bytes
283 number of page table entries = address space size / 1 MiB
284
285 For example, when the address space size is 2048 MiB, the
286 1st level page table size is 8192 bytes.
287
288 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
289 bool "2 GiB"
290
291 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
292 bool "1 GiB"
293
294 config SHMOBILE_IOMMU_ADDRSIZE_512MB
295 bool "512 MiB"
296
297 config SHMOBILE_IOMMU_ADDRSIZE_256MB
298 bool "256 MiB"
299
300 config SHMOBILE_IOMMU_ADDRSIZE_128MB
301 bool "128 MiB"
302
303 config SHMOBILE_IOMMU_ADDRSIZE_64MB
304 bool "64 MiB"
305
306 config SHMOBILE_IOMMU_ADDRSIZE_32MB
307 bool "32 MiB"
308
309endchoice
310
311config SHMOBILE_IOMMU_L1SIZE
312 int
313 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
314 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
315 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
316 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
317 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
318 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
319 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
320
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200321config IPMMU_VMSA
322 bool "Renesas VMSA-compatible IPMMU"
323 depends on ARM_LPAE
324 depends on ARCH_SHMOBILE || COMPILE_TEST
325 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200326 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200327 select ARM_DMA_USE_IOMMU
328 help
329 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
330 R-Mobile APE6 and R-Car H2/M2 SoCs.
331
332 If unsure, say N.
333
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000334config SPAPR_TCE_IOMMU
335 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000336 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000337 select IOMMU_API
338 help
339 Enables bits of IOMMU API required by VFIO. The iommu_ops
340 is not implemented as it is not necessary for VFIO.
341
Will Deacon48ec83b2015-05-27 17:25:59 +0100342# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100343config ARM_SMMU
344 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100345 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100346 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000347 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100348 select ARM_DMA_USE_IOMMU if ARM
349 help
350 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000351 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100352
353 Say Y here if your SoC includes an IOMMU device implementing
354 the ARM SMMU architecture.
355
Will Deacon48ec83b2015-05-27 17:25:59 +0100356config ARM_SMMU_V3
357 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
358 depends on ARM64 && PCI
359 select IOMMU_API
360 select IOMMU_IO_PGTABLE_LPAE
361 help
362 Support for implementations of the ARM System MMU architecture
363 version 3 providing translation support to a PCIe root complex.
364
365 Say Y here if your system includes an IOMMU device implementing
366 the ARM SMMUv3 architecture.
367
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300368endif # IOMMU_SUPPORT