Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * Intel Management Engine Interface (Intel MEI) Linux driver |
Tomas Winkler | 733ba91 | 2012-02-09 19:25:53 +0200 | [diff] [blame] | 4 | * Copyright (c) 2003-2012, Intel Corporation. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | * more details. |
| 14 | * |
| 15 | */ |
| 16 | |
| 17 | #include <linux/pci.h> |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 18 | |
| 19 | #include <linux/kthread.h> |
| 20 | #include <linux/interrupt.h> |
Tomas Winkler | 47a7380 | 2012-12-25 19:06:03 +0200 | [diff] [blame] | 21 | |
| 22 | #include "mei_dev.h" |
Tomas Winkler | 9dc64d6 | 2013-01-08 23:07:17 +0200 | [diff] [blame] | 23 | #include "hw-me.h" |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 24 | |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 25 | #include "hbm.h" |
| 26 | |
| 27 | |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 28 | /** |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 29 | * mei_me_reg_read - Reads 32bit data from the mei device |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 30 | * |
| 31 | * @dev: the device structure |
| 32 | * @offset: offset from which to read the data |
| 33 | * |
| 34 | * returns register value (u32) |
| 35 | */ |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 36 | static inline u32 mei_me_reg_read(const struct mei_me_hw *hw, |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 37 | unsigned long offset) |
| 38 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 39 | return ioread32(hw->mem_addr + offset); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 40 | } |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 41 | |
| 42 | |
| 43 | /** |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 44 | * mei_me_reg_write - Writes 32bit data to the mei device |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 45 | * |
| 46 | * @dev: the device structure |
| 47 | * @offset: offset from which to write the data |
| 48 | * @value: register value to write (u32) |
| 49 | */ |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 50 | static inline void mei_me_reg_write(const struct mei_me_hw *hw, |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 51 | unsigned long offset, u32 value) |
| 52 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 53 | iowrite32(value, hw->mem_addr + offset); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 54 | } |
| 55 | |
| 56 | /** |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 57 | * mei_me_mecbrw_read - Reads 32bit data from ME circular buffer |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 58 | * read window register |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 59 | * |
| 60 | * @dev: the device structure |
| 61 | * |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 62 | * returns ME_CB_RW register value (u32) |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 63 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 64 | static u32 mei_me_mecbrw_read(const struct mei_device *dev) |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 65 | { |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 66 | return mei_me_reg_read(to_me_hw(dev), ME_CB_RW); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 67 | } |
| 68 | /** |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 69 | * mei_me_mecsr_read - Reads 32bit data from the ME CSR |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 70 | * |
| 71 | * @dev: the device structure |
| 72 | * |
| 73 | * returns ME_CSR_HA register value (u32) |
| 74 | */ |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 75 | static inline u32 mei_me_mecsr_read(const struct mei_me_hw *hw) |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 76 | { |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 77 | return mei_me_reg_read(hw, ME_CSR_HA); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | /** |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 81 | * mei_hcsr_read - Reads 32bit data from the host CSR |
| 82 | * |
| 83 | * @dev: the device structure |
| 84 | * |
| 85 | * returns H_CSR register value (u32) |
| 86 | */ |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 87 | static inline u32 mei_hcsr_read(const struct mei_me_hw *hw) |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 88 | { |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 89 | return mei_me_reg_read(hw, H_CSR); |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 90 | } |
| 91 | |
| 92 | /** |
| 93 | * mei_hcsr_set - writes H_CSR register to the mei device, |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 94 | * and ignores the H_IS bit for it is write-one-to-zero. |
| 95 | * |
| 96 | * @dev: the device structure |
| 97 | */ |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 98 | static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 99 | { |
Tomas Winkler | 88eb99f | 2013-01-08 23:07:30 +0200 | [diff] [blame] | 100 | hcsr &= ~H_IS; |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 101 | mei_me_reg_write(hw, H_CSR, hcsr); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 102 | } |
| 103 | |
Tomas Winkler | e7e0c23 | 2013-01-08 23:07:31 +0200 | [diff] [blame] | 104 | |
| 105 | /** |
Masanari Iida | 393b148 | 2013-04-05 01:05:05 +0900 | [diff] [blame] | 106 | * mei_me_hw_config - configure hw dependent settings |
Tomas Winkler | e7e0c23 | 2013-01-08 23:07:31 +0200 | [diff] [blame] | 107 | * |
| 108 | * @dev: mei device |
| 109 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 110 | static void mei_me_hw_config(struct mei_device *dev) |
Tomas Winkler | e7e0c23 | 2013-01-08 23:07:31 +0200 | [diff] [blame] | 111 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 112 | u32 hcsr = mei_hcsr_read(to_me_hw(dev)); |
Tomas Winkler | e7e0c23 | 2013-01-08 23:07:31 +0200 | [diff] [blame] | 113 | /* Doesn't change in runtime */ |
| 114 | dev->hbuf_depth = (hcsr & H_CBD) >> 24; |
| 115 | } |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 116 | /** |
Tomas Winkler | d025284 | 2013-01-08 23:07:24 +0200 | [diff] [blame] | 117 | * mei_clear_interrupts - clear and stop interrupts |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 118 | * |
| 119 | * @dev: the device structure |
| 120 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 121 | static void mei_me_intr_clear(struct mei_device *dev) |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 122 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 123 | struct mei_me_hw *hw = to_me_hw(dev); |
| 124 | u32 hcsr = mei_hcsr_read(hw); |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame] | 125 | if ((hcsr & H_IS) == H_IS) |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 126 | mei_me_reg_write(hw, H_CSR, hcsr); |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 127 | } |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 128 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 129 | * mei_me_intr_enable - enables mei device interrupts |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 130 | * |
| 131 | * @dev: the device structure |
| 132 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 133 | static void mei_me_intr_enable(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 134 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 135 | struct mei_me_hw *hw = to_me_hw(dev); |
| 136 | u32 hcsr = mei_hcsr_read(hw); |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame] | 137 | hcsr |= H_IE; |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 138 | mei_hcsr_set(hw, hcsr); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | /** |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 142 | * mei_disable_interrupts - disables mei device interrupts |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 143 | * |
| 144 | * @dev: the device structure |
| 145 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 146 | static void mei_me_intr_disable(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 147 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 148 | struct mei_me_hw *hw = to_me_hw(dev); |
| 149 | u32 hcsr = mei_hcsr_read(hw); |
Tomas Winkler | 9ea73dd | 2013-01-08 23:07:28 +0200 | [diff] [blame] | 150 | hcsr &= ~H_IE; |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 151 | mei_hcsr_set(hw, hcsr); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 152 | } |
| 153 | |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 154 | /** |
Tomas Winkler | 68f8ea1 | 2013-03-10 13:56:07 +0200 | [diff] [blame] | 155 | * mei_me_hw_reset_release - release device from the reset |
| 156 | * |
| 157 | * @dev: the device structure |
| 158 | */ |
| 159 | static void mei_me_hw_reset_release(struct mei_device *dev) |
| 160 | { |
| 161 | struct mei_me_hw *hw = to_me_hw(dev); |
| 162 | u32 hcsr = mei_hcsr_read(hw); |
| 163 | |
| 164 | hcsr |= H_IG; |
| 165 | hcsr &= ~H_RST; |
| 166 | mei_hcsr_set(hw, hcsr); |
| 167 | } |
| 168 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 169 | * mei_me_hw_reset - resets fw via mei csr register. |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 170 | * |
| 171 | * @dev: the device structure |
Masanari Iida | 393b148 | 2013-04-05 01:05:05 +0900 | [diff] [blame] | 172 | * @intr_enable: if interrupt should be enabled after reset. |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 173 | */ |
Tomas Winkler | c20c68d | 2013-06-23 10:42:49 +0300 | [diff] [blame] | 174 | static int mei_me_hw_reset(struct mei_device *dev, bool intr_enable) |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 175 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 176 | struct mei_me_hw *hw = to_me_hw(dev); |
| 177 | u32 hcsr = mei_hcsr_read(hw); |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 178 | |
Tomas Winkler | ff96066 | 2013-07-30 14:11:51 +0300 | [diff] [blame] | 179 | hcsr |= H_RST | H_IG | H_IS; |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 180 | |
| 181 | if (intr_enable) |
| 182 | hcsr |= H_IE; |
| 183 | else |
Tomas Winkler | ff96066 | 2013-07-30 14:11:51 +0300 | [diff] [blame] | 184 | hcsr &= ~H_IE; |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 185 | |
Tomas Winkler | ff96066 | 2013-07-30 14:11:51 +0300 | [diff] [blame] | 186 | mei_me_reg_write(hw, H_CSR, hcsr); |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 187 | |
Tomas Winkler | 68f8ea1 | 2013-03-10 13:56:07 +0200 | [diff] [blame] | 188 | if (dev->dev_state == MEI_DEV_POWER_DOWN) |
| 189 | mei_me_hw_reset_release(dev); |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 190 | |
Tomas Winkler | c20c68d | 2013-06-23 10:42:49 +0300 | [diff] [blame] | 191 | return 0; |
Tomas Winkler | adfba32 | 2013-01-08 23:07:27 +0200 | [diff] [blame] | 192 | } |
| 193 | |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 194 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 195 | * mei_me_host_set_ready - enable device |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 196 | * |
| 197 | * @dev - mei device |
| 198 | * returns bool |
| 199 | */ |
| 200 | |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 201 | static void mei_me_host_set_ready(struct mei_device *dev) |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 202 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 203 | struct mei_me_hw *hw = to_me_hw(dev); |
| 204 | hw->host_hw_state |= H_IE | H_IG | H_RDY; |
| 205 | mei_hcsr_set(hw, hw->host_hw_state); |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 206 | } |
| 207 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 208 | * mei_me_host_is_ready - check whether the host has turned ready |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 209 | * |
| 210 | * @dev - mei device |
| 211 | * returns bool |
| 212 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 213 | static bool mei_me_host_is_ready(struct mei_device *dev) |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 214 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 215 | struct mei_me_hw *hw = to_me_hw(dev); |
| 216 | hw->host_hw_state = mei_hcsr_read(hw); |
| 217 | return (hw->host_hw_state & H_RDY) == H_RDY; |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 218 | } |
| 219 | |
| 220 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 221 | * mei_me_hw_is_ready - check whether the me(hw) has turned ready |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 222 | * |
| 223 | * @dev - mei device |
| 224 | * returns bool |
| 225 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 226 | static bool mei_me_hw_is_ready(struct mei_device *dev) |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 227 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 228 | struct mei_me_hw *hw = to_me_hw(dev); |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 229 | hw->me_hw_state = mei_me_mecsr_read(hw); |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 230 | return (hw->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA; |
Tomas Winkler | 115ba28 | 2013-01-08 23:07:29 +0200 | [diff] [blame] | 231 | } |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 232 | |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 233 | static int mei_me_hw_ready_wait(struct mei_device *dev) |
| 234 | { |
| 235 | int err; |
| 236 | if (mei_me_hw_is_ready(dev)) |
| 237 | return 0; |
| 238 | |
Tomas Winkler | dab9bf4 | 2013-07-17 15:13:17 +0300 | [diff] [blame] | 239 | dev->recvd_hw_ready = false; |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 240 | mutex_unlock(&dev->device_lock); |
| 241 | err = wait_event_interruptible_timeout(dev->wait_hw_ready, |
Tomas Winkler | dab9bf4 | 2013-07-17 15:13:17 +0300 | [diff] [blame] | 242 | dev->recvd_hw_ready, |
| 243 | mei_secs_to_jiffies(MEI_INTEROP_TIMEOUT)); |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 244 | mutex_lock(&dev->device_lock); |
| 245 | if (!err && !dev->recvd_hw_ready) { |
Tomas Winkler | dab9bf4 | 2013-07-17 15:13:17 +0300 | [diff] [blame] | 246 | if (!err) |
| 247 | err = -ETIMEDOUT; |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 248 | dev_err(&dev->pdev->dev, |
Tomas Winkler | dab9bf4 | 2013-07-17 15:13:17 +0300 | [diff] [blame] | 249 | "wait hw ready failed. status = %d\n", err); |
| 250 | return err; |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 251 | } |
| 252 | |
| 253 | dev->recvd_hw_ready = false; |
| 254 | return 0; |
| 255 | } |
| 256 | |
| 257 | static int mei_me_hw_start(struct mei_device *dev) |
| 258 | { |
| 259 | int ret = mei_me_hw_ready_wait(dev); |
| 260 | if (ret) |
| 261 | return ret; |
| 262 | dev_dbg(&dev->pdev->dev, "hw is ready\n"); |
| 263 | |
| 264 | mei_me_host_set_ready(dev); |
| 265 | return ret; |
| 266 | } |
| 267 | |
| 268 | |
Tomas Winkler | 3a65dd4 | 2012-12-25 19:06:06 +0200 | [diff] [blame] | 269 | /** |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 270 | * mei_hbuf_filled_slots - gets number of device filled buffer slots |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 271 | * |
Sedat Dilek | 7353f85 | 2013-01-17 19:54:15 +0100 | [diff] [blame] | 272 | * @dev: the device structure |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 273 | * |
| 274 | * returns number of filled slots |
| 275 | */ |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 276 | static unsigned char mei_hbuf_filled_slots(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 277 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 278 | struct mei_me_hw *hw = to_me_hw(dev); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 279 | char read_ptr, write_ptr; |
| 280 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 281 | hw->host_hw_state = mei_hcsr_read(hw); |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 282 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 283 | read_ptr = (char) ((hw->host_hw_state & H_CBRP) >> 8); |
| 284 | write_ptr = (char) ((hw->host_hw_state & H_CBWP) >> 16); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 285 | |
| 286 | return (unsigned char) (write_ptr - read_ptr); |
| 287 | } |
| 288 | |
| 289 | /** |
Masanari Iida | 393b148 | 2013-04-05 01:05:05 +0900 | [diff] [blame] | 290 | * mei_me_hbuf_is_empty - checks if host buffer is empty. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 291 | * |
| 292 | * @dev: the device structure |
| 293 | * |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 294 | * returns true if empty, false - otherwise. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 295 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 296 | static bool mei_me_hbuf_is_empty(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 297 | { |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 298 | return mei_hbuf_filled_slots(dev) == 0; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 299 | } |
| 300 | |
| 301 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 302 | * mei_me_hbuf_empty_slots - counts write empty slots. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 303 | * |
| 304 | * @dev: the device structure |
| 305 | * |
| 306 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise empty slots count |
| 307 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 308 | static int mei_me_hbuf_empty_slots(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 309 | { |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 310 | unsigned char filled_slots, empty_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 311 | |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 312 | filled_slots = mei_hbuf_filled_slots(dev); |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 313 | empty_slots = dev->hbuf_depth - filled_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 314 | |
| 315 | /* check for overflow */ |
Tomas Winkler | 24aadc8 | 2012-06-25 23:46:27 +0300 | [diff] [blame] | 316 | if (filled_slots > dev->hbuf_depth) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 317 | return -EOVERFLOW; |
| 318 | |
| 319 | return empty_slots; |
| 320 | } |
| 321 | |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 322 | static size_t mei_me_hbuf_max_len(const struct mei_device *dev) |
| 323 | { |
| 324 | return dev->hbuf_depth * sizeof(u32) - sizeof(struct mei_msg_hdr); |
| 325 | } |
| 326 | |
| 327 | |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 328 | /** |
| 329 | * mei_write_message - writes a message to mei device. |
| 330 | * |
| 331 | * @dev: the device structure |
Sedat Dilek | 7353f85 | 2013-01-17 19:54:15 +0100 | [diff] [blame] | 332 | * @header: mei HECI header of message |
Tomas Winkler | 438763f | 2012-12-25 19:05:59 +0200 | [diff] [blame] | 333 | * @buf: message payload will be written |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 334 | * |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 335 | * This function returns -EIO if write has failed |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 336 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 337 | static int mei_me_write_message(struct mei_device *dev, |
| 338 | struct mei_msg_hdr *header, |
| 339 | unsigned char *buf) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 340 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 341 | struct mei_me_hw *hw = to_me_hw(dev); |
Tomas Winkler | c8c8d08 | 2013-03-11 18:27:02 +0200 | [diff] [blame] | 342 | unsigned long rem; |
Tomas Winkler | 438763f | 2012-12-25 19:05:59 +0200 | [diff] [blame] | 343 | unsigned long length = header->length; |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 344 | u32 *reg_buf = (u32 *)buf; |
Tomas Winkler | 88eb99f | 2013-01-08 23:07:30 +0200 | [diff] [blame] | 345 | u32 hcsr; |
Tomas Winkler | c8c8d08 | 2013-03-11 18:27:02 +0200 | [diff] [blame] | 346 | u32 dw_cnt; |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 347 | int i; |
| 348 | int empty_slots; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 349 | |
Tomas Winkler | 15d4acc | 2012-12-25 19:06:00 +0200 | [diff] [blame] | 350 | dev_dbg(&dev->pdev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header)); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 351 | |
Tomas Winkler | 726917f | 2012-06-25 23:46:28 +0300 | [diff] [blame] | 352 | empty_slots = mei_hbuf_empty_slots(dev); |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 353 | dev_dbg(&dev->pdev->dev, "empty slots = %hu.\n", empty_slots); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 354 | |
Tomas Winkler | 7bdf72d | 2012-07-04 19:24:52 +0300 | [diff] [blame] | 355 | dw_cnt = mei_data2slots(length); |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 356 | if (empty_slots < 0 || dw_cnt > empty_slots) |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 357 | return -EIO; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 358 | |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 359 | mei_me_reg_write(hw, H_CB_WW, *((u32 *) header)); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 360 | |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 361 | for (i = 0; i < length / 4; i++) |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 362 | mei_me_reg_write(hw, H_CB_WW, reg_buf[i]); |
Tomas Winkler | 169d133 | 2012-06-19 09:13:35 +0300 | [diff] [blame] | 363 | |
| 364 | rem = length & 0x3; |
| 365 | if (rem > 0) { |
| 366 | u32 reg = 0; |
| 367 | memcpy(®, &buf[length - rem], rem); |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 368 | mei_me_reg_write(hw, H_CB_WW, reg); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 369 | } |
| 370 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 371 | hcsr = mei_hcsr_read(hw) | H_IG; |
| 372 | mei_hcsr_set(hw, hcsr); |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 373 | if (!mei_me_hw_is_ready(dev)) |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 374 | return -EIO; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 375 | |
Tomas Winkler | 1ccb7b6 | 2012-03-14 14:39:42 +0200 | [diff] [blame] | 376 | return 0; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 377 | } |
| 378 | |
| 379 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 380 | * mei_me_count_full_read_slots - counts read full slots. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 381 | * |
| 382 | * @dev: the device structure |
| 383 | * |
| 384 | * returns -1(ESLOTS_OVERFLOW) if overflow, otherwise filled slots count |
| 385 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 386 | static int mei_me_count_full_read_slots(struct mei_device *dev) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 387 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 388 | struct mei_me_hw *hw = to_me_hw(dev); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 389 | char read_ptr, write_ptr; |
| 390 | unsigned char buffer_depth, filled_slots; |
| 391 | |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 392 | hw->me_hw_state = mei_me_mecsr_read(hw); |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 393 | buffer_depth = (unsigned char)((hw->me_hw_state & ME_CBD_HRA) >> 24); |
| 394 | read_ptr = (char) ((hw->me_hw_state & ME_CBRP_HRA) >> 8); |
| 395 | write_ptr = (char) ((hw->me_hw_state & ME_CBWP_HRA) >> 16); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 396 | filled_slots = (unsigned char) (write_ptr - read_ptr); |
| 397 | |
| 398 | /* check for overflow */ |
| 399 | if (filled_slots > buffer_depth) |
| 400 | return -EOVERFLOW; |
| 401 | |
| 402 | dev_dbg(&dev->pdev->dev, "filled_slots =%08x\n", filled_slots); |
| 403 | return (int)filled_slots; |
| 404 | } |
| 405 | |
| 406 | /** |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 407 | * mei_me_read_slots - reads a message from mei device. |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 408 | * |
| 409 | * @dev: the device structure |
| 410 | * @buffer: message buffer will be written |
| 411 | * @buffer_length: message size will be read |
| 412 | */ |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 413 | static int mei_me_read_slots(struct mei_device *dev, unsigned char *buffer, |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 414 | unsigned long buffer_length) |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 415 | { |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 416 | struct mei_me_hw *hw = to_me_hw(dev); |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 417 | u32 *reg_buf = (u32 *)buffer; |
Tomas Winkler | 88eb99f | 2013-01-08 23:07:30 +0200 | [diff] [blame] | 418 | u32 hcsr; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 419 | |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 420 | for (; buffer_length >= sizeof(u32); buffer_length -= sizeof(u32)) |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 421 | *reg_buf++ = mei_me_mecbrw_read(dev); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 422 | |
| 423 | if (buffer_length > 0) { |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 424 | u32 reg = mei_me_mecbrw_read(dev); |
Tomas Winkler | edf1eed | 2012-02-09 19:25:54 +0200 | [diff] [blame] | 425 | memcpy(reg_buf, ®, buffer_length); |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 426 | } |
| 427 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 428 | hcsr = mei_hcsr_read(hw) | H_IG; |
| 429 | mei_hcsr_set(hw, hcsr); |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 430 | return 0; |
Oren Weil | 3ce7272 | 2011-05-15 13:43:43 +0300 | [diff] [blame] | 431 | } |
| 432 | |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 433 | /** |
| 434 | * mei_me_irq_quick_handler - The ISR of the MEI device |
| 435 | * |
| 436 | * @irq: The irq number |
| 437 | * @dev_id: pointer to the device structure |
| 438 | * |
| 439 | * returns irqreturn_t |
| 440 | */ |
| 441 | |
| 442 | irqreturn_t mei_me_irq_quick_handler(int irq, void *dev_id) |
| 443 | { |
| 444 | struct mei_device *dev = (struct mei_device *) dev_id; |
| 445 | struct mei_me_hw *hw = to_me_hw(dev); |
| 446 | u32 csr_reg = mei_hcsr_read(hw); |
| 447 | |
| 448 | if ((csr_reg & H_IS) != H_IS) |
| 449 | return IRQ_NONE; |
| 450 | |
| 451 | /* clear H_IS bit in H_CSR */ |
Tomas Winkler | b68301e | 2013-03-27 16:58:29 +0200 | [diff] [blame] | 452 | mei_me_reg_write(hw, H_CSR, csr_reg); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 453 | |
| 454 | return IRQ_WAKE_THREAD; |
| 455 | } |
| 456 | |
| 457 | /** |
| 458 | * mei_me_irq_thread_handler - function called after ISR to handle the interrupt |
| 459 | * processing. |
| 460 | * |
| 461 | * @irq: The irq number |
| 462 | * @dev_id: pointer to the device structure |
| 463 | * |
| 464 | * returns irqreturn_t |
| 465 | * |
| 466 | */ |
| 467 | irqreturn_t mei_me_irq_thread_handler(int irq, void *dev_id) |
| 468 | { |
| 469 | struct mei_device *dev = (struct mei_device *) dev_id; |
| 470 | struct mei_cl_cb complete_list; |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 471 | s32 slots; |
| 472 | int rets; |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 473 | |
| 474 | dev_dbg(&dev->pdev->dev, "function called after ISR to handle the interrupt processing.\n"); |
| 475 | /* initialize our complete list */ |
| 476 | mutex_lock(&dev->device_lock); |
| 477 | mei_io_list_init(&complete_list); |
| 478 | |
| 479 | /* Ack the interrupt here |
| 480 | * In case of MSI we don't go through the quick handler */ |
| 481 | if (pci_dev_msi_enabled(dev->pdev)) |
| 482 | mei_clear_interrupts(dev); |
| 483 | |
| 484 | /* check if ME wants a reset */ |
| 485 | if (!mei_hw_is_ready(dev) && |
Bill Nottingham | 0cfee51 | 2013-04-19 22:01:36 +0300 | [diff] [blame] | 486 | dev->dev_state != MEI_DEV_RESETTING && |
Tomas Winkler | 315a383 | 2013-07-17 15:13:15 +0300 | [diff] [blame] | 487 | dev->dev_state != MEI_DEV_INITIALIZING && |
| 488 | dev->dev_state != MEI_DEV_POWER_DOWN && |
| 489 | dev->dev_state != MEI_DEV_POWER_UP) { |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 490 | dev_dbg(&dev->pdev->dev, "FW not ready.\n"); |
| 491 | mei_reset(dev, 1); |
| 492 | mutex_unlock(&dev->device_lock); |
| 493 | return IRQ_HANDLED; |
| 494 | } |
| 495 | |
| 496 | /* check if we need to start the dev */ |
| 497 | if (!mei_host_is_ready(dev)) { |
| 498 | if (mei_hw_is_ready(dev)) { |
| 499 | dev_dbg(&dev->pdev->dev, "we need to start the dev.\n"); |
| 500 | |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 501 | dev->recvd_hw_ready = true; |
| 502 | wake_up_interruptible(&dev->wait_hw_ready); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 503 | |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 504 | mutex_unlock(&dev->device_lock); |
| 505 | return IRQ_HANDLED; |
| 506 | } else { |
Tomas Winkler | 68f8ea1 | 2013-03-10 13:56:07 +0200 | [diff] [blame] | 507 | dev_dbg(&dev->pdev->dev, "Reset Completed.\n"); |
| 508 | mei_me_hw_reset_release(dev); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 509 | mutex_unlock(&dev->device_lock); |
| 510 | return IRQ_HANDLED; |
| 511 | } |
| 512 | } |
| 513 | /* check slots available for reading */ |
| 514 | slots = mei_count_full_read_slots(dev); |
| 515 | while (slots > 0) { |
| 516 | /* we have urgent data to send so break the read */ |
| 517 | if (dev->wr_ext_msg.hdr.length) |
| 518 | break; |
| 519 | dev_dbg(&dev->pdev->dev, "slots =%08x\n", slots); |
| 520 | dev_dbg(&dev->pdev->dev, "call mei_irq_read_handler.\n"); |
| 521 | rets = mei_irq_read_handler(dev, &complete_list, &slots); |
| 522 | if (rets) |
| 523 | goto end; |
| 524 | } |
| 525 | rets = mei_irq_write_handler(dev, &complete_list); |
| 526 | end: |
| 527 | dev_dbg(&dev->pdev->dev, "end of bottom half function.\n"); |
Tomas Winkler | 330dd7d | 2013-02-06 14:06:43 +0200 | [diff] [blame] | 528 | dev->hbuf_is_ready = mei_hbuf_is_ready(dev); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 529 | |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 530 | mutex_unlock(&dev->device_lock); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 531 | |
Tomas Winkler | 4c6e22b | 2013-03-17 11:41:20 +0200 | [diff] [blame] | 532 | mei_irq_compl_handler(dev, &complete_list); |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 533 | |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 534 | return IRQ_HANDLED; |
| 535 | } |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 536 | static const struct mei_hw_ops mei_me_hw_ops = { |
| 537 | |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 538 | .host_is_ready = mei_me_host_is_ready, |
| 539 | |
| 540 | .hw_is_ready = mei_me_hw_is_ready, |
| 541 | .hw_reset = mei_me_hw_reset, |
Tomas Winkler | aafae7e | 2013-03-11 18:27:03 +0200 | [diff] [blame] | 542 | .hw_config = mei_me_hw_config, |
| 543 | .hw_start = mei_me_hw_start, |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 544 | |
| 545 | .intr_clear = mei_me_intr_clear, |
| 546 | .intr_enable = mei_me_intr_enable, |
| 547 | .intr_disable = mei_me_intr_disable, |
| 548 | |
| 549 | .hbuf_free_slots = mei_me_hbuf_empty_slots, |
| 550 | .hbuf_is_ready = mei_me_hbuf_is_empty, |
| 551 | .hbuf_max_len = mei_me_hbuf_max_len, |
| 552 | |
| 553 | .write = mei_me_write_message, |
| 554 | |
| 555 | .rdbuf_full_slots = mei_me_count_full_read_slots, |
| 556 | .read_hdr = mei_me_mecbrw_read, |
| 557 | .read = mei_me_read_slots |
| 558 | }; |
| 559 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 560 | /** |
Masanari Iida | 393b148 | 2013-04-05 01:05:05 +0900 | [diff] [blame] | 561 | * mei_me_dev_init - allocates and initializes the mei device structure |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 562 | * |
| 563 | * @pdev: The pci device structure |
| 564 | * |
| 565 | * returns The mei_device_device pointer on success, NULL on failure. |
| 566 | */ |
| 567 | struct mei_device *mei_me_dev_init(struct pci_dev *pdev) |
| 568 | { |
| 569 | struct mei_device *dev; |
| 570 | |
| 571 | dev = kzalloc(sizeof(struct mei_device) + |
| 572 | sizeof(struct mei_me_hw), GFP_KERNEL); |
| 573 | if (!dev) |
| 574 | return NULL; |
| 575 | |
| 576 | mei_device_init(dev); |
| 577 | |
Tomas Winkler | 827eef5 | 2013-02-06 14:06:41 +0200 | [diff] [blame] | 578 | dev->ops = &mei_me_hw_ops; |
| 579 | |
Tomas Winkler | 52c3456 | 2013-02-06 14:06:40 +0200 | [diff] [blame] | 580 | dev->pdev = pdev; |
| 581 | return dev; |
| 582 | } |
Tomas Winkler | 06ecd64 | 2013-02-06 14:06:42 +0200 | [diff] [blame] | 583 | |