Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 1 | if ARCH_TEGRA |
| 2 | |
| 3 | comment "NVIDIA Tegra options" |
| 4 | |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 5 | config ARCH_TEGRA_2x_SOC |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 6 | bool "Enable support for Tegra20 family" |
Erik Gilling | 3c92db9 | 2010-03-15 19:40:06 -0700 | [diff] [blame] | 7 | select ARCH_REQUIRE_GPIOLIB |
Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 8 | select ARM_ERRATA_720789 |
| 9 | select ARM_ERRATA_742230 |
| 10 | select ARM_ERRATA_751472 |
| 11 | select ARM_ERRATA_754327 |
Arnd Bergmann | 8f90cce | 2012-08-16 09:36:04 +0000 | [diff] [blame] | 12 | select ARM_ERRATA_764369 if SMP |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 13 | select ARM_GIC |
| 14 | select CPU_FREQ_TABLE if CPU_FREQ |
| 15 | select CPU_V7 |
| 16 | select PINCTRL |
| 17 | select PINCTRL_TEGRA20 |
Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 18 | select PL310_ERRATA_727915 if CACHE_L2X0 |
| 19 | select PL310_ERRATA_769419 if CACHE_L2X0 |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 20 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
| 21 | select USB_ULPI if USB |
| 22 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 23 | help |
| 24 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
| 25 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
| 26 | |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 27 | config ARCH_TEGRA_3x_SOC |
| 28 | bool "Enable support for Tegra30 family" |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 29 | select ARCH_REQUIRE_GPIOLIB |
Stephen Warren | f35b431 | 2012-02-14 13:39:39 -0700 | [diff] [blame] | 30 | select ARM_ERRATA_743622 |
| 31 | select ARM_ERRATA_751472 |
| 32 | select ARM_ERRATA_754322 |
Arnd Bergmann | 8f90cce | 2012-08-16 09:36:04 +0000 | [diff] [blame] | 33 | select ARM_ERRATA_764369 if SMP |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 34 | select ARM_GIC |
Arnd Bergmann | 013df38 | 2012-03-02 15:58:28 -0500 | [diff] [blame] | 35 | select CPU_FREQ_TABLE if CPU_FREQ |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 36 | select CPU_V7 |
| 37 | select PINCTRL |
| 38 | select PINCTRL_TEGRA30 |
| 39 | select PL310_ERRATA_769419 if CACHE_L2X0 |
| 40 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
| 41 | select USB_ULPI if USB |
| 42 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
Peter De Schrijver | 44107d8 | 2011-12-14 17:03:25 +0200 | [diff] [blame] | 43 | help |
| 44 | Support for NVIDIA Tegra T30 processor family, based on the |
| 45 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 46 | |
Mike Rapoport | 77ffc14 | 2010-09-27 11:26:33 +0200 | [diff] [blame] | 47 | config TEGRA_PCI |
| 48 | bool "PCI Express support" |
Peter De Schrijver | b2bbbc4 | 2011-12-14 17:03:14 +0200 | [diff] [blame] | 49 | depends on ARCH_TEGRA_2x_SOC |
Mike Rapoport | 77ffc14 | 2010-09-27 11:26:33 +0200 | [diff] [blame] | 50 | select PCI |
| 51 | |
Hiroshi DOYU | 87d0bab | 2012-05-07 12:24:48 +0200 | [diff] [blame] | 52 | config TEGRA_AHB |
| 53 | bool "Enable AHB driver for NVIDIA Tegra SoCs" |
| 54 | default y |
| 55 | help |
| 56 | Adds AHB configuration functionality for NVIDIA Tegra SoCs, |
| 57 | which controls AHB bus master arbitration and some |
| 58 | perfomance parameters(priority, prefech size). |
| 59 | |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 60 | choice |
Stephen Warren | 80881da | 2012-03-26 12:49:57 -0600 | [diff] [blame] | 61 | prompt "Default low-level debug console UART" |
Erik Gilling | c5f8006 | 2010-01-21 16:53:02 -0800 | [diff] [blame] | 62 | default TEGRA_DEBUG_UART_NONE |
| 63 | |
| 64 | config TEGRA_DEBUG_UART_NONE |
| 65 | bool "None" |
| 66 | |
| 67 | config TEGRA_DEBUG_UARTA |
| 68 | bool "UART-A" |
| 69 | |
| 70 | config TEGRA_DEBUG_UARTB |
| 71 | bool "UART-B" |
| 72 | |
| 73 | config TEGRA_DEBUG_UARTC |
| 74 | bool "UART-C" |
| 75 | |
| 76 | config TEGRA_DEBUG_UARTD |
| 77 | bool "UART-D" |
| 78 | |
| 79 | config TEGRA_DEBUG_UARTE |
| 80 | bool "UART-E" |
| 81 | |
| 82 | endchoice |
| 83 | |
Stephen Warren | 80881da | 2012-03-26 12:49:57 -0600 | [diff] [blame] | 84 | choice |
| 85 | prompt "Automatic low-level debug console UART" |
| 86 | default TEGRA_DEBUG_UART_AUTO_NONE |
| 87 | |
| 88 | config TEGRA_DEBUG_UART_AUTO_NONE |
| 89 | bool "None" |
| 90 | |
| 91 | config TEGRA_DEBUG_UART_AUTO_ODMDATA |
| 92 | bool "Via ODMDATA" |
| 93 | help |
| 94 | Automatically determines which UART to use for low-level debug based |
| 95 | on the ODMDATA value. This value is part of the BCT, and is written |
| 96 | to the boot memory device using nvflash, or other flashing tool. |
| 97 | When bits 19:18 are 3, then bits 17:15 indicate which UART to use; |
| 98 | 0/1/2/3/4 are UART A/B/C/D/E. |
| 99 | |
| 100 | config TEGRA_DEBUG_UART_AUTO_SCRATCH |
| 101 | bool "Via UART scratch register" |
| 102 | help |
| 103 | Automatically determines which UART to use for low-level debug based |
| 104 | on the UART scratch register value. Some bootloaders put ASCII 'D' |
| 105 | in this register when they initialize their own console UART output. |
| 106 | Using this option allows the kernel to automatically pick the same |
| 107 | UART. |
| 108 | |
| 109 | endchoice |
| 110 | |
Colin Cross | efdf72a | 2011-02-12 18:22:49 -0800 | [diff] [blame] | 111 | config TEGRA_EMC_SCALING_ENABLE |
| 112 | bool "Enable scaling the memory frequency" |
Mark Brown | 3837686 | 2011-02-22 20:35:24 +0000 | [diff] [blame] | 113 | |
| 114 | endif |