Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1 | /****************************************************************************** |
| 2 | * |
| 3 | * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of version 2 of the GNU General Public License as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | ******************************************************************************/ |
| 15 | #define _HCI_HAL_INIT_C_ |
| 16 | |
| 17 | #include <osdep_service.h> |
| 18 | #include <drv_types.h> |
| 19 | #include <rtw_efuse.h> |
| 20 | |
| 21 | #include <HalPwrSeqCmd.h> |
| 22 | #include <Hal8723PwrSeq.h> |
| 23 | #include <rtl8723a_hal.h> |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 24 | #include <linux/ieee80211.h> |
| 25 | |
| 26 | #include <usb_ops.h> |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 27 | |
Jes Sorensen | 0e316c2 | 2014-11-30 16:05:05 -0500 | [diff] [blame] | 28 | static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 29 | enum rt_rf_power_state eRFPowerState); |
Jes Sorensen | 0e316c2 | 2014-11-30 16:05:05 -0500 | [diff] [blame] | 30 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 31 | static void |
| 32 | _ConfigChipOutEP(struct rtw_adapter *pAdapter, u8 NumOutPipe) |
| 33 | { |
| 34 | u8 value8; |
| 35 | struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); |
| 36 | |
| 37 | pHalData->OutEpQueueSel = 0; |
| 38 | pHalData->OutEpNumber = 0; |
| 39 | |
| 40 | /* Normal and High queue */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 41 | value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 1)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 42 | |
| 43 | if (value8 & USB_NORMAL_SIE_EP_MASK) { |
| 44 | pHalData->OutEpQueueSel |= TX_SELE_HQ; |
| 45 | pHalData->OutEpNumber++; |
| 46 | } |
| 47 | |
| 48 | if ((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK) { |
| 49 | pHalData->OutEpQueueSel |= TX_SELE_NQ; |
| 50 | pHalData->OutEpNumber++; |
| 51 | } |
| 52 | |
| 53 | /* Low queue */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 54 | value8 = rtl8723au_read8(pAdapter, (REG_NORMAL_SIE_EP + 2)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 55 | if (value8 & USB_NORMAL_SIE_EP_MASK) { |
| 56 | pHalData->OutEpQueueSel |= TX_SELE_LQ; |
| 57 | pHalData->OutEpNumber++; |
| 58 | } |
| 59 | |
| 60 | /* TODO: Error recovery for this case */ |
| 61 | /* RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), |
| 62 | ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", |
| 63 | (u32)NumOutPipe, (u32)pHalData->OutEpNumber)); */ |
| 64 | } |
| 65 | |
Jes Sorensen | 4a29315 | 2014-11-30 16:05:00 -0500 | [diff] [blame] | 66 | bool rtl8723au_chip_configure(struct rtw_adapter *padapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 67 | { |
Jes Sorensen | 4a29315 | 2014-11-30 16:05:00 -0500 | [diff] [blame] | 68 | struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter); |
| 69 | struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter); |
| 70 | u8 NumInPipe = pdvobjpriv->RtNumInPipes; |
| 71 | u8 NumOutPipe = pdvobjpriv->RtNumOutPipes; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 72 | |
Jes Sorensen | 4a29315 | 2014-11-30 16:05:00 -0500 | [diff] [blame] | 73 | _ConfigChipOutEP(padapter, NumOutPipe); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 74 | |
| 75 | /* Normal chip with one IN and one OUT doesn't have interrupt IN EP. */ |
| 76 | if (pHalData->OutEpNumber == 1) { |
| 77 | if (NumInPipe != 1) |
Jes Sorensen | 4a29315 | 2014-11-30 16:05:00 -0500 | [diff] [blame] | 78 | return false; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 79 | } |
| 80 | |
Jes Sorensen | 4a29315 | 2014-11-30 16:05:00 -0500 | [diff] [blame] | 81 | return Hal_MappingOutPipe23a(padapter, NumOutPipe); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 82 | } |
| 83 | |
Jes Sorensen | e04cd3f | 2014-05-16 10:04:44 +0200 | [diff] [blame] | 84 | static int _InitPowerOn(struct rtw_adapter *padapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 85 | { |
Jes Sorensen | a1cfeeb | 2014-11-30 16:05:01 -0500 | [diff] [blame] | 86 | u16 value16; |
| 87 | u8 value8; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 88 | |
| 89 | /* RSV_CTRL 0x1C[7:0] = 0x00 |
| 90 | unlock ISO/CLK/Power control register */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 91 | rtl8723au_write8(padapter, REG_RSV_CTRL, 0x0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 92 | |
| 93 | /* HW Power on sequence */ |
| 94 | if (!HalPwrSeqCmdParsing23a(padapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, |
| 95 | PWR_INTF_USB_MSK, rtl8723AU_card_enable_flow)) |
| 96 | return _FAIL; |
| 97 | |
| 98 | /* 0x04[19] = 1, suggest by Jackie 2011.05.09, reset 8051 */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 99 | value8 = rtl8723au_read8(padapter, REG_APS_FSMCO+2); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 100 | rtl8723au_write8(padapter, REG_APS_FSMCO + 2, value8 | BIT(3)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 101 | |
| 102 | /* Enable MAC DMA/WMAC/SCHEDULE/SEC block */ |
| 103 | /* Set CR bit10 to enable 32k calibration. Suggested by SD1 Gimmy. |
| 104 | Added by tynli. 2011.08.31. */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 105 | value16 = rtl8723au_read16(padapter, REG_CR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 106 | value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN | |
| 107 | PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | |
| 108 | ENSEC | CALTMR_EN); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 109 | rtl8723au_write16(padapter, REG_CR, value16); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 110 | |
| 111 | /* for Efuse PG, suggest by Jackie 2011.11.23 */ |
Jes Sorensen | 05f07e7 | 2014-05-16 10:03:44 +0200 | [diff] [blame] | 112 | PHY_SetBBReg(padapter, REG_EFUSE_CTRL, BIT(28)|BIT(29)|BIT(30), 0x06); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 113 | |
Jes Sorensen | a1cfeeb | 2014-11-30 16:05:01 -0500 | [diff] [blame] | 114 | return _SUCCESS; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | /* Shall USB interface init this? */ |
| 118 | static void _InitInterrupt(struct rtw_adapter *Adapter) |
| 119 | { |
| 120 | u32 value32; |
| 121 | |
| 122 | /* HISR - turn all on */ |
| 123 | value32 = 0xFFFFFFFF; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 124 | rtl8723au_write32(Adapter, REG_HISR, value32); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 125 | |
| 126 | /* HIMR - turn all on */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 127 | rtl8723au_write32(Adapter, REG_HIMR, value32); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 128 | } |
| 129 | |
| 130 | static void _InitQueueReservedPage(struct rtw_adapter *Adapter) |
| 131 | { |
| 132 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 133 | struct registry_priv *pregistrypriv = &Adapter->registrypriv; |
| 134 | u32 numHQ = 0; |
| 135 | u32 numLQ = 0; |
| 136 | u32 numNQ = 0; |
| 137 | u32 numPubQ; |
| 138 | u32 value32; |
| 139 | u8 value8; |
| 140 | bool bWiFiConfig = pregistrypriv->wifi_spec; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 141 | |
Jes Sorensen | ef71c9b | 2014-05-25 22:43:48 +0200 | [diff] [blame] | 142 | /* RT_ASSERT((outEPNum>= 2), ("for WMM , number of out-ep " |
| 143 | "must more than or equal to 2!\n")); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 144 | |
Jes Sorensen | ef71c9b | 2014-05-25 22:43:48 +0200 | [diff] [blame] | 145 | numPubQ = bWiFiConfig ? WMM_NORMAL_PAGE_NUM_PUBQ : NORMAL_PAGE_NUM_PUBQ; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 146 | |
Jes Sorensen | ef71c9b | 2014-05-25 22:43:48 +0200 | [diff] [blame] | 147 | if (pHalData->OutEpQueueSel & TX_SELE_HQ) { |
| 148 | numHQ = bWiFiConfig ? |
| 149 | WMM_NORMAL_PAGE_NUM_HPQ : NORMAL_PAGE_NUM_HPQ; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 150 | } |
| 151 | |
Jes Sorensen | ef71c9b | 2014-05-25 22:43:48 +0200 | [diff] [blame] | 152 | if (pHalData->OutEpQueueSel & TX_SELE_LQ) { |
| 153 | numLQ = bWiFiConfig ? |
| 154 | WMM_NORMAL_PAGE_NUM_LPQ : NORMAL_PAGE_NUM_LPQ; |
| 155 | } |
| 156 | /* NOTE: This step shall be proceed before |
| 157 | writting REG_RQPN. */ |
| 158 | if (pHalData->OutEpQueueSel & TX_SELE_NQ) { |
| 159 | numNQ = bWiFiConfig ? |
| 160 | WMM_NORMAL_PAGE_NUM_NPQ : NORMAL_PAGE_NUM_NPQ; |
| 161 | } |
| 162 | value8 = (u8)_NPQ(numNQ); |
| 163 | rtl8723au_write8(Adapter, REG_RQPN_NPQ, value8); |
| 164 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 165 | /* TX DMA */ |
| 166 | value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 167 | rtl8723au_write32(Adapter, REG_RQPN, value32); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | static void _InitTxBufferBoundary(struct rtw_adapter *Adapter) |
| 171 | { |
| 172 | struct registry_priv *pregistrypriv = &Adapter->registrypriv; |
| 173 | |
| 174 | u8 txpktbuf_bndy; |
| 175 | |
| 176 | if (!pregistrypriv->wifi_spec) |
| 177 | txpktbuf_bndy = TX_PAGE_BOUNDARY; |
| 178 | else /* for WMM */ |
| 179 | txpktbuf_bndy = WMM_NORMAL_TX_PAGE_BOUNDARY; |
| 180 | |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 181 | rtl8723au_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); |
| 182 | rtl8723au_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); |
| 183 | rtl8723au_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); |
| 184 | rtl8723au_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); |
| 185 | rtl8723au_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 186 | } |
| 187 | |
| 188 | static void _InitPageBoundary(struct rtw_adapter *Adapter) |
| 189 | { |
| 190 | /* RX Page Boundary */ |
| 191 | /* srand(static_cast<unsigned int>(time(NULL))); */ |
| 192 | u16 rxff_bndy = 0x27FF;/* rand() % 1) ? 0x27FF : 0x23FF; */ |
| 193 | |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 194 | rtl8723au_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 195 | |
| 196 | /* TODO: ?? shall we set tx boundary? */ |
| 197 | } |
| 198 | |
| 199 | static void |
| 200 | _InitNormalChipRegPriority(struct rtw_adapter *Adapter, u16 beQ, u16 bkQ, |
| 201 | u16 viQ, u16 voQ, u16 mgtQ, u16 hiQ) |
| 202 | { |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 203 | u16 value16 = rtl8723au_read16(Adapter, REG_TRXDMA_CTRL) & 0x7; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 204 | |
| 205 | value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | |
| 206 | _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | |
| 207 | _TXDMA_MGQ_MAP(mgtQ) | _TXDMA_HIQ_MAP(hiQ); |
| 208 | |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 209 | rtl8723au_write16(Adapter, REG_TRXDMA_CTRL, value16); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | static void _InitNormalChipOneOutEpPriority(struct rtw_adapter *Adapter) |
| 213 | { |
| 214 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 215 | u16 value = 0; |
| 216 | |
| 217 | switch (pHalData->OutEpQueueSel) { |
| 218 | case TX_SELE_HQ: |
| 219 | value = QUEUE_HIGH; |
| 220 | break; |
| 221 | case TX_SELE_LQ: |
| 222 | value = QUEUE_LOW; |
| 223 | break; |
| 224 | case TX_SELE_NQ: |
| 225 | value = QUEUE_NORMAL; |
| 226 | break; |
| 227 | default: |
| 228 | /* RT_ASSERT(false, ("Shall not reach here!\n")); */ |
| 229 | break; |
| 230 | } |
| 231 | |
| 232 | _InitNormalChipRegPriority(Adapter, value, value, value, |
| 233 | value, value, value); |
| 234 | } |
| 235 | |
| 236 | static void _InitNormalChipTwoOutEpPriority(struct rtw_adapter *Adapter) |
| 237 | { |
| 238 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 239 | struct registry_priv *pregistrypriv = &Adapter->registrypriv; |
| 240 | u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; |
| 241 | u16 valueHi = 0; |
| 242 | u16 valueLow = 0; |
| 243 | |
| 244 | switch (pHalData->OutEpQueueSel) { |
| 245 | case (TX_SELE_HQ | TX_SELE_LQ): |
| 246 | valueHi = QUEUE_HIGH; |
| 247 | valueLow = QUEUE_LOW; |
| 248 | break; |
| 249 | case (TX_SELE_NQ | TX_SELE_LQ): |
| 250 | valueHi = QUEUE_NORMAL; |
| 251 | valueLow = QUEUE_LOW; |
| 252 | break; |
| 253 | case (TX_SELE_HQ | TX_SELE_NQ): |
| 254 | valueHi = QUEUE_HIGH; |
| 255 | valueLow = QUEUE_NORMAL; |
| 256 | break; |
| 257 | default: |
| 258 | /* RT_ASSERT(false, ("Shall not reach here!\n")); */ |
| 259 | break; |
| 260 | } |
| 261 | |
| 262 | if (!pregistrypriv->wifi_spec) { |
| 263 | beQ = valueLow; |
| 264 | bkQ = valueLow; |
| 265 | viQ = valueHi; |
| 266 | voQ = valueHi; |
| 267 | mgtQ = valueHi; |
| 268 | hiQ = valueHi; |
| 269 | } else {/* for WMM , CONFIG_OUT_EP_WIFI_MODE */ |
| 270 | beQ = valueLow; |
| 271 | bkQ = valueHi; |
| 272 | viQ = valueHi; |
| 273 | voQ = valueLow; |
| 274 | mgtQ = valueHi; |
| 275 | hiQ = valueHi; |
| 276 | } |
| 277 | |
| 278 | _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); |
| 279 | } |
| 280 | |
| 281 | static void _InitNormalChipThreeOutEpPriority(struct rtw_adapter *Adapter) |
| 282 | { |
| 283 | struct registry_priv *pregistrypriv = &Adapter->registrypriv; |
| 284 | u16 beQ, bkQ, viQ, voQ, mgtQ, hiQ; |
| 285 | |
| 286 | if (!pregistrypriv->wifi_spec) {/* typical setting */ |
| 287 | beQ = QUEUE_LOW; |
| 288 | bkQ = QUEUE_LOW; |
| 289 | viQ = QUEUE_NORMAL; |
| 290 | voQ = QUEUE_HIGH; |
| 291 | mgtQ = QUEUE_HIGH; |
| 292 | hiQ = QUEUE_HIGH; |
| 293 | } else {/* for WMM */ |
| 294 | beQ = QUEUE_LOW; |
| 295 | bkQ = QUEUE_NORMAL; |
| 296 | viQ = QUEUE_NORMAL; |
| 297 | voQ = QUEUE_HIGH; |
| 298 | mgtQ = QUEUE_HIGH; |
| 299 | hiQ = QUEUE_HIGH; |
| 300 | } |
| 301 | _InitNormalChipRegPriority(Adapter, beQ, bkQ, viQ, voQ, mgtQ, hiQ); |
| 302 | } |
| 303 | |
Jes Sorensen | bacdcb8 | 2014-11-30 16:05:02 -0500 | [diff] [blame] | 304 | static void _InitQueuePriority(struct rtw_adapter *Adapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 305 | { |
| 306 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 307 | |
| 308 | switch (pHalData->OutEpNumber) { |
| 309 | case 1: |
| 310 | _InitNormalChipOneOutEpPriority(Adapter); |
| 311 | break; |
| 312 | case 2: |
| 313 | _InitNormalChipTwoOutEpPriority(Adapter); |
| 314 | break; |
| 315 | case 3: |
| 316 | _InitNormalChipThreeOutEpPriority(Adapter); |
| 317 | break; |
| 318 | default: |
| 319 | /* RT_ASSERT(false, ("Shall not reach here!\n")); */ |
| 320 | break; |
| 321 | } |
| 322 | } |
| 323 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 324 | static void _InitTransferPageSize(struct rtw_adapter *Adapter) |
| 325 | { |
| 326 | /* Tx page size is always 128. */ |
| 327 | |
| 328 | u8 value8; |
| 329 | value8 = _PSRX(PBP_128) | _PSTX(PBP_128); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 330 | rtl8723au_write8(Adapter, REG_PBP, value8); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | static void _InitDriverInfoSize(struct rtw_adapter *Adapter, u8 drvInfoSize) |
| 334 | { |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 335 | rtl8723au_write8(Adapter, REG_RX_DRVINFO_SZ, drvInfoSize); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | static void _InitWMACSetting(struct rtw_adapter *Adapter) |
| 339 | { |
| 340 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 341 | |
| 342 | /* don't turn on AAP, it will allow all packets to driver */ |
| 343 | pHalData->ReceiveConfig = RCR_APM | RCR_AM | RCR_AB | RCR_CBSSID_DATA | |
| 344 | RCR_CBSSID_BCN | RCR_APP_ICV | RCR_AMF | |
| 345 | RCR_HTC_LOC_CTRL | RCR_APP_MIC | |
| 346 | RCR_APP_PHYSTS; |
| 347 | |
| 348 | /* some REG_RCR will be modified later by |
| 349 | phy_ConfigMACWithHeaderFile() */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 350 | rtl8723au_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 351 | |
| 352 | /* Accept all multicast address */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 353 | rtl8723au_write32(Adapter, REG_MAR, 0xFFFFFFFF); |
| 354 | rtl8723au_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 355 | |
| 356 | /* Accept all data frames */ |
| 357 | /* value16 = 0xFFFF; */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 358 | /* rtl8723au_write16(Adapter, REG_RXFLTMAP2, value16); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 359 | |
| 360 | /* 2010.09.08 hpfan */ |
| 361 | /* Since ADF is removed from RCR, ps-poll will not be indicate |
| 362 | to driver, */ |
Carlos E. Garcia | 69e98df | 2015-04-24 09:40:42 -0400 | [diff] [blame] | 363 | /* RxFilterMap should mask ps-poll to guarantee AP mode can |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 364 | rx ps-poll. */ |
| 365 | /* value16 = 0x400; */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 366 | /* rtl8723au_write16(Adapter, REG_RXFLTMAP1, value16); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 367 | |
| 368 | /* Accept all management frames */ |
| 369 | /* value16 = 0xFFFF; */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 370 | /* rtl8723au_write16(Adapter, REG_RXFLTMAP0, value16); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 371 | |
| 372 | /* enable RX_SHIFT bits */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 373 | /* rtl8723au_write8(Adapter, REG_TRXDMA_CTRL, rtl8723au_read8(Adapter, |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 374 | REG_TRXDMA_CTRL)|BIT(1)); */ |
| 375 | } |
| 376 | |
| 377 | static void _InitAdaptiveCtrl(struct rtw_adapter *Adapter) |
| 378 | { |
| 379 | u16 value16; |
| 380 | u32 value32; |
| 381 | |
| 382 | /* Response Rate Set */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 383 | value32 = rtl8723au_read32(Adapter, REG_RRSR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 384 | value32 &= ~RATE_BITMAP_ALL; |
| 385 | value32 |= RATE_RRSR_CCK_ONLY_1M; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 386 | rtl8723au_write32(Adapter, REG_RRSR, value32); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 387 | |
| 388 | /* CF-END Threshold */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 389 | /* m_spIoBase->rtl8723au_write8(REG_CFEND_TH, 0x1); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 390 | |
| 391 | /* SIFS (used in NAV) */ |
| 392 | value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 393 | rtl8723au_write16(Adapter, REG_SPEC_SIFS, value16); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 394 | |
| 395 | /* Retry Limit */ |
| 396 | value16 = _LRL(0x30) | _SRL(0x30); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 397 | rtl8723au_write16(Adapter, REG_RL, value16); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 398 | } |
| 399 | |
| 400 | static void _InitRateFallback(struct rtw_adapter *Adapter) |
| 401 | { |
| 402 | /* Set Data Auto Rate Fallback Retry Count register. */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 403 | rtl8723au_write32(Adapter, REG_DARFRC, 0x00000000); |
| 404 | rtl8723au_write32(Adapter, REG_DARFRC+4, 0x10080404); |
| 405 | rtl8723au_write32(Adapter, REG_RARFRC, 0x04030201); |
| 406 | rtl8723au_write32(Adapter, REG_RARFRC+4, 0x08070605); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | static void _InitEDCA(struct rtw_adapter *Adapter) |
| 410 | { |
| 411 | /* Set Spec SIFS (used in NAV) */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 412 | rtl8723au_write16(Adapter, REG_SPEC_SIFS, 0x100a); |
| 413 | rtl8723au_write16(Adapter, REG_MAC_SPEC_SIFS, 0x100a); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 414 | |
| 415 | /* Set SIFS for CCK */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 416 | rtl8723au_write16(Adapter, REG_SIFS_CTX, 0x100a); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 417 | |
| 418 | /* Set SIFS for OFDM */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 419 | rtl8723au_write16(Adapter, REG_SIFS_TRX, 0x100a); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 420 | |
| 421 | /* TXOP */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 422 | rtl8723au_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); |
| 423 | rtl8723au_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); |
| 424 | rtl8723au_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); |
| 425 | rtl8723au_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 426 | } |
| 427 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 428 | static void _InitRDGSetting(struct rtw_adapter *Adapter) |
| 429 | { |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 430 | rtl8723au_write8(Adapter, REG_RD_CTRL, 0xFF); |
| 431 | rtl8723au_write16(Adapter, REG_RD_NAV_NXT, 0x200); |
| 432 | rtl8723au_write8(Adapter, REG_RD_RESP_PKT_TH, 0x05); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | static void _InitRetryFunction(struct rtw_adapter *Adapter) |
| 436 | { |
| 437 | u8 value8; |
| 438 | |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 439 | value8 = rtl8723au_read8(Adapter, REG_FWHW_TXQ_CTRL); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 440 | value8 |= EN_AMPDU_RTY_NEW; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 441 | rtl8723au_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 442 | |
| 443 | /* Set ACK timeout */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 444 | rtl8723au_write8(Adapter, REG_ACKTO, 0x40); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 445 | } |
| 446 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 447 | static void _InitRFType(struct rtw_adapter *Adapter) |
| 448 | { |
| 449 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 450 | |
Jes Sorensen | 277c722 | 2015-02-27 15:45:32 -0500 | [diff] [blame] | 451 | pHalData->rf_type = RF_1T1R; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 452 | } |
| 453 | |
| 454 | /* Set CCK and OFDM Block "ON" */ |
| 455 | static void _BBTurnOnBlock(struct rtw_adapter *Adapter) |
| 456 | { |
| 457 | PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); |
| 458 | PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); |
| 459 | } |
| 460 | |
| 461 | #define MgntActSet_RF_State(...) |
| 462 | static void _RfPowerSave(struct rtw_adapter *padapter) |
| 463 | { |
| 464 | } |
| 465 | |
| 466 | enum { |
| 467 | Antenna_Lfet = 1, |
| 468 | Antenna_Right = 2, |
| 469 | }; |
| 470 | |
| 471 | enum rt_rf_power_state RfOnOffDetect23a(struct rtw_adapter *pAdapter) |
| 472 | { |
| 473 | /* struct hal_data_8723a *pHalData = GET_HAL_DATA(pAdapter); */ |
| 474 | u8 val8; |
| 475 | enum rt_rf_power_state rfpowerstate = rf_off; |
| 476 | |
Jes Sorensen | 06736c2 | 2014-07-31 10:36:43 +0200 | [diff] [blame] | 477 | rtl8723au_write8(pAdapter, REG_MAC_PINMUX_CFG, |
| 478 | rtl8723au_read8(pAdapter, |
| 479 | REG_MAC_PINMUX_CFG) & ~BIT(3)); |
| 480 | val8 = rtl8723au_read8(pAdapter, REG_GPIO_IO_SEL); |
| 481 | DBG_8723A("GPIO_IN =%02x\n", val8); |
| 482 | rfpowerstate = (val8 & BIT(3)) ? rf_on : rf_off; |
| 483 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 484 | return rfpowerstate; |
Jes Sorensen | 06736c2 | 2014-07-31 10:36:43 +0200 | [diff] [blame] | 485 | } |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 486 | |
Jes Sorensen | dc20d1d | 2014-07-21 11:25:07 +0200 | [diff] [blame] | 487 | int rtl8723au_hal_init(struct rtw_adapter *Adapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 488 | { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 489 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 490 | struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; |
| 491 | struct registry_priv *pregistrypriv = &Adapter->registrypriv; |
Jes Sorensen | 4405ef4 | 2014-11-30 16:05:07 -0500 | [diff] [blame] | 492 | u8 val8 = 0; |
| 493 | u32 boundary; |
| 494 | int status = _SUCCESS; |
| 495 | bool mac_on; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 496 | |
| 497 | unsigned long init_start_time = jiffies; |
| 498 | |
Jes Sorensen | dc20d1d | 2014-07-21 11:25:07 +0200 | [diff] [blame] | 499 | Adapter->hw_init_completed = false; |
| 500 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 501 | if (Adapter->pwrctrlpriv.bkeepfwalive) { |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 502 | phy_SsPwrSwitch92CU(Adapter, rf_on); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 503 | |
| 504 | if (pHalData->bIQKInitialized) { |
| 505 | rtl8723a_phy_iq_calibrate(Adapter, true); |
| 506 | } else { |
| 507 | rtl8723a_phy_iq_calibrate(Adapter, false); |
| 508 | pHalData->bIQKInitialized = true; |
| 509 | } |
| 510 | rtl8723a_odm_check_tx_power_tracking(Adapter); |
| 511 | rtl8723a_phy_lc_calibrate(Adapter); |
| 512 | |
| 513 | goto exit; |
| 514 | } |
| 515 | |
| 516 | /* Check if MAC has already power on. by tynli. 2011.05.27. */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 517 | val8 = rtl8723au_read8(Adapter, REG_CR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 518 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 519 | "%s: REG_CR 0x100 = 0x%02x\n", __func__, val8); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 520 | /* Fix 92DU-VC S3 hang with the reason is that secondary mac is not |
| 521 | initialized. */ |
| 522 | /* 0x100 value of first mac is 0xEA while 0x100 value of secondary |
| 523 | is 0x00 */ |
| 524 | if (val8 == 0xEA) { |
Jes Sorensen | 4405ef4 | 2014-11-30 16:05:07 -0500 | [diff] [blame] | 525 | mac_on = false; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 526 | } else { |
Jes Sorensen | 4405ef4 | 2014-11-30 16:05:07 -0500 | [diff] [blame] | 527 | mac_on = true; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 528 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 529 | "%s: MAC has already power on\n", __func__); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 530 | } |
| 531 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 532 | status = _InitPowerOn(Adapter); |
| 533 | if (status == _FAIL) { |
| 534 | RT_TRACE(_module_hci_hal_init_c_, _drv_err_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 535 | "Failed to init power on!\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 536 | goto exit; |
| 537 | } |
| 538 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 539 | if (!pregistrypriv->wifi_spec) { |
| 540 | boundary = TX_PAGE_BOUNDARY; |
| 541 | } else { |
| 542 | /* for WMM */ |
| 543 | boundary = WMM_NORMAL_TX_PAGE_BOUNDARY; |
| 544 | } |
| 545 | |
Jes Sorensen | 4405ef4 | 2014-11-30 16:05:07 -0500 | [diff] [blame] | 546 | if (!mac_on) { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 547 | status = InitLLTTable23a(Adapter, boundary); |
| 548 | if (status == _FAIL) { |
| 549 | RT_TRACE(_module_hci_hal_init_c_, _drv_err_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 550 | "Failed to init LLT table\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 551 | goto exit; |
| 552 | } |
| 553 | } |
| 554 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 555 | if (pHalData->bRDGEnable) |
| 556 | _InitRDGSetting(Adapter); |
| 557 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 558 | status = rtl8723a_FirmwareDownload(Adapter); |
| 559 | if (status != _SUCCESS) { |
| 560 | Adapter->bFWReady = false; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 561 | DBG_8723A("fw download fail!\n"); |
| 562 | goto exit; |
| 563 | } else { |
| 564 | Adapter->bFWReady = true; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 565 | DBG_8723A("fw download ok!\n"); |
| 566 | } |
| 567 | |
| 568 | rtl8723a_InitializeFirmwareVars(Adapter); |
| 569 | |
| 570 | if (pwrctrlpriv->reg_rfoff == true) { |
| 571 | pwrctrlpriv->rf_pwrstate = rf_off; |
| 572 | } |
| 573 | |
| 574 | /* 2010/08/09 MH We need to check if we need to turnon or off RF after detecting */ |
| 575 | /* HW GPIO pin. Before PHY_RFConfig8192C. */ |
| 576 | /* HalDetectPwrDownMode(Adapter); */ |
| 577 | /* 2010/08/26 MH If Efuse does not support sective suspend then disable the function. */ |
| 578 | /* HalDetectSelectiveSuspendMode(Adapter); */ |
| 579 | |
| 580 | /* Set RF type for BB/RF configuration */ |
| 581 | _InitRFType(Adapter);/* _ReadRFType() */ |
| 582 | |
| 583 | /* Save target channel */ |
| 584 | /* <Roger_Notes> Current Channel will be updated again later. */ |
| 585 | pHalData->CurrentChannel = 6;/* default set to 6 */ |
| 586 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 587 | status = PHY_MACConfig8723A(Adapter); |
| 588 | if (status == _FAIL) { |
| 589 | DBG_8723A("PHY_MACConfig8723A fault !!\n"); |
| 590 | goto exit; |
| 591 | } |
| 592 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 593 | /* */ |
| 594 | /* d. Initialize BB related configurations. */ |
| 595 | /* */ |
| 596 | status = PHY_BBConfig8723A(Adapter); |
| 597 | if (status == _FAIL) { |
| 598 | DBG_8723A("PHY_BBConfig8723A fault !!\n"); |
| 599 | goto exit; |
| 600 | } |
| 601 | |
| 602 | /* Add for tx power by rate fine tune. We need to call the function after BB config. */ |
| 603 | /* Because the tx power by rate table is inited in BB config. */ |
| 604 | |
Jes Sorensen | f6a7125 | 2014-07-13 09:32:10 +0200 | [diff] [blame] | 605 | status = PHY_RF6052_Config8723A(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 606 | if (status == _FAIL) { |
Jes Sorensen | f6a7125 | 2014-07-13 09:32:10 +0200 | [diff] [blame] | 607 | DBG_8723A("PHY_RF6052_Config8723A failed!!\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 608 | goto exit; |
| 609 | } |
| 610 | |
| 611 | /* reducing 80M spur */ |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 612 | rtl8723au_write32(Adapter, REG_AFE_XTAL_CTRL, 0x0381808d); |
| 613 | rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83); |
| 614 | rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff82); |
| 615 | rtl8723au_write32(Adapter, REG_AFE_PLL_CTRL, 0xf0ffff83); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 616 | |
| 617 | /* RFSW Control */ |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 618 | /* 0x804[14]= 0 */ |
| 619 | rtl8723au_write32(Adapter, rFPGA0_TxInfo, 0x00000003); |
| 620 | /* 0x870[6:5]= b'11 */ |
| 621 | rtl8723au_write32(Adapter, rFPGA0_XAB_RFInterfaceSW, 0x07000760); |
| 622 | /* 0x860[6:5]= b'00 */ |
| 623 | rtl8723au_write32(Adapter, rFPGA0_XA_RFInterfaceOE, 0x66F60210); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 624 | |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 625 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 626 | "%s: 0x870 = value 0x%x\n", __func__, |
| 627 | rtl8723au_read32(Adapter, 0x870)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 628 | |
| 629 | /* */ |
| 630 | /* Joseph Note: Keep RfRegChnlVal for later use. */ |
| 631 | /* */ |
Jes Sorensen | bb583c5 | 2014-12-04 16:15:45 -0500 | [diff] [blame] | 632 | pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, RF_PATH_A, |
| 633 | RF_CHNLBW, bRFRegOffsetMask); |
| 634 | pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, RF_PATH_B, |
| 635 | RF_CHNLBW, bRFRegOffsetMask); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 636 | |
Jes Sorensen | 4405ef4 | 2014-11-30 16:05:07 -0500 | [diff] [blame] | 637 | if (!mac_on) { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 638 | _InitQueueReservedPage(Adapter); |
| 639 | _InitTxBufferBoundary(Adapter); |
| 640 | } |
| 641 | _InitQueuePriority(Adapter); |
| 642 | _InitPageBoundary(Adapter); |
| 643 | _InitTransferPageSize(Adapter); |
| 644 | |
| 645 | /* Get Rx PHY status in order to report RSSI and others. */ |
| 646 | _InitDriverInfoSize(Adapter, DRVINFO_SZ); |
| 647 | |
| 648 | _InitInterrupt(Adapter); |
Jes Sorensen | 3c5660e | 2014-04-09 23:20:19 +0200 | [diff] [blame] | 649 | hw_var_set_macaddr(Adapter, Adapter->eeprompriv.mac_addr); |
Jes Sorensen | df72ac9 | 2014-07-17 22:59:47 +0200 | [diff] [blame] | 650 | rtl8723a_set_media_status(Adapter, MSR_INFRA); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 651 | _InitWMACSetting(Adapter); |
| 652 | _InitAdaptiveCtrl(Adapter); |
| 653 | _InitEDCA(Adapter); |
| 654 | _InitRateFallback(Adapter); |
| 655 | _InitRetryFunction(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 656 | rtl8723a_InitBeaconParameters(Adapter); |
| 657 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 658 | _BBTurnOnBlock(Adapter); |
| 659 | /* NicIFSetMacAddress(padapter, padapter->PermanentAddress); */ |
| 660 | |
Jes Sorensen | 2a3bc8a | 2014-07-17 22:59:53 +0200 | [diff] [blame] | 661 | rtl8723a_cam_invalidate_all(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 662 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 663 | /* 2010/12/17 MH We need to set TX power according to EFUSE content at first. */ |
| 664 | PHY_SetTxPowerLevel8723A(Adapter, pHalData->CurrentChannel); |
| 665 | |
| 666 | rtl8723a_InitAntenna_Selection(Adapter); |
| 667 | |
| 668 | /* HW SEQ CTRL */ |
| 669 | /* set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 670 | rtl8723au_write8(Adapter, REG_HWSEQ_CTRL, 0xFF); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 671 | |
| 672 | /* */ |
| 673 | /* Disable BAR, suggested by Scott */ |
| 674 | /* 2010.04.09 add by hpfan */ |
| 675 | /* */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 676 | rtl8723au_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 677 | |
| 678 | if (pregistrypriv->wifi_spec) |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 679 | rtl8723au_write16(Adapter, REG_FAST_EDCA_CTRL, 0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 680 | |
| 681 | /* Move by Neo for USB SS from above setp */ |
| 682 | _RfPowerSave(Adapter); |
| 683 | |
Jes Sorensen | 1305565 | 2014-05-25 22:43:40 +0200 | [diff] [blame] | 684 | /* 2010/08/26 MH Merge from 8192CE. */ |
| 685 | /* sherry masked that it has been done in _RfPowerSave */ |
| 686 | /* 20110927 */ |
| 687 | /* recovery for 8192cu and 9723Au 20111017 */ |
| 688 | if (pwrctrlpriv->rf_pwrstate == rf_on) { |
| 689 | if (pHalData->bIQKInitialized) { |
| 690 | rtl8723a_phy_iq_calibrate(Adapter, true); |
| 691 | } else { |
| 692 | rtl8723a_phy_iq_calibrate(Adapter, false); |
| 693 | pHalData->bIQKInitialized = true; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 694 | } |
| 695 | |
Jes Sorensen | 1305565 | 2014-05-25 22:43:40 +0200 | [diff] [blame] | 696 | rtl8723a_odm_check_tx_power_tracking(Adapter); |
| 697 | |
| 698 | rtl8723a_phy_lc_calibrate(Adapter); |
| 699 | |
| 700 | rtl8723a_dual_antenna_detection(Adapter); |
| 701 | } |
| 702 | |
| 703 | /* fixed USB interface interference issue */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 704 | rtl8723au_write8(Adapter, 0xfe40, 0xe0); |
| 705 | rtl8723au_write8(Adapter, 0xfe41, 0x8d); |
| 706 | rtl8723au_write8(Adapter, 0xfe42, 0x80); |
| 707 | rtl8723au_write32(Adapter, 0x20c, 0xfd0320); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 708 | /* Solve too many protocol error on USB bus */ |
| 709 | if (!IS_81xxC_VENDOR_UMC_A_CUT(pHalData->VersionID)) { |
| 710 | /* 0xE6 = 0x94 */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 711 | rtl8723au_write8(Adapter, 0xFE40, 0xE6); |
| 712 | rtl8723au_write8(Adapter, 0xFE41, 0x94); |
| 713 | rtl8723au_write8(Adapter, 0xFE42, 0x80); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 714 | |
| 715 | /* 0xE0 = 0x19 */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 716 | rtl8723au_write8(Adapter, 0xFE40, 0xE0); |
| 717 | rtl8723au_write8(Adapter, 0xFE41, 0x19); |
| 718 | rtl8723au_write8(Adapter, 0xFE42, 0x80); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 719 | |
| 720 | /* 0xE5 = 0x91 */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 721 | rtl8723au_write8(Adapter, 0xFE40, 0xE5); |
| 722 | rtl8723au_write8(Adapter, 0xFE41, 0x91); |
| 723 | rtl8723au_write8(Adapter, 0xFE42, 0x80); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 724 | |
| 725 | /* 0xE2 = 0x81 */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 726 | rtl8723au_write8(Adapter, 0xFE40, 0xE2); |
| 727 | rtl8723au_write8(Adapter, 0xFE41, 0x81); |
| 728 | rtl8723au_write8(Adapter, 0xFE42, 0x80); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 729 | |
| 730 | } |
| 731 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 732 | /* _InitPABias(Adapter); */ |
| 733 | |
Jes Sorensen | 00e8b24 | 2014-05-25 22:43:39 +0200 | [diff] [blame] | 734 | /* Init BT hw config. */ |
| 735 | rtl8723a_BT_init_hwconfig(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 736 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 737 | rtl8723a_InitHalDm(Adapter); |
| 738 | |
Bhaktipriya Shridhar | 3c2f78f | 2016-03-08 23:28:13 +0530 | [diff] [blame] | 739 | val8 = DIV_ROUND_UP(WiFiNavUpperUs, HAL_8723A_NAV_UPPER_UNIT); |
Jes Sorensen | d0b39f8 | 2014-07-21 11:25:06 +0200 | [diff] [blame] | 740 | rtl8723au_write8(Adapter, REG_NAV_UPPER, val8); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 741 | |
| 742 | /* 2011/03/09 MH debug only, UMC-B cut pass 2500 S5 test, but we need to fin root cause. */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 743 | if (((rtl8723au_read32(Adapter, rFPGA0_RFMOD) & 0xFF000000) != |
| 744 | 0x83000000)) { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 745 | PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(24), 1); |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 746 | RT_TRACE(_module_hci_hal_init_c_, _drv_err_, |
| 747 | "%s: IQK fail recover\n", __func__); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 748 | } |
| 749 | |
| 750 | /* ack for xmit mgmt frames. */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 751 | rtl8723au_write32(Adapter, REG_FWHW_TXQ_CTRL, |
| 752 | rtl8723au_read32(Adapter, REG_FWHW_TXQ_CTRL)|BIT(12)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 753 | |
| 754 | exit: |
Jes Sorensen | dc20d1d | 2014-07-21 11:25:07 +0200 | [diff] [blame] | 755 | if (status == _SUCCESS) { |
| 756 | Adapter->hw_init_completed = true; |
| 757 | |
| 758 | if (Adapter->registrypriv.notch_filter == 1) |
| 759 | rtl8723a_notch_filter(Adapter, 1); |
| 760 | } |
| 761 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 762 | DBG_8723A("%s in %dms\n", __func__, |
| 763 | jiffies_to_msecs(jiffies - init_start_time)); |
| 764 | return status; |
| 765 | } |
| 766 | |
| 767 | static void phy_SsPwrSwitch92CU(struct rtw_adapter *Adapter, |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 768 | enum rt_rf_power_state eRFPowerState) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 769 | { |
| 770 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 771 | u8 sps0; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 772 | |
Jes Sorensen | 6e1c29fd | 2014-11-30 16:05:04 -0500 | [diff] [blame] | 773 | sps0 = rtl8723au_read8(Adapter, REG_SPS0_CTRL); |
| 774 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 775 | switch (eRFPowerState) { |
| 776 | case rf_on: |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 777 | /* 1. Enable MAC Clock. Can not be enabled now. */ |
| 778 | /* WriteXBYTE(REG_SYS_CLKR+1, |
| 779 | ReadXBYTE(REG_SYS_CLKR+1) | BIT(3)); */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 780 | |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 781 | /* 2. Force PWM, Enable SPS18_LDO_Marco_Block */ |
| 782 | rtl8723au_write8(Adapter, REG_SPS0_CTRL, |
| 783 | sps0 | BIT(0) | BIT(3)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 784 | |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 785 | /* 3. restore BB, AFE control register. */ |
| 786 | /* RF */ |
| 787 | if (pHalData->rf_type == RF_2T2R) |
| 788 | PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, |
| 789 | 0x380038, 1); |
| 790 | else |
| 791 | PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, |
| 792 | 0x38, 1); |
| 793 | PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); |
| 794 | PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(1), 0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 795 | |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 796 | /* AFE */ |
| 797 | if (pHalData->rf_type == RF_2T2R) |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 798 | rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x63DB25A0); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 799 | else if (pHalData->rf_type == RF_1T1R) |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 800 | rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x631B25A0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 801 | |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 802 | /* 4. issue 3-wire command that RF set to Rx idle |
| 803 | mode. This is used to re-write the RX idle mode. */ |
| 804 | /* We can only prvide a usual value instead and then |
| 805 | HW will modify the value by itself. */ |
Jes Sorensen | 25094468 | 2015-02-09 17:52:16 -0500 | [diff] [blame] | 806 | PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, |
| 807 | bRFRegOffsetMask, 0x32D95); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 808 | if (pHalData->rf_type == RF_2T2R) { |
Jes Sorensen | 25094468 | 2015-02-09 17:52:16 -0500 | [diff] [blame] | 809 | PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC, |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 810 | bRFRegOffsetMask, 0x32D95); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 811 | } |
| 812 | break; |
| 813 | case rf_sleep: |
| 814 | case rf_off: |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 815 | if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) |
Jes Sorensen | 6e1c29fd | 2014-11-30 16:05:04 -0500 | [diff] [blame] | 816 | sps0 &= ~BIT(0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 817 | else |
Jes Sorensen | 6e1c29fd | 2014-11-30 16:05:04 -0500 | [diff] [blame] | 818 | sps0 &= ~(BIT(0) | BIT(3)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 819 | |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 820 | RT_TRACE(_module_hal_init_c_, _drv_err_, "SS LVL1\n"); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 821 | /* Disable RF and BB only for SelectSuspend. */ |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 822 | |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 823 | /* 1. Set BB/RF to shutdown. */ |
| 824 | /* (1) Reg878[5:3]= 0 RF rx_code for |
| 825 | preamble power saving */ |
| 826 | /* (2)Reg878[21:19]= 0 Turn off RF-B */ |
| 827 | /* (3) RegC04[7:4]= 0 Turn off all paths |
| 828 | for packet detection */ |
| 829 | /* (4) Reg800[1] = 1 enable preamble power saving */ |
| 830 | Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 831 | rtl8723au_read32(Adapter, rFPGA0_XAB_RFParameter); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 832 | Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 833 | rtl8723au_read32(Adapter, rOFDM0_TRxPathEnable); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 834 | Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 835 | rtl8723au_read32(Adapter, rFPGA0_RFMOD); |
Shraddha Barke | 12d2737 | 2015-09-05 18:58:19 +0530 | [diff] [blame] | 836 | if (pHalData->rf_type == RF_2T2R) |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 837 | PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, |
| 838 | 0x380038, 0); |
Shraddha Barke | 12d2737 | 2015-09-05 18:58:19 +0530 | [diff] [blame] | 839 | else if (pHalData->rf_type == RF_1T1R) |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 840 | PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 841 | PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); |
| 842 | PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT(1), 1); |
| 843 | |
| 844 | /* 2 .AFE control register to power down. bit[30:22] */ |
| 845 | Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 846 | rtl8723au_read32(Adapter, rRx_Wait_CCA); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 847 | if (pHalData->rf_type == RF_2T2R) |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 848 | rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x00DB25A0); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 849 | else if (pHalData->rf_type == RF_1T1R) |
Jes Sorensen | 2c177a8 | 2015-03-05 14:24:41 -0500 | [diff] [blame] | 850 | rtl8723au_write32(Adapter, rRx_Wait_CCA, 0x001B25A0); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 851 | |
| 852 | /* 3. issue 3-wire command that RF set to power down.*/ |
Jes Sorensen | 25094468 | 2015-02-09 17:52:16 -0500 | [diff] [blame] | 853 | PHY_SetRFReg(Adapter, RF_PATH_A, RF_AC, bRFRegOffsetMask, 0); |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 854 | if (pHalData->rf_type == RF_2T2R) |
Jes Sorensen | 25094468 | 2015-02-09 17:52:16 -0500 | [diff] [blame] | 855 | PHY_SetRFReg(Adapter, RF_PATH_B, RF_AC, |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 856 | bRFRegOffsetMask, 0); |
| 857 | |
| 858 | /* 4. Force PFM , disable SPS18_LDO_Marco_Block */ |
| 859 | rtl8723au_write8(Adapter, REG_SPS0_CTRL, sps0); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 860 | break; |
| 861 | default: |
| 862 | break; |
| 863 | } |
Jes Sorensen | b024793 | 2014-11-30 16:05:06 -0500 | [diff] [blame] | 864 | } |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 865 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 866 | static void CardDisableRTL8723U(struct rtw_adapter *Adapter) |
| 867 | { |
| 868 | u8 u1bTmp; |
| 869 | |
| 870 | DBG_8723A("CardDisableRTL8723U\n"); |
| 871 | /* USB-MF Card Disable Flow */ |
| 872 | /* 1. Run LPS WL RFOFF flow */ |
| 873 | HalPwrSeqCmdParsing23a(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, |
| 874 | PWR_INTF_USB_MSK, rtl8723AU_enter_lps_flow); |
| 875 | |
| 876 | /* 2. 0x1F[7:0] = 0 turn off RF */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 877 | rtl8723au_write8(Adapter, REG_RF_CTRL, 0x00); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 878 | |
| 879 | /* ==== Reset digital sequence ====== */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 880 | if ((rtl8723au_read8(Adapter, REG_MCUFWDL) & BIT(7)) && |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 881 | Adapter->bFWReady) /* 8051 RAM code */ |
| 882 | rtl8723a_FirmwareSelfReset(Adapter); |
| 883 | |
| 884 | /* Reset MCU. Suggested by Filen. 2011.01.26. by tynli. */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 885 | u1bTmp = rtl8723au_read8(Adapter, REG_SYS_FUNC_EN+1); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 886 | rtl8723au_write8(Adapter, REG_SYS_FUNC_EN+1, u1bTmp & ~BIT(2)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 887 | |
| 888 | /* g. MCUFWDL 0x80[1:0]= 0 reset MCU ready status */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 889 | rtl8723au_write8(Adapter, REG_MCUFWDL, 0x00); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 890 | |
| 891 | /* ==== Reset digital sequence end ====== */ |
| 892 | /* Card disable power action flow */ |
| 893 | HalPwrSeqCmdParsing23a(Adapter, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, |
| 894 | PWR_INTF_USB_MSK, |
| 895 | rtl8723AU_card_disable_flow); |
| 896 | |
| 897 | /* Reset MCU IO Wrapper, added by Roger, 2011.08.30. */ |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 898 | u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 899 | rtl8723au_write8(Adapter, REG_RSV_CTRL+1, u1bTmp & ~BIT(0)); |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 900 | u1bTmp = rtl8723au_read8(Adapter, REG_RSV_CTRL + 1); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 901 | rtl8723au_write8(Adapter, REG_RSV_CTRL+1, u1bTmp | BIT(0)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 902 | |
| 903 | /* 7. RSV_CTRL 0x1C[7:0] = 0x0E lock ISO/CLK/Power control register */ |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 904 | rtl8723au_write8(Adapter, REG_RSV_CTRL, 0x0e); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 905 | } |
| 906 | |
Jes Sorensen | dc20d1d | 2014-07-21 11:25:07 +0200 | [diff] [blame] | 907 | int rtl8723au_hal_deinit(struct rtw_adapter *padapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 908 | { |
| 909 | DBG_8723A("==> %s\n", __func__); |
| 910 | |
| 911 | #ifdef CONFIG_8723AU_BT_COEXIST |
| 912 | BT_HaltProcess(padapter); |
| 913 | #endif |
| 914 | /* 2011/02/18 To Fix RU LNA power leakage problem. We need to |
| 915 | execute below below in Adapter init and halt sequence. |
| 916 | According to EEchou's opinion, we can enable the ability for all */ |
| 917 | /* IC. Accord to johnny's opinion, only RU need the support. */ |
| 918 | CardDisableRTL8723U(padapter); |
| 919 | |
Jes Sorensen | dc20d1d | 2014-07-21 11:25:07 +0200 | [diff] [blame] | 920 | padapter->hw_init_completed = false; |
| 921 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 922 | return _SUCCESS; |
| 923 | } |
| 924 | |
Jes Sorensen | 1aaa376 | 2014-05-16 10:04:05 +0200 | [diff] [blame] | 925 | int rtl8723au_inirp_init(struct rtw_adapter *Adapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 926 | { |
| 927 | u8 i; |
| 928 | struct recv_buf *precvbuf; |
Jes Sorensen | 1aaa376 | 2014-05-16 10:04:05 +0200 | [diff] [blame] | 929 | int status; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 930 | struct recv_priv *precvpriv = &Adapter->recvpriv; |
Jes Sorensen | ad899b1 | 2014-05-16 10:04:31 +0200 | [diff] [blame] | 931 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 932 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 933 | status = _SUCCESS; |
| 934 | |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 935 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, "===> usb_inirp_init\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 936 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 937 | /* issue Rx irp to receive data */ |
| 938 | precvbuf = (struct recv_buf *)precvpriv->precv_buf; |
| 939 | for (i = 0; i < NR_RECVBUFF; i++) { |
Jes Sorensen | b1f43bd | 2014-11-30 16:05:08 -0500 | [diff] [blame] | 940 | if (rtl8723au_read_port(Adapter, 0, precvbuf) == _FAIL) { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 941 | RT_TRACE(_module_hci_hal_init_c_, _drv_err_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 942 | "usb_rx_init: usb_read_port error\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 943 | status = _FAIL; |
| 944 | goto exit; |
| 945 | } |
| 946 | precvbuf++; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 947 | } |
Jes Sorensen | c6419a6 | 2014-11-30 16:05:09 -0500 | [diff] [blame] | 948 | if (rtl8723au_read_interrupt(Adapter) == _FAIL) { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 949 | RT_TRACE(_module_hci_hal_init_c_, _drv_err_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 950 | "%s: usb_read_interrupt error\n", __func__); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 951 | status = _FAIL; |
| 952 | } |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 953 | pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 954 | MSG_8723A("pHalData->IntrMask = 0x%04x\n", pHalData->IntrMask[0]); |
| 955 | pHalData->IntrMask[0] |= UHIMR_C2HCMD|UHIMR_CPWM; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 956 | rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 957 | exit: |
| 958 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 959 | "<=== usb_inirp_init\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 960 | return status; |
| 961 | } |
| 962 | |
Jes Sorensen | 1aaa376 | 2014-05-16 10:04:05 +0200 | [diff] [blame] | 963 | int rtl8723au_inirp_deinit(struct rtw_adapter *Adapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 964 | { |
| 965 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 966 | |
| 967 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 968 | "===> usb_rx_deinit\n"); |
Jes Sorensen | 68552a9 | 2014-05-16 10:05:10 +0200 | [diff] [blame] | 969 | rtl8723au_read_port_cancel(Adapter); |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 970 | pHalData->IntrMask[0] = rtl8723au_read32(Adapter, REG_USB_HIMR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 971 | MSG_8723A("%s pHalData->IntrMask = 0x%04x\n", __func__, |
| 972 | pHalData->IntrMask[0]); |
| 973 | pHalData->IntrMask[0] = 0x0; |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 974 | rtl8723au_write32(Adapter, REG_USB_HIMR, pHalData->IntrMask[0]); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 975 | RT_TRACE(_module_hci_hal_init_c_, _drv_info_, |
Joe Perches | 90403aa | 2015-03-24 16:06:44 -0700 | [diff] [blame] | 976 | "<=== usb_rx_deinit\n"); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 977 | return _SUCCESS; |
| 978 | } |
| 979 | |
| 980 | static void _ReadBoardType(struct rtw_adapter *Adapter, u8 *PROMContent, |
| 981 | bool AutoloadFail) |
| 982 | { |
| 983 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 984 | u8 boardType = BOARD_USB_DONGLE; |
| 985 | |
| 986 | if (AutoloadFail) { |
| 987 | if (IS_8723_SERIES(pHalData->VersionID)) |
| 988 | pHalData->rf_type = RF_1T1R; |
| 989 | else |
| 990 | pHalData->rf_type = RF_2T2R; |
| 991 | pHalData->BoardType = boardType; |
| 992 | return; |
| 993 | } |
| 994 | |
| 995 | boardType = PROMContent[EEPROM_NORMAL_BoardType]; |
| 996 | boardType &= BOARD_TYPE_NORMAL_MASK;/* bit[7:5] */ |
| 997 | boardType >>= 5; |
| 998 | |
| 999 | pHalData->BoardType = boardType; |
| 1000 | MSG_8723A("_ReadBoardType(%x)\n", pHalData->BoardType); |
| 1001 | |
| 1002 | if (boardType == BOARD_USB_High_PA) |
| 1003 | pHalData->ExternalPA = 1; |
| 1004 | } |
| 1005 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1006 | static void Hal_EfuseParseMACAddr_8723AU(struct rtw_adapter *padapter, |
| 1007 | u8 *hwinfo, bool AutoLoadFail) |
| 1008 | { |
| 1009 | u16 i; |
| 1010 | u8 sMacAddr[ETH_ALEN] = {0x00, 0xE0, 0x4C, 0x87, 0x23, 0x00}; |
| 1011 | struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); |
| 1012 | |
| 1013 | if (AutoLoadFail) { |
| 1014 | for (i = 0; i < 6; i++) |
| 1015 | pEEPROM->mac_addr[i] = sMacAddr[i]; |
| 1016 | } else { |
| 1017 | /* Read Permanent MAC address */ |
| 1018 | memcpy(pEEPROM->mac_addr, &hwinfo[EEPROM_MAC_ADDR_8723AU], |
| 1019 | ETH_ALEN); |
| 1020 | } |
| 1021 | |
| 1022 | RT_TRACE(_module_hci_hal_init_c_, _drv_notice_, |
Daniil Leshchev | 78f73d9 | 2015-12-31 15:36:42 +0300 | [diff] [blame] | 1023 | "Hal_EfuseParseMACAddr_8723AU: Permanent Address =%pM\n", |
| 1024 | pEEPROM->mac_addr); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1025 | } |
| 1026 | |
| 1027 | static void readAdapterInfo(struct rtw_adapter *padapter) |
| 1028 | { |
| 1029 | struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(padapter); |
| 1030 | /* struct hal_data_8723a * pHalData = GET_HAL_DATA(padapter); */ |
| 1031 | u8 hwinfo[HWSET_MAX_SIZE]; |
| 1032 | |
| 1033 | Hal_InitPGData(padapter, hwinfo); |
| 1034 | Hal_EfuseParseIDCode(padapter, hwinfo); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1035 | Hal_EfuseParseEEPROMVer(padapter, hwinfo, |
| 1036 | pEEPROM->bautoload_fail_flag); |
| 1037 | Hal_EfuseParseMACAddr_8723AU(padapter, hwinfo, |
| 1038 | pEEPROM->bautoload_fail_flag); |
| 1039 | Hal_EfuseParsetxpowerinfo_8723A(padapter, hwinfo, |
| 1040 | pEEPROM->bautoload_fail_flag); |
| 1041 | _ReadBoardType(padapter, hwinfo, pEEPROM->bautoload_fail_flag); |
| 1042 | Hal_EfuseParseBTCoexistInfo_8723A(padapter, hwinfo, |
| 1043 | pEEPROM->bautoload_fail_flag); |
| 1044 | |
| 1045 | rtl8723a_EfuseParseChnlPlan(padapter, hwinfo, |
| 1046 | pEEPROM->bautoload_fail_flag); |
| 1047 | Hal_EfuseParseThermalMeter_8723A(padapter, hwinfo, |
| 1048 | pEEPROM->bautoload_fail_flag); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1049 | /* _ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); */ |
| 1050 | /* _ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); */ |
| 1051 | Hal_EfuseParseAntennaDiversity(padapter, hwinfo, |
| 1052 | pEEPROM->bautoload_fail_flag); |
| 1053 | |
| 1054 | Hal_EfuseParseEEPROMVer(padapter, hwinfo, pEEPROM->bautoload_fail_flag); |
| 1055 | Hal_EfuseParseCustomerID(padapter, hwinfo, |
| 1056 | pEEPROM->bautoload_fail_flag); |
| 1057 | Hal_EfuseParseRateIndicationOption(padapter, hwinfo, |
| 1058 | pEEPROM->bautoload_fail_flag); |
| 1059 | Hal_EfuseParseXtal_8723A(padapter, hwinfo, |
| 1060 | pEEPROM->bautoload_fail_flag); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1061 | |
| 1062 | /* hal_CustomizedBehavior_8723U(Adapter); */ |
| 1063 | |
| 1064 | /* Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1; */ |
| 1065 | DBG_8723A("%s(): REPLACEMENT = %x\n", __func__, padapter->bDongle); |
| 1066 | } |
| 1067 | |
| 1068 | static void _ReadPROMContent(struct rtw_adapter *Adapter) |
| 1069 | { |
| 1070 | struct eeprom_priv *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); |
| 1071 | u8 eeValue; |
| 1072 | |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 1073 | eeValue = rtl8723au_read8(Adapter, REG_9346CR); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1074 | /* To check system boot selection. */ |
| 1075 | pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? true : false; |
| 1076 | pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? false : true; |
| 1077 | |
| 1078 | DBG_8723A("Boot from %s, Autoload %s !\n", |
| 1079 | (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), |
| 1080 | (pEEPROM->bautoload_fail_flag ? "Fail" : "OK")); |
| 1081 | |
| 1082 | readAdapterInfo(Adapter); |
| 1083 | } |
| 1084 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1085 | /* */ |
| 1086 | /* Description: */ |
| 1087 | /* We should set Efuse cell selection to WiFi cell in default. */ |
| 1088 | /* */ |
| 1089 | /* Assumption: */ |
| 1090 | /* PASSIVE_LEVEL */ |
| 1091 | /* */ |
| 1092 | /* Added by Roger, 2010.11.23. */ |
| 1093 | /* */ |
| 1094 | static void hal_EfuseCellSel(struct rtw_adapter *Adapter) |
| 1095 | { |
| 1096 | u32 value32; |
| 1097 | |
Jes Sorensen | 050abc4 | 2014-05-16 10:05:08 +0200 | [diff] [blame] | 1098 | value32 = rtl8723au_read32(Adapter, EFUSE_TEST); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1099 | value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); |
Jes Sorensen | edbfd67 | 2014-05-16 10:05:09 +0200 | [diff] [blame] | 1100 | rtl8723au_write32(Adapter, EFUSE_TEST, value32); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1101 | } |
| 1102 | |
Jes Sorensen | 1f4746f | 2014-05-16 10:03:58 +0200 | [diff] [blame] | 1103 | void rtl8723a_read_adapter_info(struct rtw_adapter *Adapter) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1104 | { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1105 | unsigned long start = jiffies; |
| 1106 | |
Jes Sorensen | 1f4746f | 2014-05-16 10:03:58 +0200 | [diff] [blame] | 1107 | /* Read EEPROM size before call any EEPROM function */ |
| 1108 | Adapter->EepromAddressSize = GetEEPROMSize8723A(Adapter); |
| 1109 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1110 | MSG_8723A("====> _ReadAdapterInfo8723AU\n"); |
| 1111 | |
| 1112 | hal_EfuseCellSel(Adapter); |
| 1113 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1114 | _ReadPROMContent(Adapter); |
| 1115 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1116 | MSG_8723A("<==== _ReadAdapterInfo8723AU in %d ms\n", |
| 1117 | jiffies_to_msecs(jiffies - start)); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1118 | } |
| 1119 | |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1120 | /* */ |
| 1121 | /* Description: */ |
| 1122 | /* Query setting of specified variable. */ |
| 1123 | /* */ |
Jes Sorensen | 39f1a8e | 2014-05-16 10:04:20 +0200 | [diff] [blame] | 1124 | int GetHalDefVar8192CUsb(struct rtw_adapter *Adapter, |
| 1125 | enum hal_def_variable eVariable, void *pValue) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1126 | { |
Jes Sorensen | 39f1a8e | 2014-05-16 10:04:20 +0200 | [diff] [blame] | 1127 | struct hal_data_8723a *pHalData = GET_HAL_DATA(Adapter); |
| 1128 | int bResult = _SUCCESS; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1129 | |
| 1130 | switch (eVariable) { |
| 1131 | case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: |
| 1132 | *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; |
| 1133 | break; |
| 1134 | case HAL_DEF_IS_SUPPORT_ANT_DIV: |
| 1135 | break; |
| 1136 | case HAL_DEF_CURRENT_ANTENNA: |
| 1137 | break; |
| 1138 | case HAL_DEF_DRVINFO_SZ: |
| 1139 | *((u32 *)pValue) = DRVINFO_SZ; |
| 1140 | break; |
| 1141 | case HAL_DEF_MAX_RECVBUF_SZ: |
| 1142 | *((u32 *)pValue) = MAX_RECVBUF_SZ; |
| 1143 | break; |
| 1144 | case HAL_DEF_RX_PACKET_OFFSET: |
| 1145 | *((u32 *)pValue) = RXDESC_SIZE + DRVINFO_SZ; |
| 1146 | break; |
| 1147 | case HAL_DEF_DBG_DUMP_RXPKT: |
| 1148 | *((u8 *)pValue) = pHalData->bDumpRxPkt; |
| 1149 | break; |
| 1150 | case HAL_DEF_DBG_DM_FUNC: |
| 1151 | *((u32 *)pValue) = pHalData->odmpriv.SupportAbility; |
| 1152 | break; |
| 1153 | case HW_VAR_MAX_RX_AMPDU_FACTOR: |
| 1154 | *((u32 *)pValue) = IEEE80211_HT_MAX_AMPDU_64K; |
| 1155 | break; |
| 1156 | case HW_DEF_ODM_DBG_FLAG: |
| 1157 | { |
| 1158 | struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; |
| 1159 | printk("pDM_Odm->DebugComponents = 0x%llx\n", |
| 1160 | pDM_Odm->DebugComponents); |
| 1161 | } |
| 1162 | break; |
| 1163 | default: |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1164 | bResult = _FAIL; |
| 1165 | break; |
| 1166 | } |
| 1167 | |
| 1168 | return bResult; |
| 1169 | } |
| 1170 | |
Jes Sorensen | ac4cbc6 | 2014-05-16 10:04:19 +0200 | [diff] [blame] | 1171 | void rtl8723a_update_ramask(struct rtw_adapter *padapter, |
| 1172 | u32 mac_id, u8 rssi_level) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1173 | { |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1174 | struct sta_info *psta; |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1175 | struct FW_Sta_Info *fw_sta; |
| 1176 | struct hal_data_8723a *pHalData = GET_HAL_DATA(padapter); |
| 1177 | struct dm_priv *pdmpriv = &pHalData->dmpriv; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1178 | struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; |
| 1179 | struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; |
| 1180 | struct wlan_bssid_ex *cur_network = &pmlmeinfo->network; |
Jes Sorensen | b1e4d2f | 2015-02-09 17:52:17 -0500 | [diff] [blame] | 1181 | u8 init_rate, networkType, raid, arg; |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1182 | u32 mask, rate_bitmap; |
| 1183 | u8 shortGIrate = false; |
| 1184 | int supportRateNum; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1185 | |
| 1186 | if (mac_id >= NUM_STA) /* CAM_SIZE */ |
| 1187 | return; |
| 1188 | |
| 1189 | psta = pmlmeinfo->FW_sta_info[mac_id].psta; |
| 1190 | if (psta == NULL) |
| 1191 | return; |
| 1192 | |
| 1193 | switch (mac_id) { |
| 1194 | case 0:/* for infra mode */ |
| 1195 | supportRateNum = |
| 1196 | rtw_get_rateset_len23a(cur_network->SupportedRates); |
| 1197 | networkType = judge_network_type23a(padapter, |
| 1198 | cur_network->SupportedRates, |
| 1199 | supportRateNum) & 0xf; |
| 1200 | /* pmlmeext->cur_wireless_mode = networkType; */ |
| 1201 | raid = networktype_to_raid23a(networkType); |
| 1202 | |
| 1203 | mask = update_supported_rate23a(cur_network->SupportedRates, |
| 1204 | supportRateNum); |
| 1205 | mask |= (pmlmeinfo->HT_enable) ? |
Jes Sorensen | 65be27d | 2014-05-31 18:05:11 +0200 | [diff] [blame] | 1206 | update_MSC_rate23a(&pmlmeinfo->ht_cap) : 0; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1207 | |
Jes Sorensen | 65be27d | 2014-05-31 18:05:11 +0200 | [diff] [blame] | 1208 | if (support_short_GI23a(padapter, &pmlmeinfo->ht_cap)) |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1209 | shortGIrate = true; |
| 1210 | break; |
| 1211 | |
| 1212 | case 1:/* for broadcast/multicast */ |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1213 | fw_sta = &pmlmeinfo->FW_sta_info[mac_id]; |
| 1214 | supportRateNum = rtw_get_rateset_len23a(fw_sta->SupportedRates); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1215 | if (pmlmeext->cur_wireless_mode & WIRELESS_11B) |
| 1216 | networkType = WIRELESS_11B; |
| 1217 | else |
| 1218 | networkType = WIRELESS_11G; |
| 1219 | raid = networktype_to_raid23a(networkType); |
| 1220 | |
| 1221 | mask = update_basic_rate23a(cur_network->SupportedRates, |
| 1222 | supportRateNum); |
| 1223 | break; |
| 1224 | |
| 1225 | default: /* for each sta in IBSS */ |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1226 | fw_sta = &pmlmeinfo->FW_sta_info[mac_id]; |
| 1227 | supportRateNum = rtw_get_rateset_len23a(fw_sta->SupportedRates); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1228 | networkType = judge_network_type23a(padapter, |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1229 | fw_sta->SupportedRates, |
| 1230 | supportRateNum) & 0xf; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1231 | /* pmlmeext->cur_wireless_mode = networkType; */ |
| 1232 | raid = networktype_to_raid23a(networkType); |
| 1233 | |
| 1234 | mask = update_supported_rate23a(cur_network->SupportedRates, |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1235 | supportRateNum); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1236 | |
| 1237 | /* todo: support HT in IBSS */ |
| 1238 | break; |
| 1239 | } |
| 1240 | |
| 1241 | /* mask &= 0x0fffffff; */ |
Jes Sorensen | 301fc63 | 2014-07-21 11:24:57 +0200 | [diff] [blame] | 1242 | rate_bitmap = ODM_Get_Rate_Bitmap23a(pHalData, mac_id, mask, |
| 1243 | rssi_level); |
Jes Sorensen | 316f621 | 2014-05-21 09:38:03 +0200 | [diff] [blame] | 1244 | DBG_8723A("%s => mac_id:%d, networkType:0x%02x, " |
| 1245 | "mask:0x%08x\n\t ==> rssi_level:%d, rate_bitmap:0x%08x\n", |
| 1246 | __func__, mac_id, networkType, mask, rssi_level, rate_bitmap); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1247 | |
| 1248 | mask &= rate_bitmap; |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1249 | mask |= ((raid << 28) & 0xf0000000); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1250 | |
Jes Sorensen | 36318bd | 2014-11-30 16:05:11 -0500 | [diff] [blame] | 1251 | init_rate = get_highest_rate_idx23a(mask) & 0x3f; |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1252 | |
Jes Sorensen | b1e4d2f | 2015-02-09 17:52:17 -0500 | [diff] [blame] | 1253 | arg = mac_id & 0x1f;/* MACID */ |
| 1254 | arg |= BIT(7); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1255 | |
Jes Sorensen | b1e4d2f | 2015-02-09 17:52:17 -0500 | [diff] [blame] | 1256 | if (shortGIrate == true) |
| 1257 | arg |= BIT(5); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1258 | |
Jes Sorensen | b1e4d2f | 2015-02-09 17:52:17 -0500 | [diff] [blame] | 1259 | DBG_8723A("update raid entry, mask = 0x%x, arg = 0x%x\n", mask, arg); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1260 | |
Jes Sorensen | b1e4d2f | 2015-02-09 17:52:17 -0500 | [diff] [blame] | 1261 | rtl8723a_set_raid_cmd(padapter, mask, arg); |
Larry Finger | f7c92d2 | 2014-03-28 21:37:39 -0500 | [diff] [blame] | 1262 | |
| 1263 | /* set ra_id */ |
| 1264 | psta->raid = raid; |
| 1265 | psta->init_rate = init_rate; |
| 1266 | |
| 1267 | /* set correct initial date rate for each mac_id */ |
| 1268 | pdmpriv->INIDATA_RATE[mac_id] = init_rate; |
| 1269 | } |