blob: 00bec609aae2aef589c16d3f39ebe20634fbc567 [file] [log] [blame]
Eli Cohene126ba92013-07-07 17:25:49 +03001/*
Matthew Finlayb3f63c32016-02-22 18:17:32 +02002 * Copyright (c) 2013-2016, Mellanox Technologies. All rights reserved.
Eli Cohene126ba92013-07-07 17:25:49 +03003 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
Christoph Hellwigadec6402015-08-28 09:27:19 +020033#include <linux/highmem.h>
Eli Cohene126ba92013-07-07 17:25:49 +030034#include <linux/module.h>
Eli Cohene126ba92013-07-07 17:25:49 +030035#include <linux/errno.h>
36#include <linux/pci.h>
37#include <linux/dma-mapping.h>
38#include <linux/slab.h>
39#include <linux/delay.h>
40#include <linux/random.h>
41#include <linux/io-mapping.h>
42#include <linux/mlx5/driver.h>
43#include <linux/debugfs.h>
44
45#include "mlx5_core.h"
46
47enum {
Moshe Lazer0a324f312013-08-14 17:46:48 +030048 CMD_IF_REV = 5,
Eli Cohene126ba92013-07-07 17:25:49 +030049};
50
51enum {
52 CMD_MODE_POLLING,
53 CMD_MODE_EVENTS
54};
55
56enum {
57 NUM_LONG_LISTS = 2,
58 NUM_MED_LISTS = 64,
59 LONG_LIST_SIZE = (2ULL * 1024 * 1024 * 1024 / PAGE_SIZE) * 8 + 16 +
60 MLX5_CMD_DATA_BLOCK_SIZE,
61 MED_LIST_SIZE = 16 + MLX5_CMD_DATA_BLOCK_SIZE,
62};
63
64enum {
65 MLX5_CMD_DELIVERY_STAT_OK = 0x0,
66 MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR = 0x1,
67 MLX5_CMD_DELIVERY_STAT_TOK_ERR = 0x2,
68 MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR = 0x3,
69 MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR = 0x4,
70 MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR = 0x5,
71 MLX5_CMD_DELIVERY_STAT_FW_ERR = 0x6,
72 MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR = 0x7,
73 MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR = 0x8,
74 MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR = 0x9,
75 MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR = 0x10,
76};
77
Eli Cohene126ba92013-07-07 17:25:49 +030078static struct mlx5_cmd_work_ent *alloc_cmd(struct mlx5_cmd *cmd,
79 struct mlx5_cmd_msg *in,
80 struct mlx5_cmd_msg *out,
Eli Cohen746b5582013-10-23 09:53:14 +030081 void *uout, int uout_size,
Eli Cohene126ba92013-07-07 17:25:49 +030082 mlx5_cmd_cbk_t cbk,
83 void *context, int page_queue)
84{
85 gfp_t alloc_flags = cbk ? GFP_ATOMIC : GFP_KERNEL;
86 struct mlx5_cmd_work_ent *ent;
87
88 ent = kzalloc(sizeof(*ent), alloc_flags);
89 if (!ent)
90 return ERR_PTR(-ENOMEM);
91
92 ent->in = in;
93 ent->out = out;
Eli Cohen746b5582013-10-23 09:53:14 +030094 ent->uout = uout;
95 ent->uout_size = uout_size;
Eli Cohene126ba92013-07-07 17:25:49 +030096 ent->callback = cbk;
97 ent->context = context;
98 ent->cmd = cmd;
99 ent->page_queue = page_queue;
100
101 return ent;
102}
103
104static u8 alloc_token(struct mlx5_cmd *cmd)
105{
106 u8 token;
107
108 spin_lock(&cmd->token_lock);
Achiad Shochat4cbdd272015-04-02 17:07:28 +0300109 cmd->token++;
110 if (cmd->token == 0)
111 cmd->token++;
112 token = cmd->token;
Eli Cohene126ba92013-07-07 17:25:49 +0300113 spin_unlock(&cmd->token_lock);
114
115 return token;
116}
117
118static int alloc_ent(struct mlx5_cmd *cmd)
119{
120 unsigned long flags;
121 int ret;
122
123 spin_lock_irqsave(&cmd->alloc_lock, flags);
124 ret = find_first_bit(&cmd->bitmask, cmd->max_reg_cmds);
125 if (ret < cmd->max_reg_cmds)
126 clear_bit(ret, &cmd->bitmask);
127 spin_unlock_irqrestore(&cmd->alloc_lock, flags);
128
129 return ret < cmd->max_reg_cmds ? ret : -ENOMEM;
130}
131
132static void free_ent(struct mlx5_cmd *cmd, int idx)
133{
134 unsigned long flags;
135
136 spin_lock_irqsave(&cmd->alloc_lock, flags);
137 set_bit(idx, &cmd->bitmask);
138 spin_unlock_irqrestore(&cmd->alloc_lock, flags);
139}
140
141static struct mlx5_cmd_layout *get_inst(struct mlx5_cmd *cmd, int idx)
142{
143 return cmd->cmd_buf + (idx << cmd->log_stride);
144}
145
146static u8 xor8_buf(void *buf, int len)
147{
148 u8 *ptr = buf;
149 u8 sum = 0;
150 int i;
151
152 for (i = 0; i < len; i++)
153 sum ^= ptr[i];
154
155 return sum;
156}
157
158static int verify_block_sig(struct mlx5_cmd_prot_block *block)
159{
160 if (xor8_buf(block->rsvd0, sizeof(*block) - sizeof(block->data) - 1) != 0xff)
161 return -EINVAL;
162
163 if (xor8_buf(block, sizeof(*block)) != 0xff)
164 return -EINVAL;
165
166 return 0;
167}
168
Eli Cohenc1868b82013-09-11 16:35:25 +0300169static void calc_block_sig(struct mlx5_cmd_prot_block *block, u8 token,
170 int csum)
Eli Cohene126ba92013-07-07 17:25:49 +0300171{
172 block->token = token;
Eli Cohenc1868b82013-09-11 16:35:25 +0300173 if (csum) {
174 block->ctrl_sig = ~xor8_buf(block->rsvd0, sizeof(*block) -
175 sizeof(block->data) - 2);
176 block->sig = ~xor8_buf(block, sizeof(*block) - 1);
177 }
Eli Cohene126ba92013-07-07 17:25:49 +0300178}
179
Eli Cohenc1868b82013-09-11 16:35:25 +0300180static void calc_chain_sig(struct mlx5_cmd_msg *msg, u8 token, int csum)
Eli Cohene126ba92013-07-07 17:25:49 +0300181{
182 struct mlx5_cmd_mailbox *next = msg->next;
183
184 while (next) {
Eli Cohenc1868b82013-09-11 16:35:25 +0300185 calc_block_sig(next->buf, token, csum);
Eli Cohene126ba92013-07-07 17:25:49 +0300186 next = next->next;
187 }
188}
189
Eli Cohenc1868b82013-09-11 16:35:25 +0300190static void set_signature(struct mlx5_cmd_work_ent *ent, int csum)
Eli Cohene126ba92013-07-07 17:25:49 +0300191{
192 ent->lay->sig = ~xor8_buf(ent->lay, sizeof(*ent->lay));
Eli Cohenc1868b82013-09-11 16:35:25 +0300193 calc_chain_sig(ent->in, ent->token, csum);
194 calc_chain_sig(ent->out, ent->token, csum);
Eli Cohene126ba92013-07-07 17:25:49 +0300195}
196
197static void poll_timeout(struct mlx5_cmd_work_ent *ent)
198{
199 unsigned long poll_end = jiffies + msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC + 1000);
200 u8 own;
201
202 do {
203 own = ent->lay->status_own;
204 if (!(own & CMD_OWNER_HW)) {
205 ent->ret = 0;
206 return;
207 }
208 usleep_range(5000, 10000);
209 } while (time_before(jiffies, poll_end));
210
211 ent->ret = -ETIMEDOUT;
212}
213
214static void free_cmd(struct mlx5_cmd_work_ent *ent)
215{
216 kfree(ent);
217}
218
219
220static int verify_signature(struct mlx5_cmd_work_ent *ent)
221{
222 struct mlx5_cmd_mailbox *next = ent->out->next;
223 int err;
224 u8 sig;
225
226 sig = xor8_buf(ent->lay, sizeof(*ent->lay));
227 if (sig != 0xff)
228 return -EINVAL;
229
230 while (next) {
231 err = verify_block_sig(next->buf);
232 if (err)
233 return err;
234
235 next = next->next;
236 }
237
238 return 0;
239}
240
241static void dump_buf(void *buf, int size, int data_only, int offset)
242{
243 __be32 *p = buf;
244 int i;
245
246 for (i = 0; i < size; i += 16) {
247 pr_debug("%03x: %08x %08x %08x %08x\n", offset, be32_to_cpu(p[0]),
248 be32_to_cpu(p[1]), be32_to_cpu(p[2]),
249 be32_to_cpu(p[3]));
250 p += 4;
251 offset += 16;
252 }
253 if (!data_only)
254 pr_debug("\n");
255}
256
Eli Cohen020446e2015-10-08 17:13:58 +0300257enum {
258 MLX5_DRIVER_STATUS_ABORTED = 0xfe,
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300259 MLX5_DRIVER_SYND = 0xbadd00de,
Eli Cohen020446e2015-10-08 17:13:58 +0300260};
261
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300262static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op,
263 u32 *synd, u8 *status)
264{
265 *synd = 0;
266 *status = 0;
267
268 switch (op) {
269 case MLX5_CMD_OP_TEARDOWN_HCA:
270 case MLX5_CMD_OP_DISABLE_HCA:
271 case MLX5_CMD_OP_MANAGE_PAGES:
272 case MLX5_CMD_OP_DESTROY_MKEY:
273 case MLX5_CMD_OP_DESTROY_EQ:
274 case MLX5_CMD_OP_DESTROY_CQ:
275 case MLX5_CMD_OP_DESTROY_QP:
276 case MLX5_CMD_OP_DESTROY_PSV:
277 case MLX5_CMD_OP_DESTROY_SRQ:
278 case MLX5_CMD_OP_DESTROY_XRC_SRQ:
279 case MLX5_CMD_OP_DESTROY_DCT:
280 case MLX5_CMD_OP_DEALLOC_Q_COUNTER:
281 case MLX5_CMD_OP_DEALLOC_PD:
282 case MLX5_CMD_OP_DEALLOC_UAR:
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300283 case MLX5_CMD_OP_DETACH_FROM_MCG:
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300284 case MLX5_CMD_OP_DEALLOC_XRCD:
285 case MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN:
286 case MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT:
287 case MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY:
288 case MLX5_CMD_OP_DESTROY_TIR:
289 case MLX5_CMD_OP_DESTROY_SQ:
290 case MLX5_CMD_OP_DESTROY_RQ:
291 case MLX5_CMD_OP_DESTROY_RMP:
292 case MLX5_CMD_OP_DESTROY_TIS:
293 case MLX5_CMD_OP_DESTROY_RQT:
294 case MLX5_CMD_OP_DESTROY_FLOW_TABLE:
295 case MLX5_CMD_OP_DESTROY_FLOW_GROUP:
296 case MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY:
Amir Vadai9dc0b282016-05-13 12:55:39 +0000297 case MLX5_CMD_OP_DEALLOC_FLOW_COUNTER:
Mohamad Haj Yahia0d834442016-06-30 17:34:38 +0300298 case MLX5_CMD_OP_2ERR_QP:
299 case MLX5_CMD_OP_2RST_QP:
300 case MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT:
301 case MLX5_CMD_OP_MODIFY_FLOW_TABLE:
302 case MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY:
303 case MLX5_CMD_OP_SET_FLOW_TABLE_ROOT:
Ilya Lesokhin575ddf52016-02-23 13:25:22 +0200304 case MLX5_CMD_OP_DEALLOC_ENCAP_HEADER:
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300305 return MLX5_CMD_STAT_OK;
306
307 case MLX5_CMD_OP_QUERY_HCA_CAP:
308 case MLX5_CMD_OP_QUERY_ADAPTER:
309 case MLX5_CMD_OP_INIT_HCA:
310 case MLX5_CMD_OP_ENABLE_HCA:
311 case MLX5_CMD_OP_QUERY_PAGES:
312 case MLX5_CMD_OP_SET_HCA_CAP:
313 case MLX5_CMD_OP_QUERY_ISSI:
314 case MLX5_CMD_OP_SET_ISSI:
315 case MLX5_CMD_OP_CREATE_MKEY:
316 case MLX5_CMD_OP_QUERY_MKEY:
317 case MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS:
318 case MLX5_CMD_OP_PAGE_FAULT_RESUME:
319 case MLX5_CMD_OP_CREATE_EQ:
320 case MLX5_CMD_OP_QUERY_EQ:
321 case MLX5_CMD_OP_GEN_EQE:
322 case MLX5_CMD_OP_CREATE_CQ:
323 case MLX5_CMD_OP_QUERY_CQ:
324 case MLX5_CMD_OP_MODIFY_CQ:
325 case MLX5_CMD_OP_CREATE_QP:
326 case MLX5_CMD_OP_RST2INIT_QP:
327 case MLX5_CMD_OP_INIT2RTR_QP:
328 case MLX5_CMD_OP_RTR2RTS_QP:
329 case MLX5_CMD_OP_RTS2RTS_QP:
330 case MLX5_CMD_OP_SQERR2RTS_QP:
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300331 case MLX5_CMD_OP_QUERY_QP:
332 case MLX5_CMD_OP_SQD_RTS_QP:
333 case MLX5_CMD_OP_INIT2INIT_QP:
334 case MLX5_CMD_OP_CREATE_PSV:
335 case MLX5_CMD_OP_CREATE_SRQ:
336 case MLX5_CMD_OP_QUERY_SRQ:
337 case MLX5_CMD_OP_ARM_RQ:
338 case MLX5_CMD_OP_CREATE_XRC_SRQ:
339 case MLX5_CMD_OP_QUERY_XRC_SRQ:
340 case MLX5_CMD_OP_ARM_XRC_SRQ:
341 case MLX5_CMD_OP_CREATE_DCT:
342 case MLX5_CMD_OP_DRAIN_DCT:
343 case MLX5_CMD_OP_QUERY_DCT:
344 case MLX5_CMD_OP_ARM_DCT_FOR_KEY_VIOLATION:
345 case MLX5_CMD_OP_QUERY_VPORT_STATE:
346 case MLX5_CMD_OP_MODIFY_VPORT_STATE:
347 case MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT:
348 case MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT:
349 case MLX5_CMD_OP_QUERY_NIC_VPORT_CONTEXT:
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300350 case MLX5_CMD_OP_QUERY_ROCE_ADDRESS:
351 case MLX5_CMD_OP_SET_ROCE_ADDRESS:
352 case MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT:
353 case MLX5_CMD_OP_MODIFY_HCA_VPORT_CONTEXT:
354 case MLX5_CMD_OP_QUERY_HCA_VPORT_GID:
355 case MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY:
356 case MLX5_CMD_OP_QUERY_VPORT_COUNTER:
357 case MLX5_CMD_OP_ALLOC_Q_COUNTER:
358 case MLX5_CMD_OP_QUERY_Q_COUNTER:
359 case MLX5_CMD_OP_ALLOC_PD:
360 case MLX5_CMD_OP_ALLOC_UAR:
361 case MLX5_CMD_OP_CONFIG_INT_MODERATION:
362 case MLX5_CMD_OP_ACCESS_REG:
363 case MLX5_CMD_OP_ATTACH_TO_MCG:
364 case MLX5_CMD_OP_GET_DROPPED_PACKET_LOG:
365 case MLX5_CMD_OP_MAD_IFC:
366 case MLX5_CMD_OP_QUERY_MAD_DEMUX:
367 case MLX5_CMD_OP_SET_MAD_DEMUX:
368 case MLX5_CMD_OP_NOP:
369 case MLX5_CMD_OP_ALLOC_XRCD:
370 case MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN:
371 case MLX5_CMD_OP_QUERY_CONG_STATUS:
372 case MLX5_CMD_OP_MODIFY_CONG_STATUS:
373 case MLX5_CMD_OP_QUERY_CONG_PARAMS:
374 case MLX5_CMD_OP_MODIFY_CONG_PARAMS:
375 case MLX5_CMD_OP_QUERY_CONG_STATISTICS:
376 case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT:
377 case MLX5_CMD_OP_SET_L2_TABLE_ENTRY:
378 case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY:
379 case MLX5_CMD_OP_CREATE_TIR:
380 case MLX5_CMD_OP_MODIFY_TIR:
381 case MLX5_CMD_OP_QUERY_TIR:
382 case MLX5_CMD_OP_CREATE_SQ:
383 case MLX5_CMD_OP_MODIFY_SQ:
384 case MLX5_CMD_OP_QUERY_SQ:
385 case MLX5_CMD_OP_CREATE_RQ:
386 case MLX5_CMD_OP_MODIFY_RQ:
387 case MLX5_CMD_OP_QUERY_RQ:
388 case MLX5_CMD_OP_CREATE_RMP:
389 case MLX5_CMD_OP_MODIFY_RMP:
390 case MLX5_CMD_OP_QUERY_RMP:
391 case MLX5_CMD_OP_CREATE_TIS:
392 case MLX5_CMD_OP_MODIFY_TIS:
393 case MLX5_CMD_OP_QUERY_TIS:
394 case MLX5_CMD_OP_CREATE_RQT:
395 case MLX5_CMD_OP_MODIFY_RQT:
396 case MLX5_CMD_OP_QUERY_RQT:
Mohamad Haj Yahia0d834442016-06-30 17:34:38 +0300397
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300398 case MLX5_CMD_OP_CREATE_FLOW_TABLE:
399 case MLX5_CMD_OP_QUERY_FLOW_TABLE:
400 case MLX5_CMD_OP_CREATE_FLOW_GROUP:
401 case MLX5_CMD_OP_QUERY_FLOW_GROUP:
Mohamad Haj Yahia0d834442016-06-30 17:34:38 +0300402
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300403 case MLX5_CMD_OP_QUERY_FLOW_TABLE_ENTRY:
Amir Vadai9dc0b282016-05-13 12:55:39 +0000404 case MLX5_CMD_OP_ALLOC_FLOW_COUNTER:
405 case MLX5_CMD_OP_QUERY_FLOW_COUNTER:
Ilya Lesokhin575ddf52016-02-23 13:25:22 +0200406 case MLX5_CMD_OP_ALLOC_ENCAP_HEADER:
Majd Dibbiny89d44f02015-10-14 17:43:46 +0300407 *status = MLX5_DRIVER_STATUS_ABORTED;
408 *synd = MLX5_DRIVER_SYND;
409 return -EIO;
410 default:
411 mlx5_core_err(dev, "Unknown FW command (%d)\n", op);
412 return -EINVAL;
413 }
414}
415
Eli Cohene126ba92013-07-07 17:25:49 +0300416const char *mlx5_command_str(int command)
417{
Amir Vadai42ca5022016-05-13 12:55:38 +0000418#define MLX5_COMMAND_STR_CASE(__cmd) case MLX5_CMD_OP_ ## __cmd: return #__cmd
419
Eli Cohene126ba92013-07-07 17:25:49 +0300420 switch (command) {
Amir Vadai42ca5022016-05-13 12:55:38 +0000421 MLX5_COMMAND_STR_CASE(QUERY_HCA_CAP);
422 MLX5_COMMAND_STR_CASE(QUERY_ADAPTER);
423 MLX5_COMMAND_STR_CASE(INIT_HCA);
424 MLX5_COMMAND_STR_CASE(TEARDOWN_HCA);
425 MLX5_COMMAND_STR_CASE(ENABLE_HCA);
426 MLX5_COMMAND_STR_CASE(DISABLE_HCA);
427 MLX5_COMMAND_STR_CASE(QUERY_PAGES);
428 MLX5_COMMAND_STR_CASE(MANAGE_PAGES);
429 MLX5_COMMAND_STR_CASE(SET_HCA_CAP);
430 MLX5_COMMAND_STR_CASE(QUERY_ISSI);
431 MLX5_COMMAND_STR_CASE(SET_ISSI);
432 MLX5_COMMAND_STR_CASE(CREATE_MKEY);
433 MLX5_COMMAND_STR_CASE(QUERY_MKEY);
434 MLX5_COMMAND_STR_CASE(DESTROY_MKEY);
435 MLX5_COMMAND_STR_CASE(QUERY_SPECIAL_CONTEXTS);
436 MLX5_COMMAND_STR_CASE(PAGE_FAULT_RESUME);
437 MLX5_COMMAND_STR_CASE(CREATE_EQ);
438 MLX5_COMMAND_STR_CASE(DESTROY_EQ);
439 MLX5_COMMAND_STR_CASE(QUERY_EQ);
440 MLX5_COMMAND_STR_CASE(GEN_EQE);
441 MLX5_COMMAND_STR_CASE(CREATE_CQ);
442 MLX5_COMMAND_STR_CASE(DESTROY_CQ);
443 MLX5_COMMAND_STR_CASE(QUERY_CQ);
444 MLX5_COMMAND_STR_CASE(MODIFY_CQ);
445 MLX5_COMMAND_STR_CASE(CREATE_QP);
446 MLX5_COMMAND_STR_CASE(DESTROY_QP);
447 MLX5_COMMAND_STR_CASE(RST2INIT_QP);
448 MLX5_COMMAND_STR_CASE(INIT2RTR_QP);
449 MLX5_COMMAND_STR_CASE(RTR2RTS_QP);
450 MLX5_COMMAND_STR_CASE(RTS2RTS_QP);
451 MLX5_COMMAND_STR_CASE(SQERR2RTS_QP);
452 MLX5_COMMAND_STR_CASE(2ERR_QP);
453 MLX5_COMMAND_STR_CASE(2RST_QP);
454 MLX5_COMMAND_STR_CASE(QUERY_QP);
455 MLX5_COMMAND_STR_CASE(SQD_RTS_QP);
456 MLX5_COMMAND_STR_CASE(INIT2INIT_QP);
457 MLX5_COMMAND_STR_CASE(CREATE_PSV);
458 MLX5_COMMAND_STR_CASE(DESTROY_PSV);
459 MLX5_COMMAND_STR_CASE(CREATE_SRQ);
460 MLX5_COMMAND_STR_CASE(DESTROY_SRQ);
461 MLX5_COMMAND_STR_CASE(QUERY_SRQ);
462 MLX5_COMMAND_STR_CASE(ARM_RQ);
463 MLX5_COMMAND_STR_CASE(CREATE_XRC_SRQ);
464 MLX5_COMMAND_STR_CASE(DESTROY_XRC_SRQ);
465 MLX5_COMMAND_STR_CASE(QUERY_XRC_SRQ);
466 MLX5_COMMAND_STR_CASE(ARM_XRC_SRQ);
467 MLX5_COMMAND_STR_CASE(CREATE_DCT);
468 MLX5_COMMAND_STR_CASE(DESTROY_DCT);
469 MLX5_COMMAND_STR_CASE(DRAIN_DCT);
470 MLX5_COMMAND_STR_CASE(QUERY_DCT);
471 MLX5_COMMAND_STR_CASE(ARM_DCT_FOR_KEY_VIOLATION);
472 MLX5_COMMAND_STR_CASE(QUERY_VPORT_STATE);
473 MLX5_COMMAND_STR_CASE(MODIFY_VPORT_STATE);
474 MLX5_COMMAND_STR_CASE(QUERY_ESW_VPORT_CONTEXT);
475 MLX5_COMMAND_STR_CASE(MODIFY_ESW_VPORT_CONTEXT);
476 MLX5_COMMAND_STR_CASE(QUERY_NIC_VPORT_CONTEXT);
477 MLX5_COMMAND_STR_CASE(MODIFY_NIC_VPORT_CONTEXT);
478 MLX5_COMMAND_STR_CASE(QUERY_ROCE_ADDRESS);
479 MLX5_COMMAND_STR_CASE(SET_ROCE_ADDRESS);
480 MLX5_COMMAND_STR_CASE(QUERY_HCA_VPORT_CONTEXT);
481 MLX5_COMMAND_STR_CASE(MODIFY_HCA_VPORT_CONTEXT);
482 MLX5_COMMAND_STR_CASE(QUERY_HCA_VPORT_GID);
483 MLX5_COMMAND_STR_CASE(QUERY_HCA_VPORT_PKEY);
484 MLX5_COMMAND_STR_CASE(QUERY_VPORT_COUNTER);
485 MLX5_COMMAND_STR_CASE(ALLOC_Q_COUNTER);
486 MLX5_COMMAND_STR_CASE(DEALLOC_Q_COUNTER);
487 MLX5_COMMAND_STR_CASE(QUERY_Q_COUNTER);
488 MLX5_COMMAND_STR_CASE(ALLOC_PD);
489 MLX5_COMMAND_STR_CASE(DEALLOC_PD);
490 MLX5_COMMAND_STR_CASE(ALLOC_UAR);
491 MLX5_COMMAND_STR_CASE(DEALLOC_UAR);
492 MLX5_COMMAND_STR_CASE(CONFIG_INT_MODERATION);
493 MLX5_COMMAND_STR_CASE(ACCESS_REG);
494 MLX5_COMMAND_STR_CASE(ATTACH_TO_MCG);
Saeed Mahameed20bb5662016-07-17 02:01:45 +0300495 MLX5_COMMAND_STR_CASE(DETACH_FROM_MCG);
Amir Vadai42ca5022016-05-13 12:55:38 +0000496 MLX5_COMMAND_STR_CASE(GET_DROPPED_PACKET_LOG);
497 MLX5_COMMAND_STR_CASE(MAD_IFC);
498 MLX5_COMMAND_STR_CASE(QUERY_MAD_DEMUX);
499 MLX5_COMMAND_STR_CASE(SET_MAD_DEMUX);
500 MLX5_COMMAND_STR_CASE(NOP);
501 MLX5_COMMAND_STR_CASE(ALLOC_XRCD);
502 MLX5_COMMAND_STR_CASE(DEALLOC_XRCD);
503 MLX5_COMMAND_STR_CASE(ALLOC_TRANSPORT_DOMAIN);
504 MLX5_COMMAND_STR_CASE(DEALLOC_TRANSPORT_DOMAIN);
505 MLX5_COMMAND_STR_CASE(QUERY_CONG_STATUS);
506 MLX5_COMMAND_STR_CASE(MODIFY_CONG_STATUS);
507 MLX5_COMMAND_STR_CASE(QUERY_CONG_PARAMS);
508 MLX5_COMMAND_STR_CASE(MODIFY_CONG_PARAMS);
509 MLX5_COMMAND_STR_CASE(QUERY_CONG_STATISTICS);
510 MLX5_COMMAND_STR_CASE(ADD_VXLAN_UDP_DPORT);
511 MLX5_COMMAND_STR_CASE(DELETE_VXLAN_UDP_DPORT);
512 MLX5_COMMAND_STR_CASE(SET_L2_TABLE_ENTRY);
513 MLX5_COMMAND_STR_CASE(QUERY_L2_TABLE_ENTRY);
514 MLX5_COMMAND_STR_CASE(DELETE_L2_TABLE_ENTRY);
515 MLX5_COMMAND_STR_CASE(SET_WOL_ROL);
516 MLX5_COMMAND_STR_CASE(QUERY_WOL_ROL);
517 MLX5_COMMAND_STR_CASE(CREATE_TIR);
518 MLX5_COMMAND_STR_CASE(MODIFY_TIR);
519 MLX5_COMMAND_STR_CASE(DESTROY_TIR);
520 MLX5_COMMAND_STR_CASE(QUERY_TIR);
521 MLX5_COMMAND_STR_CASE(CREATE_SQ);
522 MLX5_COMMAND_STR_CASE(MODIFY_SQ);
523 MLX5_COMMAND_STR_CASE(DESTROY_SQ);
524 MLX5_COMMAND_STR_CASE(QUERY_SQ);
525 MLX5_COMMAND_STR_CASE(CREATE_RQ);
526 MLX5_COMMAND_STR_CASE(MODIFY_RQ);
527 MLX5_COMMAND_STR_CASE(DESTROY_RQ);
528 MLX5_COMMAND_STR_CASE(QUERY_RQ);
529 MLX5_COMMAND_STR_CASE(CREATE_RMP);
530 MLX5_COMMAND_STR_CASE(MODIFY_RMP);
531 MLX5_COMMAND_STR_CASE(DESTROY_RMP);
532 MLX5_COMMAND_STR_CASE(QUERY_RMP);
533 MLX5_COMMAND_STR_CASE(CREATE_TIS);
534 MLX5_COMMAND_STR_CASE(MODIFY_TIS);
535 MLX5_COMMAND_STR_CASE(DESTROY_TIS);
536 MLX5_COMMAND_STR_CASE(QUERY_TIS);
537 MLX5_COMMAND_STR_CASE(CREATE_RQT);
538 MLX5_COMMAND_STR_CASE(MODIFY_RQT);
539 MLX5_COMMAND_STR_CASE(DESTROY_RQT);
540 MLX5_COMMAND_STR_CASE(QUERY_RQT);
541 MLX5_COMMAND_STR_CASE(SET_FLOW_TABLE_ROOT);
542 MLX5_COMMAND_STR_CASE(CREATE_FLOW_TABLE);
543 MLX5_COMMAND_STR_CASE(DESTROY_FLOW_TABLE);
544 MLX5_COMMAND_STR_CASE(QUERY_FLOW_TABLE);
545 MLX5_COMMAND_STR_CASE(CREATE_FLOW_GROUP);
546 MLX5_COMMAND_STR_CASE(DESTROY_FLOW_GROUP);
547 MLX5_COMMAND_STR_CASE(QUERY_FLOW_GROUP);
548 MLX5_COMMAND_STR_CASE(SET_FLOW_TABLE_ENTRY);
549 MLX5_COMMAND_STR_CASE(QUERY_FLOW_TABLE_ENTRY);
550 MLX5_COMMAND_STR_CASE(DELETE_FLOW_TABLE_ENTRY);
Amir Vadai9dc0b282016-05-13 12:55:39 +0000551 MLX5_COMMAND_STR_CASE(ALLOC_FLOW_COUNTER);
552 MLX5_COMMAND_STR_CASE(DEALLOC_FLOW_COUNTER);
553 MLX5_COMMAND_STR_CASE(QUERY_FLOW_COUNTER);
Eli Cohen5be1ea82016-06-27 12:08:32 +0300554 MLX5_COMMAND_STR_CASE(MODIFY_FLOW_TABLE);
Ilya Lesokhin575ddf52016-02-23 13:25:22 +0200555 MLX5_COMMAND_STR_CASE(ALLOC_ENCAP_HEADER);
556 MLX5_COMMAND_STR_CASE(DEALLOC_ENCAP_HEADER);
Eli Cohene126ba92013-07-07 17:25:49 +0300557 default: return "unknown command opcode";
558 }
559}
560
Saeed Mahameedc4f287c2016-07-19 20:17:12 +0300561static const char *cmd_status_str(u8 status)
562{
563 switch (status) {
564 case MLX5_CMD_STAT_OK:
565 return "OK";
566 case MLX5_CMD_STAT_INT_ERR:
567 return "internal error";
568 case MLX5_CMD_STAT_BAD_OP_ERR:
569 return "bad operation";
570 case MLX5_CMD_STAT_BAD_PARAM_ERR:
571 return "bad parameter";
572 case MLX5_CMD_STAT_BAD_SYS_STATE_ERR:
573 return "bad system state";
574 case MLX5_CMD_STAT_BAD_RES_ERR:
575 return "bad resource";
576 case MLX5_CMD_STAT_RES_BUSY:
577 return "resource busy";
578 case MLX5_CMD_STAT_LIM_ERR:
579 return "limits exceeded";
580 case MLX5_CMD_STAT_BAD_RES_STATE_ERR:
581 return "bad resource state";
582 case MLX5_CMD_STAT_IX_ERR:
583 return "bad index";
584 case MLX5_CMD_STAT_NO_RES_ERR:
585 return "no resources";
586 case MLX5_CMD_STAT_BAD_INP_LEN_ERR:
587 return "bad input length";
588 case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR:
589 return "bad output length";
590 case MLX5_CMD_STAT_BAD_QP_STATE_ERR:
591 return "bad QP state";
592 case MLX5_CMD_STAT_BAD_PKT_ERR:
593 return "bad packet (discarded)";
594 case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR:
595 return "bad size too many outstanding CQEs";
596 default:
597 return "unknown status";
598 }
599}
600
601static int cmd_status_to_err(u8 status)
602{
603 switch (status) {
604 case MLX5_CMD_STAT_OK: return 0;
605 case MLX5_CMD_STAT_INT_ERR: return -EIO;
606 case MLX5_CMD_STAT_BAD_OP_ERR: return -EINVAL;
607 case MLX5_CMD_STAT_BAD_PARAM_ERR: return -EINVAL;
608 case MLX5_CMD_STAT_BAD_SYS_STATE_ERR: return -EIO;
609 case MLX5_CMD_STAT_BAD_RES_ERR: return -EINVAL;
610 case MLX5_CMD_STAT_RES_BUSY: return -EBUSY;
611 case MLX5_CMD_STAT_LIM_ERR: return -ENOMEM;
612 case MLX5_CMD_STAT_BAD_RES_STATE_ERR: return -EINVAL;
613 case MLX5_CMD_STAT_IX_ERR: return -EINVAL;
614 case MLX5_CMD_STAT_NO_RES_ERR: return -EAGAIN;
615 case MLX5_CMD_STAT_BAD_INP_LEN_ERR: return -EIO;
616 case MLX5_CMD_STAT_BAD_OUTP_LEN_ERR: return -EIO;
617 case MLX5_CMD_STAT_BAD_QP_STATE_ERR: return -EINVAL;
618 case MLX5_CMD_STAT_BAD_PKT_ERR: return -EINVAL;
619 case MLX5_CMD_STAT_BAD_SIZE_OUTS_CQES_ERR: return -EINVAL;
620 default: return -EIO;
621 }
622}
623
624struct mlx5_ifc_mbox_out_bits {
625 u8 status[0x8];
626 u8 reserved_at_8[0x18];
627
628 u8 syndrome[0x20];
629
630 u8 reserved_at_40[0x40];
631};
632
633struct mlx5_ifc_mbox_in_bits {
634 u8 opcode[0x10];
635 u8 reserved_at_10[0x10];
636
637 u8 reserved_at_20[0x10];
638 u8 op_mod[0x10];
639
640 u8 reserved_at_40[0x40];
641};
642
643void mlx5_cmd_mbox_status(void *out, u8 *status, u32 *syndrome)
644{
645 *status = MLX5_GET(mbox_out, out, status);
646 *syndrome = MLX5_GET(mbox_out, out, syndrome);
647}
648
649static int mlx5_cmd_check(struct mlx5_core_dev *dev, void *in, void *out)
650{
651 u32 syndrome;
652 u8 status;
653 u16 opcode;
654 u16 op_mod;
655
656 mlx5_cmd_mbox_status(out, &status, &syndrome);
657 if (!status)
658 return 0;
659
660 opcode = MLX5_GET(mbox_in, in, opcode);
661 op_mod = MLX5_GET(mbox_in, in, op_mod);
662
663 mlx5_core_err(dev,
664 "%s(0x%x) op_mod(0x%x) failed, status %s(0x%x), syndrome (0x%x)\n",
665 mlx5_command_str(opcode),
666 opcode, op_mod,
667 cmd_status_str(status),
668 status,
669 syndrome);
670
671 return cmd_status_to_err(status);
672}
673
Eli Cohene126ba92013-07-07 17:25:49 +0300674static void dump_command(struct mlx5_core_dev *dev,
675 struct mlx5_cmd_work_ent *ent, int input)
676{
Eli Cohene126ba92013-07-07 17:25:49 +0300677 struct mlx5_cmd_msg *msg = input ? ent->in : ent->out;
Saeed Mahameedc4f287c2016-07-19 20:17:12 +0300678 u16 op = MLX5_GET(mbox_in, ent->lay->in, opcode);
Eli Cohene126ba92013-07-07 17:25:49 +0300679 struct mlx5_cmd_mailbox *next = msg->next;
680 int data_only;
Jack Morgensteinf241e742014-07-28 23:30:23 +0300681 u32 offset = 0;
Eli Cohene126ba92013-07-07 17:25:49 +0300682 int dump_len;
683
684 data_only = !!(mlx5_core_debug_mask & (1 << MLX5_CMD_DATA));
685
686 if (data_only)
687 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_DATA,
688 "dump command data %s(0x%x) %s\n",
689 mlx5_command_str(op), op,
690 input ? "INPUT" : "OUTPUT");
691 else
692 mlx5_core_dbg(dev, "dump command %s(0x%x) %s\n",
693 mlx5_command_str(op), op,
694 input ? "INPUT" : "OUTPUT");
695
696 if (data_only) {
697 if (input) {
698 dump_buf(ent->lay->in, sizeof(ent->lay->in), 1, offset);
699 offset += sizeof(ent->lay->in);
700 } else {
701 dump_buf(ent->lay->out, sizeof(ent->lay->out), 1, offset);
702 offset += sizeof(ent->lay->out);
703 }
704 } else {
705 dump_buf(ent->lay, sizeof(*ent->lay), 0, offset);
706 offset += sizeof(*ent->lay);
707 }
708
709 while (next && offset < msg->len) {
710 if (data_only) {
711 dump_len = min_t(int, MLX5_CMD_DATA_BLOCK_SIZE, msg->len - offset);
712 dump_buf(next->buf, dump_len, 1, offset);
713 offset += MLX5_CMD_DATA_BLOCK_SIZE;
714 } else {
715 mlx5_core_dbg(dev, "command block:\n");
716 dump_buf(next->buf, sizeof(struct mlx5_cmd_prot_block), 0, offset);
717 offset += sizeof(struct mlx5_cmd_prot_block);
718 }
719 next = next->next;
720 }
721
722 if (data_only)
723 pr_debug("\n");
724}
725
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +0300726static u16 msg_to_opcode(struct mlx5_cmd_msg *in)
727{
Saeed Mahameedc4f287c2016-07-19 20:17:12 +0300728 return MLX5_GET(mbox_in, in->first.data, opcode);
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +0300729}
730
731static void cb_timeout_handler(struct work_struct *work)
732{
733 struct delayed_work *dwork = container_of(work, struct delayed_work,
734 work);
735 struct mlx5_cmd_work_ent *ent = container_of(dwork,
736 struct mlx5_cmd_work_ent,
737 cb_timeout_work);
738 struct mlx5_core_dev *dev = container_of(ent->cmd, struct mlx5_core_dev,
739 cmd);
740
741 ent->ret = -ETIMEDOUT;
742 mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
743 mlx5_command_str(msg_to_opcode(ent->in)),
744 msg_to_opcode(ent->in));
745 mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
746}
747
Eli Cohene126ba92013-07-07 17:25:49 +0300748static void cmd_work_handler(struct work_struct *work)
749{
750 struct mlx5_cmd_work_ent *ent = container_of(work, struct mlx5_cmd_work_ent, work);
751 struct mlx5_cmd *cmd = ent->cmd;
752 struct mlx5_core_dev *dev = container_of(cmd, struct mlx5_core_dev, cmd);
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +0300753 unsigned long cb_timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
Eli Cohene126ba92013-07-07 17:25:49 +0300754 struct mlx5_cmd_layout *lay;
755 struct semaphore *sem;
Eli Cohen020446e2015-10-08 17:13:58 +0300756 unsigned long flags;
Eli Cohene126ba92013-07-07 17:25:49 +0300757
758 sem = ent->page_queue ? &cmd->pages_sem : &cmd->sem;
759 down(sem);
760 if (!ent->page_queue) {
761 ent->idx = alloc_ent(cmd);
762 if (ent->idx < 0) {
763 mlx5_core_err(dev, "failed to allocate command entry\n");
764 up(sem);
765 return;
766 }
767 } else {
768 ent->idx = cmd->max_reg_cmds;
Eli Cohen020446e2015-10-08 17:13:58 +0300769 spin_lock_irqsave(&cmd->alloc_lock, flags);
770 clear_bit(ent->idx, &cmd->bitmask);
771 spin_unlock_irqrestore(&cmd->alloc_lock, flags);
Eli Cohene126ba92013-07-07 17:25:49 +0300772 }
773
774 ent->token = alloc_token(cmd);
775 cmd->ent_arr[ent->idx] = ent;
776 lay = get_inst(cmd, ent->idx);
777 ent->lay = lay;
778 memset(lay, 0, sizeof(*lay));
779 memcpy(lay->in, ent->in->first.data, sizeof(lay->in));
Eli Cohen746b5582013-10-23 09:53:14 +0300780 ent->op = be32_to_cpu(lay->in[0]) >> 16;
Eli Cohene126ba92013-07-07 17:25:49 +0300781 if (ent->in->next)
782 lay->in_ptr = cpu_to_be64(ent->in->next->dma);
783 lay->inlen = cpu_to_be32(ent->in->len);
784 if (ent->out->next)
785 lay->out_ptr = cpu_to_be64(ent->out->next->dma);
786 lay->outlen = cpu_to_be32(ent->out->len);
787 lay->type = MLX5_PCI_CMD_XPORT;
788 lay->token = ent->token;
789 lay->status_own = CMD_OWNER_HW;
Eli Cohenc1868b82013-09-11 16:35:25 +0300790 set_signature(ent, !cmd->checksum_disabled);
Eli Cohene126ba92013-07-07 17:25:49 +0300791 dump_command(dev, ent, 1);
Thomas Gleixner14a70042014-07-16 21:04:44 +0000792 ent->ts1 = ktime_get_ns();
Eli Cohene126ba92013-07-07 17:25:49 +0300793
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +0300794 if (ent->callback)
795 schedule_delayed_work(&ent->cb_timeout_work, cb_timeout);
796
Eli Cohene126ba92013-07-07 17:25:49 +0300797 /* ring doorbell after the descriptor is valid */
Ira Gusinsky21db5072015-04-02 17:07:27 +0300798 mlx5_core_dbg(dev, "writing 0x%x to command doorbell\n", 1 << ent->idx);
Eli Cohene126ba92013-07-07 17:25:49 +0300799 wmb();
800 iowrite32be(1 << ent->idx, &dev->iseg->cmd_dbell);
Eli Cohene126ba92013-07-07 17:25:49 +0300801 mmiowb();
Ira Gusinsky21db5072015-04-02 17:07:27 +0300802 /* if not in polling don't use ent after this point */
Eli Cohene126ba92013-07-07 17:25:49 +0300803 if (cmd->mode == CMD_MODE_POLLING) {
804 poll_timeout(ent);
805 /* make sure we read the descriptor after ownership is SW */
806 rmb();
807 mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
808 }
809}
810
811static const char *deliv_status_to_str(u8 status)
812{
813 switch (status) {
814 case MLX5_CMD_DELIVERY_STAT_OK:
815 return "no errors";
816 case MLX5_CMD_DELIVERY_STAT_SIGNAT_ERR:
817 return "signature error";
818 case MLX5_CMD_DELIVERY_STAT_TOK_ERR:
819 return "token error";
820 case MLX5_CMD_DELIVERY_STAT_BAD_BLK_NUM_ERR:
821 return "bad block number";
822 case MLX5_CMD_DELIVERY_STAT_OUT_PTR_ALIGN_ERR:
823 return "output pointer not aligned to block size";
824 case MLX5_CMD_DELIVERY_STAT_IN_PTR_ALIGN_ERR:
825 return "input pointer not aligned to block size";
826 case MLX5_CMD_DELIVERY_STAT_FW_ERR:
827 return "firmware internal error";
828 case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:
829 return "command input length error";
830 case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:
831 return "command ouput length error";
832 case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:
833 return "reserved fields not cleared";
834 case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:
835 return "bad command descriptor type";
836 default:
837 return "unknown status code";
838 }
839}
840
Eli Cohene126ba92013-07-07 17:25:49 +0300841static int wait_func(struct mlx5_core_dev *dev, struct mlx5_cmd_work_ent *ent)
842{
843 unsigned long timeout = msecs_to_jiffies(MLX5_CMD_TIMEOUT_MSEC);
844 struct mlx5_cmd *cmd = &dev->cmd;
845 int err;
846
847 if (cmd->mode == CMD_MODE_POLLING) {
848 wait_for_completion(&ent->done);
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300849 } else if (!wait_for_completion_timeout(&ent->done, timeout)) {
850 ent->ret = -ETIMEDOUT;
851 mlx5_cmd_comp_handler(dev, 1UL << ent->idx);
Eli Cohene126ba92013-07-07 17:25:49 +0300852 }
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300853
854 err = ent->ret;
855
Eli Cohene126ba92013-07-07 17:25:49 +0300856 if (err == -ETIMEDOUT) {
857 mlx5_core_warn(dev, "%s(0x%x) timeout. Will cause a leak of a command resource\n",
858 mlx5_command_str(msg_to_opcode(ent->in)),
859 msg_to_opcode(ent->in));
860 }
Joe Perches1a91de22014-05-07 12:52:57 -0700861 mlx5_core_dbg(dev, "err %d, delivery status %s(%d)\n",
862 err, deliv_status_to_str(ent->status), ent->status);
Eli Cohene126ba92013-07-07 17:25:49 +0300863
864 return err;
865}
866
867/* Notes:
868 * 1. Callback functions may not sleep
869 * 2. page queue commands do not support asynchrous completion
870 */
871static int mlx5_cmd_invoke(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *in,
Eli Cohen746b5582013-10-23 09:53:14 +0300872 struct mlx5_cmd_msg *out, void *uout, int uout_size,
873 mlx5_cmd_cbk_t callback,
Eli Cohene126ba92013-07-07 17:25:49 +0300874 void *context, int page_queue, u8 *status)
875{
876 struct mlx5_cmd *cmd = &dev->cmd;
877 struct mlx5_cmd_work_ent *ent;
Eli Cohene126ba92013-07-07 17:25:49 +0300878 struct mlx5_cmd_stats *stats;
879 int err = 0;
880 s64 ds;
881 u16 op;
882
883 if (callback && page_queue)
884 return -EINVAL;
885
Eli Cohen746b5582013-10-23 09:53:14 +0300886 ent = alloc_cmd(cmd, in, out, uout, uout_size, callback, context,
887 page_queue);
Eli Cohene126ba92013-07-07 17:25:49 +0300888 if (IS_ERR(ent))
889 return PTR_ERR(ent);
890
891 if (!callback)
892 init_completion(&ent->done);
893
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +0300894 INIT_DELAYED_WORK(&ent->cb_timeout_work, cb_timeout_handler);
Eli Cohene126ba92013-07-07 17:25:49 +0300895 INIT_WORK(&ent->work, cmd_work_handler);
896 if (page_queue) {
897 cmd_work_handler(&ent->work);
898 } else if (!queue_work(cmd->wq, &ent->work)) {
899 mlx5_core_warn(dev, "failed to queue work\n");
900 err = -ENOMEM;
901 goto out_free;
902 }
903
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300904 if (callback)
905 goto out;
Eli Cohene126ba92013-07-07 17:25:49 +0300906
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300907 err = wait_func(dev, ent);
908 if (err == -ETIMEDOUT)
909 goto out_free;
910
911 ds = ent->ts2 - ent->ts1;
Saeed Mahameedc4f287c2016-07-19 20:17:12 +0300912 op = MLX5_GET(mbox_in, in->first.data, opcode);
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300913 if (op < ARRAY_SIZE(cmd->stats)) {
914 stats = &cmd->stats[op];
915 spin_lock_irq(&stats->lock);
916 stats->sum += ds;
917 ++stats->n;
918 spin_unlock_irq(&stats->lock);
Eli Cohene126ba92013-07-07 17:25:49 +0300919 }
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +0300920 mlx5_core_dbg_mask(dev, 1 << MLX5_CMD_TIME,
921 "fw exec time for %s is %lld nsec\n",
922 mlx5_command_str(op), ds);
923 *status = ent->status;
Eli Cohene126ba92013-07-07 17:25:49 +0300924
925out_free:
926 free_cmd(ent);
927out:
928 return err;
929}
930
931static ssize_t dbg_write(struct file *filp, const char __user *buf,
932 size_t count, loff_t *pos)
933{
934 struct mlx5_core_dev *dev = filp->private_data;
935 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
936 char lbuf[3];
937 int err;
938
939 if (!dbg->in_msg || !dbg->out_msg)
940 return -ENOMEM;
941
942 if (copy_from_user(lbuf, buf, sizeof(lbuf)))
Dan Carpenter5e631a02013-07-10 13:58:59 +0300943 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +0300944
945 lbuf[sizeof(lbuf) - 1] = 0;
946
947 if (strcmp(lbuf, "go"))
948 return -EINVAL;
949
950 err = mlx5_cmd_exec(dev, dbg->in_msg, dbg->inlen, dbg->out_msg, dbg->outlen);
951
952 return err ? err : count;
953}
954
955
956static const struct file_operations fops = {
957 .owner = THIS_MODULE,
958 .open = simple_open,
959 .write = dbg_write,
960};
961
962static int mlx5_copy_to_msg(struct mlx5_cmd_msg *to, void *from, int size)
963{
964 struct mlx5_cmd_prot_block *block;
965 struct mlx5_cmd_mailbox *next;
966 int copy;
967
968 if (!to || !from)
969 return -ENOMEM;
970
971 copy = min_t(int, size, sizeof(to->first.data));
972 memcpy(to->first.data, from, copy);
973 size -= copy;
974 from += copy;
975
976 next = to->next;
977 while (size) {
978 if (!next) {
979 /* this is a BUG */
980 return -ENOMEM;
981 }
982
983 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
984 block = next->buf;
985 memcpy(block->data, from, copy);
986 from += copy;
987 size -= copy;
988 next = next->next;
989 }
990
991 return 0;
992}
993
994static int mlx5_copy_from_msg(void *to, struct mlx5_cmd_msg *from, int size)
995{
996 struct mlx5_cmd_prot_block *block;
997 struct mlx5_cmd_mailbox *next;
998 int copy;
999
1000 if (!to || !from)
1001 return -ENOMEM;
1002
1003 copy = min_t(int, size, sizeof(from->first.data));
1004 memcpy(to, from->first.data, copy);
1005 size -= copy;
1006 to += copy;
1007
1008 next = from->next;
1009 while (size) {
1010 if (!next) {
1011 /* this is a BUG */
1012 return -ENOMEM;
1013 }
1014
1015 copy = min_t(int, size, MLX5_CMD_DATA_BLOCK_SIZE);
1016 block = next->buf;
Eli Cohene126ba92013-07-07 17:25:49 +03001017
1018 memcpy(to, block->data, copy);
1019 to += copy;
1020 size -= copy;
1021 next = next->next;
1022 }
1023
1024 return 0;
1025}
1026
1027static struct mlx5_cmd_mailbox *alloc_cmd_box(struct mlx5_core_dev *dev,
1028 gfp_t flags)
1029{
1030 struct mlx5_cmd_mailbox *mailbox;
1031
1032 mailbox = kmalloc(sizeof(*mailbox), flags);
1033 if (!mailbox)
1034 return ERR_PTR(-ENOMEM);
1035
1036 mailbox->buf = pci_pool_alloc(dev->cmd.pool, flags,
1037 &mailbox->dma);
1038 if (!mailbox->buf) {
1039 mlx5_core_dbg(dev, "failed allocation\n");
1040 kfree(mailbox);
1041 return ERR_PTR(-ENOMEM);
1042 }
1043 memset(mailbox->buf, 0, sizeof(struct mlx5_cmd_prot_block));
1044 mailbox->next = NULL;
1045
1046 return mailbox;
1047}
1048
1049static void free_cmd_box(struct mlx5_core_dev *dev,
1050 struct mlx5_cmd_mailbox *mailbox)
1051{
1052 pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma);
1053 kfree(mailbox);
1054}
1055
1056static struct mlx5_cmd_msg *mlx5_alloc_cmd_msg(struct mlx5_core_dev *dev,
1057 gfp_t flags, int size)
1058{
1059 struct mlx5_cmd_mailbox *tmp, *head = NULL;
1060 struct mlx5_cmd_prot_block *block;
1061 struct mlx5_cmd_msg *msg;
1062 int blen;
1063 int err;
1064 int n;
1065 int i;
1066
Eli Cohen746b5582013-10-23 09:53:14 +03001067 msg = kzalloc(sizeof(*msg), flags);
Eli Cohene126ba92013-07-07 17:25:49 +03001068 if (!msg)
1069 return ERR_PTR(-ENOMEM);
1070
1071 blen = size - min_t(int, sizeof(msg->first.data), size);
1072 n = (blen + MLX5_CMD_DATA_BLOCK_SIZE - 1) / MLX5_CMD_DATA_BLOCK_SIZE;
1073
1074 for (i = 0; i < n; i++) {
1075 tmp = alloc_cmd_box(dev, flags);
1076 if (IS_ERR(tmp)) {
1077 mlx5_core_warn(dev, "failed allocating block\n");
1078 err = PTR_ERR(tmp);
1079 goto err_alloc;
1080 }
1081
1082 block = tmp->buf;
1083 tmp->next = head;
1084 block->next = cpu_to_be64(tmp->next ? tmp->next->dma : 0);
1085 block->block_num = cpu_to_be32(n - i - 1);
1086 head = tmp;
1087 }
1088 msg->next = head;
1089 msg->len = size;
1090 return msg;
1091
1092err_alloc:
1093 while (head) {
1094 tmp = head->next;
1095 free_cmd_box(dev, head);
1096 head = tmp;
1097 }
1098 kfree(msg);
1099
1100 return ERR_PTR(err);
1101}
1102
1103static void mlx5_free_cmd_msg(struct mlx5_core_dev *dev,
1104 struct mlx5_cmd_msg *msg)
1105{
1106 struct mlx5_cmd_mailbox *head = msg->next;
1107 struct mlx5_cmd_mailbox *next;
1108
1109 while (head) {
1110 next = head->next;
1111 free_cmd_box(dev, head);
1112 head = next;
1113 }
1114 kfree(msg);
1115}
1116
1117static ssize_t data_write(struct file *filp, const char __user *buf,
1118 size_t count, loff_t *pos)
1119{
1120 struct mlx5_core_dev *dev = filp->private_data;
1121 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1122 void *ptr;
1123 int err;
1124
1125 if (*pos != 0)
1126 return -EINVAL;
1127
1128 kfree(dbg->in_msg);
1129 dbg->in_msg = NULL;
1130 dbg->inlen = 0;
1131
1132 ptr = kzalloc(count, GFP_KERNEL);
1133 if (!ptr)
1134 return -ENOMEM;
1135
1136 if (copy_from_user(ptr, buf, count)) {
Dan Carpenter5e631a02013-07-10 13:58:59 +03001137 err = -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +03001138 goto out;
1139 }
1140 dbg->in_msg = ptr;
1141 dbg->inlen = count;
1142
1143 *pos = count;
1144
1145 return count;
1146
1147out:
1148 kfree(ptr);
1149 return err;
1150}
1151
1152static ssize_t data_read(struct file *filp, char __user *buf, size_t count,
1153 loff_t *pos)
1154{
1155 struct mlx5_core_dev *dev = filp->private_data;
1156 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1157 int copy;
1158
1159 if (*pos)
1160 return 0;
1161
1162 if (!dbg->out_msg)
1163 return -ENOMEM;
1164
1165 copy = min_t(int, count, dbg->outlen);
1166 if (copy_to_user(buf, dbg->out_msg, copy))
Dan Carpenter5e631a02013-07-10 13:58:59 +03001167 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +03001168
1169 *pos += copy;
1170
1171 return copy;
1172}
1173
1174static const struct file_operations dfops = {
1175 .owner = THIS_MODULE,
1176 .open = simple_open,
1177 .write = data_write,
1178 .read = data_read,
1179};
1180
1181static ssize_t outlen_read(struct file *filp, char __user *buf, size_t count,
1182 loff_t *pos)
1183{
1184 struct mlx5_core_dev *dev = filp->private_data;
1185 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1186 char outlen[8];
1187 int err;
1188
1189 if (*pos)
1190 return 0;
1191
1192 err = snprintf(outlen, sizeof(outlen), "%d", dbg->outlen);
1193 if (err < 0)
1194 return err;
1195
1196 if (copy_to_user(buf, &outlen, err))
Dan Carpenter5e631a02013-07-10 13:58:59 +03001197 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +03001198
1199 *pos += err;
1200
1201 return err;
1202}
1203
1204static ssize_t outlen_write(struct file *filp, const char __user *buf,
1205 size_t count, loff_t *pos)
1206{
1207 struct mlx5_core_dev *dev = filp->private_data;
1208 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1209 char outlen_str[8];
1210 int outlen;
1211 void *ptr;
1212 int err;
1213
1214 if (*pos != 0 || count > 6)
1215 return -EINVAL;
1216
1217 kfree(dbg->out_msg);
1218 dbg->out_msg = NULL;
1219 dbg->outlen = 0;
1220
1221 if (copy_from_user(outlen_str, buf, count))
Dan Carpenter5e631a02013-07-10 13:58:59 +03001222 return -EFAULT;
Eli Cohene126ba92013-07-07 17:25:49 +03001223
1224 outlen_str[7] = 0;
1225
1226 err = sscanf(outlen_str, "%d", &outlen);
1227 if (err < 0)
1228 return err;
1229
1230 ptr = kzalloc(outlen, GFP_KERNEL);
1231 if (!ptr)
1232 return -ENOMEM;
1233
1234 dbg->out_msg = ptr;
1235 dbg->outlen = outlen;
1236
1237 *pos = count;
1238
1239 return count;
1240}
1241
1242static const struct file_operations olfops = {
1243 .owner = THIS_MODULE,
1244 .open = simple_open,
1245 .write = outlen_write,
1246 .read = outlen_read,
1247};
1248
1249static void set_wqname(struct mlx5_core_dev *dev)
1250{
1251 struct mlx5_cmd *cmd = &dev->cmd;
1252
1253 snprintf(cmd->wq_name, sizeof(cmd->wq_name), "mlx5_cmd_%s",
1254 dev_name(&dev->pdev->dev));
1255}
1256
1257static void clean_debug_files(struct mlx5_core_dev *dev)
1258{
1259 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1260
1261 if (!mlx5_debugfs_root)
1262 return;
1263
1264 mlx5_cmdif_debugfs_cleanup(dev);
1265 debugfs_remove_recursive(dbg->dbg_root);
1266}
1267
1268static int create_debugfs_files(struct mlx5_core_dev *dev)
1269{
1270 struct mlx5_cmd_debug *dbg = &dev->cmd.dbg;
1271 int err = -ENOMEM;
1272
1273 if (!mlx5_debugfs_root)
1274 return 0;
1275
1276 dbg->dbg_root = debugfs_create_dir("cmd", dev->priv.dbg_root);
1277 if (!dbg->dbg_root)
1278 return err;
1279
1280 dbg->dbg_in = debugfs_create_file("in", 0400, dbg->dbg_root,
1281 dev, &dfops);
1282 if (!dbg->dbg_in)
1283 goto err_dbg;
1284
1285 dbg->dbg_out = debugfs_create_file("out", 0200, dbg->dbg_root,
1286 dev, &dfops);
1287 if (!dbg->dbg_out)
1288 goto err_dbg;
1289
1290 dbg->dbg_outlen = debugfs_create_file("out_len", 0600, dbg->dbg_root,
1291 dev, &olfops);
1292 if (!dbg->dbg_outlen)
1293 goto err_dbg;
1294
1295 dbg->dbg_status = debugfs_create_u8("status", 0600, dbg->dbg_root,
1296 &dbg->status);
1297 if (!dbg->dbg_status)
1298 goto err_dbg;
1299
1300 dbg->dbg_run = debugfs_create_file("run", 0200, dbg->dbg_root, dev, &fops);
1301 if (!dbg->dbg_run)
1302 goto err_dbg;
1303
1304 mlx5_cmdif_debugfs_init(dev);
1305
1306 return 0;
1307
1308err_dbg:
1309 clean_debug_files(dev);
1310 return err;
1311}
1312
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +03001313static void mlx5_cmd_change_mod(struct mlx5_core_dev *dev, int mode)
Eli Cohene126ba92013-07-07 17:25:49 +03001314{
1315 struct mlx5_cmd *cmd = &dev->cmd;
1316 int i;
1317
1318 for (i = 0; i < cmd->max_reg_cmds; i++)
1319 down(&cmd->sem);
Eli Cohene126ba92013-07-07 17:25:49 +03001320 down(&cmd->pages_sem);
1321
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +03001322 cmd->mode = mode;
Eli Cohene126ba92013-07-07 17:25:49 +03001323
1324 up(&cmd->pages_sem);
1325 for (i = 0; i < cmd->max_reg_cmds; i++)
1326 up(&cmd->sem);
1327}
1328
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +03001329void mlx5_cmd_use_events(struct mlx5_core_dev *dev)
1330{
1331 mlx5_cmd_change_mod(dev, CMD_MODE_EVENTS);
1332}
1333
Eli Cohene126ba92013-07-07 17:25:49 +03001334void mlx5_cmd_use_polling(struct mlx5_core_dev *dev)
1335{
Mohamad Haj Yahia9cba4eb2016-06-30 17:34:42 +03001336 mlx5_cmd_change_mod(dev, CMD_MODE_POLLING);
Eli Cohene126ba92013-07-07 17:25:49 +03001337}
1338
Eli Cohen746b5582013-10-23 09:53:14 +03001339static void free_msg(struct mlx5_core_dev *dev, struct mlx5_cmd_msg *msg)
1340{
1341 unsigned long flags;
1342
1343 if (msg->cache) {
1344 spin_lock_irqsave(&msg->cache->lock, flags);
1345 list_add_tail(&msg->list, &msg->cache->head);
1346 spin_unlock_irqrestore(&msg->cache->lock, flags);
1347 } else {
1348 mlx5_free_cmd_msg(dev, msg);
1349 }
1350}
1351
Eli Cohen020446e2015-10-08 17:13:58 +03001352void mlx5_cmd_comp_handler(struct mlx5_core_dev *dev, u64 vec)
Eli Cohene126ba92013-07-07 17:25:49 +03001353{
1354 struct mlx5_cmd *cmd = &dev->cmd;
1355 struct mlx5_cmd_work_ent *ent;
1356 mlx5_cmd_cbk_t callback;
1357 void *context;
1358 int err;
1359 int i;
Eli Cohen746b5582013-10-23 09:53:14 +03001360 s64 ds;
1361 struct mlx5_cmd_stats *stats;
1362 unsigned long flags;
Eli Cohen020446e2015-10-08 17:13:58 +03001363 unsigned long vector;
Eli Cohene126ba92013-07-07 17:25:49 +03001364
Eli Cohen020446e2015-10-08 17:13:58 +03001365 /* there can be at most 32 command queues */
1366 vector = vec & 0xffffffff;
Eli Cohene126ba92013-07-07 17:25:49 +03001367 for (i = 0; i < (1 << cmd->log_sz); i++) {
1368 if (test_bit(i, &vector)) {
Dan Carpenter11940c82013-07-22 11:02:01 +03001369 struct semaphore *sem;
1370
Eli Cohene126ba92013-07-07 17:25:49 +03001371 ent = cmd->ent_arr[i];
Mohamad Haj Yahia65ee6702016-06-30 17:34:43 +03001372 if (ent->callback)
1373 cancel_delayed_work(&ent->cb_timeout_work);
Dan Carpenter11940c82013-07-22 11:02:01 +03001374 if (ent->page_queue)
1375 sem = &cmd->pages_sem;
1376 else
1377 sem = &cmd->sem;
Thomas Gleixner14a70042014-07-16 21:04:44 +00001378 ent->ts2 = ktime_get_ns();
Eli Cohene126ba92013-07-07 17:25:49 +03001379 memcpy(ent->out->first.data, ent->lay->out, sizeof(ent->lay->out));
1380 dump_command(dev, ent, 0);
1381 if (!ent->ret) {
1382 if (!cmd->checksum_disabled)
1383 ent->ret = verify_signature(ent);
1384 else
1385 ent->ret = 0;
Eli Cohen020446e2015-10-08 17:13:58 +03001386 if (vec & MLX5_TRIGGERED_CMD_COMP)
1387 ent->status = MLX5_DRIVER_STATUS_ABORTED;
1388 else
1389 ent->status = ent->lay->status_own >> 1;
1390
Eli Cohene126ba92013-07-07 17:25:49 +03001391 mlx5_core_dbg(dev, "command completed. ret 0x%x, delivery status %s(0x%x)\n",
1392 ent->ret, deliv_status_to_str(ent->status), ent->status);
1393 }
1394 free_ent(cmd, ent->idx);
Eli Cohen020446e2015-10-08 17:13:58 +03001395
Eli Cohene126ba92013-07-07 17:25:49 +03001396 if (ent->callback) {
Thomas Gleixner14a70042014-07-16 21:04:44 +00001397 ds = ent->ts2 - ent->ts1;
Eli Cohen746b5582013-10-23 09:53:14 +03001398 if (ent->op < ARRAY_SIZE(cmd->stats)) {
1399 stats = &cmd->stats[ent->op];
1400 spin_lock_irqsave(&stats->lock, flags);
1401 stats->sum += ds;
1402 ++stats->n;
1403 spin_unlock_irqrestore(&stats->lock, flags);
1404 }
1405
Eli Cohene126ba92013-07-07 17:25:49 +03001406 callback = ent->callback;
1407 context = ent->context;
1408 err = ent->ret;
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001409 if (!err) {
Eli Cohen746b5582013-10-23 09:53:14 +03001410 err = mlx5_copy_from_msg(ent->uout,
1411 ent->out,
1412 ent->uout_size);
Saeed Mahameedc4f287c2016-07-19 20:17:12 +03001413
1414 err = err ? err : mlx5_cmd_check(dev,
1415 ent->in->first.data,
1416 ent->uout);
Saeed Mahameedec22eb52016-07-16 06:28:36 +03001417 }
Eli Cohen746b5582013-10-23 09:53:14 +03001418
1419 mlx5_free_cmd_msg(dev, ent->out);
1420 free_msg(dev, ent->in);
1421
Eli Cohenbe875442015-09-25 10:49:12 +03001422 err = err ? err : ent->status;
Eli Cohene126ba92013-07-07 17:25:49 +03001423 free_cmd(ent);
1424 callback(err, context);
1425 } else {
1426 complete(&ent->done);
1427 }
Dan Carpenter11940c82013-07-22 11:02:01 +03001428 up(sem);
Eli Cohene126ba92013-07-07 17:25:49 +03001429 }
1430 }
1431}
1432EXPORT_SYMBOL(mlx5_cmd_comp_handler);
1433
1434static int status_to_err(u8 status)
1435{
1436 return status ? -1 : 0; /* TBD more meaningful codes */
1437}
1438
Eli Cohen746b5582013-10-23 09:53:14 +03001439static struct mlx5_cmd_msg *alloc_msg(struct mlx5_core_dev *dev, int in_size,
1440 gfp_t gfp)
Eli Cohene126ba92013-07-07 17:25:49 +03001441{
1442 struct mlx5_cmd_msg *msg = ERR_PTR(-ENOMEM);
1443 struct mlx5_cmd *cmd = &dev->cmd;
1444 struct cache_ent *ent = NULL;
1445
1446 if (in_size > MED_LIST_SIZE && in_size <= LONG_LIST_SIZE)
1447 ent = &cmd->cache.large;
1448 else if (in_size > 16 && in_size <= MED_LIST_SIZE)
1449 ent = &cmd->cache.med;
1450
1451 if (ent) {
Eli Cohen746b5582013-10-23 09:53:14 +03001452 spin_lock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +03001453 if (!list_empty(&ent->head)) {
1454 msg = list_entry(ent->head.next, typeof(*msg), list);
1455 /* For cached lists, we must explicitly state what is
1456 * the real size
1457 */
1458 msg->len = in_size;
1459 list_del(&msg->list);
1460 }
Eli Cohen746b5582013-10-23 09:53:14 +03001461 spin_unlock_irq(&ent->lock);
Eli Cohene126ba92013-07-07 17:25:49 +03001462 }
1463
1464 if (IS_ERR(msg))
Eli Cohen746b5582013-10-23 09:53:14 +03001465 msg = mlx5_alloc_cmd_msg(dev, gfp, in_size);
Eli Cohene126ba92013-07-07 17:25:49 +03001466
1467 return msg;
1468}
1469
Saeed Mahameedc4f287c2016-07-19 20:17:12 +03001470static int is_manage_pages(void *in)
Majd Dibbiny89d44f02015-10-14 17:43:46 +03001471{
Saeed Mahameedc4f287c2016-07-19 20:17:12 +03001472 return MLX5_GET(mbox_in, in, opcode) == MLX5_CMD_OP_MANAGE_PAGES;
Eli Cohene126ba92013-07-07 17:25:49 +03001473}
1474
Eli Cohen746b5582013-10-23 09:53:14 +03001475static int cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
1476 int out_size, mlx5_cmd_cbk_t callback, void *context)
Eli Cohene126ba92013-07-07 17:25:49 +03001477{
1478 struct mlx5_cmd_msg *inb;
1479 struct mlx5_cmd_msg *outb;
1480 int pages_queue;
Eli Cohen746b5582013-10-23 09:53:14 +03001481 gfp_t gfp;
Eli Cohene126ba92013-07-07 17:25:49 +03001482 int err;
1483 u8 status = 0;
Majd Dibbiny89d44f02015-10-14 17:43:46 +03001484 u32 drv_synd;
1485
1486 if (pci_channel_offline(dev->pdev) ||
1487 dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) {
Saeed Mahameedc4f287c2016-07-19 20:17:12 +03001488 u16 opcode = MLX5_GET(mbox_in, in, opcode);
1489
1490 err = mlx5_internal_err_ret_value(dev, opcode, &drv_synd, &status);
1491 MLX5_SET(mbox_out, out, status, status);
1492 MLX5_SET(mbox_out, out, syndrome, drv_synd);
Majd Dibbiny89d44f02015-10-14 17:43:46 +03001493 return err;
1494 }
Eli Cohene126ba92013-07-07 17:25:49 +03001495
1496 pages_queue = is_manage_pages(in);
Eli Cohen746b5582013-10-23 09:53:14 +03001497 gfp = callback ? GFP_ATOMIC : GFP_KERNEL;
Eli Cohene126ba92013-07-07 17:25:49 +03001498
Eli Cohen746b5582013-10-23 09:53:14 +03001499 inb = alloc_msg(dev, in_size, gfp);
Eli Cohene126ba92013-07-07 17:25:49 +03001500 if (IS_ERR(inb)) {
1501 err = PTR_ERR(inb);
1502 return err;
1503 }
1504
1505 err = mlx5_copy_to_msg(inb, in, in_size);
1506 if (err) {
1507 mlx5_core_warn(dev, "err %d\n", err);
1508 goto out_in;
1509 }
1510
Eli Cohen746b5582013-10-23 09:53:14 +03001511 outb = mlx5_alloc_cmd_msg(dev, gfp, out_size);
Eli Cohene126ba92013-07-07 17:25:49 +03001512 if (IS_ERR(outb)) {
1513 err = PTR_ERR(outb);
1514 goto out_in;
1515 }
1516
Eli Cohen746b5582013-10-23 09:53:14 +03001517 err = mlx5_cmd_invoke(dev, inb, outb, out, out_size, callback, context,
1518 pages_queue, &status);
Eli Cohene126ba92013-07-07 17:25:49 +03001519 if (err)
1520 goto out_out;
1521
1522 mlx5_core_dbg(dev, "err %d, status %d\n", err, status);
1523 if (status) {
1524 err = status_to_err(status);
1525 goto out_out;
1526 }
1527
Eli Cohen05e4ecd2015-04-02 17:07:26 +03001528 if (!callback)
1529 err = mlx5_copy_from_msg(out, outb, out_size);
Eli Cohene126ba92013-07-07 17:25:49 +03001530
1531out_out:
Eli Cohen746b5582013-10-23 09:53:14 +03001532 if (!callback)
1533 mlx5_free_cmd_msg(dev, outb);
Eli Cohene126ba92013-07-07 17:25:49 +03001534
1535out_in:
Eli Cohen746b5582013-10-23 09:53:14 +03001536 if (!callback)
1537 free_msg(dev, inb);
Eli Cohene126ba92013-07-07 17:25:49 +03001538 return err;
1539}
Eli Cohen746b5582013-10-23 09:53:14 +03001540
1541int mlx5_cmd_exec(struct mlx5_core_dev *dev, void *in, int in_size, void *out,
1542 int out_size)
1543{
Saeed Mahameedc4f287c2016-07-19 20:17:12 +03001544 int err;
1545
1546 err = cmd_exec(dev, in, in_size, out, out_size, NULL, NULL);
1547 return err ? : mlx5_cmd_check(dev, in, out);
Eli Cohen746b5582013-10-23 09:53:14 +03001548}
Eli Cohene126ba92013-07-07 17:25:49 +03001549EXPORT_SYMBOL(mlx5_cmd_exec);
1550
Eli Cohen746b5582013-10-23 09:53:14 +03001551int mlx5_cmd_exec_cb(struct mlx5_core_dev *dev, void *in, int in_size,
1552 void *out, int out_size, mlx5_cmd_cbk_t callback,
1553 void *context)
1554{
1555 return cmd_exec(dev, in, in_size, out, out_size, callback, context);
1556}
1557EXPORT_SYMBOL(mlx5_cmd_exec_cb);
1558
Eli Cohene126ba92013-07-07 17:25:49 +03001559static void destroy_msg_cache(struct mlx5_core_dev *dev)
1560{
1561 struct mlx5_cmd *cmd = &dev->cmd;
1562 struct mlx5_cmd_msg *msg;
1563 struct mlx5_cmd_msg *n;
1564
1565 list_for_each_entry_safe(msg, n, &cmd->cache.large.head, list) {
1566 list_del(&msg->list);
1567 mlx5_free_cmd_msg(dev, msg);
1568 }
1569
1570 list_for_each_entry_safe(msg, n, &cmd->cache.med.head, list) {
1571 list_del(&msg->list);
1572 mlx5_free_cmd_msg(dev, msg);
1573 }
1574}
1575
1576static int create_msg_cache(struct mlx5_core_dev *dev)
1577{
1578 struct mlx5_cmd *cmd = &dev->cmd;
1579 struct mlx5_cmd_msg *msg;
1580 int err;
1581 int i;
1582
1583 spin_lock_init(&cmd->cache.large.lock);
1584 INIT_LIST_HEAD(&cmd->cache.large.head);
1585 spin_lock_init(&cmd->cache.med.lock);
1586 INIT_LIST_HEAD(&cmd->cache.med.head);
1587
1588 for (i = 0; i < NUM_LONG_LISTS; i++) {
1589 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, LONG_LIST_SIZE);
1590 if (IS_ERR(msg)) {
1591 err = PTR_ERR(msg);
1592 goto ex_err;
1593 }
1594 msg->cache = &cmd->cache.large;
1595 list_add_tail(&msg->list, &cmd->cache.large.head);
1596 }
1597
1598 for (i = 0; i < NUM_MED_LISTS; i++) {
1599 msg = mlx5_alloc_cmd_msg(dev, GFP_KERNEL, MED_LIST_SIZE);
1600 if (IS_ERR(msg)) {
1601 err = PTR_ERR(msg);
1602 goto ex_err;
1603 }
1604 msg->cache = &cmd->cache.med;
1605 list_add_tail(&msg->list, &cmd->cache.med.head);
1606 }
1607
1608 return 0;
1609
1610ex_err:
1611 destroy_msg_cache(dev);
1612 return err;
1613}
1614
Eli Cohen64599cc2015-04-02 17:07:25 +03001615static int alloc_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
1616{
1617 struct device *ddev = &dev->pdev->dev;
1618
1619 cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE,
1620 &cmd->alloc_dma, GFP_KERNEL);
1621 if (!cmd->cmd_alloc_buf)
1622 return -ENOMEM;
1623
1624 /* make sure it is aligned to 4K */
1625 if (!((uintptr_t)cmd->cmd_alloc_buf & (MLX5_ADAPTER_PAGE_SIZE - 1))) {
1626 cmd->cmd_buf = cmd->cmd_alloc_buf;
1627 cmd->dma = cmd->alloc_dma;
1628 cmd->alloc_size = MLX5_ADAPTER_PAGE_SIZE;
1629 return 0;
1630 }
1631
1632 dma_free_coherent(ddev, MLX5_ADAPTER_PAGE_SIZE, cmd->cmd_alloc_buf,
1633 cmd->alloc_dma);
1634 cmd->cmd_alloc_buf = dma_zalloc_coherent(ddev,
1635 2 * MLX5_ADAPTER_PAGE_SIZE - 1,
1636 &cmd->alloc_dma, GFP_KERNEL);
1637 if (!cmd->cmd_alloc_buf)
1638 return -ENOMEM;
1639
1640 cmd->cmd_buf = PTR_ALIGN(cmd->cmd_alloc_buf, MLX5_ADAPTER_PAGE_SIZE);
1641 cmd->dma = ALIGN(cmd->alloc_dma, MLX5_ADAPTER_PAGE_SIZE);
1642 cmd->alloc_size = 2 * MLX5_ADAPTER_PAGE_SIZE - 1;
1643 return 0;
1644}
1645
1646static void free_cmd_page(struct mlx5_core_dev *dev, struct mlx5_cmd *cmd)
1647{
1648 struct device *ddev = &dev->pdev->dev;
1649
1650 dma_free_coherent(ddev, cmd->alloc_size, cmd->cmd_alloc_buf,
1651 cmd->alloc_dma);
1652}
1653
Eli Cohene126ba92013-07-07 17:25:49 +03001654int mlx5_cmd_init(struct mlx5_core_dev *dev)
1655{
1656 int size = sizeof(struct mlx5_cmd_prot_block);
1657 int align = roundup_pow_of_two(size);
1658 struct mlx5_cmd *cmd = &dev->cmd;
1659 u32 cmd_h, cmd_l;
1660 u16 cmd_if_rev;
1661 int err;
1662 int i;
1663
Majd Dibbinya31208b2015-09-25 10:49:14 +03001664 memset(cmd, 0, sizeof(*cmd));
Eli Cohene126ba92013-07-07 17:25:49 +03001665 cmd_if_rev = cmdif_rev(dev);
1666 if (cmd_if_rev != CMD_IF_REV) {
1667 dev_err(&dev->pdev->dev,
1668 "Driver cmdif rev(%d) differs from firmware's(%d)\n",
1669 CMD_IF_REV, cmd_if_rev);
1670 return -EINVAL;
1671 }
1672
1673 cmd->pool = pci_pool_create("mlx5_cmd", dev->pdev, size, align, 0);
1674 if (!cmd->pool)
1675 return -ENOMEM;
1676
Eli Cohen64599cc2015-04-02 17:07:25 +03001677 err = alloc_cmd_page(dev, cmd);
1678 if (err)
Eli Cohene126ba92013-07-07 17:25:49 +03001679 goto err_free_pool;
Eli Cohene126ba92013-07-07 17:25:49 +03001680
1681 cmd_l = ioread32be(&dev->iseg->cmdq_addr_l_sz) & 0xff;
1682 cmd->log_sz = cmd_l >> 4 & 0xf;
1683 cmd->log_stride = cmd_l & 0xf;
1684 if (1 << cmd->log_sz > MLX5_MAX_COMMANDS) {
1685 dev_err(&dev->pdev->dev, "firmware reports too many outstanding commands %d\n",
1686 1 << cmd->log_sz);
1687 err = -EINVAL;
Eli Cohen64599cc2015-04-02 17:07:25 +03001688 goto err_free_page;
Eli Cohene126ba92013-07-07 17:25:49 +03001689 }
1690
Eli Cohen2d446d12014-12-02 12:26:13 +02001691 if (cmd->log_sz + cmd->log_stride > MLX5_ADAPTER_PAGE_SHIFT) {
Eli Cohene126ba92013-07-07 17:25:49 +03001692 dev_err(&dev->pdev->dev, "command queue size overflow\n");
1693 err = -EINVAL;
Eli Cohen64599cc2015-04-02 17:07:25 +03001694 goto err_free_page;
Eli Cohene126ba92013-07-07 17:25:49 +03001695 }
1696
Eli Cohenc1868b82013-09-11 16:35:25 +03001697 cmd->checksum_disabled = 1;
Eli Cohene126ba92013-07-07 17:25:49 +03001698 cmd->max_reg_cmds = (1 << cmd->log_sz) - 1;
1699 cmd->bitmask = (1 << cmd->max_reg_cmds) - 1;
1700
1701 cmd->cmdif_rev = ioread32be(&dev->iseg->cmdif_rev_fw_sub) >> 16;
1702 if (cmd->cmdif_rev > CMD_IF_REV) {
1703 dev_err(&dev->pdev->dev, "driver does not support command interface version. driver %d, firmware %d\n",
1704 CMD_IF_REV, cmd->cmdif_rev);
1705 err = -ENOTSUPP;
Eli Cohen64599cc2015-04-02 17:07:25 +03001706 goto err_free_page;
Eli Cohene126ba92013-07-07 17:25:49 +03001707 }
1708
1709 spin_lock_init(&cmd->alloc_lock);
1710 spin_lock_init(&cmd->token_lock);
1711 for (i = 0; i < ARRAY_SIZE(cmd->stats); i++)
1712 spin_lock_init(&cmd->stats[i].lock);
1713
1714 sema_init(&cmd->sem, cmd->max_reg_cmds);
1715 sema_init(&cmd->pages_sem, 1);
1716
1717 cmd_h = (u32)((u64)(cmd->dma) >> 32);
1718 cmd_l = (u32)(cmd->dma);
1719 if (cmd_l & 0xfff) {
1720 dev_err(&dev->pdev->dev, "invalid command queue address\n");
1721 err = -ENOMEM;
Eli Cohen64599cc2015-04-02 17:07:25 +03001722 goto err_free_page;
Eli Cohene126ba92013-07-07 17:25:49 +03001723 }
1724
1725 iowrite32be(cmd_h, &dev->iseg->cmdq_addr_h);
1726 iowrite32be(cmd_l, &dev->iseg->cmdq_addr_l_sz);
1727
1728 /* Make sure firmware sees the complete address before we proceed */
1729 wmb();
1730
1731 mlx5_core_dbg(dev, "descriptor at dma 0x%llx\n", (unsigned long long)(cmd->dma));
1732
1733 cmd->mode = CMD_MODE_POLLING;
1734
1735 err = create_msg_cache(dev);
1736 if (err) {
1737 dev_err(&dev->pdev->dev, "failed to create command cache\n");
Eli Cohen64599cc2015-04-02 17:07:25 +03001738 goto err_free_page;
Eli Cohene126ba92013-07-07 17:25:49 +03001739 }
1740
1741 set_wqname(dev);
1742 cmd->wq = create_singlethread_workqueue(cmd->wq_name);
1743 if (!cmd->wq) {
1744 dev_err(&dev->pdev->dev, "failed to create command workqueue\n");
1745 err = -ENOMEM;
1746 goto err_cache;
1747 }
1748
1749 err = create_debugfs_files(dev);
1750 if (err) {
1751 err = -ENOMEM;
1752 goto err_wq;
1753 }
1754
1755 return 0;
1756
1757err_wq:
1758 destroy_workqueue(cmd->wq);
1759
1760err_cache:
1761 destroy_msg_cache(dev);
1762
Eli Cohen64599cc2015-04-02 17:07:25 +03001763err_free_page:
1764 free_cmd_page(dev, cmd);
Eli Cohene126ba92013-07-07 17:25:49 +03001765
1766err_free_pool:
1767 pci_pool_destroy(cmd->pool);
1768
1769 return err;
1770}
1771EXPORT_SYMBOL(mlx5_cmd_init);
1772
1773void mlx5_cmd_cleanup(struct mlx5_core_dev *dev)
1774{
1775 struct mlx5_cmd *cmd = &dev->cmd;
1776
1777 clean_debug_files(dev);
1778 destroy_workqueue(cmd->wq);
1779 destroy_msg_cache(dev);
Eli Cohen64599cc2015-04-02 17:07:25 +03001780 free_cmd_page(dev, cmd);
Eli Cohene126ba92013-07-07 17:25:49 +03001781 pci_pool_destroy(cmd->pool);
1782}
1783EXPORT_SYMBOL(mlx5_cmd_cleanup);