blob: f464ca1fa261e7bd358b420853e37ad488f2e99a [file] [log] [blame]
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05001/*
Dave Jonesf3a03b02007-07-16 11:23:03 -04002 * libata-sff.c - helper library for PCI IDE BMDMA
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05003 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
33 */
34
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050035#include <linux/kernel.h>
36#include <linux/pci.h>
37#include <linux/libata.h>
Tejun Heo624d5c52008-03-25 22:16:41 +090038#include <linux/highmem.h>
Jeff Garzik1fdffbc2006-02-09 05:15:27 -050039
40#include "libata.h"
41
Tejun Heo624d5c52008-03-25 22:16:41 +090042const struct ata_port_operations ata_sff_port_ops = {
43 .inherits = &ata_base_port_ops,
44
Tejun Heo9363c382008-04-07 22:47:16 +090045 .qc_prep = ata_sff_qc_prep,
46 .qc_issue = ata_sff_qc_issue,
Tejun Heo624d5c52008-03-25 22:16:41 +090047
Tejun Heo9363c382008-04-07 22:47:16 +090048 .freeze = ata_sff_freeze,
49 .thaw = ata_sff_thaw,
Tejun Heo0aa11132008-04-07 22:47:18 +090050 .prereset = ata_sff_prereset,
Tejun Heo9363c382008-04-07 22:47:16 +090051 .softreset = ata_sff_softreset,
Tejun Heo57c9efd2008-04-07 22:47:19 +090052 .hardreset = sata_sff_hardreset,
Tejun Heo203c75b2008-04-07 22:47:18 +090053 .postreset = ata_sff_postreset,
Tejun Heo9363c382008-04-07 22:47:16 +090054 .error_handler = ata_sff_error_handler,
55 .post_internal_cmd = ata_sff_post_internal_cmd,
Tejun Heo624d5c52008-03-25 22:16:41 +090056
Tejun Heo5682ed32008-04-07 22:47:16 +090057 .sff_dev_select = ata_sff_dev_select,
58 .sff_check_status = ata_sff_check_status,
59 .sff_tf_load = ata_sff_tf_load,
60 .sff_tf_read = ata_sff_tf_read,
61 .sff_exec_command = ata_sff_exec_command,
62 .sff_data_xfer = ata_sff_data_xfer,
63 .sff_irq_on = ata_sff_irq_on,
Tejun Heo288623a2008-04-07 22:47:17 +090064 .sff_irq_clear = ata_sff_irq_clear,
Tejun Heo624d5c52008-03-25 22:16:41 +090065
66 .port_start = ata_sff_port_start,
67};
68
69const struct ata_port_operations ata_bmdma_port_ops = {
70 .inherits = &ata_sff_port_ops,
71
Tejun Heo9363c382008-04-07 22:47:16 +090072 .mode_filter = ata_bmdma_mode_filter,
Tejun Heo624d5c52008-03-25 22:16:41 +090073
74 .bmdma_setup = ata_bmdma_setup,
75 .bmdma_start = ata_bmdma_start,
76 .bmdma_stop = ata_bmdma_stop,
77 .bmdma_status = ata_bmdma_status,
Tejun Heo624d5c52008-03-25 22:16:41 +090078};
79
80/**
81 * ata_fill_sg - Fill PCI IDE PRD table
82 * @qc: Metadata associated with taskfile to be transferred
83 *
84 * Fill PCI IDE PRD (scatter-gather) table with segments
85 * associated with the current disk command.
86 *
87 * LOCKING:
88 * spin_lock_irqsave(host lock)
89 *
90 */
91static void ata_fill_sg(struct ata_queued_cmd *qc)
92{
93 struct ata_port *ap = qc->ap;
94 struct scatterlist *sg;
95 unsigned int si, pi;
96
97 pi = 0;
98 for_each_sg(qc->sg, sg, qc->n_elem, si) {
99 u32 addr, offset;
100 u32 sg_len, len;
101
102 /* determine if physical DMA addr spans 64K boundary.
103 * Note h/w doesn't support 64-bit, so we unconditionally
104 * truncate dma_addr_t to u32.
105 */
106 addr = (u32) sg_dma_address(sg);
107 sg_len = sg_dma_len(sg);
108
109 while (sg_len) {
110 offset = addr & 0xffff;
111 len = sg_len;
112 if ((offset + sg_len) > 0x10000)
113 len = 0x10000 - offset;
114
115 ap->prd[pi].addr = cpu_to_le32(addr);
116 ap->prd[pi].flags_len = cpu_to_le32(len & 0xffff);
117 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
118
119 pi++;
120 sg_len -= len;
121 addr += len;
122 }
123 }
124
125 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
126}
127
128/**
129 * ata_fill_sg_dumb - Fill PCI IDE PRD table
130 * @qc: Metadata associated with taskfile to be transferred
131 *
132 * Fill PCI IDE PRD (scatter-gather) table with segments
133 * associated with the current disk command. Perform the fill
134 * so that we avoid writing any length 64K records for
135 * controllers that don't follow the spec.
136 *
137 * LOCKING:
138 * spin_lock_irqsave(host lock)
139 *
140 */
141static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)
142{
143 struct ata_port *ap = qc->ap;
144 struct scatterlist *sg;
145 unsigned int si, pi;
146
147 pi = 0;
148 for_each_sg(qc->sg, sg, qc->n_elem, si) {
149 u32 addr, offset;
150 u32 sg_len, len, blen;
151
152 /* determine if physical DMA addr spans 64K boundary.
153 * Note h/w doesn't support 64-bit, so we unconditionally
154 * truncate dma_addr_t to u32.
155 */
156 addr = (u32) sg_dma_address(sg);
157 sg_len = sg_dma_len(sg);
158
159 while (sg_len) {
160 offset = addr & 0xffff;
161 len = sg_len;
162 if ((offset + sg_len) > 0x10000)
163 len = 0x10000 - offset;
164
165 blen = len & 0xffff;
166 ap->prd[pi].addr = cpu_to_le32(addr);
167 if (blen == 0) {
168 /* Some PATA chipsets like the CS5530 can't
169 cope with 0x0000 meaning 64K as the spec says */
170 ap->prd[pi].flags_len = cpu_to_le32(0x8000);
171 blen = 0x8000;
172 ap->prd[++pi].addr = cpu_to_le32(addr + 0x8000);
173 }
174 ap->prd[pi].flags_len = cpu_to_le32(blen);
175 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi, addr, len);
176
177 pi++;
178 sg_len -= len;
179 addr += len;
180 }
181 }
182
183 ap->prd[pi - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
184}
185
186/**
Tejun Heo9363c382008-04-07 22:47:16 +0900187 * ata_sff_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900188 * @qc: Metadata associated with taskfile to be prepared
189 *
190 * Prepare ATA taskfile for submission.
191 *
192 * LOCKING:
193 * spin_lock_irqsave(host lock)
194 */
Tejun Heo9363c382008-04-07 22:47:16 +0900195void ata_sff_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900196{
197 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
198 return;
199
200 ata_fill_sg(qc);
201}
202
203/**
Tejun Heo9363c382008-04-07 22:47:16 +0900204 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
Tejun Heo624d5c52008-03-25 22:16:41 +0900205 * @qc: Metadata associated with taskfile to be prepared
206 *
207 * Prepare ATA taskfile for submission.
208 *
209 * LOCKING:
210 * spin_lock_irqsave(host lock)
211 */
Tejun Heo9363c382008-04-07 22:47:16 +0900212void ata_sff_dumb_qc_prep(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +0900213{
214 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
215 return;
216
217 ata_fill_sg_dumb(qc);
218}
219
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500220/**
Tejun Heo9363c382008-04-07 22:47:16 +0900221 * ata_sff_check_status - Read device status reg & clear interrupt
Tejun Heo272f7882008-03-25 22:16:40 +0900222 * @ap: port where the device is
223 *
224 * Reads ATA taskfile status register for currently-selected device
225 * and return its value. This also clears pending interrupts
226 * from this device
227 *
228 * LOCKING:
229 * Inherited from caller.
230 */
Tejun Heo9363c382008-04-07 22:47:16 +0900231u8 ata_sff_check_status(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900232{
233 return ioread8(ap->ioaddr.status_addr);
234}
235
236/**
Tejun Heo9363c382008-04-07 22:47:16 +0900237 * ata_sff_altstatus - Read device alternate status reg
Tejun Heo272f7882008-03-25 22:16:40 +0900238 * @ap: port where the device is
239 *
240 * Reads ATA taskfile alternate status register for
241 * currently-selected device and return its value.
242 *
243 * Note: may NOT be used as the check_altstatus() entry in
244 * ata_port_operations.
245 *
246 * LOCKING:
247 * Inherited from caller.
248 */
Tejun Heo9363c382008-04-07 22:47:16 +0900249u8 ata_sff_altstatus(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900250{
Tejun Heo5682ed32008-04-07 22:47:16 +0900251 if (ap->ops->sff_check_altstatus)
252 return ap->ops->sff_check_altstatus(ap);
Tejun Heo272f7882008-03-25 22:16:40 +0900253
254 return ioread8(ap->ioaddr.altstatus_addr);
255}
256
257/**
Tejun Heo9363c382008-04-07 22:47:16 +0900258 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
Tejun Heo624d5c52008-03-25 22:16:41 +0900259 * @ap: port containing status register to be polled
260 * @tmout_pat: impatience timeout
261 * @tmout: overall timeout
262 *
263 * Sleep until ATA Status register bit BSY clears,
264 * or a timeout occurs.
265 *
266 * LOCKING:
267 * Kernel thread context (may sleep).
268 *
269 * RETURNS:
270 * 0 on success, -errno otherwise.
271 */
Tejun Heo9363c382008-04-07 22:47:16 +0900272int ata_sff_busy_sleep(struct ata_port *ap,
273 unsigned long tmout_pat, unsigned long tmout)
Tejun Heo624d5c52008-03-25 22:16:41 +0900274{
275 unsigned long timer_start, timeout;
276 u8 status;
277
Tejun Heo9363c382008-04-07 22:47:16 +0900278 status = ata_sff_busy_wait(ap, ATA_BUSY, 300);
Tejun Heo624d5c52008-03-25 22:16:41 +0900279 timer_start = jiffies;
280 timeout = timer_start + tmout_pat;
281 while (status != 0xff && (status & ATA_BUSY) &&
282 time_before(jiffies, timeout)) {
283 msleep(50);
Tejun Heo9363c382008-04-07 22:47:16 +0900284 status = ata_sff_busy_wait(ap, ATA_BUSY, 3);
Tejun Heo624d5c52008-03-25 22:16:41 +0900285 }
286
287 if (status != 0xff && (status & ATA_BUSY))
288 ata_port_printk(ap, KERN_WARNING,
289 "port is slow to respond, please be patient "
290 "(Status 0x%x)\n", status);
291
292 timeout = timer_start + tmout;
293 while (status != 0xff && (status & ATA_BUSY) &&
294 time_before(jiffies, timeout)) {
295 msleep(50);
Tejun Heo5682ed32008-04-07 22:47:16 +0900296 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900297 }
298
299 if (status == 0xff)
300 return -ENODEV;
301
302 if (status & ATA_BUSY) {
303 ata_port_printk(ap, KERN_ERR, "port failed to respond "
304 "(%lu secs, Status 0x%x)\n",
305 tmout / HZ, status);
306 return -EBUSY;
307 }
308
309 return 0;
310}
311
Tejun Heoaa2731a2008-04-07 22:47:19 +0900312static int ata_sff_check_ready(struct ata_link *link)
313{
314 u8 status = link->ap->ops->sff_check_status(link->ap);
315
316 if (!(status & ATA_BUSY))
317 return 1;
318 if (status == 0xff)
319 return -ENODEV;
320 return 0;
321}
322
Tejun Heo624d5c52008-03-25 22:16:41 +0900323/**
Tejun Heo9363c382008-04-07 22:47:16 +0900324 * ata_sff_wait_ready - sleep until BSY clears, or timeout
Tejun Heo705e76b2008-04-07 22:47:19 +0900325 * @link: SFF link to wait ready status for
Tejun Heo624d5c52008-03-25 22:16:41 +0900326 * @deadline: deadline jiffies for the operation
327 *
328 * Sleep until ATA Status register bit BSY clears, or timeout
329 * occurs.
330 *
331 * LOCKING:
332 * Kernel thread context (may sleep).
333 *
334 * RETURNS:
335 * 0 on success, -errno otherwise.
336 */
Tejun Heo705e76b2008-04-07 22:47:19 +0900337int ata_sff_wait_ready(struct ata_link *link, unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +0900338{
Tejun Heoaa2731a2008-04-07 22:47:19 +0900339 return ata_wait_ready(link, deadline, ata_sff_check_ready);
Tejun Heo624d5c52008-03-25 22:16:41 +0900340}
341
342/**
Tejun Heo9363c382008-04-07 22:47:16 +0900343 * ata_sff_dev_select - Select device 0/1 on ATA bus
Tejun Heo624d5c52008-03-25 22:16:41 +0900344 * @ap: ATA channel to manipulate
345 * @device: ATA device (numbered from zero) to select
346 *
347 * Use the method defined in the ATA specification to
348 * make either device 0, or device 1, active on the
349 * ATA channel. Works with both PIO and MMIO.
350 *
351 * May be used as the dev_select() entry in ata_port_operations.
352 *
353 * LOCKING:
354 * caller.
355 */
Tejun Heo9363c382008-04-07 22:47:16 +0900356void ata_sff_dev_select(struct ata_port *ap, unsigned int device)
Tejun Heo624d5c52008-03-25 22:16:41 +0900357{
358 u8 tmp;
359
360 if (device == 0)
361 tmp = ATA_DEVICE_OBS;
362 else
363 tmp = ATA_DEVICE_OBS | ATA_DEV1;
364
365 iowrite8(tmp, ap->ioaddr.device_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900366 ata_sff_pause(ap); /* needed; also flushes, for mmio */
Tejun Heo624d5c52008-03-25 22:16:41 +0900367}
368
369/**
370 * ata_dev_select - Select device 0/1 on ATA bus
371 * @ap: ATA channel to manipulate
372 * @device: ATA device (numbered from zero) to select
373 * @wait: non-zero to wait for Status register BSY bit to clear
374 * @can_sleep: non-zero if context allows sleeping
375 *
376 * Use the method defined in the ATA specification to
377 * make either device 0, or device 1, active on the
378 * ATA channel.
379 *
Tejun Heo9363c382008-04-07 22:47:16 +0900380 * This is a high-level version of ata_sff_dev_select(), which
381 * additionally provides the services of inserting the proper
382 * pauses and status polling, where needed.
Tejun Heo624d5c52008-03-25 22:16:41 +0900383 *
384 * LOCKING:
385 * caller.
386 */
387void ata_dev_select(struct ata_port *ap, unsigned int device,
388 unsigned int wait, unsigned int can_sleep)
389{
390 if (ata_msg_probe(ap))
391 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, "
392 "device %u, wait %u\n", device, wait);
393
394 if (wait)
395 ata_wait_idle(ap);
396
Tejun Heo5682ed32008-04-07 22:47:16 +0900397 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +0900398
399 if (wait) {
400 if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI)
401 msleep(150);
402 ata_wait_idle(ap);
403 }
404}
405
406/**
Tejun Heo9363c382008-04-07 22:47:16 +0900407 * ata_sff_irq_on - Enable interrupts on a port.
Tejun Heo90088bb2006-10-09 11:10:26 +0900408 * @ap: Port on which interrupts are enabled.
409 *
410 * Enable interrupts on a legacy IDE device using MMIO or PIO,
411 * wait for idle, clear any pending interrupts.
412 *
413 * LOCKING:
414 * Inherited from caller.
415 */
Tejun Heo9363c382008-04-07 22:47:16 +0900416u8 ata_sff_irq_on(struct ata_port *ap)
Tejun Heo90088bb2006-10-09 11:10:26 +0900417{
418 struct ata_ioports *ioaddr = &ap->ioaddr;
419 u8 tmp;
420
421 ap->ctl &= ~ATA_NIEN;
422 ap->last_ctl = ap->ctl;
423
Tejun Heof659f0e42008-03-06 13:12:54 +0900424 if (ioaddr->ctl_addr)
425 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo90088bb2006-10-09 11:10:26 +0900426 tmp = ata_wait_idle(ap);
427
Tejun Heo5682ed32008-04-07 22:47:16 +0900428 ap->ops->sff_irq_clear(ap);
Tejun Heo90088bb2006-10-09 11:10:26 +0900429
430 return tmp;
431}
432
433/**
Tejun Heo9363c382008-04-07 22:47:16 +0900434 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
Tejun Heo272f7882008-03-25 22:16:40 +0900435 * @ap: Port associated with this ATA transaction.
436 *
437 * Clear interrupt and error flags in DMA status register.
438 *
439 * May be used as the irq_clear() entry in ata_port_operations.
440 *
441 * LOCKING:
442 * spin_lock_irqsave(host lock)
443 */
Tejun Heo9363c382008-04-07 22:47:16 +0900444void ata_sff_irq_clear(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +0900445{
446 void __iomem *mmio = ap->ioaddr.bmdma_addr;
447
448 if (!mmio)
449 return;
450
451 iowrite8(ioread8(mmio + ATA_DMA_STATUS), mmio + ATA_DMA_STATUS);
452}
453
454/**
Tejun Heo9363c382008-04-07 22:47:16 +0900455 * ata_sff_tf_load - send taskfile registers to host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500456 * @ap: Port to which output is sent
457 * @tf: ATA taskfile register set
458 *
459 * Outputs ATA taskfile to standard ATA host controller.
460 *
461 * LOCKING:
462 * Inherited from caller.
463 */
Tejun Heo9363c382008-04-07 22:47:16 +0900464void ata_sff_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500465{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900466 struct ata_ioports *ioaddr = &ap->ioaddr;
467 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
468
469 if (tf->ctl != ap->last_ctl) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900470 if (ioaddr->ctl_addr)
471 iowrite8(tf->ctl, ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900472 ap->last_ctl = tf->ctl;
473 ata_wait_idle(ap);
474 }
475
476 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900477 WARN_ON(!ioaddr->ctl_addr);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900478 iowrite8(tf->hob_feature, ioaddr->feature_addr);
479 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
480 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
481 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
482 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
483 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
484 tf->hob_feature,
485 tf->hob_nsect,
486 tf->hob_lbal,
487 tf->hob_lbam,
488 tf->hob_lbah);
489 }
490
491 if (is_addr) {
492 iowrite8(tf->feature, ioaddr->feature_addr);
493 iowrite8(tf->nsect, ioaddr->nsect_addr);
494 iowrite8(tf->lbal, ioaddr->lbal_addr);
495 iowrite8(tf->lbam, ioaddr->lbam_addr);
496 iowrite8(tf->lbah, ioaddr->lbah_addr);
497 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
498 tf->feature,
499 tf->nsect,
500 tf->lbal,
501 tf->lbam,
502 tf->lbah);
503 }
504
505 if (tf->flags & ATA_TFLAG_DEVICE) {
506 iowrite8(tf->device, ioaddr->device_addr);
507 VPRINTK("device 0x%X\n", tf->device);
508 }
509
510 ata_wait_idle(ap);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500511}
512
513/**
Tejun Heo9363c382008-04-07 22:47:16 +0900514 * ata_sff_tf_read - input device's ATA taskfile shadow registers
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500515 * @ap: Port from which input is read
516 * @tf: ATA taskfile register set for storing input
517 *
518 * Reads ATA taskfile registers for currently-selected device
Alan Cox76548ed2007-11-19 14:34:56 +0000519 * into @tf. Assumes the device has a fully SFF compliant task file
520 * layout and behaviour. If you device does not (eg has a different
521 * status method) then you will need to provide a replacement tf_read
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500522 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500523 * LOCKING:
524 * Inherited from caller.
525 */
Tejun Heo9363c382008-04-07 22:47:16 +0900526void ata_sff_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500527{
Tejun Heo0d5ff562007-02-01 15:06:36 +0900528 struct ata_ioports *ioaddr = &ap->ioaddr;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500529
Tejun Heo9363c382008-04-07 22:47:16 +0900530 tf->command = ata_sff_check_status(ap);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900531 tf->feature = ioread8(ioaddr->error_addr);
532 tf->nsect = ioread8(ioaddr->nsect_addr);
533 tf->lbal = ioread8(ioaddr->lbal_addr);
534 tf->lbam = ioread8(ioaddr->lbam_addr);
535 tf->lbah = ioread8(ioaddr->lbah_addr);
536 tf->device = ioread8(ioaddr->device_addr);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500537
Tejun Heo0d5ff562007-02-01 15:06:36 +0900538 if (tf->flags & ATA_TFLAG_LBA48) {
Tejun Heof659f0e42008-03-06 13:12:54 +0900539 if (likely(ioaddr->ctl_addr)) {
540 iowrite8(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
541 tf->hob_feature = ioread8(ioaddr->error_addr);
542 tf->hob_nsect = ioread8(ioaddr->nsect_addr);
543 tf->hob_lbal = ioread8(ioaddr->lbal_addr);
544 tf->hob_lbam = ioread8(ioaddr->lbam_addr);
545 tf->hob_lbah = ioread8(ioaddr->lbah_addr);
546 iowrite8(tf->ctl, ioaddr->ctl_addr);
547 ap->last_ctl = tf->ctl;
548 } else
549 WARN_ON(1);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900550 }
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500551}
552
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500553/**
Tejun Heo9363c382008-04-07 22:47:16 +0900554 * ata_sff_exec_command - issue ATA command to host controller
Tejun Heo272f7882008-03-25 22:16:40 +0900555 * @ap: port to which command is being issued
556 * @tf: ATA taskfile register set
Jeff Garzik1fdffbc2006-02-09 05:15:27 -0500557 *
Tejun Heo272f7882008-03-25 22:16:40 +0900558 * Issues ATA command, with proper synchronization with interrupt
559 * handler / other threads.
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500560 *
561 * LOCKING:
Jeff Garzikcca39742006-08-24 03:19:22 -0400562 * spin_lock_irqsave(host lock)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500563 */
Tejun Heo9363c382008-04-07 22:47:16 +0900564void ata_sff_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500565{
Tejun Heo272f7882008-03-25 22:16:40 +0900566 DPRINTK("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500567
Tejun Heo272f7882008-03-25 22:16:40 +0900568 iowrite8(tf->command, ap->ioaddr.command_addr);
Tejun Heo9363c382008-04-07 22:47:16 +0900569 ata_sff_pause(ap);
Jeff Garzik2cc432e2006-03-23 00:32:03 -0500570}
571
Tejun Heo6d97dbd2006-05-15 20:58:24 +0900572/**
Tejun Heo624d5c52008-03-25 22:16:41 +0900573 * ata_tf_to_host - issue ATA taskfile to host controller
574 * @ap: port to which command is being issued
575 * @tf: ATA taskfile register set
576 *
577 * Issues ATA taskfile register set to ATA host controller,
578 * with proper synchronization with interrupt handler and
579 * other threads.
580 *
581 * LOCKING:
582 * spin_lock_irqsave(host lock)
583 */
584static inline void ata_tf_to_host(struct ata_port *ap,
585 const struct ata_taskfile *tf)
586{
Tejun Heo5682ed32008-04-07 22:47:16 +0900587 ap->ops->sff_tf_load(ap, tf);
588 ap->ops->sff_exec_command(ap, tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900589}
590
591/**
Tejun Heo9363c382008-04-07 22:47:16 +0900592 * ata_sff_data_xfer - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900593 * @dev: device to target
594 * @buf: data buffer
595 * @buflen: buffer length
596 * @rw: read/write
597 *
598 * Transfer data from/to the device data register by PIO.
599 *
600 * LOCKING:
601 * Inherited from caller.
602 *
603 * RETURNS:
604 * Bytes consumed.
605 */
Tejun Heo9363c382008-04-07 22:47:16 +0900606unsigned int ata_sff_data_xfer(struct ata_device *dev, unsigned char *buf,
607 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900608{
609 struct ata_port *ap = dev->link->ap;
610 void __iomem *data_addr = ap->ioaddr.data_addr;
611 unsigned int words = buflen >> 1;
612
613 /* Transfer multiple of 2 bytes */
614 if (rw == READ)
615 ioread16_rep(data_addr, buf, words);
616 else
617 iowrite16_rep(data_addr, buf, words);
618
619 /* Transfer trailing 1 byte, if any. */
620 if (unlikely(buflen & 0x01)) {
621 __le16 align_buf[1] = { 0 };
622 unsigned char *trailing_buf = buf + buflen - 1;
623
624 if (rw == READ) {
625 align_buf[0] = cpu_to_le16(ioread16(data_addr));
626 memcpy(trailing_buf, align_buf, 1);
627 } else {
628 memcpy(align_buf, trailing_buf, 1);
629 iowrite16(le16_to_cpu(align_buf[0]), data_addr);
630 }
631 words++;
632 }
633
634 return words << 1;
635}
636
637/**
Tejun Heo9363c382008-04-07 22:47:16 +0900638 * ata_sff_data_xfer_noirq - Transfer data by PIO
Tejun Heo624d5c52008-03-25 22:16:41 +0900639 * @dev: device to target
640 * @buf: data buffer
641 * @buflen: buffer length
642 * @rw: read/write
643 *
644 * Transfer data from/to the device data register by PIO. Do the
645 * transfer with interrupts disabled.
646 *
647 * LOCKING:
648 * Inherited from caller.
649 *
650 * RETURNS:
651 * Bytes consumed.
652 */
Tejun Heo9363c382008-04-07 22:47:16 +0900653unsigned int ata_sff_data_xfer_noirq(struct ata_device *dev, unsigned char *buf,
654 unsigned int buflen, int rw)
Tejun Heo624d5c52008-03-25 22:16:41 +0900655{
656 unsigned long flags;
657 unsigned int consumed;
658
659 local_irq_save(flags);
Tejun Heo9363c382008-04-07 22:47:16 +0900660 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900661 local_irq_restore(flags);
662
663 return consumed;
664}
665
666/**
667 * ata_pio_sector - Transfer a sector of data.
668 * @qc: Command on going
669 *
670 * Transfer qc->sect_size bytes of data from/to the ATA device.
671 *
672 * LOCKING:
673 * Inherited from caller.
674 */
675static void ata_pio_sector(struct ata_queued_cmd *qc)
676{
677 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
678 struct ata_port *ap = qc->ap;
679 struct page *page;
680 unsigned int offset;
681 unsigned char *buf;
682
683 if (qc->curbytes == qc->nbytes - qc->sect_size)
684 ap->hsm_task_state = HSM_ST_LAST;
685
686 page = sg_page(qc->cursg);
687 offset = qc->cursg->offset + qc->cursg_ofs;
688
689 /* get the current page and offset */
690 page = nth_page(page, (offset >> PAGE_SHIFT));
691 offset %= PAGE_SIZE;
692
693 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
694
695 if (PageHighMem(page)) {
696 unsigned long flags;
697
698 /* FIXME: use a bounce buffer */
699 local_irq_save(flags);
700 buf = kmap_atomic(page, KM_IRQ0);
701
702 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900703 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
704 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900705
706 kunmap_atomic(buf, KM_IRQ0);
707 local_irq_restore(flags);
708 } else {
709 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900710 ap->ops->sff_data_xfer(qc->dev, buf + offset, qc->sect_size,
711 do_write);
Tejun Heo624d5c52008-03-25 22:16:41 +0900712 }
713
714 qc->curbytes += qc->sect_size;
715 qc->cursg_ofs += qc->sect_size;
716
717 if (qc->cursg_ofs == qc->cursg->length) {
718 qc->cursg = sg_next(qc->cursg);
719 qc->cursg_ofs = 0;
720 }
721}
722
723/**
724 * ata_pio_sectors - Transfer one or many sectors.
725 * @qc: Command on going
726 *
727 * Transfer one or many sectors of data from/to the
728 * ATA device for the DRQ request.
729 *
730 * LOCKING:
731 * Inherited from caller.
732 */
733static void ata_pio_sectors(struct ata_queued_cmd *qc)
734{
735 if (is_multi_taskfile(&qc->tf)) {
736 /* READ/WRITE MULTIPLE */
737 unsigned int nsect;
738
739 WARN_ON(qc->dev->multi_count == 0);
740
741 nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size,
742 qc->dev->multi_count);
743 while (nsect--)
744 ata_pio_sector(qc);
745 } else
746 ata_pio_sector(qc);
747
Tejun Heo9363c382008-04-07 22:47:16 +0900748 ata_sff_altstatus(qc->ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900749}
750
751/**
752 * atapi_send_cdb - Write CDB bytes to hardware
753 * @ap: Port to which ATAPI device is attached.
754 * @qc: Taskfile currently active
755 *
756 * When device has indicated its readiness to accept
757 * a CDB, this function is called. Send the CDB.
758 *
759 * LOCKING:
760 * caller.
761 */
762static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
763{
764 /* send SCSI cdb */
765 DPRINTK("send cdb\n");
766 WARN_ON(qc->dev->cdb_len < 12);
767
Tejun Heo5682ed32008-04-07 22:47:16 +0900768 ap->ops->sff_data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
Tejun Heo9363c382008-04-07 22:47:16 +0900769 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900770
771 switch (qc->tf.protocol) {
772 case ATAPI_PROT_PIO:
773 ap->hsm_task_state = HSM_ST;
774 break;
775 case ATAPI_PROT_NODATA:
776 ap->hsm_task_state = HSM_ST_LAST;
777 break;
778 case ATAPI_PROT_DMA:
779 ap->hsm_task_state = HSM_ST_LAST;
780 /* initiate bmdma */
781 ap->ops->bmdma_start(qc);
782 break;
783 }
784}
785
786/**
787 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
788 * @qc: Command on going
789 * @bytes: number of bytes
790 *
791 * Transfer Transfer data from/to the ATAPI device.
792 *
793 * LOCKING:
794 * Inherited from caller.
795 *
796 */
797static int __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
798{
799 int rw = (qc->tf.flags & ATA_TFLAG_WRITE) ? WRITE : READ;
800 struct ata_port *ap = qc->ap;
801 struct ata_device *dev = qc->dev;
802 struct ata_eh_info *ehi = &dev->link->eh_info;
803 struct scatterlist *sg;
804 struct page *page;
805 unsigned char *buf;
806 unsigned int offset, count, consumed;
807
808next_sg:
809 sg = qc->cursg;
810 if (unlikely(!sg)) {
811 ata_ehi_push_desc(ehi, "unexpected or too much trailing data "
812 "buf=%u cur=%u bytes=%u",
813 qc->nbytes, qc->curbytes, bytes);
814 return -1;
815 }
816
817 page = sg_page(sg);
818 offset = sg->offset + qc->cursg_ofs;
819
820 /* get the current page and offset */
821 page = nth_page(page, (offset >> PAGE_SHIFT));
822 offset %= PAGE_SIZE;
823
824 /* don't overrun current sg */
825 count = min(sg->length - qc->cursg_ofs, bytes);
826
827 /* don't cross page boundaries */
828 count = min(count, (unsigned int)PAGE_SIZE - offset);
829
830 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
831
832 if (PageHighMem(page)) {
833 unsigned long flags;
834
835 /* FIXME: use bounce buffer */
836 local_irq_save(flags);
837 buf = kmap_atomic(page, KM_IRQ0);
838
839 /* do the actual data transfer */
Tejun Heo5682ed32008-04-07 22:47:16 +0900840 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900841
842 kunmap_atomic(buf, KM_IRQ0);
843 local_irq_restore(flags);
844 } else {
845 buf = page_address(page);
Tejun Heo5682ed32008-04-07 22:47:16 +0900846 consumed = ap->ops->sff_data_xfer(dev, buf + offset, count, rw);
Tejun Heo624d5c52008-03-25 22:16:41 +0900847 }
848
849 bytes -= min(bytes, consumed);
850 qc->curbytes += count;
851 qc->cursg_ofs += count;
852
853 if (qc->cursg_ofs == sg->length) {
854 qc->cursg = sg_next(qc->cursg);
855 qc->cursg_ofs = 0;
856 }
857
858 /* consumed can be larger than count only for the last transfer */
859 WARN_ON(qc->cursg && count != consumed);
860
861 if (bytes)
862 goto next_sg;
863 return 0;
864}
865
866/**
867 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
868 * @qc: Command on going
869 *
870 * Transfer Transfer data from/to the ATAPI device.
871 *
872 * LOCKING:
873 * Inherited from caller.
874 */
875static void atapi_pio_bytes(struct ata_queued_cmd *qc)
876{
877 struct ata_port *ap = qc->ap;
878 struct ata_device *dev = qc->dev;
879 struct ata_eh_info *ehi = &dev->link->eh_info;
880 unsigned int ireason, bc_lo, bc_hi, bytes;
881 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
882
883 /* Abuse qc->result_tf for temp storage of intermediate TF
884 * here to save some kernel stack usage.
885 * For normal completion, qc->result_tf is not relevant. For
886 * error, qc->result_tf is later overwritten by ata_qc_complete().
887 * So, the correctness of qc->result_tf is not affected.
888 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900889 ap->ops->sff_tf_read(ap, &qc->result_tf);
Tejun Heo624d5c52008-03-25 22:16:41 +0900890 ireason = qc->result_tf.nsect;
891 bc_lo = qc->result_tf.lbam;
892 bc_hi = qc->result_tf.lbah;
893 bytes = (bc_hi << 8) | bc_lo;
894
895 /* shall be cleared to zero, indicating xfer of data */
896 if (unlikely(ireason & (1 << 0)))
897 goto atapi_check;
898
899 /* make sure transfer direction matches expected */
900 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
901 if (unlikely(do_write != i_write))
902 goto atapi_check;
903
904 if (unlikely(!bytes))
905 goto atapi_check;
906
907 VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes);
908
909 if (unlikely(__atapi_pio_bytes(qc, bytes)))
910 goto err_out;
Tejun Heo9363c382008-04-07 22:47:16 +0900911 ata_sff_altstatus(ap); /* flush */
Tejun Heo624d5c52008-03-25 22:16:41 +0900912
913 return;
914
915 atapi_check:
916 ata_ehi_push_desc(ehi, "ATAPI check failed (ireason=0x%x bytes=%u)",
917 ireason, bytes);
918 err_out:
919 qc->err_mask |= AC_ERR_HSM;
920 ap->hsm_task_state = HSM_ST_ERR;
921}
922
923/**
924 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
925 * @ap: the target ata_port
926 * @qc: qc on going
927 *
928 * RETURNS:
929 * 1 if ok in workqueue, 0 otherwise.
930 */
931static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
932{
933 if (qc->tf.flags & ATA_TFLAG_POLLING)
934 return 1;
935
936 if (ap->hsm_task_state == HSM_ST_FIRST) {
937 if (qc->tf.protocol == ATA_PROT_PIO &&
938 (qc->tf.flags & ATA_TFLAG_WRITE))
939 return 1;
940
941 if (ata_is_atapi(qc->tf.protocol) &&
942 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
943 return 1;
944 }
945
946 return 0;
947}
948
949/**
950 * ata_hsm_qc_complete - finish a qc running on standard HSM
951 * @qc: Command to complete
952 * @in_wq: 1 if called from workqueue, 0 otherwise
953 *
954 * Finish @qc which is running on standard HSM.
955 *
956 * LOCKING:
957 * If @in_wq is zero, spin_lock_irqsave(host lock).
958 * Otherwise, none on entry and grabs host lock.
959 */
960static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
961{
962 struct ata_port *ap = qc->ap;
963 unsigned long flags;
964
965 if (ap->ops->error_handler) {
966 if (in_wq) {
967 spin_lock_irqsave(ap->lock, flags);
968
969 /* EH might have kicked in while host lock is
970 * released.
971 */
972 qc = ata_qc_from_tag(ap, qc->tag);
973 if (qc) {
974 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
Tejun Heo5682ed32008-04-07 22:47:16 +0900975 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900976 ata_qc_complete(qc);
977 } else
978 ata_port_freeze(ap);
979 }
980
981 spin_unlock_irqrestore(ap->lock, flags);
982 } else {
983 if (likely(!(qc->err_mask & AC_ERR_HSM)))
984 ata_qc_complete(qc);
985 else
986 ata_port_freeze(ap);
987 }
988 } else {
989 if (in_wq) {
990 spin_lock_irqsave(ap->lock, flags);
Tejun Heo5682ed32008-04-07 22:47:16 +0900991 ap->ops->sff_irq_on(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +0900992 ata_qc_complete(qc);
993 spin_unlock_irqrestore(ap->lock, flags);
994 } else
995 ata_qc_complete(qc);
996 }
997}
998
999/**
Tejun Heo9363c382008-04-07 22:47:16 +09001000 * ata_sff_hsm_move - move the HSM to the next state.
Tejun Heo624d5c52008-03-25 22:16:41 +09001001 * @ap: the target ata_port
1002 * @qc: qc on going
1003 * @status: current device status
1004 * @in_wq: 1 if called from workqueue, 0 otherwise
1005 *
1006 * RETURNS:
1007 * 1 when poll next status needed, 0 otherwise.
1008 */
Tejun Heo9363c382008-04-07 22:47:16 +09001009int ata_sff_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
1010 u8 status, int in_wq)
Tejun Heo624d5c52008-03-25 22:16:41 +09001011{
1012 unsigned long flags = 0;
1013 int poll_next;
1014
1015 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
1016
Tejun Heo9363c382008-04-07 22:47:16 +09001017 /* Make sure ata_sff_qc_issue() does not throw things
Tejun Heo624d5c52008-03-25 22:16:41 +09001018 * like DMA polling into the workqueue. Notice that
1019 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1020 */
1021 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
1022
1023fsm_start:
1024 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1025 ap->print_id, qc->tf.protocol, ap->hsm_task_state, status);
1026
1027 switch (ap->hsm_task_state) {
1028 case HSM_ST_FIRST:
1029 /* Send first data block or PACKET CDB */
1030
1031 /* If polling, we will stay in the work queue after
1032 * sending the data. Otherwise, interrupt handler
1033 * takes over after sending the data.
1034 */
1035 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
1036
1037 /* check device status */
1038 if (unlikely((status & ATA_DRQ) == 0)) {
1039 /* handle BSY=0, DRQ=0 as error */
1040 if (likely(status & (ATA_ERR | ATA_DF)))
1041 /* device stops HSM for abort/error */
1042 qc->err_mask |= AC_ERR_DEV;
1043 else
1044 /* HSM violation. Let EH handle this */
1045 qc->err_mask |= AC_ERR_HSM;
1046
1047 ap->hsm_task_state = HSM_ST_ERR;
1048 goto fsm_start;
1049 }
1050
1051 /* Device should not ask for data transfer (DRQ=1)
1052 * when it finds something wrong.
1053 * We ignore DRQ here and stop the HSM by
1054 * changing hsm_task_state to HSM_ST_ERR and
1055 * let the EH abort the command or reset the device.
1056 */
1057 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1058 /* Some ATAPI tape drives forget to clear the ERR bit
1059 * when doing the next command (mostly request sense).
1060 * We ignore ERR here to workaround and proceed sending
1061 * the CDB.
1062 */
1063 if (!(qc->dev->horkage & ATA_HORKAGE_STUCK_ERR)) {
1064 ata_port_printk(ap, KERN_WARNING,
1065 "DRQ=1 with device error, "
1066 "dev_stat 0x%X\n", status);
1067 qc->err_mask |= AC_ERR_HSM;
1068 ap->hsm_task_state = HSM_ST_ERR;
1069 goto fsm_start;
1070 }
1071 }
1072
1073 /* Send the CDB (atapi) or the first data block (ata pio out).
1074 * During the state transition, interrupt handler shouldn't
1075 * be invoked before the data transfer is complete and
1076 * hsm_task_state is changed. Hence, the following locking.
1077 */
1078 if (in_wq)
1079 spin_lock_irqsave(ap->lock, flags);
1080
1081 if (qc->tf.protocol == ATA_PROT_PIO) {
1082 /* PIO data out protocol.
1083 * send first data block.
1084 */
1085
1086 /* ata_pio_sectors() might change the state
1087 * to HSM_ST_LAST. so, the state is changed here
1088 * before ata_pio_sectors().
1089 */
1090 ap->hsm_task_state = HSM_ST;
1091 ata_pio_sectors(qc);
1092 } else
1093 /* send CDB */
1094 atapi_send_cdb(ap, qc);
1095
1096 if (in_wq)
1097 spin_unlock_irqrestore(ap->lock, flags);
1098
1099 /* if polling, ata_pio_task() handles the rest.
1100 * otherwise, interrupt handler takes over from here.
1101 */
1102 break;
1103
1104 case HSM_ST:
1105 /* complete command or read/write the data register */
1106 if (qc->tf.protocol == ATAPI_PROT_PIO) {
1107 /* ATAPI PIO protocol */
1108 if ((status & ATA_DRQ) == 0) {
1109 /* No more data to transfer or device error.
1110 * Device error will be tagged in HSM_ST_LAST.
1111 */
1112 ap->hsm_task_state = HSM_ST_LAST;
1113 goto fsm_start;
1114 }
1115
1116 /* Device should not ask for data transfer (DRQ=1)
1117 * when it finds something wrong.
1118 * We ignore DRQ here and stop the HSM by
1119 * changing hsm_task_state to HSM_ST_ERR and
1120 * let the EH abort the command or reset the device.
1121 */
1122 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1123 ata_port_printk(ap, KERN_WARNING, "DRQ=1 with "
1124 "device error, dev_stat 0x%X\n",
1125 status);
1126 qc->err_mask |= AC_ERR_HSM;
1127 ap->hsm_task_state = HSM_ST_ERR;
1128 goto fsm_start;
1129 }
1130
1131 atapi_pio_bytes(qc);
1132
1133 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
1134 /* bad ireason reported by device */
1135 goto fsm_start;
1136
1137 } else {
1138 /* ATA PIO protocol */
1139 if (unlikely((status & ATA_DRQ) == 0)) {
1140 /* handle BSY=0, DRQ=0 as error */
1141 if (likely(status & (ATA_ERR | ATA_DF)))
1142 /* device stops HSM for abort/error */
1143 qc->err_mask |= AC_ERR_DEV;
1144 else
1145 /* HSM violation. Let EH handle this.
1146 * Phantom devices also trigger this
1147 * condition. Mark hint.
1148 */
1149 qc->err_mask |= AC_ERR_HSM |
1150 AC_ERR_NODEV_HINT;
1151
1152 ap->hsm_task_state = HSM_ST_ERR;
1153 goto fsm_start;
1154 }
1155
1156 /* For PIO reads, some devices may ask for
1157 * data transfer (DRQ=1) alone with ERR=1.
1158 * We respect DRQ here and transfer one
1159 * block of junk data before changing the
1160 * hsm_task_state to HSM_ST_ERR.
1161 *
1162 * For PIO writes, ERR=1 DRQ=1 doesn't make
1163 * sense since the data block has been
1164 * transferred to the device.
1165 */
1166 if (unlikely(status & (ATA_ERR | ATA_DF))) {
1167 /* data might be corrputed */
1168 qc->err_mask |= AC_ERR_DEV;
1169
1170 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
1171 ata_pio_sectors(qc);
1172 status = ata_wait_idle(ap);
1173 }
1174
1175 if (status & (ATA_BUSY | ATA_DRQ))
1176 qc->err_mask |= AC_ERR_HSM;
1177
1178 /* ata_pio_sectors() might change the
1179 * state to HSM_ST_LAST. so, the state
1180 * is changed after ata_pio_sectors().
1181 */
1182 ap->hsm_task_state = HSM_ST_ERR;
1183 goto fsm_start;
1184 }
1185
1186 ata_pio_sectors(qc);
1187
1188 if (ap->hsm_task_state == HSM_ST_LAST &&
1189 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
1190 /* all data read */
1191 status = ata_wait_idle(ap);
1192 goto fsm_start;
1193 }
1194 }
1195
1196 poll_next = 1;
1197 break;
1198
1199 case HSM_ST_LAST:
1200 if (unlikely(!ata_ok(status))) {
1201 qc->err_mask |= __ac_err_mask(status);
1202 ap->hsm_task_state = HSM_ST_ERR;
1203 goto fsm_start;
1204 }
1205
1206 /* no more data to transfer */
1207 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1208 ap->print_id, qc->dev->devno, status);
1209
1210 WARN_ON(qc->err_mask);
1211
1212 ap->hsm_task_state = HSM_ST_IDLE;
1213
1214 /* complete taskfile transaction */
1215 ata_hsm_qc_complete(qc, in_wq);
1216
1217 poll_next = 0;
1218 break;
1219
1220 case HSM_ST_ERR:
1221 /* make sure qc->err_mask is available to
1222 * know what's wrong and recover
1223 */
1224 WARN_ON(qc->err_mask == 0);
1225
1226 ap->hsm_task_state = HSM_ST_IDLE;
1227
1228 /* complete taskfile transaction */
1229 ata_hsm_qc_complete(qc, in_wq);
1230
1231 poll_next = 0;
1232 break;
1233 default:
1234 poll_next = 0;
1235 BUG();
1236 }
1237
1238 return poll_next;
1239}
1240
1241void ata_pio_task(struct work_struct *work)
1242{
1243 struct ata_port *ap =
1244 container_of(work, struct ata_port, port_task.work);
1245 struct ata_queued_cmd *qc = ap->port_task_data;
1246 u8 status;
1247 int poll_next;
1248
1249fsm_start:
1250 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
1251
1252 /*
1253 * This is purely heuristic. This is a fast path.
1254 * Sometimes when we enter, BSY will be cleared in
1255 * a chk-status or two. If not, the drive is probably seeking
1256 * or something. Snooze for a couple msecs, then
1257 * chk-status again. If still busy, queue delayed work.
1258 */
Tejun Heo9363c382008-04-07 22:47:16 +09001259 status = ata_sff_busy_wait(ap, ATA_BUSY, 5);
Tejun Heo624d5c52008-03-25 22:16:41 +09001260 if (status & ATA_BUSY) {
1261 msleep(2);
Tejun Heo9363c382008-04-07 22:47:16 +09001262 status = ata_sff_busy_wait(ap, ATA_BUSY, 10);
Tejun Heo624d5c52008-03-25 22:16:41 +09001263 if (status & ATA_BUSY) {
1264 ata_pio_queue_task(ap, qc, ATA_SHORT_PAUSE);
1265 return;
1266 }
1267 }
1268
1269 /* move the HSM */
Tejun Heo9363c382008-04-07 22:47:16 +09001270 poll_next = ata_sff_hsm_move(ap, qc, status, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001271
1272 /* another command or interrupt handler
1273 * may be running at this point.
1274 */
1275 if (poll_next)
1276 goto fsm_start;
1277}
1278
1279/**
Tejun Heo9363c382008-04-07 22:47:16 +09001280 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
Tejun Heo624d5c52008-03-25 22:16:41 +09001281 * @qc: command to issue to device
1282 *
1283 * Using various libata functions and hooks, this function
1284 * starts an ATA command. ATA commands are grouped into
1285 * classes called "protocols", and issuing each type of protocol
1286 * is slightly different.
1287 *
1288 * May be used as the qc_issue() entry in ata_port_operations.
1289 *
1290 * LOCKING:
1291 * spin_lock_irqsave(host lock)
1292 *
1293 * RETURNS:
1294 * Zero on success, AC_ERR_* mask on failure
1295 */
Tejun Heo9363c382008-04-07 22:47:16 +09001296unsigned int ata_sff_qc_issue(struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001297{
1298 struct ata_port *ap = qc->ap;
1299
1300 /* Use polling pio if the LLD doesn't handle
1301 * interrupt driven pio and atapi CDB interrupt.
1302 */
1303 if (ap->flags & ATA_FLAG_PIO_POLLING) {
1304 switch (qc->tf.protocol) {
1305 case ATA_PROT_PIO:
1306 case ATA_PROT_NODATA:
1307 case ATAPI_PROT_PIO:
1308 case ATAPI_PROT_NODATA:
1309 qc->tf.flags |= ATA_TFLAG_POLLING;
1310 break;
1311 case ATAPI_PROT_DMA:
1312 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1313 /* see ata_dma_blacklisted() */
1314 BUG();
1315 break;
1316 default:
1317 break;
1318 }
1319 }
1320
1321 /* select the device */
1322 ata_dev_select(ap, qc->dev->devno, 1, 0);
1323
1324 /* start the command */
1325 switch (qc->tf.protocol) {
1326 case ATA_PROT_NODATA:
1327 if (qc->tf.flags & ATA_TFLAG_POLLING)
1328 ata_qc_set_polling(qc);
1329
1330 ata_tf_to_host(ap, &qc->tf);
1331 ap->hsm_task_state = HSM_ST_LAST;
1332
1333 if (qc->tf.flags & ATA_TFLAG_POLLING)
1334 ata_pio_queue_task(ap, qc, 0);
1335
1336 break;
1337
1338 case ATA_PROT_DMA:
1339 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1340
Tejun Heo5682ed32008-04-07 22:47:16 +09001341 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001342 ap->ops->bmdma_setup(qc); /* set up bmdma */
1343 ap->ops->bmdma_start(qc); /* initiate bmdma */
1344 ap->hsm_task_state = HSM_ST_LAST;
1345 break;
1346
1347 case ATA_PROT_PIO:
1348 if (qc->tf.flags & ATA_TFLAG_POLLING)
1349 ata_qc_set_polling(qc);
1350
1351 ata_tf_to_host(ap, &qc->tf);
1352
1353 if (qc->tf.flags & ATA_TFLAG_WRITE) {
1354 /* PIO data out protocol */
1355 ap->hsm_task_state = HSM_ST_FIRST;
1356 ata_pio_queue_task(ap, qc, 0);
1357
1358 /* always send first data block using
1359 * the ata_pio_task() codepath.
1360 */
1361 } else {
1362 /* PIO data in protocol */
1363 ap->hsm_task_state = HSM_ST;
1364
1365 if (qc->tf.flags & ATA_TFLAG_POLLING)
1366 ata_pio_queue_task(ap, qc, 0);
1367
1368 /* if polling, ata_pio_task() handles the rest.
1369 * otherwise, interrupt handler takes over from here.
1370 */
1371 }
1372
1373 break;
1374
1375 case ATAPI_PROT_PIO:
1376 case ATAPI_PROT_NODATA:
1377 if (qc->tf.flags & ATA_TFLAG_POLLING)
1378 ata_qc_set_polling(qc);
1379
1380 ata_tf_to_host(ap, &qc->tf);
1381
1382 ap->hsm_task_state = HSM_ST_FIRST;
1383
1384 /* send cdb by polling if no cdb interrupt */
1385 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
1386 (qc->tf.flags & ATA_TFLAG_POLLING))
1387 ata_pio_queue_task(ap, qc, 0);
1388 break;
1389
1390 case ATAPI_PROT_DMA:
1391 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
1392
Tejun Heo5682ed32008-04-07 22:47:16 +09001393 ap->ops->sff_tf_load(ap, &qc->tf); /* load tf registers */
Tejun Heo624d5c52008-03-25 22:16:41 +09001394 ap->ops->bmdma_setup(qc); /* set up bmdma */
1395 ap->hsm_task_state = HSM_ST_FIRST;
1396
1397 /* send cdb by polling if no cdb interrupt */
1398 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1399 ata_pio_queue_task(ap, qc, 0);
1400 break;
1401
1402 default:
1403 WARN_ON(1);
1404 return AC_ERR_SYSTEM;
1405 }
1406
1407 return 0;
1408}
1409
1410/**
Tejun Heo9363c382008-04-07 22:47:16 +09001411 * ata_sff_host_intr - Handle host interrupt for given (port, task)
Tejun Heo624d5c52008-03-25 22:16:41 +09001412 * @ap: Port on which interrupt arrived (possibly...)
1413 * @qc: Taskfile currently active in engine
1414 *
1415 * Handle host interrupt for given queued command. Currently,
1416 * only DMA interrupts are handled. All other commands are
1417 * handled via polling with interrupts disabled (nIEN bit).
1418 *
1419 * LOCKING:
1420 * spin_lock_irqsave(host lock)
1421 *
1422 * RETURNS:
1423 * One if interrupt was handled, zero if not (shared irq).
1424 */
Tejun Heo9363c382008-04-07 22:47:16 +09001425inline unsigned int ata_sff_host_intr(struct ata_port *ap,
1426 struct ata_queued_cmd *qc)
Tejun Heo624d5c52008-03-25 22:16:41 +09001427{
1428 struct ata_eh_info *ehi = &ap->link.eh_info;
1429 u8 status, host_stat = 0;
1430
1431 VPRINTK("ata%u: protocol %d task_state %d\n",
1432 ap->print_id, qc->tf.protocol, ap->hsm_task_state);
1433
1434 /* Check whether we are expecting interrupt in this state */
1435 switch (ap->hsm_task_state) {
1436 case HSM_ST_FIRST:
1437 /* Some pre-ATAPI-4 devices assert INTRQ
1438 * at this state when ready to receive CDB.
1439 */
1440
1441 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1442 * The flag was turned on only for atapi devices. No
1443 * need to check ata_is_atapi(qc->tf.protocol) again.
1444 */
1445 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1446 goto idle_irq;
1447 break;
1448 case HSM_ST_LAST:
1449 if (qc->tf.protocol == ATA_PROT_DMA ||
1450 qc->tf.protocol == ATAPI_PROT_DMA) {
1451 /* check status of DMA engine */
1452 host_stat = ap->ops->bmdma_status(ap);
1453 VPRINTK("ata%u: host_stat 0x%X\n",
1454 ap->print_id, host_stat);
1455
1456 /* if it's not our irq... */
1457 if (!(host_stat & ATA_DMA_INTR))
1458 goto idle_irq;
1459
1460 /* before we do anything else, clear DMA-Start bit */
1461 ap->ops->bmdma_stop(qc);
1462
1463 if (unlikely(host_stat & ATA_DMA_ERR)) {
1464 /* error when transfering data to/from memory */
1465 qc->err_mask |= AC_ERR_HOST_BUS;
1466 ap->hsm_task_state = HSM_ST_ERR;
1467 }
1468 }
1469 break;
1470 case HSM_ST:
1471 break;
1472 default:
1473 goto idle_irq;
1474 }
1475
1476 /* check altstatus */
Tejun Heo9363c382008-04-07 22:47:16 +09001477 status = ata_sff_altstatus(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001478 if (status & ATA_BUSY)
1479 goto idle_irq;
1480
1481 /* check main status, clearing INTRQ */
Tejun Heo5682ed32008-04-07 22:47:16 +09001482 status = ap->ops->sff_check_status(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001483 if (unlikely(status & ATA_BUSY))
1484 goto idle_irq;
1485
1486 /* ack bmdma irq events */
Tejun Heo5682ed32008-04-07 22:47:16 +09001487 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001488
Tejun Heo9363c382008-04-07 22:47:16 +09001489 ata_sff_hsm_move(ap, qc, status, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001490
1491 if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA ||
1492 qc->tf.protocol == ATAPI_PROT_DMA))
1493 ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat);
1494
1495 return 1; /* irq handled */
1496
1497idle_irq:
1498 ap->stats.idle_irq++;
1499
1500#ifdef ATA_IRQ_TRAP
1501 if ((ap->stats.idle_irq % 1000) == 0) {
Tejun Heo5682ed32008-04-07 22:47:16 +09001502 ap->ops->sff_check_status(ap);
1503 ap->ops->sff_irq_clear(ap);
Tejun Heo624d5c52008-03-25 22:16:41 +09001504 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
1505 return 1;
1506 }
1507#endif
1508 return 0; /* irq not handled */
1509}
1510
1511/**
Tejun Heo9363c382008-04-07 22:47:16 +09001512 * ata_sff_interrupt - Default ATA host interrupt handler
Tejun Heo624d5c52008-03-25 22:16:41 +09001513 * @irq: irq line (unused)
1514 * @dev_instance: pointer to our ata_host information structure
1515 *
1516 * Default interrupt handler for PCI IDE devices. Calls
Tejun Heo9363c382008-04-07 22:47:16 +09001517 * ata_sff_host_intr() for each port that is not disabled.
Tejun Heo624d5c52008-03-25 22:16:41 +09001518 *
1519 * LOCKING:
1520 * Obtains host lock during operation.
1521 *
1522 * RETURNS:
1523 * IRQ_NONE or IRQ_HANDLED.
1524 */
Tejun Heo9363c382008-04-07 22:47:16 +09001525irqreturn_t ata_sff_interrupt(int irq, void *dev_instance)
Tejun Heo624d5c52008-03-25 22:16:41 +09001526{
1527 struct ata_host *host = dev_instance;
1528 unsigned int i;
1529 unsigned int handled = 0;
1530 unsigned long flags;
1531
1532 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1533 spin_lock_irqsave(&host->lock, flags);
1534
1535 for (i = 0; i < host->n_ports; i++) {
1536 struct ata_port *ap;
1537
1538 ap = host->ports[i];
1539 if (ap &&
1540 !(ap->flags & ATA_FLAG_DISABLED)) {
1541 struct ata_queued_cmd *qc;
1542
1543 qc = ata_qc_from_tag(ap, ap->link.active_tag);
1544 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
1545 (qc->flags & ATA_QCFLAG_ACTIVE))
Tejun Heo9363c382008-04-07 22:47:16 +09001546 handled |= ata_sff_host_intr(ap, qc);
Tejun Heo624d5c52008-03-25 22:16:41 +09001547 }
1548 }
1549
1550 spin_unlock_irqrestore(&host->lock, flags);
1551
1552 return IRQ_RETVAL(handled);
1553}
1554
1555/**
Tejun Heo9363c382008-04-07 22:47:16 +09001556 * ata_sff_freeze - Freeze SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001557 * @ap: port to freeze
1558 *
1559 * Freeze BMDMA controller port.
1560 *
1561 * LOCKING:
1562 * Inherited from caller.
1563 */
Tejun Heo9363c382008-04-07 22:47:16 +09001564void ata_sff_freeze(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001565{
1566 struct ata_ioports *ioaddr = &ap->ioaddr;
1567
1568 ap->ctl |= ATA_NIEN;
1569 ap->last_ctl = ap->ctl;
1570
Tejun Heof659f0e42008-03-06 13:12:54 +09001571 if (ioaddr->ctl_addr)
1572 iowrite8(ap->ctl, ioaddr->ctl_addr);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001573
1574 /* Under certain circumstances, some controllers raise IRQ on
1575 * ATA_NIEN manipulation. Also, many controllers fail to mask
1576 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1577 */
Tejun Heo5682ed32008-04-07 22:47:16 +09001578 ap->ops->sff_check_status(ap);
Tejun Heo0f0a3ad2006-11-17 12:24:22 +09001579
Tejun Heo5682ed32008-04-07 22:47:16 +09001580 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001581}
1582
1583/**
Tejun Heo9363c382008-04-07 22:47:16 +09001584 * ata_sff_thaw - Thaw SFF controller port
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001585 * @ap: port to thaw
1586 *
Tejun Heo9363c382008-04-07 22:47:16 +09001587 * Thaw SFF controller port.
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001588 *
1589 * LOCKING:
1590 * Inherited from caller.
1591 */
Tejun Heo9363c382008-04-07 22:47:16 +09001592void ata_sff_thaw(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001593{
1594 /* clear & re-enable interrupts */
Tejun Heo5682ed32008-04-07 22:47:16 +09001595 ap->ops->sff_check_status(ap);
1596 ap->ops->sff_irq_clear(ap);
1597 ap->ops->sff_irq_on(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001598}
1599
1600/**
Tejun Heo0aa11132008-04-07 22:47:18 +09001601 * ata_sff_prereset - prepare SFF link for reset
1602 * @link: SFF link to be reset
1603 * @deadline: deadline jiffies for the operation
1604 *
1605 * SFF link @link is about to be reset. Initialize it. It first
1606 * calls ata_std_prereset() and wait for !BSY if the port is
1607 * being softreset.
1608 *
1609 * LOCKING:
1610 * Kernel thread context (may sleep)
1611 *
1612 * RETURNS:
1613 * 0 on success, -errno otherwise.
1614 */
1615int ata_sff_prereset(struct ata_link *link, unsigned long deadline)
1616{
Tejun Heo0aa11132008-04-07 22:47:18 +09001617 struct ata_eh_context *ehc = &link->eh_context;
1618 int rc;
1619
1620 rc = ata_std_prereset(link, deadline);
1621 if (rc)
1622 return rc;
1623
1624 /* if we're about to do hardreset, nothing more to do */
1625 if (ehc->i.action & ATA_EH_HARDRESET)
1626 return 0;
1627
1628 /* wait for !BSY if we don't know that no device is attached */
1629 if (!ata_link_offline(link)) {
Tejun Heo705e76b2008-04-07 22:47:19 +09001630 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo0aa11132008-04-07 22:47:18 +09001631 if (rc && rc != -ENODEV) {
1632 ata_link_printk(link, KERN_WARNING, "device not ready "
1633 "(errno=%d), forcing hardreset\n", rc);
1634 ehc->i.action |= ATA_EH_HARDRESET;
1635 }
1636 }
1637
1638 return 0;
1639}
1640
1641/**
Tejun Heo624d5c52008-03-25 22:16:41 +09001642 * ata_devchk - PATA device presence detection
1643 * @ap: ATA channel to examine
1644 * @device: Device to examine (starting at zero)
1645 *
1646 * This technique was originally described in
1647 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1648 * later found its way into the ATA/ATAPI spec.
1649 *
1650 * Write a pattern to the ATA shadow registers,
1651 * and if a device is present, it will respond by
1652 * correctly storing and echoing back the
1653 * ATA shadow register contents.
1654 *
1655 * LOCKING:
1656 * caller.
1657 */
1658static unsigned int ata_devchk(struct ata_port *ap, unsigned int device)
1659{
1660 struct ata_ioports *ioaddr = &ap->ioaddr;
1661 u8 nsect, lbal;
1662
Tejun Heo5682ed32008-04-07 22:47:16 +09001663 ap->ops->sff_dev_select(ap, device);
Tejun Heo624d5c52008-03-25 22:16:41 +09001664
1665 iowrite8(0x55, ioaddr->nsect_addr);
1666 iowrite8(0xaa, ioaddr->lbal_addr);
1667
1668 iowrite8(0xaa, ioaddr->nsect_addr);
1669 iowrite8(0x55, ioaddr->lbal_addr);
1670
1671 iowrite8(0x55, ioaddr->nsect_addr);
1672 iowrite8(0xaa, ioaddr->lbal_addr);
1673
1674 nsect = ioread8(ioaddr->nsect_addr);
1675 lbal = ioread8(ioaddr->lbal_addr);
1676
1677 if ((nsect == 0x55) && (lbal == 0xaa))
1678 return 1; /* we found a device */
1679
1680 return 0; /* nothing found */
1681}
1682
1683/**
Tejun Heo9363c382008-04-07 22:47:16 +09001684 * ata_sff_dev_classify - Parse returned ATA device signature
Tejun Heo624d5c52008-03-25 22:16:41 +09001685 * @dev: ATA device to classify (starting at zero)
1686 * @present: device seems present
1687 * @r_err: Value of error register on completion
1688 *
1689 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
1690 * an ATA/ATAPI-defined set of values is placed in the ATA
1691 * shadow registers, indicating the results of device detection
1692 * and diagnostics.
1693 *
1694 * Select the ATA device, and read the values from the ATA shadow
1695 * registers. Then parse according to the Error register value,
1696 * and the spec-defined values examined by ata_dev_classify().
1697 *
1698 * LOCKING:
1699 * caller.
1700 *
1701 * RETURNS:
1702 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1703 */
Tejun Heo9363c382008-04-07 22:47:16 +09001704unsigned int ata_sff_dev_classify(struct ata_device *dev, int present,
Tejun Heo624d5c52008-03-25 22:16:41 +09001705 u8 *r_err)
1706{
1707 struct ata_port *ap = dev->link->ap;
1708 struct ata_taskfile tf;
1709 unsigned int class;
1710 u8 err;
1711
Tejun Heo5682ed32008-04-07 22:47:16 +09001712 ap->ops->sff_dev_select(ap, dev->devno);
Tejun Heo624d5c52008-03-25 22:16:41 +09001713
1714 memset(&tf, 0, sizeof(tf));
1715
Tejun Heo5682ed32008-04-07 22:47:16 +09001716 ap->ops->sff_tf_read(ap, &tf);
Tejun Heo624d5c52008-03-25 22:16:41 +09001717 err = tf.feature;
1718 if (r_err)
1719 *r_err = err;
1720
1721 /* see if device passed diags: continue and warn later */
1722 if (err == 0)
1723 /* diagnostic fail : do nothing _YET_ */
1724 dev->horkage |= ATA_HORKAGE_DIAGNOSTIC;
1725 else if (err == 1)
1726 /* do nothing */ ;
1727 else if ((dev->devno == 0) && (err == 0x81))
1728 /* do nothing */ ;
1729 else
1730 return ATA_DEV_NONE;
1731
1732 /* determine if device is ATA or ATAPI */
1733 class = ata_dev_classify(&tf);
1734
1735 if (class == ATA_DEV_UNKNOWN) {
1736 /* If the device failed diagnostic, it's likely to
1737 * have reported incorrect device signature too.
1738 * Assume ATA device if the device seems present but
1739 * device signature is invalid with diagnostic
1740 * failure.
1741 */
1742 if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC))
1743 class = ATA_DEV_ATA;
1744 else
1745 class = ATA_DEV_NONE;
Tejun Heo5682ed32008-04-07 22:47:16 +09001746 } else if ((class == ATA_DEV_ATA) &&
1747 (ap->ops->sff_check_status(ap) == 0))
Tejun Heo624d5c52008-03-25 22:16:41 +09001748 class = ATA_DEV_NONE;
1749
1750 return class;
1751}
1752
Tejun Heo705e76b2008-04-07 22:47:19 +09001753/**
1754 * ata_sff_wait_after_reset - wait for devices to become ready after reset
1755 * @link: SFF link which is just reset
1756 * @devmask: mask of present devices
1757 * @deadline: deadline jiffies for the operation
1758 *
1759 * Wait devices attached to SFF @link to become ready after
1760 * reset. It contains preceding 150ms wait to avoid accessing TF
1761 * status register too early.
1762 *
1763 * LOCKING:
1764 * Kernel thread context (may sleep).
1765 *
1766 * RETURNS:
1767 * 0 on success, -ENODEV if some or all of devices in @devmask
1768 * don't seem to exist. -errno on other errors.
1769 */
1770int ata_sff_wait_after_reset(struct ata_link *link, unsigned int devmask,
1771 unsigned long deadline)
Tejun Heo624d5c52008-03-25 22:16:41 +09001772{
Tejun Heo705e76b2008-04-07 22:47:19 +09001773 struct ata_port *ap = link->ap;
Tejun Heo624d5c52008-03-25 22:16:41 +09001774 struct ata_ioports *ioaddr = &ap->ioaddr;
1775 unsigned int dev0 = devmask & (1 << 0);
1776 unsigned int dev1 = devmask & (1 << 1);
1777 int rc, ret = 0;
1778
Tejun Heo705e76b2008-04-07 22:47:19 +09001779 msleep(ATA_WAIT_AFTER_RESET_MSECS);
1780
1781 /* always check readiness of the master device */
1782 rc = ata_sff_wait_ready(link, deadline);
1783 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
1784 * and TF status is 0xff, bail out on it too.
Tejun Heo624d5c52008-03-25 22:16:41 +09001785 */
Tejun Heo705e76b2008-04-07 22:47:19 +09001786 if (rc)
1787 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001788
1789 /* if device 1 was found in ata_devchk, wait for register
1790 * access briefly, then wait for BSY to clear.
1791 */
1792 if (dev1) {
1793 int i;
1794
Tejun Heo5682ed32008-04-07 22:47:16 +09001795 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001796
1797 /* Wait for register access. Some ATAPI devices fail
1798 * to set nsect/lbal after reset, so don't waste too
1799 * much time on it. We're gonna wait for !BSY anyway.
1800 */
1801 for (i = 0; i < 2; i++) {
1802 u8 nsect, lbal;
1803
1804 nsect = ioread8(ioaddr->nsect_addr);
1805 lbal = ioread8(ioaddr->lbal_addr);
1806 if ((nsect == 1) && (lbal == 1))
1807 break;
1808 msleep(50); /* give drive a breather */
1809 }
1810
Tejun Heo705e76b2008-04-07 22:47:19 +09001811 rc = ata_sff_wait_ready(link, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001812 if (rc) {
1813 if (rc != -ENODEV)
1814 return rc;
1815 ret = rc;
1816 }
1817 }
1818
1819 /* is all this really necessary? */
Tejun Heo5682ed32008-04-07 22:47:16 +09001820 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001821 if (dev1)
Tejun Heo5682ed32008-04-07 22:47:16 +09001822 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09001823 if (dev0)
Tejun Heo5682ed32008-04-07 22:47:16 +09001824 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001825
1826 return ret;
1827}
1828
Tejun Heo624d5c52008-03-25 22:16:41 +09001829static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask,
1830 unsigned long deadline)
1831{
1832 struct ata_ioports *ioaddr = &ap->ioaddr;
1833
1834 DPRINTK("ata%u: bus reset via SRST\n", ap->print_id);
1835
1836 /* software reset. causes dev0 to be selected */
1837 iowrite8(ap->ctl, ioaddr->ctl_addr);
1838 udelay(20); /* FIXME: flush */
1839 iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1840 udelay(20); /* FIXME: flush */
1841 iowrite8(ap->ctl, ioaddr->ctl_addr);
1842
Tejun Heo705e76b2008-04-07 22:47:19 +09001843 /* wait the port to become ready */
1844 return ata_sff_wait_after_reset(&ap->link, devmask, deadline);
Tejun Heo624d5c52008-03-25 22:16:41 +09001845}
1846
1847/**
Tejun Heo9363c382008-04-07 22:47:16 +09001848 * ata_sff_softreset - reset host port via ATA SRST
Tejun Heo624d5c52008-03-25 22:16:41 +09001849 * @link: ATA link to reset
1850 * @classes: resulting classes of attached devices
1851 * @deadline: deadline jiffies for the operation
1852 *
1853 * Reset host port using ATA SRST.
1854 *
1855 * LOCKING:
1856 * Kernel thread context (may sleep)
1857 *
1858 * RETURNS:
1859 * 0 on success, -errno otherwise.
1860 */
Tejun Heo9363c382008-04-07 22:47:16 +09001861int ata_sff_softreset(struct ata_link *link, unsigned int *classes,
Tejun Heo624d5c52008-03-25 22:16:41 +09001862 unsigned long deadline)
1863{
1864 struct ata_port *ap = link->ap;
1865 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1866 unsigned int devmask = 0;
1867 int rc;
1868 u8 err;
1869
1870 DPRINTK("ENTER\n");
1871
1872 if (ata_link_offline(link)) {
1873 classes[0] = ATA_DEV_NONE;
1874 goto out;
1875 }
1876
1877 /* determine if device 0/1 are present */
1878 if (ata_devchk(ap, 0))
1879 devmask |= (1 << 0);
1880 if (slave_possible && ata_devchk(ap, 1))
1881 devmask |= (1 << 1);
1882
1883 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09001884 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09001885
1886 /* issue bus reset */
1887 DPRINTK("about to softreset, devmask=%x\n", devmask);
1888 rc = ata_bus_softreset(ap, devmask, deadline);
1889 /* if link is occupied, -ENODEV too is an error */
1890 if (rc && (rc != -ENODEV || sata_scr_valid(link))) {
1891 ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc);
1892 return rc;
1893 }
1894
1895 /* determine by signature whether we have ATA or ATAPI devices */
Tejun Heo9363c382008-04-07 22:47:16 +09001896 classes[0] = ata_sff_dev_classify(&link->device[0],
Tejun Heo624d5c52008-03-25 22:16:41 +09001897 devmask & (1 << 0), &err);
1898 if (slave_possible && err != 0x81)
Tejun Heo9363c382008-04-07 22:47:16 +09001899 classes[1] = ata_sff_dev_classify(&link->device[1],
Tejun Heo624d5c52008-03-25 22:16:41 +09001900 devmask & (1 << 1), &err);
1901
1902 out:
1903 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
1904 return 0;
1905}
1906
1907/**
Tejun Heo9363c382008-04-07 22:47:16 +09001908 * sata_sff_hardreset - reset host port via SATA phy reset
Tejun Heo624d5c52008-03-25 22:16:41 +09001909 * @link: link to reset
1910 * @class: resulting class of attached device
1911 * @deadline: deadline jiffies for the operation
1912 *
1913 * SATA phy-reset host port using DET bits of SControl register,
1914 * wait for !BSY and classify the attached device.
1915 *
1916 * LOCKING:
1917 * Kernel thread context (may sleep)
1918 *
1919 * RETURNS:
1920 * 0 on success, -errno otherwise.
1921 */
Tejun Heo9363c382008-04-07 22:47:16 +09001922int sata_sff_hardreset(struct ata_link *link, unsigned int *class,
Tejun Heo624d5c52008-03-25 22:16:41 +09001923 unsigned long deadline)
1924{
Tejun Heo9dadd452008-04-07 22:47:19 +09001925 struct ata_eh_context *ehc = &link->eh_context;
1926 const unsigned long *timing = sata_ehc_deb_timing(ehc);
1927 bool online;
Tejun Heo624d5c52008-03-25 22:16:41 +09001928 int rc;
1929
Tejun Heo9dadd452008-04-07 22:47:19 +09001930 rc = sata_link_hardreset(link, timing, deadline, &online,
1931 ata_sff_check_ready);
1932 *class = ATA_DEV_NONE;
1933 if (online)
1934 *class = ata_sff_dev_classify(link->device, 1, NULL);
Tejun Heo624d5c52008-03-25 22:16:41 +09001935
1936 DPRINTK("EXIT, class=%u\n", *class);
Tejun Heo9dadd452008-04-07 22:47:19 +09001937 return rc;
Tejun Heo624d5c52008-03-25 22:16:41 +09001938}
1939
1940/**
Tejun Heo203c75b2008-04-07 22:47:18 +09001941 * ata_sff_postreset - SFF postreset callback
1942 * @link: the target SFF ata_link
1943 * @classes: classes of attached devices
1944 *
1945 * This function is invoked after a successful reset. It first
1946 * calls ata_std_postreset() and performs SFF specific postreset
1947 * processing.
1948 *
1949 * LOCKING:
1950 * Kernel thread context (may sleep)
1951 */
1952void ata_sff_postreset(struct ata_link *link, unsigned int *classes)
1953{
1954 struct ata_port *ap = link->ap;
1955
1956 ata_std_postreset(link, classes);
1957
1958 /* is double-select really necessary? */
1959 if (classes[0] != ATA_DEV_NONE)
1960 ap->ops->sff_dev_select(ap, 1);
1961 if (classes[1] != ATA_DEV_NONE)
1962 ap->ops->sff_dev_select(ap, 0);
1963
1964 /* bail out if no device is present */
1965 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
1966 DPRINTK("EXIT, no device\n");
1967 return;
1968 }
1969
1970 /* set up device control */
1971 if (ap->ioaddr.ctl_addr)
1972 iowrite8(ap->ctl, ap->ioaddr.ctl_addr);
1973}
1974
1975/**
Tejun Heo9363c382008-04-07 22:47:16 +09001976 * ata_sff_error_handler - Stock error handler for BMDMA controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001977 * @ap: port to handle error for
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001978 *
Tejun Heo9363c382008-04-07 22:47:16 +09001979 * Stock error handler for SFF controller. It can handle both
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001980 * PATA and SATA controllers. Many controllers should be able to
1981 * use this EH as-is or with some added handling before and
1982 * after.
1983 *
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001984 * LOCKING:
1985 * Kernel thread context (may sleep)
1986 */
Tejun Heo9363c382008-04-07 22:47:16 +09001987void ata_sff_error_handler(struct ata_port *ap)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001988{
Tejun Heoa1efdab2008-03-25 12:22:50 +09001989 ata_reset_fn_t softreset = ap->ops->softreset;
1990 ata_reset_fn_t hardreset = ap->ops->hardreset;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001991 struct ata_queued_cmd *qc;
1992 unsigned long flags;
1993 int thaw = 0;
1994
Tejun Heo9af5c9c2007-08-06 18:36:22 +09001995 qc = __ata_qc_from_tag(ap, ap->link.active_tag);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09001996 if (qc && !(qc->flags & ATA_QCFLAG_FAILED))
1997 qc = NULL;
1998
1999 /* reset PIO HSM and stop DMA engine */
Jeff Garzikba6a1302006-06-22 23:46:10 -04002000 spin_lock_irqsave(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002001
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002002 ap->hsm_task_state = HSM_ST_IDLE;
2003
Tejun Heoed82f962008-03-25 21:34:39 +09002004 if (ap->ioaddr.bmdma_addr &&
2005 qc && (qc->tf.protocol == ATA_PROT_DMA ||
Tejun Heo0dc36882007-12-18 16:34:43 -05002006 qc->tf.protocol == ATAPI_PROT_DMA)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002007 u8 host_stat;
2008
Robert Hancockfbbb2622006-10-27 19:08:41 -07002009 host_stat = ap->ops->bmdma_status(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002010
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002011 /* BMDMA controllers indicate host bus error by
2012 * setting DMA_ERR bit and timing out. As it wasn't
2013 * really a timeout event, adjust error mask and
2014 * cancel frozen state.
2015 */
Alan18d90de2007-01-24 11:42:38 +00002016 if (qc->err_mask == AC_ERR_TIMEOUT && (host_stat & ATA_DMA_ERR)) {
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002017 qc->err_mask = AC_ERR_HOST_BUS;
2018 thaw = 1;
2019 }
2020
2021 ap->ops->bmdma_stop(qc);
2022 }
2023
Tejun Heo9363c382008-04-07 22:47:16 +09002024 ata_sff_altstatus(ap);
Tejun Heo5682ed32008-04-07 22:47:16 +09002025 ap->ops->sff_check_status(ap);
2026 ap->ops->sff_irq_clear(ap);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002027
Jeff Garzikba6a1302006-06-22 23:46:10 -04002028 spin_unlock_irqrestore(ap->lock, flags);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002029
2030 if (thaw)
2031 ata_eh_thaw_port(ap);
2032
2033 /* PIO and DMA engines have been stopped, perform recovery */
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002034
Tejun Heo57c9efd2008-04-07 22:47:19 +09002035 /* Ignore ata_sff_softreset if ctl isn't accessible and
2036 * built-in hardresets if SCR access isn't available.
Tejun Heoa1efdab2008-03-25 12:22:50 +09002037 */
Tejun Heo9363c382008-04-07 22:47:16 +09002038 if (softreset == ata_sff_softreset && !ap->ioaddr.ctl_addr)
Tejun Heoa1efdab2008-03-25 12:22:50 +09002039 softreset = NULL;
Tejun Heo57c9efd2008-04-07 22:47:19 +09002040 if (ata_is_builtin_hardreset(hardreset) && !sata_scr_valid(&ap->link))
Tejun Heoa1efdab2008-03-25 12:22:50 +09002041 hardreset = NULL;
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002042
Tejun Heoa1efdab2008-03-25 12:22:50 +09002043 ata_do_eh(ap, ap->ops->prereset, softreset, hardreset,
2044 ap->ops->postreset);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002045}
2046
2047/**
Tejun Heo9363c382008-04-07 22:47:16 +09002048 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002049 * @qc: internal command to clean up
2050 *
2051 * LOCKING:
2052 * Kernel thread context (may sleep)
2053 */
Tejun Heo9363c382008-04-07 22:47:16 +09002054void ata_sff_post_internal_cmd(struct ata_queued_cmd *qc)
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002055{
Alan61dd08c2007-01-25 15:09:05 +00002056 if (qc->ap->ioaddr.bmdma_addr)
2057 ata_bmdma_stop(qc);
Tejun Heo6d97dbd2006-05-15 20:58:24 +09002058}
2059
Alan Coxd92e74d2007-06-07 16:19:15 +01002060/**
2061 * ata_sff_port_start - Set port up for dma.
2062 * @ap: Port to initialize
2063 *
2064 * Called just after data structures for each port are
2065 * initialized. Allocates space for PRD table if the device
2066 * is DMA capable SFF.
2067 *
2068 * May be used as the port_start() entry in ata_port_operations.
2069 *
2070 * LOCKING:
2071 * Inherited from caller.
2072 */
Alan Coxd92e74d2007-06-07 16:19:15 +01002073int ata_sff_port_start(struct ata_port *ap)
2074{
2075 if (ap->ioaddr.bmdma_addr)
2076 return ata_port_start(ap);
2077 return 0;
2078}
2079
Tejun Heo272f7882008-03-25 22:16:40 +09002080/**
Tejun Heo9363c382008-04-07 22:47:16 +09002081 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
Tejun Heo624d5c52008-03-25 22:16:41 +09002082 * @ioaddr: IO address structure to be initialized
2083 *
2084 * Utility function which initializes data_addr, error_addr,
2085 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2086 * device_addr, status_addr, and command_addr to standard offsets
2087 * relative to cmd_addr.
2088 *
2089 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2090 */
Tejun Heo9363c382008-04-07 22:47:16 +09002091void ata_sff_std_ports(struct ata_ioports *ioaddr)
Tejun Heo624d5c52008-03-25 22:16:41 +09002092{
2093 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
2094 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
2095 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
2096 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
2097 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
2098 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
2099 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
2100 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
2101 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
2102 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
2103}
2104
Tejun Heo9363c382008-04-07 22:47:16 +09002105unsigned long ata_bmdma_mode_filter(struct ata_device *adev,
2106 unsigned long xfer_mask)
Tejun Heo071ce342008-03-25 22:16:42 +09002107{
2108 /* Filter out DMA modes if the device has been configured by
2109 the BIOS as PIO only */
2110
2111 if (adev->link->ap->ioaddr.bmdma_addr == NULL)
2112 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2113 return xfer_mask;
2114}
2115
Tejun Heo624d5c52008-03-25 22:16:41 +09002116/**
Tejun Heo272f7882008-03-25 22:16:40 +09002117 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2118 * @qc: Info associated with this ATA transaction.
2119 *
2120 * LOCKING:
2121 * spin_lock_irqsave(host lock)
2122 */
2123void ata_bmdma_setup(struct ata_queued_cmd *qc)
2124{
2125 struct ata_port *ap = qc->ap;
2126 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
2127 u8 dmactl;
2128
2129 /* load PRD table addr. */
2130 mb(); /* make sure PRD table writes are visible to controller */
2131 iowrite32(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
2132
2133 /* specify data direction, triple-check start bit is clear */
2134 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2135 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
2136 if (!rw)
2137 dmactl |= ATA_DMA_WR;
2138 iowrite8(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2139
2140 /* issue r/w command */
Tejun Heo5682ed32008-04-07 22:47:16 +09002141 ap->ops->sff_exec_command(ap, &qc->tf);
Tejun Heo272f7882008-03-25 22:16:40 +09002142}
2143
2144/**
2145 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2146 * @qc: Info associated with this ATA transaction.
2147 *
2148 * LOCKING:
2149 * spin_lock_irqsave(host lock)
2150 */
2151void ata_bmdma_start(struct ata_queued_cmd *qc)
2152{
2153 struct ata_port *ap = qc->ap;
2154 u8 dmactl;
2155
2156 /* start host DMA transaction */
2157 dmactl = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2158 iowrite8(dmactl | ATA_DMA_START, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
2159
2160 /* Strictly, one may wish to issue an ioread8() here, to
2161 * flush the mmio write. However, control also passes
2162 * to the hardware at this point, and it will interrupt
2163 * us when we are to resume control. So, in effect,
2164 * we don't care when the mmio write flushes.
2165 * Further, a read of the DMA status register _immediately_
2166 * following the write may not be what certain flaky hardware
2167 * is expected, so I think it is best to not add a readb()
2168 * without first all the MMIO ATA cards/mobos.
2169 * Or maybe I'm just being paranoid.
2170 *
2171 * FIXME: The posting of this write means I/O starts are
2172 * unneccessarily delayed for MMIO
2173 */
2174}
2175
2176/**
2177 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2178 * @qc: Command we are ending DMA for
2179 *
2180 * Clears the ATA_DMA_START flag in the dma control register
2181 *
2182 * May be used as the bmdma_stop() entry in ata_port_operations.
2183 *
2184 * LOCKING:
2185 * spin_lock_irqsave(host lock)
2186 */
2187void ata_bmdma_stop(struct ata_queued_cmd *qc)
2188{
2189 struct ata_port *ap = qc->ap;
2190 void __iomem *mmio = ap->ioaddr.bmdma_addr;
2191
2192 /* clear start/stop bit */
2193 iowrite8(ioread8(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
2194 mmio + ATA_DMA_CMD);
2195
2196 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
Tejun Heo9363c382008-04-07 22:47:16 +09002197 ata_sff_altstatus(ap); /* dummy read */
Tejun Heo272f7882008-03-25 22:16:40 +09002198}
2199
2200/**
2201 * ata_bmdma_status - Read PCI IDE BMDMA status
2202 * @ap: Port associated with this ATA transaction.
2203 *
2204 * Read and return BMDMA status register.
2205 *
2206 * May be used as the bmdma_status() entry in ata_port_operations.
2207 *
2208 * LOCKING:
2209 * spin_lock_irqsave(host lock)
2210 */
2211u8 ata_bmdma_status(struct ata_port *ap)
2212{
2213 return ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
2214}
2215
2216/**
Tejun Heo624d5c52008-03-25 22:16:41 +09002217 * ata_bus_reset - reset host port and associated ATA channel
2218 * @ap: port to reset
2219 *
2220 * This is typically the first time we actually start issuing
2221 * commands to the ATA channel. We wait for BSY to clear, then
2222 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2223 * result. Determine what devices, if any, are on the channel
2224 * by looking at the device 0/1 error register. Look at the signature
2225 * stored in each device's taskfile registers, to determine if
2226 * the device is ATA or ATAPI.
2227 *
2228 * LOCKING:
2229 * PCI/etc. bus probe sem.
2230 * Obtains host lock.
2231 *
2232 * SIDE EFFECTS:
2233 * Sets ATA_FLAG_DISABLED if bus reset fails.
2234 *
2235 * DEPRECATED:
2236 * This function is only for drivers which still use old EH and
2237 * will be removed soon.
Tejun Heo272f7882008-03-25 22:16:40 +09002238 */
Tejun Heo624d5c52008-03-25 22:16:41 +09002239void ata_bus_reset(struct ata_port *ap)
Tejun Heo272f7882008-03-25 22:16:40 +09002240{
Tejun Heo624d5c52008-03-25 22:16:41 +09002241 struct ata_device *device = ap->link.device;
2242 struct ata_ioports *ioaddr = &ap->ioaddr;
2243 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2244 u8 err;
2245 unsigned int dev0, dev1 = 0, devmask = 0;
2246 int rc;
2247
2248 DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no);
2249
2250 /* determine if device 0/1 are present */
2251 if (ap->flags & ATA_FLAG_SATA_RESET)
2252 dev0 = 1;
2253 else {
2254 dev0 = ata_devchk(ap, 0);
2255 if (slave_possible)
2256 dev1 = ata_devchk(ap, 1);
2257 }
2258
2259 if (dev0)
2260 devmask |= (1 << 0);
2261 if (dev1)
2262 devmask |= (1 << 1);
2263
2264 /* select device 0 again */
Tejun Heo5682ed32008-04-07 22:47:16 +09002265 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002266
2267 /* issue bus reset */
2268 if (ap->flags & ATA_FLAG_SRST) {
2269 rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ);
2270 if (rc && rc != -ENODEV)
2271 goto err_out;
2272 }
2273
2274 /*
2275 * determine by signature whether we have ATA or ATAPI devices
2276 */
Tejun Heo9363c382008-04-07 22:47:16 +09002277 device[0].class = ata_sff_dev_classify(&device[0], dev0, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002278 if ((slave_possible) && (err != 0x81))
Tejun Heo9363c382008-04-07 22:47:16 +09002279 device[1].class = ata_sff_dev_classify(&device[1], dev1, &err);
Tejun Heo624d5c52008-03-25 22:16:41 +09002280
2281 /* is double-select really necessary? */
2282 if (device[1].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002283 ap->ops->sff_dev_select(ap, 1);
Tejun Heo624d5c52008-03-25 22:16:41 +09002284 if (device[0].class != ATA_DEV_NONE)
Tejun Heo5682ed32008-04-07 22:47:16 +09002285 ap->ops->sff_dev_select(ap, 0);
Tejun Heo624d5c52008-03-25 22:16:41 +09002286
2287 /* if no devices were detected, disable this port */
2288 if ((device[0].class == ATA_DEV_NONE) &&
2289 (device[1].class == ATA_DEV_NONE))
2290 goto err_out;
2291
2292 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2293 /* set up device control for ATA_FLAG_SATA_RESET */
2294 iowrite8(ap->ctl, ioaddr->ctl_addr);
2295 }
2296
2297 DPRINTK("EXIT\n");
2298 return;
2299
2300err_out:
2301 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2302 ata_port_disable(ap);
2303
2304 DPRINTK("EXIT\n");
Tejun Heo272f7882008-03-25 22:16:40 +09002305}
2306
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002307#ifdef CONFIG_PCI
Alan4112e162007-01-08 12:10:05 +00002308
Tejun Heo272f7882008-03-25 22:16:40 +09002309/**
Tejun Heo9363c382008-04-07 22:47:16 +09002310 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
Tejun Heo272f7882008-03-25 22:16:40 +09002311 * @pdev: PCI device
2312 *
2313 * Some PCI ATA devices report simplex mode but in fact can be told to
2314 * enter non simplex mode. This implements the necessary logic to
2315 * perform the task on such devices. Calling it on other devices will
2316 * have -undefined- behaviour.
2317 */
Tejun Heo9363c382008-04-07 22:47:16 +09002318int ata_pci_bmdma_clear_simplex(struct pci_dev *pdev)
Alan4112e162007-01-08 12:10:05 +00002319{
Tejun Heo272f7882008-03-25 22:16:40 +09002320 unsigned long bmdma = pci_resource_start(pdev, 4);
2321 u8 simplex;
Jeff Garzika84471f2007-02-26 05:51:33 -05002322
Tejun Heo272f7882008-03-25 22:16:40 +09002323 if (bmdma == 0)
2324 return -ENOENT;
2325
2326 simplex = inb(bmdma + 0x02);
2327 outb(simplex & 0x60, bmdma + 0x02);
2328 simplex = inb(bmdma + 0x02);
2329 if (simplex & 0x80)
2330 return -EOPNOTSUPP;
2331 return 0;
2332}
2333
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002334/**
Tejun Heo9363c382008-04-07 22:47:16 +09002335 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
Tejun Heo0f834de2007-04-17 23:44:07 +09002336 * @host: target ATA host
2337 *
2338 * Acquire PCI BMDMA resources and initialize @host accordingly.
2339 *
2340 * LOCKING:
2341 * Inherited from calling layer (may sleep).
2342 *
2343 * RETURNS:
2344 * 0 on success, -errno otherwise.
2345 */
Tejun Heo9363c382008-04-07 22:47:16 +09002346int ata_pci_bmdma_init(struct ata_host *host)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002347{
Tejun Heo0f834de2007-04-17 23:44:07 +09002348 struct device *gdev = host->dev;
2349 struct pci_dev *pdev = to_pci_dev(gdev);
2350 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002351
Alan Cox6fdc99a2007-07-26 18:41:30 +01002352 /* No BAR4 allocation: No DMA */
2353 if (pci_resource_start(pdev, 4) == 0)
2354 return 0;
2355
Tejun Heo0f834de2007-04-17 23:44:07 +09002356 /* TODO: If we get no DMA mask we should fall back to PIO */
2357 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
2358 if (rc)
2359 return rc;
2360 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
2361 if (rc)
2362 return rc;
2363
2364 /* request and iomap DMA region */
Tejun Heo35a10a82008-01-04 18:42:21 +09002365 rc = pcim_iomap_regions(pdev, 1 << 4, dev_driver_string(gdev));
Tejun Heo0f834de2007-04-17 23:44:07 +09002366 if (rc) {
2367 dev_printk(KERN_ERR, gdev, "failed to request/iomap BAR4\n");
2368 return -ENOMEM;
2369 }
2370 host->iomap = pcim_iomap_table(pdev);
2371
Tejun Heo1626aeb2007-05-04 12:43:58 +02002372 for (i = 0; i < 2; i++) {
Tejun Heo0f834de2007-04-17 23:44:07 +09002373 struct ata_port *ap = host->ports[i];
Tejun Heo0f834de2007-04-17 23:44:07 +09002374 void __iomem *bmdma = host->iomap[4] + 8 * i;
2375
2376 if (ata_port_is_dummy(ap))
2377 continue;
2378
Tejun Heo21b0ad42007-04-17 23:44:07 +09002379 ap->ioaddr.bmdma_addr = bmdma;
Tejun Heo0f834de2007-04-17 23:44:07 +09002380 if ((!(ap->flags & ATA_FLAG_IGN_SIMPLEX)) &&
2381 (ioread8(bmdma + 2) & 0x80))
2382 host->flags |= ATA_HOST_SIMPLEX;
Tejun Heocbcdd872007-08-18 13:14:55 +09002383
2384 ata_port_desc(ap, "bmdma 0x%llx",
2385 (unsigned long long)pci_resource_start(pdev, 4) + 8 * i);
Tejun Heo0d5ff562007-02-01 15:06:36 +09002386 }
2387
Tejun Heo0f834de2007-04-17 23:44:07 +09002388 return 0;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002389}
2390
Tejun Heo272f7882008-03-25 22:16:40 +09002391static int ata_resources_present(struct pci_dev *pdev, int port)
2392{
2393 int i;
2394
2395 /* Check the PCI resources for this channel are enabled */
2396 port = port * 2;
2397 for (i = 0; i < 2; i ++) {
2398 if (pci_resource_start(pdev, port + i) == 0 ||
2399 pci_resource_len(pdev, port + i) == 0)
2400 return 0;
2401 }
2402 return 1;
2403}
2404
Tejun Heod491b272007-04-17 23:44:07 +09002405/**
Tejun Heo9363c382008-04-07 22:47:16 +09002406 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
Tejun Heod491b272007-04-17 23:44:07 +09002407 * @host: target ATA host
Tejun Heod491b272007-04-17 23:44:07 +09002408 *
Tejun Heo1626aeb2007-05-04 12:43:58 +02002409 * Acquire native PCI ATA resources for @host and initialize the
2410 * first two ports of @host accordingly. Ports marked dummy are
2411 * skipped and allocation failure makes the port dummy.
Tejun Heod491b272007-04-17 23:44:07 +09002412 *
Tejun Heod583bc12007-07-04 18:02:07 +09002413 * Note that native PCI resources are valid even for legacy hosts
2414 * as we fix up pdev resources array early in boot, so this
2415 * function can be used for both native and legacy SFF hosts.
2416 *
Tejun Heod491b272007-04-17 23:44:07 +09002417 * LOCKING:
2418 * Inherited from calling layer (may sleep).
2419 *
2420 * RETURNS:
Tejun Heo1626aeb2007-05-04 12:43:58 +02002421 * 0 if at least one port is initialized, -ENODEV if no port is
2422 * available.
Tejun Heod491b272007-04-17 23:44:07 +09002423 */
Tejun Heo9363c382008-04-07 22:47:16 +09002424int ata_pci_sff_init_host(struct ata_host *host)
Tejun Heod491b272007-04-17 23:44:07 +09002425{
2426 struct device *gdev = host->dev;
2427 struct pci_dev *pdev = to_pci_dev(gdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002428 unsigned int mask = 0;
Tejun Heod491b272007-04-17 23:44:07 +09002429 int i, rc;
2430
Tejun Heod491b272007-04-17 23:44:07 +09002431 /* request, iomap BARs and init port addresses accordingly */
2432 for (i = 0; i < 2; i++) {
2433 struct ata_port *ap = host->ports[i];
2434 int base = i * 2;
2435 void __iomem * const *iomap;
2436
Tejun Heo1626aeb2007-05-04 12:43:58 +02002437 if (ata_port_is_dummy(ap))
Tejun Heod491b272007-04-17 23:44:07 +09002438 continue;
2439
Tejun Heo1626aeb2007-05-04 12:43:58 +02002440 /* Discard disabled ports. Some controllers show
2441 * their unused channels this way. Disabled ports are
2442 * made dummy.
2443 */
2444 if (!ata_resources_present(pdev, i)) {
2445 ap->ops = &ata_dummy_port_ops;
2446 continue;
2447 }
2448
Tejun Heo35a10a82008-01-04 18:42:21 +09002449 rc = pcim_iomap_regions(pdev, 0x3 << base,
2450 dev_driver_string(gdev));
Tejun Heod491b272007-04-17 23:44:07 +09002451 if (rc) {
Tejun Heo1626aeb2007-05-04 12:43:58 +02002452 dev_printk(KERN_WARNING, gdev,
2453 "failed to request/iomap BARs for port %d "
2454 "(errno=%d)\n", i, rc);
Tejun Heod491b272007-04-17 23:44:07 +09002455 if (rc == -EBUSY)
2456 pcim_pin_device(pdev);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002457 ap->ops = &ata_dummy_port_ops;
2458 continue;
Tejun Heod491b272007-04-17 23:44:07 +09002459 }
2460 host->iomap = iomap = pcim_iomap_table(pdev);
2461
2462 ap->ioaddr.cmd_addr = iomap[base];
2463 ap->ioaddr.altstatus_addr =
2464 ap->ioaddr.ctl_addr = (void __iomem *)
2465 ((unsigned long)iomap[base + 1] | ATA_PCI_CTL_OFS);
Tejun Heo9363c382008-04-07 22:47:16 +09002466 ata_sff_std_ports(&ap->ioaddr);
Tejun Heo1626aeb2007-05-04 12:43:58 +02002467
Tejun Heocbcdd872007-08-18 13:14:55 +09002468 ata_port_desc(ap, "cmd 0x%llx ctl 0x%llx",
2469 (unsigned long long)pci_resource_start(pdev, base),
2470 (unsigned long long)pci_resource_start(pdev, base + 1));
2471
Tejun Heo1626aeb2007-05-04 12:43:58 +02002472 mask |= 1 << i;
2473 }
2474
2475 if (!mask) {
2476 dev_printk(KERN_ERR, gdev, "no available native port\n");
2477 return -ENODEV;
Tejun Heod491b272007-04-17 23:44:07 +09002478 }
2479
2480 return 0;
2481}
2482
Tejun Heo21b0ad42007-04-17 23:44:07 +09002483/**
Tejun Heo9363c382008-04-07 22:47:16 +09002484 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
Tejun Heo21b0ad42007-04-17 23:44:07 +09002485 * @pdev: target PCI device
Tejun Heo1626aeb2007-05-04 12:43:58 +02002486 * @ppi: array of port_info, must be enough for two ports
Tejun Heo21b0ad42007-04-17 23:44:07 +09002487 * @r_host: out argument for the initialized ATA host
2488 *
2489 * Helper to allocate ATA host for @pdev, acquire all native PCI
2490 * resources and initialize it accordingly in one go.
2491 *
2492 * LOCKING:
2493 * Inherited from calling layer (may sleep).
2494 *
2495 * RETURNS:
2496 * 0 on success, -errno otherwise.
2497 */
Tejun Heo9363c382008-04-07 22:47:16 +09002498int ata_pci_sff_prepare_host(struct pci_dev *pdev,
Tejun Heod583bc12007-07-04 18:02:07 +09002499 const struct ata_port_info * const * ppi,
2500 struct ata_host **r_host)
Tejun Heo21b0ad42007-04-17 23:44:07 +09002501{
2502 struct ata_host *host;
Tejun Heo21b0ad42007-04-17 23:44:07 +09002503 int rc;
2504
2505 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL))
2506 return -ENOMEM;
2507
2508 host = ata_host_alloc_pinfo(&pdev->dev, ppi, 2);
2509 if (!host) {
2510 dev_printk(KERN_ERR, &pdev->dev,
2511 "failed to allocate ATA host\n");
2512 rc = -ENOMEM;
2513 goto err_out;
2514 }
2515
Tejun Heo9363c382008-04-07 22:47:16 +09002516 rc = ata_pci_sff_init_host(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002517 if (rc)
2518 goto err_out;
2519
2520 /* init DMA related stuff */
Tejun Heo9363c382008-04-07 22:47:16 +09002521 rc = ata_pci_bmdma_init(host);
Tejun Heo21b0ad42007-04-17 23:44:07 +09002522 if (rc)
2523 goto err_bmdma;
2524
2525 devres_remove_group(&pdev->dev, NULL);
2526 *r_host = host;
2527 return 0;
2528
2529 err_bmdma:
2530 /* This is necessary because PCI and iomap resources are
2531 * merged and releasing the top group won't release the
2532 * acquired resources if some of those have been acquired
2533 * before entering this function.
2534 */
2535 pcim_iounmap_regions(pdev, 0xf);
2536 err_out:
2537 devres_release_group(&pdev->dev, NULL);
2538 return rc;
2539}
2540
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002541/**
Tejun Heo9363c382008-04-07 22:47:16 +09002542 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002543 * @host: target SFF ATA host
2544 * @irq_handler: irq_handler used when requesting IRQ(s)
2545 * @sht: scsi_host_template to use when registering the host
2546 *
2547 * This is the counterpart of ata_host_activate() for SFF ATA
2548 * hosts. This separate helper is necessary because SFF hosts
2549 * use two separate interrupts in legacy mode.
2550 *
2551 * LOCKING:
2552 * Inherited from calling layer (may sleep).
2553 *
2554 * RETURNS:
2555 * 0 on success, -errno otherwise.
2556 */
Tejun Heo9363c382008-04-07 22:47:16 +09002557int ata_pci_sff_activate_host(struct ata_host *host,
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002558 irq_handler_t irq_handler,
2559 struct scsi_host_template *sht)
2560{
2561 struct device *dev = host->dev;
2562 struct pci_dev *pdev = to_pci_dev(dev);
2563 const char *drv_name = dev_driver_string(host->dev);
2564 int legacy_mode = 0, rc;
2565
2566 rc = ata_host_start(host);
2567 if (rc)
2568 return rc;
2569
2570 if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
2571 u8 tmp8, mask;
2572
2573 /* TODO: What if one channel is in native mode ... */
2574 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
2575 mask = (1 << 2) | (1 << 0);
2576 if ((tmp8 & mask) != mask)
2577 legacy_mode = 1;
2578#if defined(CONFIG_NO_ATA_LEGACY)
2579 /* Some platforms with PCI limits cannot address compat
2580 port space. In that case we punt if their firmware has
2581 left a device in compatibility mode */
2582 if (legacy_mode) {
2583 printk(KERN_ERR "ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
2584 return -EOPNOTSUPP;
2585 }
2586#endif
2587 }
2588
2589 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2590 return -ENOMEM;
2591
2592 if (!legacy_mode && pdev->irq) {
2593 rc = devm_request_irq(dev, pdev->irq, irq_handler,
2594 IRQF_SHARED, drv_name, host);
2595 if (rc)
2596 goto out;
2597
2598 ata_port_desc(host->ports[0], "irq %d", pdev->irq);
2599 ata_port_desc(host->ports[1], "irq %d", pdev->irq);
2600 } else if (legacy_mode) {
2601 if (!ata_port_is_dummy(host->ports[0])) {
2602 rc = devm_request_irq(dev, ATA_PRIMARY_IRQ(pdev),
2603 irq_handler, IRQF_SHARED,
2604 drv_name, host);
2605 if (rc)
2606 goto out;
2607
2608 ata_port_desc(host->ports[0], "irq %d",
2609 ATA_PRIMARY_IRQ(pdev));
2610 }
2611
2612 if (!ata_port_is_dummy(host->ports[1])) {
2613 rc = devm_request_irq(dev, ATA_SECONDARY_IRQ(pdev),
2614 irq_handler, IRQF_SHARED,
2615 drv_name, host);
2616 if (rc)
2617 goto out;
2618
2619 ata_port_desc(host->ports[1], "irq %d",
2620 ATA_SECONDARY_IRQ(pdev));
2621 }
2622 }
2623
2624 rc = ata_host_register(host, sht);
2625 out:
2626 if (rc == 0)
2627 devres_remove_group(dev, NULL);
2628 else
2629 devres_release_group(dev, NULL);
2630
2631 return rc;
2632}
2633
2634/**
Tejun Heo9363c382008-04-07 22:47:16 +09002635 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002636 * @pdev: Controller to be initialized
Tejun Heo1626aeb2007-05-04 12:43:58 +02002637 * @ppi: array of port_info, must be enough for two ports
Tejun Heo1bd5b712008-03-25 12:22:49 +09002638 * @sht: scsi_host_template to use when registering the host
Tejun Heo887125e2008-03-25 12:22:49 +09002639 * @host_priv: host private_data
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002640 *
2641 * This is a helper function which can be called from a driver's
2642 * xxx_init_one() probe function if the hardware uses traditional
2643 * IDE taskfile registers.
2644 *
2645 * This function calls pci_enable_device(), reserves its register
2646 * regions, sets the dma mask, enables bus master mode, and calls
2647 * ata_device_add()
2648 *
Alan Cox2ec7df02006-08-10 16:59:10 +09002649 * ASSUMPTION:
2650 * Nobody makes a single channel controller that appears solely as
2651 * the secondary legacy port on PCI.
2652 *
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002653 * LOCKING:
2654 * Inherited from PCI layer (may sleep).
2655 *
2656 * RETURNS:
2657 * Zero on success, negative on errno-based value on error.
2658 */
Tejun Heo9363c382008-04-07 22:47:16 +09002659int ata_pci_sff_init_one(struct pci_dev *pdev,
2660 const struct ata_port_info * const * ppi,
2661 struct scsi_host_template *sht, void *host_priv)
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002662{
Tejun Heof0d36ef2007-01-20 16:00:28 +09002663 struct device *dev = &pdev->dev;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002664 const struct ata_port_info *pi = NULL;
Tejun Heo0f834de2007-04-17 23:44:07 +09002665 struct ata_host *host = NULL;
Tejun Heo1626aeb2007-05-04 12:43:58 +02002666 int i, rc;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002667
2668 DPRINTK("ENTER\n");
2669
Tejun Heo1626aeb2007-05-04 12:43:58 +02002670 /* look up the first valid port_info */
2671 for (i = 0; i < 2 && ppi[i]; i++) {
2672 if (ppi[i]->port_ops != &ata_dummy_port_ops) {
2673 pi = ppi[i];
2674 break;
2675 }
2676 }
2677
2678 if (!pi) {
2679 dev_printk(KERN_ERR, &pdev->dev,
2680 "no valid port_info specified\n");
2681 return -EINVAL;
2682 }
2683
Tejun Heof0d36ef2007-01-20 16:00:28 +09002684 if (!devres_open_group(dev, NULL, GFP_KERNEL))
2685 return -ENOMEM;
2686
Tejun Heof0d36ef2007-01-20 16:00:28 +09002687 rc = pcim_enable_device(pdev);
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002688 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002689 goto out;
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002690
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002691 /* prepare and activate SFF host */
Tejun Heo9363c382008-04-07 22:47:16 +09002692 rc = ata_pci_sff_prepare_host(pdev, ppi, &host);
Tejun Heod583bc12007-07-04 18:02:07 +09002693 if (rc)
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002694 goto out;
Tejun Heo887125e2008-03-25 12:22:49 +09002695 host->private_data = host_priv;
Tejun Heod491b272007-04-17 23:44:07 +09002696
Tejun Heod491b272007-04-17 23:44:07 +09002697 pci_set_master(pdev);
Tejun Heo9363c382008-04-07 22:47:16 +09002698 rc = ata_pci_sff_activate_host(host, ata_sff_interrupt, sht);
Tejun Heo4e6b79f2008-01-18 18:36:28 +09002699 out:
2700 if (rc == 0)
2701 devres_remove_group(&pdev->dev, NULL);
2702 else
2703 devres_release_group(&pdev->dev, NULL);
Tejun Heod491b272007-04-17 23:44:07 +09002704
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002705 return rc;
2706}
2707
Jeff Garzik1fdffbc2006-02-09 05:15:27 -05002708#endif /* CONFIG_PCI */
2709
Tejun Heo624d5c52008-03-25 22:16:41 +09002710EXPORT_SYMBOL_GPL(ata_sff_port_ops);
2711EXPORT_SYMBOL_GPL(ata_bmdma_port_ops);
Tejun Heo9363c382008-04-07 22:47:16 +09002712EXPORT_SYMBOL_GPL(ata_sff_qc_prep);
2713EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep);
2714EXPORT_SYMBOL_GPL(ata_sff_dev_select);
2715EXPORT_SYMBOL_GPL(ata_sff_check_status);
2716EXPORT_SYMBOL_GPL(ata_sff_altstatus);
2717EXPORT_SYMBOL_GPL(ata_sff_busy_sleep);
2718EXPORT_SYMBOL_GPL(ata_sff_wait_ready);
2719EXPORT_SYMBOL_GPL(ata_sff_tf_load);
2720EXPORT_SYMBOL_GPL(ata_sff_tf_read);
2721EXPORT_SYMBOL_GPL(ata_sff_exec_command);
2722EXPORT_SYMBOL_GPL(ata_sff_data_xfer);
2723EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq);
2724EXPORT_SYMBOL_GPL(ata_sff_irq_on);
2725EXPORT_SYMBOL_GPL(ata_sff_irq_clear);
2726EXPORT_SYMBOL_GPL(ata_sff_hsm_move);
2727EXPORT_SYMBOL_GPL(ata_sff_qc_issue);
2728EXPORT_SYMBOL_GPL(ata_sff_host_intr);
2729EXPORT_SYMBOL_GPL(ata_sff_interrupt);
2730EXPORT_SYMBOL_GPL(ata_sff_freeze);
2731EXPORT_SYMBOL_GPL(ata_sff_thaw);
2732EXPORT_SYMBOL_GPL(ata_sff_prereset);
2733EXPORT_SYMBOL_GPL(ata_sff_dev_classify);
2734EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset);
2735EXPORT_SYMBOL_GPL(ata_sff_softreset);
2736EXPORT_SYMBOL_GPL(sata_sff_hardreset);
2737EXPORT_SYMBOL_GPL(ata_sff_postreset);
2738EXPORT_SYMBOL_GPL(ata_sff_error_handler);
2739EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd);
Tejun Heo624d5c52008-03-25 22:16:41 +09002740EXPORT_SYMBOL_GPL(ata_sff_port_start);
Tejun Heo9363c382008-04-07 22:47:16 +09002741EXPORT_SYMBOL_GPL(ata_sff_std_ports);
2742EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter);
Tejun Heo624d5c52008-03-25 22:16:41 +09002743EXPORT_SYMBOL_GPL(ata_bmdma_setup);
2744EXPORT_SYMBOL_GPL(ata_bmdma_start);
2745EXPORT_SYMBOL_GPL(ata_bmdma_stop);
2746EXPORT_SYMBOL_GPL(ata_bmdma_status);
2747EXPORT_SYMBOL_GPL(ata_bus_reset);
2748#ifdef CONFIG_PCI
Tejun Heo9363c382008-04-07 22:47:16 +09002749EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex);
2750EXPORT_SYMBOL_GPL(ata_pci_bmdma_init);
2751EXPORT_SYMBOL_GPL(ata_pci_sff_init_host);
2752EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host);
2753EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host);
2754EXPORT_SYMBOL_GPL(ata_pci_sff_init_one);
Tejun Heo624d5c52008-03-25 22:16:41 +09002755#endif /* CONFIG_PCI */