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JeongHyeon Kim699efdd2011-07-21 16:19:19 +09001/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/gpio.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/input.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090017#include <linux/pwm_backlight.h>
Sachin Kamatc86cfdd2011-09-16 21:41:25 +090018#include <linux/gpio_keys.h>
Inderpal Singh6e012802011-10-03 08:51:20 +090019#include <linux/i2c.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/max8997.h>
Tushar Behera9421a762011-10-03 09:12:56 +090022#include <linux/lcd.h>
Sangwook Lee62d30f82011-11-03 16:14:14 +090023#include <linux/rfkill-gpio.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090024
25#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010026#include <asm/hardware/gic.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090027#include <asm/mach-types.h>
28
Tushar Behera9421a762011-10-03 09:12:56 +090029#include <video/platform_lcd.h>
30
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090031#include <plat/regs-serial.h>
Tushar Behera9421a762011-10-03 09:12:56 +090032#include <plat/regs-fb-v4.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090033#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/sdhci.h>
36#include <plat/iic.h>
Sachin Kamat24f9e1f2011-08-31 15:47:16 +090037#include <plat/ehci.h>
38#include <plat/clock.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090039#include <plat/gpio-cfg.h>
40#include <plat/backlight.h>
Tushar Behera9421a762011-10-03 09:12:56 +090041#include <plat/pd.h>
42#include <plat/fb.h>
Sachin Kamatdf74a282011-10-13 15:38:21 +090043#include <plat/mfc.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090044
Tushar Behera95de77d2011-12-24 12:09:06 +090045#include <mach/ohci.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090046#include <mach/map.h>
47
Kukjin Kimcc511b82011-12-27 08:18:36 +010048#include "common.h"
49
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090050/* Following are default values for UCON, ULCON and UFCON UART registers */
51#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
52 S3C2410_UCON_RXILEVEL | \
53 S3C2410_UCON_TXIRQMODE | \
54 S3C2410_UCON_RXIRQMODE | \
55 S3C2410_UCON_RXFIFO_TOI | \
56 S3C2443_UCON_RXERR_IRQEN)
57
58#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
59
60#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
61 S5PV210_UFCON_TXTRIG4 | \
62 S5PV210_UFCON_RXTRIG4)
63
64static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
65 [0] = {
66 .hwport = 0,
67 .flags = 0,
68 .ucon = ORIGEN_UCON_DEFAULT,
69 .ulcon = ORIGEN_ULCON_DEFAULT,
70 .ufcon = ORIGEN_UFCON_DEFAULT,
71 },
72 [1] = {
73 .hwport = 1,
74 .flags = 0,
75 .ucon = ORIGEN_UCON_DEFAULT,
76 .ulcon = ORIGEN_ULCON_DEFAULT,
77 .ufcon = ORIGEN_UFCON_DEFAULT,
78 },
79 [2] = {
80 .hwport = 2,
81 .flags = 0,
82 .ucon = ORIGEN_UCON_DEFAULT,
83 .ulcon = ORIGEN_ULCON_DEFAULT,
84 .ufcon = ORIGEN_UFCON_DEFAULT,
85 },
86 [3] = {
87 .hwport = 3,
88 .flags = 0,
89 .ucon = ORIGEN_UCON_DEFAULT,
90 .ulcon = ORIGEN_ULCON_DEFAULT,
91 .ufcon = ORIGEN_UFCON_DEFAULT,
92 },
93};
94
Inderpal Singh6e012802011-10-03 08:51:20 +090095static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
96 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +090097 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
98 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +090099};
100static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
101 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
102};
103static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
104 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
105};
106static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
107 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +0900108 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +0900109};
110static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
111 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
112};
113static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
114 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
115};
116static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
117 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118};
119static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
120 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
121};
122static struct regulator_consumer_supply __initdata buck1_consumer[] = {
123 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
124};
125static struct regulator_consumer_supply __initdata buck2_consumer[] = {
126 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
127};
128static struct regulator_consumer_supply __initdata buck3_consumer[] = {
129 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
130};
131static struct regulator_consumer_supply __initdata buck7_consumer[] = {
132 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
133};
134
135static struct regulator_init_data __initdata max8997_ldo1_data = {
136 .constraints = {
137 .name = "VDD_ABB_3.3V",
138 .min_uV = 3300000,
139 .max_uV = 3300000,
140 .apply_uV = 1,
141 .state_mem = {
142 .disabled = 1,
143 },
144 },
145};
146
147static struct regulator_init_data __initdata max8997_ldo2_data = {
148 .constraints = {
149 .name = "VDD_ALIVE_1.1V",
150 .min_uV = 1100000,
151 .max_uV = 1100000,
152 .apply_uV = 1,
153 .always_on = 1,
154 .state_mem = {
155 .enabled = 1,
156 },
157 },
158};
159
160static struct regulator_init_data __initdata max8997_ldo3_data = {
161 .constraints = {
162 .name = "VMIPI_1.1V",
163 .min_uV = 1100000,
164 .max_uV = 1100000,
165 .apply_uV = 1,
166 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
167 .state_mem = {
168 .disabled = 1,
169 },
170 },
171 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
172 .consumer_supplies = ldo3_consumer,
173};
174
175static struct regulator_init_data __initdata max8997_ldo4_data = {
176 .constraints = {
177 .name = "VDD_RTC_1.8V",
178 .min_uV = 1800000,
179 .max_uV = 1800000,
180 .apply_uV = 1,
181 .always_on = 1,
182 .state_mem = {
183 .disabled = 1,
184 },
185 },
186};
187
188static struct regulator_init_data __initdata max8997_ldo6_data = {
189 .constraints = {
190 .name = "VMIPI_1.8V",
191 .min_uV = 1800000,
192 .max_uV = 1800000,
193 .apply_uV = 1,
194 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
195 .state_mem = {
196 .disabled = 1,
197 },
198 },
199 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
200 .consumer_supplies = ldo6_consumer,
201};
202
203static struct regulator_init_data __initdata max8997_ldo7_data = {
204 .constraints = {
205 .name = "VDD_AUD_1.8V",
206 .min_uV = 1800000,
207 .max_uV = 1800000,
208 .apply_uV = 1,
209 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
210 .state_mem = {
211 .disabled = 1,
212 },
213 },
214 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
215 .consumer_supplies = ldo7_consumer,
216};
217
218static struct regulator_init_data __initdata max8997_ldo8_data = {
219 .constraints = {
220 .name = "VADC_3.3V",
221 .min_uV = 3300000,
222 .max_uV = 3300000,
223 .apply_uV = 1,
224 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
225 .state_mem = {
226 .disabled = 1,
227 },
228 },
229 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
230 .consumer_supplies = ldo8_consumer,
231};
232
233static struct regulator_init_data __initdata max8997_ldo9_data = {
234 .constraints = {
235 .name = "DVDD_SWB_2.8V",
236 .min_uV = 2800000,
237 .max_uV = 2800000,
238 .apply_uV = 1,
Sangwook Lee62d30f82011-11-03 16:14:14 +0900239 .always_on = 1,
Inderpal Singh6e012802011-10-03 08:51:20 +0900240 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
241 .state_mem = {
242 .disabled = 1,
243 },
244 },
245 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
246 .consumer_supplies = ldo9_consumer,
247};
248
249static struct regulator_init_data __initdata max8997_ldo10_data = {
250 .constraints = {
251 .name = "VDD_PLL_1.1V",
252 .min_uV = 1100000,
253 .max_uV = 1100000,
254 .apply_uV = 1,
255 .always_on = 1,
256 .state_mem = {
257 .disabled = 1,
258 },
259 },
260};
261
262static struct regulator_init_data __initdata max8997_ldo11_data = {
263 .constraints = {
264 .name = "VDD_AUD_3V",
265 .min_uV = 3000000,
266 .max_uV = 3000000,
267 .apply_uV = 1,
268 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
269 .state_mem = {
270 .disabled = 1,
271 },
272 },
273 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
274 .consumer_supplies = ldo11_consumer,
275};
276
277static struct regulator_init_data __initdata max8997_ldo14_data = {
278 .constraints = {
279 .name = "AVDD18_SWB_1.8V",
280 .min_uV = 1800000,
281 .max_uV = 1800000,
282 .apply_uV = 1,
Sangwook Lee62d30f82011-11-03 16:14:14 +0900283 .always_on = 1,
Inderpal Singh6e012802011-10-03 08:51:20 +0900284 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
285 .state_mem = {
286 .disabled = 1,
287 },
288 },
289 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
290 .consumer_supplies = ldo14_consumer,
291};
292
293static struct regulator_init_data __initdata max8997_ldo17_data = {
294 .constraints = {
295 .name = "VDD_SWB_3.3V",
296 .min_uV = 3300000,
297 .max_uV = 3300000,
298 .apply_uV = 1,
Sangwook Lee62d30f82011-11-03 16:14:14 +0900299 .always_on = 1,
Inderpal Singh6e012802011-10-03 08:51:20 +0900300 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
301 .state_mem = {
302 .disabled = 1,
303 },
304 },
305 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
306 .consumer_supplies = ldo17_consumer,
307};
308
309static struct regulator_init_data __initdata max8997_ldo21_data = {
310 .constraints = {
311 .name = "VDD_MIF_1.2V",
312 .min_uV = 1200000,
313 .max_uV = 1200000,
314 .apply_uV = 1,
315 .always_on = 1,
316 .state_mem = {
317 .disabled = 1,
318 },
319 },
320};
321
322static struct regulator_init_data __initdata max8997_buck1_data = {
323 .constraints = {
324 .name = "VDD_ARM_1.2V",
325 .min_uV = 950000,
326 .max_uV = 1350000,
327 .always_on = 1,
328 .boot_on = 1,
329 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
330 .state_mem = {
331 .disabled = 1,
332 },
333 },
334 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
335 .consumer_supplies = buck1_consumer,
336};
337
338static struct regulator_init_data __initdata max8997_buck2_data = {
339 .constraints = {
340 .name = "VDD_INT_1.1V",
341 .min_uV = 900000,
342 .max_uV = 1100000,
343 .always_on = 1,
344 .boot_on = 1,
345 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
346 .state_mem = {
347 .disabled = 1,
348 },
349 },
350 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
351 .consumer_supplies = buck2_consumer,
352};
353
354static struct regulator_init_data __initdata max8997_buck3_data = {
355 .constraints = {
356 .name = "VDD_G3D_1.1V",
357 .min_uV = 900000,
358 .max_uV = 1100000,
359 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
360 REGULATOR_CHANGE_STATUS,
361 .state_mem = {
362 .disabled = 1,
363 },
364 },
365 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
366 .consumer_supplies = buck3_consumer,
367};
368
369static struct regulator_init_data __initdata max8997_buck5_data = {
370 .constraints = {
371 .name = "VDDQ_M1M2_1.2V",
372 .min_uV = 1200000,
373 .max_uV = 1200000,
374 .apply_uV = 1,
375 .always_on = 1,
376 .state_mem = {
377 .disabled = 1,
378 },
379 },
380};
381
382static struct regulator_init_data __initdata max8997_buck7_data = {
383 .constraints = {
384 .name = "VDD_LCD_3.3V",
385 .min_uV = 3300000,
386 .max_uV = 3300000,
387 .boot_on = 1,
388 .apply_uV = 1,
389 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
390 .state_mem = {
391 .disabled = 1
392 },
393 },
394 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
395 .consumer_supplies = buck7_consumer,
396};
397
398static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
399 { MAX8997_LDO1, &max8997_ldo1_data },
400 { MAX8997_LDO2, &max8997_ldo2_data },
401 { MAX8997_LDO3, &max8997_ldo3_data },
402 { MAX8997_LDO4, &max8997_ldo4_data },
403 { MAX8997_LDO6, &max8997_ldo6_data },
404 { MAX8997_LDO7, &max8997_ldo7_data },
405 { MAX8997_LDO8, &max8997_ldo8_data },
406 { MAX8997_LDO9, &max8997_ldo9_data },
407 { MAX8997_LDO10, &max8997_ldo10_data },
408 { MAX8997_LDO11, &max8997_ldo11_data },
409 { MAX8997_LDO14, &max8997_ldo14_data },
410 { MAX8997_LDO17, &max8997_ldo17_data },
411 { MAX8997_LDO21, &max8997_ldo21_data },
412 { MAX8997_BUCK1, &max8997_buck1_data },
413 { MAX8997_BUCK2, &max8997_buck2_data },
414 { MAX8997_BUCK3, &max8997_buck3_data },
415 { MAX8997_BUCK5, &max8997_buck5_data },
416 { MAX8997_BUCK7, &max8997_buck7_data },
417};
418
Kukjin Kime745e062012-01-21 10:47:14 +0900419static struct max8997_platform_data __initdata origen_max8997_pdata = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900420 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
421 .regulators = origen_max8997_regulators,
422
423 .wakeup = true,
424 .buck1_gpiodvs = false,
425 .buck2_gpiodvs = false,
426 .buck5_gpiodvs = false,
427 .irq_base = IRQ_GPIO_END + 1,
428
429 .ignore_gpiodvs_side_effect = true,
430 .buck125_default_idx = 0x0,
431
432 .buck125_gpios[0] = EXYNOS4_GPX0(0),
433 .buck125_gpios[1] = EXYNOS4_GPX0(1),
434 .buck125_gpios[2] = EXYNOS4_GPX0(2),
435
436 .buck1_voltage[0] = 1350000,
437 .buck1_voltage[1] = 1300000,
438 .buck1_voltage[2] = 1250000,
439 .buck1_voltage[3] = 1200000,
440 .buck1_voltage[4] = 1150000,
441 .buck1_voltage[5] = 1100000,
442 .buck1_voltage[6] = 1000000,
443 .buck1_voltage[7] = 950000,
444
445 .buck2_voltage[0] = 1100000,
446 .buck2_voltage[1] = 1100000,
447 .buck2_voltage[2] = 1100000,
448 .buck2_voltage[3] = 1100000,
449 .buck2_voltage[4] = 1000000,
450 .buck2_voltage[5] = 1000000,
451 .buck2_voltage[6] = 1000000,
452 .buck2_voltage[7] = 1000000,
453
454 .buck5_voltage[0] = 1200000,
455 .buck5_voltage[1] = 1200000,
456 .buck5_voltage[2] = 1200000,
457 .buck5_voltage[3] = 1200000,
458 .buck5_voltage[4] = 1200000,
459 .buck5_voltage[5] = 1200000,
460 .buck5_voltage[6] = 1200000,
461 .buck5_voltage[7] = 1200000,
462};
463
464/* I2C0 */
465static struct i2c_board_info i2c0_devs[] __initdata = {
466 {
467 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
468 .platform_data = &origen_max8997_pdata,
469 .irq = IRQ_EINT(4),
470 },
471};
472
Tushar Beheracf1dad92011-08-31 16:57:37 +0900473static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
474 .cd_type = S3C_SDHCI_CD_INTERNAL,
475 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
476};
477
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900478static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
Tushar Behera92e41ef2011-08-31 16:01:15 +0900479 .cd_type = S3C_SDHCI_CD_INTERNAL,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900480 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
481};
482
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900483/* USB EHCI */
484static struct s5p_ehci_platdata origen_ehci_pdata;
485
486static void __init origen_ehci_init(void)
487{
488 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
489
490 s5p_ehci_set_platdata(pdata);
491}
492
Tushar Behera95de77d2011-12-24 12:09:06 +0900493/* USB OHCI */
494static struct exynos4_ohci_platdata origen_ohci_pdata;
495
496static void __init origen_ohci_init(void)
497{
498 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
499
500 exynos4_ohci_set_platdata(pdata);
501}
502
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900503static struct gpio_keys_button origen_gpio_keys_table[] = {
504 {
505 .code = KEY_MENU,
506 .gpio = EXYNOS4_GPX1(5),
507 .desc = "gpio-keys: KEY_MENU",
508 .type = EV_KEY,
509 .active_low = 1,
510 .wakeup = 1,
511 .debounce_interval = 1,
512 }, {
513 .code = KEY_HOME,
514 .gpio = EXYNOS4_GPX1(6),
515 .desc = "gpio-keys: KEY_HOME",
516 .type = EV_KEY,
517 .active_low = 1,
518 .wakeup = 1,
519 .debounce_interval = 1,
520 }, {
521 .code = KEY_BACK,
522 .gpio = EXYNOS4_GPX1(7),
523 .desc = "gpio-keys: KEY_BACK",
524 .type = EV_KEY,
525 .active_low = 1,
526 .wakeup = 1,
527 .debounce_interval = 1,
528 }, {
529 .code = KEY_UP,
530 .gpio = EXYNOS4_GPX2(0),
531 .desc = "gpio-keys: KEY_UP",
532 .type = EV_KEY,
533 .active_low = 1,
534 .wakeup = 1,
535 .debounce_interval = 1,
536 }, {
537 .code = KEY_DOWN,
538 .gpio = EXYNOS4_GPX2(1),
539 .desc = "gpio-keys: KEY_DOWN",
540 .type = EV_KEY,
541 .active_low = 1,
542 .wakeup = 1,
543 .debounce_interval = 1,
544 },
545};
546
547static struct gpio_keys_platform_data origen_gpio_keys_data = {
548 .buttons = origen_gpio_keys_table,
549 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
550};
551
552static struct platform_device origen_device_gpiokeys = {
553 .name = "gpio-keys",
554 .dev = {
555 .platform_data = &origen_gpio_keys_data,
556 },
557};
558
Tushar Behera9421a762011-10-03 09:12:56 +0900559static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
560{
561 int ret;
562
563 if (power)
564 ret = gpio_request_one(EXYNOS4_GPE3(4),
565 GPIOF_OUT_INIT_HIGH, "GPE3_4");
566 else
567 ret = gpio_request_one(EXYNOS4_GPE3(4),
568 GPIOF_OUT_INIT_LOW, "GPE3_4");
569
570 gpio_free(EXYNOS4_GPE3(4));
571
572 if (ret)
573 pr_err("failed to request gpio for LCD power: %d\n", ret);
574}
575
576static struct plat_lcd_data origen_lcd_hv070wsa_data = {
577 .set_power = lcd_hv070wsa_set_power,
578};
579
580static struct platform_device origen_lcd_hv070wsa = {
581 .name = "platform-lcd",
582 .dev.parent = &s5p_device_fimd0.dev,
583 .dev.platform_data = &origen_lcd_hv070wsa_data,
584};
585
586static struct s3c_fb_pd_win origen_fb_win0 = {
587 .win_mode = {
588 .left_margin = 64,
589 .right_margin = 16,
590 .upper_margin = 64,
591 .lower_margin = 16,
592 .hsync_len = 48,
593 .vsync_len = 3,
594 .xres = 1024,
595 .yres = 600,
596 },
597 .max_bpp = 32,
598 .default_bpp = 24,
599};
600
601static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
602 .win[0] = &origen_fb_win0,
603 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
Tushar Behera815ed6f2011-12-29 16:48:08 +0900604 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
605 VIDCON1_INV_VCLK,
Tushar Behera9421a762011-10-03 09:12:56 +0900606 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
607};
608
Sangwook Lee62d30f82011-11-03 16:14:14 +0900609/* Bluetooth rfkill gpio platform data */
610struct rfkill_gpio_platform_data origen_bt_pdata = {
611 .reset_gpio = EXYNOS4_GPX2(2),
612 .shutdown_gpio = -1,
613 .type = RFKILL_TYPE_BLUETOOTH,
614 .name = "origen-bt",
615};
616
617/* Bluetooth Platform device */
618static struct platform_device origen_device_bluetooth = {
619 .name = "rfkill_gpio",
620 .id = -1,
621 .dev = {
622 .platform_data = &origen_bt_pdata,
623 },
624};
625
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900626static struct platform_device *origen_devices[] __initdata = {
627 &s3c_device_hsmmc2,
Tushar Beheracf1dad92011-08-31 16:57:37 +0900628 &s3c_device_hsmmc0,
Tushar Behera9421a762011-10-03 09:12:56 +0900629 &s3c_device_i2c0,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900630 &s3c_device_rtc,
631 &s3c_device_wdt,
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900632 &s5p_device_ehci,
Sachin Kamat6f8eb322011-08-31 15:52:27 +0900633 &s5p_device_fimc0,
634 &s5p_device_fimc1,
635 &s5p_device_fimc2,
636 &s5p_device_fimc3,
Sachin Kamat26e14512012-01-31 13:28:59 +0900637 &s5p_device_fimc_md,
Tushar Behera9421a762011-10-03 09:12:56 +0900638 &s5p_device_fimd0,
Sachin Kamat84207d82011-12-29 16:46:16 +0900639 &s5p_device_g2d,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900640 &s5p_device_hdmi,
641 &s5p_device_i2c_hdmiphy,
Sachin Kamat965a3302012-03-09 08:19:27 -0800642 &s5p_device_jpeg,
Sachin Kamatdf74a282011-10-13 15:38:21 +0900643 &s5p_device_mfc,
644 &s5p_device_mfc_l,
645 &s5p_device_mfc_r,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900646 &s5p_device_mixer,
Tushar Behera95de77d2011-12-24 12:09:06 +0900647 &exynos4_device_ohci,
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900648 &origen_device_gpiokeys,
Tushar Behera9421a762011-10-03 09:12:56 +0900649 &origen_lcd_hv070wsa,
Sangwook Lee62d30f82011-11-03 16:14:14 +0900650 &origen_device_bluetooth,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900651};
652
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900653/* LCD Backlight data */
654static struct samsung_bl_gpio_info origen_bl_gpio_info = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900655 .no = EXYNOS4_GPD0(0),
656 .func = S3C_GPIO_SFN(2),
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900657};
658
659static struct platform_pwm_backlight_data origen_bl_data = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900660 .pwm_id = 0,
661 .pwm_period_ns = 1000,
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900662};
663
Sangwook Lee62d30f82011-11-03 16:14:14 +0900664static void __init origen_bt_setup(void)
665{
666 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
667 /* 4 UART Pins configuration */
668 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
669 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
670 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
671 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
672}
673
Sachin Kamat3c766692011-10-03 09:16:53 +0900674static void s5p_tv_setup(void)
675{
676 /* Direct HPD to HDMI chip */
677 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
678 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
679 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
680}
681
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900682static void __init origen_map_io(void)
683{
Kukjin Kimcc511b82011-12-27 08:18:36 +0100684 exynos_init_io(NULL, 0);
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900685 s3c24xx_init_clocks(24000000);
686 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
687}
688
Inderpal Singh6e012802011-10-03 08:51:20 +0900689static void __init origen_power_init(void)
690{
691 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
692 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
693 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
694}
695
Sachin Kamatdf74a282011-10-13 15:38:21 +0900696static void __init origen_reserve(void)
697{
698 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
699}
700
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900701static void __init origen_machine_init(void)
702{
Inderpal Singh6e012802011-10-03 08:51:20 +0900703 origen_power_init();
704
705 s3c_i2c0_set_platdata(NULL);
706 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
707
Tushar Beheracf1dad92011-08-31 16:57:37 +0900708 /*
709 * Since sdhci instance 2 can contain a bootable media,
710 * sdhci instance 0 is registered after instance 2.
711 */
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900712 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
Tushar Beheracf1dad92011-08-31 16:57:37 +0900713 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900714
715 origen_ehci_init();
Tushar Behera95de77d2011-12-24 12:09:06 +0900716 origen_ohci_init();
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900717 clk_xusbxti.rate = 24000000;
718
Sachin Kamat3c766692011-10-03 09:16:53 +0900719 s5p_tv_setup();
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900720 s5p_i2c_hdmiphy_set_platdata(NULL);
721
Tushar Behera9421a762011-10-03 09:12:56 +0900722 s5p_fimd0_set_platdata(&origen_lcd_pdata);
723
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900724 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
Sachin Kamatdf74a282011-10-13 15:38:21 +0900725
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900726 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
Sangwook Lee62d30f82011-11-03 16:14:14 +0900727
728 origen_bt_setup();
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900729}
730
731MACHINE_START(ORIGEN, "ORIGEN")
732 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900733 .atag_offset = 0x100,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900734 .init_irq = exynos4_init_irq,
735 .map_io = origen_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100736 .handle_irq = gic_handle_irq,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900737 .init_machine = origen_machine_init,
738 .timer = &exynos4_timer,
Sachin Kamatdf74a282011-10-13 15:38:21 +0900739 .reserve = &origen_reserve,
Russell King9eb48592012-01-03 11:56:53 +0100740 .restart = exynos4_restart,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900741MACHINE_END