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JeongHyeon Kim699efdd2011-07-21 16:19:19 +09001/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/gpio.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/input.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090017#include <linux/pwm_backlight.h>
Sachin Kamatc86cfdd2011-09-16 21:41:25 +090018#include <linux/gpio_keys.h>
Inderpal Singh6e012802011-10-03 08:51:20 +090019#include <linux/i2c.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/max8997.h>
Tushar Behera9421a762011-10-03 09:12:56 +090022#include <linux/lcd.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090023
24#include <asm/mach/arch.h>
25#include <asm/mach-types.h>
26
Tushar Behera9421a762011-10-03 09:12:56 +090027#include <video/platform_lcd.h>
28
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090029#include <plat/regs-serial.h>
Tushar Behera9421a762011-10-03 09:12:56 +090030#include <plat/regs-fb-v4.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090031#include <plat/cpu.h>
32#include <plat/devs.h>
33#include <plat/sdhci.h>
34#include <plat/iic.h>
Sachin Kamat24f9e1f2011-08-31 15:47:16 +090035#include <plat/ehci.h>
36#include <plat/clock.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090037#include <plat/gpio-cfg.h>
38#include <plat/backlight.h>
Tushar Behera9421a762011-10-03 09:12:56 +090039#include <plat/pd.h>
40#include <plat/fb.h>
Sachin Kamatdf74a282011-10-13 15:38:21 +090041#include <plat/mfc.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090042
43#include <mach/map.h>
44
Kukjin Kimcc511b82011-12-27 08:18:36 +010045#include "common.h"
46
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090047/* Following are default values for UCON, ULCON and UFCON UART registers */
48#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
49 S3C2410_UCON_RXILEVEL | \
50 S3C2410_UCON_TXIRQMODE | \
51 S3C2410_UCON_RXIRQMODE | \
52 S3C2410_UCON_RXFIFO_TOI | \
53 S3C2443_UCON_RXERR_IRQEN)
54
55#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
56
57#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
58 S5PV210_UFCON_TXTRIG4 | \
59 S5PV210_UFCON_RXTRIG4)
60
61static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
62 [0] = {
63 .hwport = 0,
64 .flags = 0,
65 .ucon = ORIGEN_UCON_DEFAULT,
66 .ulcon = ORIGEN_ULCON_DEFAULT,
67 .ufcon = ORIGEN_UFCON_DEFAULT,
68 },
69 [1] = {
70 .hwport = 1,
71 .flags = 0,
72 .ucon = ORIGEN_UCON_DEFAULT,
73 .ulcon = ORIGEN_ULCON_DEFAULT,
74 .ufcon = ORIGEN_UFCON_DEFAULT,
75 },
76 [2] = {
77 .hwport = 2,
78 .flags = 0,
79 .ucon = ORIGEN_UCON_DEFAULT,
80 .ulcon = ORIGEN_ULCON_DEFAULT,
81 .ufcon = ORIGEN_UFCON_DEFAULT,
82 },
83 [3] = {
84 .hwport = 3,
85 .flags = 0,
86 .ucon = ORIGEN_UCON_DEFAULT,
87 .ulcon = ORIGEN_ULCON_DEFAULT,
88 .ufcon = ORIGEN_UFCON_DEFAULT,
89 },
90};
91
Inderpal Singh6e012802011-10-03 08:51:20 +090092static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
93 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +090094 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
95 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +090096};
97static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
98 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
99};
100static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
101 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
102};
103static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
104 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +0900105 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +0900106};
107static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
108 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
109};
110static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
111 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
112};
113static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
114 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
115};
116static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
117 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118};
119static struct regulator_consumer_supply __initdata buck1_consumer[] = {
120 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
121};
122static struct regulator_consumer_supply __initdata buck2_consumer[] = {
123 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
124};
125static struct regulator_consumer_supply __initdata buck3_consumer[] = {
126 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
127};
128static struct regulator_consumer_supply __initdata buck7_consumer[] = {
129 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
130};
131
132static struct regulator_init_data __initdata max8997_ldo1_data = {
133 .constraints = {
134 .name = "VDD_ABB_3.3V",
135 .min_uV = 3300000,
136 .max_uV = 3300000,
137 .apply_uV = 1,
138 .state_mem = {
139 .disabled = 1,
140 },
141 },
142};
143
144static struct regulator_init_data __initdata max8997_ldo2_data = {
145 .constraints = {
146 .name = "VDD_ALIVE_1.1V",
147 .min_uV = 1100000,
148 .max_uV = 1100000,
149 .apply_uV = 1,
150 .always_on = 1,
151 .state_mem = {
152 .enabled = 1,
153 },
154 },
155};
156
157static struct regulator_init_data __initdata max8997_ldo3_data = {
158 .constraints = {
159 .name = "VMIPI_1.1V",
160 .min_uV = 1100000,
161 .max_uV = 1100000,
162 .apply_uV = 1,
163 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
164 .state_mem = {
165 .disabled = 1,
166 },
167 },
168 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
169 .consumer_supplies = ldo3_consumer,
170};
171
172static struct regulator_init_data __initdata max8997_ldo4_data = {
173 .constraints = {
174 .name = "VDD_RTC_1.8V",
175 .min_uV = 1800000,
176 .max_uV = 1800000,
177 .apply_uV = 1,
178 .always_on = 1,
179 .state_mem = {
180 .disabled = 1,
181 },
182 },
183};
184
185static struct regulator_init_data __initdata max8997_ldo6_data = {
186 .constraints = {
187 .name = "VMIPI_1.8V",
188 .min_uV = 1800000,
189 .max_uV = 1800000,
190 .apply_uV = 1,
191 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
192 .state_mem = {
193 .disabled = 1,
194 },
195 },
196 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
197 .consumer_supplies = ldo6_consumer,
198};
199
200static struct regulator_init_data __initdata max8997_ldo7_data = {
201 .constraints = {
202 .name = "VDD_AUD_1.8V",
203 .min_uV = 1800000,
204 .max_uV = 1800000,
205 .apply_uV = 1,
206 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
207 .state_mem = {
208 .disabled = 1,
209 },
210 },
211 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
212 .consumer_supplies = ldo7_consumer,
213};
214
215static struct regulator_init_data __initdata max8997_ldo8_data = {
216 .constraints = {
217 .name = "VADC_3.3V",
218 .min_uV = 3300000,
219 .max_uV = 3300000,
220 .apply_uV = 1,
221 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
222 .state_mem = {
223 .disabled = 1,
224 },
225 },
226 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
227 .consumer_supplies = ldo8_consumer,
228};
229
230static struct regulator_init_data __initdata max8997_ldo9_data = {
231 .constraints = {
232 .name = "DVDD_SWB_2.8V",
233 .min_uV = 2800000,
234 .max_uV = 2800000,
235 .apply_uV = 1,
236 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
237 .state_mem = {
238 .disabled = 1,
239 },
240 },
241 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
242 .consumer_supplies = ldo9_consumer,
243};
244
245static struct regulator_init_data __initdata max8997_ldo10_data = {
246 .constraints = {
247 .name = "VDD_PLL_1.1V",
248 .min_uV = 1100000,
249 .max_uV = 1100000,
250 .apply_uV = 1,
251 .always_on = 1,
252 .state_mem = {
253 .disabled = 1,
254 },
255 },
256};
257
258static struct regulator_init_data __initdata max8997_ldo11_data = {
259 .constraints = {
260 .name = "VDD_AUD_3V",
261 .min_uV = 3000000,
262 .max_uV = 3000000,
263 .apply_uV = 1,
264 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
265 .state_mem = {
266 .disabled = 1,
267 },
268 },
269 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
270 .consumer_supplies = ldo11_consumer,
271};
272
273static struct regulator_init_data __initdata max8997_ldo14_data = {
274 .constraints = {
275 .name = "AVDD18_SWB_1.8V",
276 .min_uV = 1800000,
277 .max_uV = 1800000,
278 .apply_uV = 1,
279 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
280 .state_mem = {
281 .disabled = 1,
282 },
283 },
284 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
285 .consumer_supplies = ldo14_consumer,
286};
287
288static struct regulator_init_data __initdata max8997_ldo17_data = {
289 .constraints = {
290 .name = "VDD_SWB_3.3V",
291 .min_uV = 3300000,
292 .max_uV = 3300000,
293 .apply_uV = 1,
294 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
295 .state_mem = {
296 .disabled = 1,
297 },
298 },
299 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
300 .consumer_supplies = ldo17_consumer,
301};
302
303static struct regulator_init_data __initdata max8997_ldo21_data = {
304 .constraints = {
305 .name = "VDD_MIF_1.2V",
306 .min_uV = 1200000,
307 .max_uV = 1200000,
308 .apply_uV = 1,
309 .always_on = 1,
310 .state_mem = {
311 .disabled = 1,
312 },
313 },
314};
315
316static struct regulator_init_data __initdata max8997_buck1_data = {
317 .constraints = {
318 .name = "VDD_ARM_1.2V",
319 .min_uV = 950000,
320 .max_uV = 1350000,
321 .always_on = 1,
322 .boot_on = 1,
323 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
324 .state_mem = {
325 .disabled = 1,
326 },
327 },
328 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
329 .consumer_supplies = buck1_consumer,
330};
331
332static struct regulator_init_data __initdata max8997_buck2_data = {
333 .constraints = {
334 .name = "VDD_INT_1.1V",
335 .min_uV = 900000,
336 .max_uV = 1100000,
337 .always_on = 1,
338 .boot_on = 1,
339 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
340 .state_mem = {
341 .disabled = 1,
342 },
343 },
344 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
345 .consumer_supplies = buck2_consumer,
346};
347
348static struct regulator_init_data __initdata max8997_buck3_data = {
349 .constraints = {
350 .name = "VDD_G3D_1.1V",
351 .min_uV = 900000,
352 .max_uV = 1100000,
353 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
354 REGULATOR_CHANGE_STATUS,
355 .state_mem = {
356 .disabled = 1,
357 },
358 },
359 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
360 .consumer_supplies = buck3_consumer,
361};
362
363static struct regulator_init_data __initdata max8997_buck5_data = {
364 .constraints = {
365 .name = "VDDQ_M1M2_1.2V",
366 .min_uV = 1200000,
367 .max_uV = 1200000,
368 .apply_uV = 1,
369 .always_on = 1,
370 .state_mem = {
371 .disabled = 1,
372 },
373 },
374};
375
376static struct regulator_init_data __initdata max8997_buck7_data = {
377 .constraints = {
378 .name = "VDD_LCD_3.3V",
379 .min_uV = 3300000,
380 .max_uV = 3300000,
381 .boot_on = 1,
382 .apply_uV = 1,
383 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
384 .state_mem = {
385 .disabled = 1
386 },
387 },
388 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
389 .consumer_supplies = buck7_consumer,
390};
391
392static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
393 { MAX8997_LDO1, &max8997_ldo1_data },
394 { MAX8997_LDO2, &max8997_ldo2_data },
395 { MAX8997_LDO3, &max8997_ldo3_data },
396 { MAX8997_LDO4, &max8997_ldo4_data },
397 { MAX8997_LDO6, &max8997_ldo6_data },
398 { MAX8997_LDO7, &max8997_ldo7_data },
399 { MAX8997_LDO8, &max8997_ldo8_data },
400 { MAX8997_LDO9, &max8997_ldo9_data },
401 { MAX8997_LDO10, &max8997_ldo10_data },
402 { MAX8997_LDO11, &max8997_ldo11_data },
403 { MAX8997_LDO14, &max8997_ldo14_data },
404 { MAX8997_LDO17, &max8997_ldo17_data },
405 { MAX8997_LDO21, &max8997_ldo21_data },
406 { MAX8997_BUCK1, &max8997_buck1_data },
407 { MAX8997_BUCK2, &max8997_buck2_data },
408 { MAX8997_BUCK3, &max8997_buck3_data },
409 { MAX8997_BUCK5, &max8997_buck5_data },
410 { MAX8997_BUCK7, &max8997_buck7_data },
411};
412
413struct max8997_platform_data __initdata origen_max8997_pdata = {
414 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
415 .regulators = origen_max8997_regulators,
416
417 .wakeup = true,
418 .buck1_gpiodvs = false,
419 .buck2_gpiodvs = false,
420 .buck5_gpiodvs = false,
421 .irq_base = IRQ_GPIO_END + 1,
422
423 .ignore_gpiodvs_side_effect = true,
424 .buck125_default_idx = 0x0,
425
426 .buck125_gpios[0] = EXYNOS4_GPX0(0),
427 .buck125_gpios[1] = EXYNOS4_GPX0(1),
428 .buck125_gpios[2] = EXYNOS4_GPX0(2),
429
430 .buck1_voltage[0] = 1350000,
431 .buck1_voltage[1] = 1300000,
432 .buck1_voltage[2] = 1250000,
433 .buck1_voltage[3] = 1200000,
434 .buck1_voltage[4] = 1150000,
435 .buck1_voltage[5] = 1100000,
436 .buck1_voltage[6] = 1000000,
437 .buck1_voltage[7] = 950000,
438
439 .buck2_voltage[0] = 1100000,
440 .buck2_voltage[1] = 1100000,
441 .buck2_voltage[2] = 1100000,
442 .buck2_voltage[3] = 1100000,
443 .buck2_voltage[4] = 1000000,
444 .buck2_voltage[5] = 1000000,
445 .buck2_voltage[6] = 1000000,
446 .buck2_voltage[7] = 1000000,
447
448 .buck5_voltage[0] = 1200000,
449 .buck5_voltage[1] = 1200000,
450 .buck5_voltage[2] = 1200000,
451 .buck5_voltage[3] = 1200000,
452 .buck5_voltage[4] = 1200000,
453 .buck5_voltage[5] = 1200000,
454 .buck5_voltage[6] = 1200000,
455 .buck5_voltage[7] = 1200000,
456};
457
458/* I2C0 */
459static struct i2c_board_info i2c0_devs[] __initdata = {
460 {
461 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
462 .platform_data = &origen_max8997_pdata,
463 .irq = IRQ_EINT(4),
464 },
465};
466
Tushar Beheracf1dad92011-08-31 16:57:37 +0900467static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
468 .cd_type = S3C_SDHCI_CD_INTERNAL,
469 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
470};
471
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900472static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
Tushar Behera92e41ef2011-08-31 16:01:15 +0900473 .cd_type = S3C_SDHCI_CD_INTERNAL,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900474 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
475};
476
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900477/* USB EHCI */
478static struct s5p_ehci_platdata origen_ehci_pdata;
479
480static void __init origen_ehci_init(void)
481{
482 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
483
484 s5p_ehci_set_platdata(pdata);
485}
486
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900487static struct gpio_keys_button origen_gpio_keys_table[] = {
488 {
489 .code = KEY_MENU,
490 .gpio = EXYNOS4_GPX1(5),
491 .desc = "gpio-keys: KEY_MENU",
492 .type = EV_KEY,
493 .active_low = 1,
494 .wakeup = 1,
495 .debounce_interval = 1,
496 }, {
497 .code = KEY_HOME,
498 .gpio = EXYNOS4_GPX1(6),
499 .desc = "gpio-keys: KEY_HOME",
500 .type = EV_KEY,
501 .active_low = 1,
502 .wakeup = 1,
503 .debounce_interval = 1,
504 }, {
505 .code = KEY_BACK,
506 .gpio = EXYNOS4_GPX1(7),
507 .desc = "gpio-keys: KEY_BACK",
508 .type = EV_KEY,
509 .active_low = 1,
510 .wakeup = 1,
511 .debounce_interval = 1,
512 }, {
513 .code = KEY_UP,
514 .gpio = EXYNOS4_GPX2(0),
515 .desc = "gpio-keys: KEY_UP",
516 .type = EV_KEY,
517 .active_low = 1,
518 .wakeup = 1,
519 .debounce_interval = 1,
520 }, {
521 .code = KEY_DOWN,
522 .gpio = EXYNOS4_GPX2(1),
523 .desc = "gpio-keys: KEY_DOWN",
524 .type = EV_KEY,
525 .active_low = 1,
526 .wakeup = 1,
527 .debounce_interval = 1,
528 },
529};
530
531static struct gpio_keys_platform_data origen_gpio_keys_data = {
532 .buttons = origen_gpio_keys_table,
533 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
534};
535
536static struct platform_device origen_device_gpiokeys = {
537 .name = "gpio-keys",
538 .dev = {
539 .platform_data = &origen_gpio_keys_data,
540 },
541};
542
Tushar Behera9421a762011-10-03 09:12:56 +0900543static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
544{
545 int ret;
546
547 if (power)
548 ret = gpio_request_one(EXYNOS4_GPE3(4),
549 GPIOF_OUT_INIT_HIGH, "GPE3_4");
550 else
551 ret = gpio_request_one(EXYNOS4_GPE3(4),
552 GPIOF_OUT_INIT_LOW, "GPE3_4");
553
554 gpio_free(EXYNOS4_GPE3(4));
555
556 if (ret)
557 pr_err("failed to request gpio for LCD power: %d\n", ret);
558}
559
560static struct plat_lcd_data origen_lcd_hv070wsa_data = {
561 .set_power = lcd_hv070wsa_set_power,
562};
563
564static struct platform_device origen_lcd_hv070wsa = {
565 .name = "platform-lcd",
566 .dev.parent = &s5p_device_fimd0.dev,
567 .dev.platform_data = &origen_lcd_hv070wsa_data,
568};
569
570static struct s3c_fb_pd_win origen_fb_win0 = {
571 .win_mode = {
572 .left_margin = 64,
573 .right_margin = 16,
574 .upper_margin = 64,
575 .lower_margin = 16,
576 .hsync_len = 48,
577 .vsync_len = 3,
578 .xres = 1024,
579 .yres = 600,
580 },
581 .max_bpp = 32,
582 .default_bpp = 24,
583};
584
585static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
586 .win[0] = &origen_fb_win0,
587 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
588 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
589 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
590};
591
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900592static struct platform_device *origen_devices[] __initdata = {
593 &s3c_device_hsmmc2,
Tushar Beheracf1dad92011-08-31 16:57:37 +0900594 &s3c_device_hsmmc0,
Tushar Behera9421a762011-10-03 09:12:56 +0900595 &s3c_device_i2c0,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900596 &s3c_device_rtc,
597 &s3c_device_wdt,
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900598 &s5p_device_ehci,
Sachin Kamat6f8eb322011-08-31 15:52:27 +0900599 &s5p_device_fimc0,
600 &s5p_device_fimc1,
601 &s5p_device_fimc2,
602 &s5p_device_fimc3,
Tushar Behera9421a762011-10-03 09:12:56 +0900603 &s5p_device_fimd0,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900604 &s5p_device_hdmi,
605 &s5p_device_i2c_hdmiphy,
Sachin Kamatdf74a282011-10-13 15:38:21 +0900606 &s5p_device_mfc,
607 &s5p_device_mfc_l,
608 &s5p_device_mfc_r,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900609 &s5p_device_mixer,
Tushar Behera9421a762011-10-03 09:12:56 +0900610 &exynos4_device_pd[PD_LCD0],
Sachin Kamat3c766692011-10-03 09:16:53 +0900611 &exynos4_device_pd[PD_TV],
Sachin Kamatf0e38e32011-10-10 19:54:59 +0900612 &exynos4_device_pd[PD_G3D],
613 &exynos4_device_pd[PD_LCD1],
614 &exynos4_device_pd[PD_CAM],
615 &exynos4_device_pd[PD_GPS],
Sachin Kamatdf74a282011-10-13 15:38:21 +0900616 &exynos4_device_pd[PD_MFC],
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900617 &origen_device_gpiokeys,
Tushar Behera9421a762011-10-03 09:12:56 +0900618 &origen_lcd_hv070wsa,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900619};
620
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900621/* LCD Backlight data */
622static struct samsung_bl_gpio_info origen_bl_gpio_info = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900623 .no = EXYNOS4_GPD0(0),
624 .func = S3C_GPIO_SFN(2),
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900625};
626
627static struct platform_pwm_backlight_data origen_bl_data = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900628 .pwm_id = 0,
629 .pwm_period_ns = 1000,
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900630};
631
Sachin Kamat3c766692011-10-03 09:16:53 +0900632static void s5p_tv_setup(void)
633{
634 /* Direct HPD to HDMI chip */
635 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
636 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
637 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
638}
639
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900640static void __init origen_map_io(void)
641{
Kukjin Kimcc511b82011-12-27 08:18:36 +0100642 exynos_init_io(NULL, 0);
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900643 s3c24xx_init_clocks(24000000);
644 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
645}
646
Inderpal Singh6e012802011-10-03 08:51:20 +0900647static void __init origen_power_init(void)
648{
649 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
650 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
651 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
652}
653
Sachin Kamatdf74a282011-10-13 15:38:21 +0900654static void __init origen_reserve(void)
655{
656 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
657}
658
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900659static void __init origen_machine_init(void)
660{
Inderpal Singh6e012802011-10-03 08:51:20 +0900661 origen_power_init();
662
663 s3c_i2c0_set_platdata(NULL);
664 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
665
Tushar Beheracf1dad92011-08-31 16:57:37 +0900666 /*
667 * Since sdhci instance 2 can contain a bootable media,
668 * sdhci instance 0 is registered after instance 2.
669 */
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900670 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
Tushar Beheracf1dad92011-08-31 16:57:37 +0900671 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900672
673 origen_ehci_init();
674 clk_xusbxti.rate = 24000000;
675
Sachin Kamat3c766692011-10-03 09:16:53 +0900676 s5p_tv_setup();
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900677 s5p_i2c_hdmiphy_set_platdata(NULL);
678
Tushar Behera9421a762011-10-03 09:12:56 +0900679 s5p_fimd0_set_platdata(&origen_lcd_pdata);
680
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900681 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
Sachin Kamatdf74a282011-10-13 15:38:21 +0900682
Tushar Behera9421a762011-10-03 09:12:56 +0900683 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900684
Sachin Kamat3c766692011-10-03 09:16:53 +0900685 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
686 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
687
Sachin Kamatdf74a282011-10-13 15:38:21 +0900688 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
689
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900690 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900691}
692
693MACHINE_START(ORIGEN, "ORIGEN")
694 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900695 .atag_offset = 0x100,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900696 .init_irq = exynos4_init_irq,
697 .map_io = origen_map_io,
698 .init_machine = origen_machine_init,
699 .timer = &exynos4_timer,
Sachin Kamatdf74a282011-10-13 15:38:21 +0900700 .reserve = &origen_reserve,
Russell King9eb48592012-01-03 11:56:53 +0100701 .restart = exynos4_restart,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900702MACHINE_END