blob: ba27c13e44e0b2b243c543290167dbb6b342a814 [file] [log] [blame]
Grant Likely8e267f32011-07-19 17:26:54 -06001/*
2 * nVidia Tegra device tree board support
3 *
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/serial_8250.h>
22#include <linux/clk.h>
23#include <linux/dma-mapping.h>
24#include <linux/irqdomain.h>
25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h>
30#include <linux/pda_power.h>
31#include <linux/io.h>
32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38#include <asm/setup.h>
39
40#include <mach/iomap.h>
41#include <mach/irqs.h>
42
43#include "board.h"
44#include "board-harmony.h"
45#include "clock.h"
46#include "devices.h"
47
48void harmony_pinmux_init(void);
Marc Dietrichcc2afa42011-11-01 10:37:05 +000049void paz00_pinmux_init(void);
Grant Likely8e267f32011-07-19 17:26:54 -060050void seaboard_pinmux_init(void);
Stephen Warrena7db2c12011-10-25 02:01:28 +000051void trimslice_pinmux_init(void);
Peter De Schrijveradd29e62011-10-12 14:53:05 +030052void ventana_pinmux_init(void);
Grant Likely8e267f32011-07-19 17:26:54 -060053
54struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
60 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
61 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
62 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
63 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
Stephen Warrenf1101642011-12-07 15:13:40 -070064 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S2_BASE, "tegra-i2s.1", NULL),
Grant Likely8e267f32011-07-19 17:26:54 -060065 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
Olof Johansson4a53f4e2011-11-04 09:12:40 +000066 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0",
67 &tegra_ehci1_device.dev.platform_data),
68 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1",
69 &tegra_ehci2_device.dev.platform_data),
70 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2",
71 &tegra_ehci3_device.dev.platform_data),
Grant Likely8e267f32011-07-19 17:26:54 -060072 {}
73};
74
75static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
76 /* name parent rate enabled */
77 { "uartd", "pll_p", 216000000, true },
Olof Johansson4a53f4e2011-11-04 09:12:40 +000078 { "usbd", "clk_m", 12000000, false },
79 { "usb2", "clk_m", 12000000, false },
80 { "usb3", "clk_m", 12000000, false },
Stephen Warren586187e2011-12-07 15:13:42 -070081 { "pll_a", "pll_p_out1", 56448000, true },
82 { "pll_a_out0", "pll_a", 11289600, true },
83 { "cdev1", NULL, 0, true },
84 { "i2s1", "pll_a_out0", 11289600, false},
85 { "i2s2", "pll_a_out0", 11289600, false},
Grant Likely8e267f32011-07-19 17:26:54 -060086 { NULL, NULL, 0, 0},
87};
88
89static struct of_device_id tegra_dt_match_table[] __initdata = {
90 { .compatible = "simple-bus", },
91 {}
92};
93
94static struct of_device_id tegra_dt_gic_match[] __initdata = {
95 { .compatible = "nvidia,tegra20-gic", },
96 {}
97};
98
Peter De Schrijveradd29e62011-10-12 14:53:05 +030099static struct {
100 char *machine;
101 void (*init)(void);
102} pinmux_configs[] = {
Stephen Warrena7db2c12011-10-25 02:01:28 +0000103 { "compulab,trimslice", trimslice_pinmux_init },
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300104 { "nvidia,harmony", harmony_pinmux_init },
Marc Dietrichcc2afa42011-11-01 10:37:05 +0000105 { "compal,paz00", paz00_pinmux_init },
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300106 { "nvidia,seaboard", seaboard_pinmux_init },
107 { "nvidia,ventana", ventana_pinmux_init },
108};
109
Grant Likely8e267f32011-07-19 17:26:54 -0600110static void __init tegra_dt_init(void)
111{
112 struct device_node *node;
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300113 int i;
Grant Likely8e267f32011-07-19 17:26:54 -0600114
115 node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
116 TEGRA_ARM_INT_DIST_BASE);
117 if (node)
118 irq_domain_add_simple(node, INT_GIC_BASE);
119
120 tegra_clk_init_from_table(tegra_dt_clk_init_table);
121
Stephen Warren4b91b6f2011-10-25 02:01:27 +0000122 /*
123 * Finished with the static registrations now; fill in the missing
124 * devices
125 */
126 of_platform_populate(NULL, tegra_dt_match_table,
127 tegra20_auxdata_lookup, NULL);
128
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300129 for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) {
130 if (of_machine_is_compatible(pinmux_configs[i].machine)) {
131 pinmux_configs[i].init();
132 break;
133 }
134 }
135
136 WARN(i == ARRAY_SIZE(pinmux_configs),
137 "Unknown platform! Pinmuxing not initialized\n");
Grant Likely8e267f32011-07-19 17:26:54 -0600138}
139
140static const char * tegra_dt_board_compat[] = {
Stephen Warrena7db2c12011-10-25 02:01:28 +0000141 "compulab,trimslice",
Grant Likely8e267f32011-07-19 17:26:54 -0600142 "nvidia,harmony",
Marc Dietrichcc2afa42011-11-01 10:37:05 +0000143 "compal,paz00",
Grant Likely8e267f32011-07-19 17:26:54 -0600144 "nvidia,seaboard",
Peter De Schrijveradd29e62011-10-12 14:53:05 +0300145 "nvidia,ventana",
Grant Likely8e267f32011-07-19 17:26:54 -0600146 NULL
147};
148
149DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
150 .map_io = tegra_map_common_io,
151 .init_early = tegra_init_early,
152 .init_irq = tegra_init_irq,
153 .timer = &tegra_timer,
154 .init_machine = tegra_dt_init,
155 .dt_compat = tegra_dt_board_compat,
156MACHINE_END