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Alan Coxda9bb1d2006-01-18 17:44:13 -08001#
2# EDAC Kconfig
Doug Thompson4577ca52009-04-02 16:58:43 -07003# Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
Alan Coxda9bb1d2006-01-18 17:44:13 -08004# Licensed and distributed under the GPL
5#
Alan Coxda9bb1d2006-01-18 17:44:13 -08006
Jan Engelhardt751cb5e2007-07-15 23:39:27 -07007menuconfig EDAC
GeunSik Lime24aca62009-06-17 16:28:02 -07008 bool "EDAC (Error Detection And Correction) reporting"
Martin Schwidefskye25df122007-05-10 15:45:57 +02009 depends on HAS_IOMEM
Rob Herringa1b01ed2012-06-13 12:01:55 -050010 depends on X86 || PPC || TILE || ARM
Alan Coxda9bb1d2006-01-18 17:44:13 -080011 help
12 EDAC is designed to report errors in the core system.
13 These are low-level errors that are reported in the CPU or
Douglas Thompson8cb2a392007-07-19 01:50:12 -070014 supporting chipset or other subsystems:
15 memory errors, cache errors, PCI errors, thermal throttling, etc..
16 If unsure, select 'Y'.
Alan Coxda9bb1d2006-01-18 17:44:13 -080017
Tim Small57c432b2006-03-09 17:33:50 -080018 If this code is reporting problems on your system, please
19 see the EDAC project web pages for more information at:
20
21 <http://bluesmoke.sourceforge.net/>
22
23 and:
24
25 <http://buttersideup.com/edacwiki>
26
27 There is also a mailing list for the EDAC project, which can
28 be found via the sourceforge page.
29
Jan Engelhardt751cb5e2007-07-15 23:39:27 -070030if EDAC
Alan Coxda9bb1d2006-01-18 17:44:13 -080031
32comment "Reporting subsystems"
Alan Coxda9bb1d2006-01-18 17:44:13 -080033
Mauro Carvalho Chehab19974712012-03-21 17:06:53 -030034config EDAC_LEGACY_SYSFS
35 bool "EDAC legacy sysfs"
36 default y
37 help
38 Enable the compatibility sysfs nodes.
39 Use 'Y' if your edac utilities aren't ported to work with the newer
40 structures.
41
Alan Coxda9bb1d2006-01-18 17:44:13 -080042config EDAC_DEBUG
43 bool "Debugging"
Alan Coxda9bb1d2006-01-18 17:44:13 -080044 help
45 This turns on debugging information for the entire EDAC
46 sub-system. You can insert module with "debug_level=x", current
47 there're four debug levels (x=0,1,2,3 from low to high).
48 Usually you should select 'N'.
49
Borislav Petkov9cdeb402010-09-02 18:33:24 +020050config EDAC_DECODE_MCE
Borislav Petkov0d18b2e2009-10-02 15:31:48 +020051 tristate "Decode MCEs in human-readable form (only on AMD for now)"
Borislav Petkov168eb342011-08-10 09:43:30 -030052 depends on CPU_SUP_AMD && X86_MCE_AMD
Borislav Petkov0d18b2e2009-10-02 15:31:48 +020053 default y
54 ---help---
55 Enable this option if you want to decode Machine Check Exceptions
Lucas De Marchi25985ed2011-03-30 22:57:33 -030056 occurring on your machine in human-readable form.
Borislav Petkov0d18b2e2009-10-02 15:31:48 +020057
58 You should definitely say Y here in case you want to decode MCEs
59 which occur really early upon boot, before the module infrastructure
60 has been initialized.
61
Borislav Petkov9cdeb402010-09-02 18:33:24 +020062config EDAC_MCE_INJ
63 tristate "Simple MCE injection interface over /sysfs"
64 depends on EDAC_DECODE_MCE
65 default n
66 help
67 This is a simple interface to inject MCEs over /sysfs and test
68 the MCE decoding code in EDAC.
69
70 This is currently AMD-only.
71
Alan Coxda9bb1d2006-01-18 17:44:13 -080072config EDAC_MM_EDAC
73 tristate "Main Memory EDAC (Error Detection And Correction) reporting"
Alan Coxda9bb1d2006-01-18 17:44:13 -080074 help
75 Some systems are able to detect and correct errors in main
76 memory. EDAC can report statistics on memory error
77 detection and correction (EDAC - or commonly referred to ECC
78 errors). EDAC will also try to decode where these errors
79 occurred so that a particular failing memory module can be
80 replaced. If unsure, select 'Y'.
81
Doug Thompson7d6034d2009-04-27 20:01:01 +020082config EDAC_AMD64
Borislav Petkov027dbd62010-10-13 22:12:15 +020083 tristate "AMD64 (Opteron, Athlon64) K8, F10h"
84 depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE
Doug Thompson7d6034d2009-04-27 20:01:01 +020085 help
Borislav Petkov027dbd62010-10-13 22:12:15 +020086 Support for error detection and correction of DRAM ECC errors on
87 the AMD64 families of memory controllers (K8 and F10h)
Doug Thompson7d6034d2009-04-27 20:01:01 +020088
89config EDAC_AMD64_ERROR_INJECTION
Borislav Petkov9cdeb402010-09-02 18:33:24 +020090 bool "Sysfs HW Error injection facilities"
Doug Thompson7d6034d2009-04-27 20:01:01 +020091 depends on EDAC_AMD64
92 help
93 Recent Opterons (Family 10h and later) provide for Memory Error
94 Injection into the ECC detection circuits. The amd64_edac module
95 allows the operator/user to inject Uncorrectable and Correctable
96 errors into DRAM.
97
98 When enabled, in each of the respective memory controller directories
99 (/sys/devices/system/edac/mc/mcX), there are 3 input files:
100
101 - inject_section (0..3, 16-byte section of 64-byte cacheline),
102 - inject_word (0..8, 16-bit word of 16-byte section),
103 - inject_ecc_vector (hex ecc vector: select bits of inject word)
104
105 In addition, there are two control files, inject_read and inject_write,
106 which trigger the DRAM ECC Read and Write respectively.
Alan Coxda9bb1d2006-01-18 17:44:13 -0800107
108config EDAC_AMD76X
109 tristate "AMD 76x (760, 762, 768)"
Dave Jones90cbc452006-02-03 03:04:11 -0800110 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800111 help
112 Support for error detection and correction on the AMD 76x
113 series of chipsets used with the Athlon processor.
114
115config EDAC_E7XXX
116 tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800117 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800118 help
119 Support for error detection and correction on the Intel
120 E7205, E7500, E7501 and E7505 server chipsets.
121
122config EDAC_E752X
Andrei Konovalov5135b792008-04-29 01:03:13 -0700123 tristate "Intel e752x (e7520, e7525, e7320) and 3100"
Randy Dunlapda960a62006-03-31 02:30:34 -0800124 depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
Alan Coxda9bb1d2006-01-18 17:44:13 -0800125 help
126 Support for error detection and correction on the Intel
127 E7520, E7525, E7320 server chipsets.
128
Tim Small5a2c6752007-07-19 01:49:42 -0700129config EDAC_I82443BXGX
130 tristate "Intel 82443BX/GX (440BX/GX)"
131 depends on EDAC_MM_EDAC && PCI && X86_32
Andrew Morton28f96eea2007-07-19 01:49:45 -0700132 depends on BROKEN
Tim Small5a2c6752007-07-19 01:49:42 -0700133 help
134 Support for error detection and correction on the Intel
135 82443BX/GX memory controllers (440BX/GX chipsets).
136
Alan Coxda9bb1d2006-01-18 17:44:13 -0800137config EDAC_I82875P
138 tristate "Intel 82875p (D82875P, E7210)"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800139 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800140 help
141 Support for error detection and correction on the Intel
142 DP82785P and E7210 server chipsets.
143
Ranganathan Desikan420390f2007-07-19 01:50:31 -0700144config EDAC_I82975X
145 tristate "Intel 82975x (D82975x)"
146 depends on EDAC_MM_EDAC && PCI && X86
147 help
148 Support for error detection and correction on the Intel
149 DP82975x server chipsets.
150
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700151config EDAC_I3000
152 tristate "Intel 3000/3010"
Jason Uhlenkottf5c04542008-02-07 00:15:01 -0800153 depends on EDAC_MM_EDAC && PCI && X86
Jason Uhlenkott535c6a52007-07-19 01:49:48 -0700154 help
155 Support for error detection and correction on the Intel
156 3000 and 3010 server chipsets.
157
Jason Uhlenkottdd8ef1d2009-09-23 15:57:27 -0700158config EDAC_I3200
159 tristate "Intel 3200"
160 depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
161 help
162 Support for error detection and correction on the Intel
163 3200 and 3210 server chipsets.
164
Hitoshi Mitakedf8bc08c2008-10-29 14:00:50 -0700165config EDAC_X38
166 tristate "Intel X38"
167 depends on EDAC_MM_EDAC && PCI && X86
168 help
169 Support for error detection and correction on the Intel
170 X38 server chipsets.
171
Mauro Carvalho Chehab920c8df2009-01-06 14:43:00 -0800172config EDAC_I5400
173 tristate "Intel 5400 (Seaburg) chipsets"
174 depends on EDAC_MM_EDAC && PCI && X86
175 help
176 Support for error detection and correction the Intel
177 i5400 MCH chipset (Seaburg).
178
Mauro Carvalho Chehaba0c36a12009-06-22 22:41:15 -0300179config EDAC_I7CORE
180 tristate "Intel i7 Core (Nehalem) processors"
Borislav Petkov168eb342011-08-10 09:43:30 -0300181 depends on EDAC_MM_EDAC && PCI && X86 && X86_MCE_INTEL
Mauro Carvalho Chehaba0c36a12009-06-22 22:41:15 -0300182 help
183 Support for error detection and correction the Intel
Mauro Carvalho Chehab696e4092009-07-23 06:57:45 -0300184 i7 Core (Nehalem) Integrated Memory Controller that exists on
185 newer processors like i7 Core, i7 Core Extreme, Xeon 35xx
186 and Xeon 55xx processors.
Mauro Carvalho Chehaba0c36a12009-06-22 22:41:15 -0300187
Alan Coxda9bb1d2006-01-18 17:44:13 -0800188config EDAC_I82860
189 tristate "Intel 82860"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800190 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800191 help
192 Support for error detection and correction on the Intel
193 82860 chipset.
194
195config EDAC_R82600
196 tristate "Radisys 82600 embedded chipset"
Dave Peterson39f1d8d2006-03-26 01:38:50 -0800197 depends on EDAC_MM_EDAC && PCI && X86_32
Alan Coxda9bb1d2006-01-18 17:44:13 -0800198 help
199 Support for error detection and correction on the Radisys
200 82600 embedded chipset.
201
Eric Wolleseneb607052007-07-19 01:49:39 -0700202config EDAC_I5000
203 tristate "Intel Greencreek/Blackford chipset"
204 depends on EDAC_MM_EDAC && X86 && PCI
205 help
206 Support for error detection and correction the Intel
207 Greekcreek/Blackford chipsets.
208
Arthur Jones8f421c592008-07-25 01:49:04 -0700209config EDAC_I5100
210 tristate "Intel San Clemente MCH"
211 depends on EDAC_MM_EDAC && X86 && PCI
212 help
213 Support for error detection and correction the Intel
214 San Clemente MCH.
215
Mauro Carvalho Chehabfcaf7802010-08-24 23:22:57 -0300216config EDAC_I7300
217 tristate "Intel Clarksboro MCH"
218 depends on EDAC_MM_EDAC && X86 && PCI
219 help
220 Support for error detection and correction the Intel
221 Clarksboro MCH (Intel 7300 chipset).
222
Mauro Carvalho Chehab3d78c9a2011-10-20 19:33:46 -0200223config EDAC_SBRIDGE
224 tristate "Intel Sandy-Bridge Integrated MC"
Hui Wang22a5c272012-02-06 04:10:59 -0300225 depends on EDAC_MM_EDAC && PCI && X86_64 && X86_MCE_INTEL
226 depends on PCI_MMCONFIG && EXPERIMENTAL
Mauro Carvalho Chehab3d78c9a2011-10-20 19:33:46 -0200227 help
228 Support for error detection and correction the Intel
229 Sandy Bridge Integrated Memory Controller.
230
Dave Jianga9a753d2008-02-07 00:14:55 -0800231config EDAC_MPC85XX
Ira W. Snyderb4846252009-09-23 15:57:25 -0700232 tristate "Freescale MPC83xx / MPC85xx"
Anton Vorontsov1cd85212010-07-20 13:24:27 -0700233 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
Dave Jianga9a753d2008-02-07 00:14:55 -0800234 help
235 Support for error detection and correction on the Freescale
Ira W. Snyderb4846252009-09-23 15:57:25 -0700236 MPC8349, MPC8560, MPC8540, MPC8548
Dave Jianga9a753d2008-02-07 00:14:55 -0800237
Dave Jiang4f4aeea2008-02-07 00:14:56 -0800238config EDAC_MV64X60
239 tristate "Marvell MV64x60"
240 depends on EDAC_MM_EDAC && MV64X60
241 help
242 Support for error detection and correction on the Marvell
243 MV64360 and MV64460 chipsets.
244
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700245config EDAC_PASEMI
246 tristate "PA Semi PWRficient"
247 depends on EDAC_MM_EDAC && PCI
Doug Thompsonddcc3052007-07-26 10:41:16 -0700248 depends on PPC_PASEMI
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700249 help
250 Support for error detection and correction on PA Semi
251 PWRficient.
252
Benjamin Herrenschmidt48764e42008-02-07 00:14:53 -0800253config EDAC_CELL
254 tristate "Cell Broadband Engine memory controller"
Benjamin Krilldef434c2008-11-27 16:15:44 +0100255 depends on EDAC_MM_EDAC && PPC_CELL_COMMON
Benjamin Herrenschmidt48764e42008-02-07 00:14:53 -0800256 help
257 Support for error detection and correction on the
258 Cell Broadband Engine internal memory controller
259 on platform without a hypervisor
Egor Martovetsky7d8536f2007-07-19 01:50:24 -0700260
Grant Ericksondba7a772009-04-02 16:58:45 -0700261config EDAC_PPC4XX
262 tristate "PPC4xx IBM DDR2 Memory Controller"
263 depends on EDAC_MM_EDAC && 4xx
264 help
265 This enables support for EDAC on the ECC memory used
266 with the IBM DDR2 memory controller found in various
267 PowerPC 4xx embedded processors such as the 405EX[r],
268 440SP, 440SPe, 460EX, 460GT and 460SX.
269
Harry Ciaoe8765582009-04-02 16:58:51 -0700270config EDAC_AMD8131
271 tristate "AMD8131 HyperTransport PCI-X Tunnel"
Harry Ciao715fe7a2009-05-28 14:34:43 -0700272 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
Harry Ciaoe8765582009-04-02 16:58:51 -0700273 help
274 Support for error detection and correction on the
275 AMD8131 HyperTransport PCI-X Tunnel chip.
Harry Ciao715fe7a2009-05-28 14:34:43 -0700276 Note, add more Kconfig dependency if it's adopted
277 on some machine other than Maple.
Harry Ciaoe8765582009-04-02 16:58:51 -0700278
Harry Ciao58b4ce62009-04-02 16:58:51 -0700279config EDAC_AMD8111
280 tristate "AMD8111 HyperTransport I/O Hub"
Harry Ciao715fe7a2009-05-28 14:34:43 -0700281 depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
Harry Ciao58b4ce62009-04-02 16:58:51 -0700282 help
283 Support for error detection and correction on the
284 AMD8111 HyperTransport I/O Hub chip.
Harry Ciao715fe7a2009-05-28 14:34:43 -0700285 Note, add more Kconfig dependency if it's adopted
286 on some machine other than Maple.
Harry Ciao58b4ce62009-04-02 16:58:51 -0700287
Harry Ciao2a9036a2009-06-17 16:27:58 -0700288config EDAC_CPC925
289 tristate "IBM CPC925 Memory Controller (PPC970FX)"
290 depends on EDAC_MM_EDAC && PPC64
291 help
292 Support for error detection and correction on the
293 IBM CPC925 Bridge and Memory Controller, which is
294 a companion chip to the PowerPC 970 family of
295 processors.
296
Chris Metcalf5c770752011-03-01 13:01:49 -0500297config EDAC_TILE
298 tristate "Tilera Memory Controller"
299 depends on EDAC_MM_EDAC && TILE
300 default y
301 help
302 Support for error detection and correction on the
303 Tilera memory controller.
304
Rob Herringa1b01ed2012-06-13 12:01:55 -0500305config EDAC_HIGHBANK_MC
306 tristate "Highbank Memory Controller"
307 depends on EDAC_MM_EDAC && ARCH_HIGHBANK
308 help
309 Support for error detection and correction on the
310 Calxeda Highbank memory controller.
311
Rob Herring69154d02012-06-11 21:32:14 -0500312config EDAC_HIGHBANK_L2
313 tristate "Highbank L2 Cache"
314 depends on EDAC_MM_EDAC && ARCH_HIGHBANK
315 help
316 Support for error detection and correction on the
317 Calxeda Highbank memory controller.
318
Jan Engelhardt751cb5e2007-07-15 23:39:27 -0700319endif # EDAC