blob: 0fc33a00c8277a287935ba93d579c8ef91f51f6f [file] [log] [blame]
Alan Kwongbb27c092016-07-20 16:41:25 -04001/*
2 * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#define pr_fmt(fmt) "sde-wb:[%s] " fmt, __func__
16
17#include <linux/jiffies.h>
18#include <linux/debugfs.h>
19
20#include "sde_encoder_phys.h"
21#include "sde_formats.h"
22#include "sde_hw_top.h"
23#include "sde_hw_interrupts.h"
24#include "sde_wb.h"
25
26/* wait for at most 2 vsync for lowest refresh rate (24hz) */
27#define WAIT_TIMEOUT_MSEC 84
28
29#define to_sde_encoder_phys_wb(x) \
30 container_of(x, struct sde_encoder_phys_wb, base)
31
32#define DEV(phy_enc) (phy_enc->parent->dev)
33
34/**
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -040035 * sde_encoder_phys_wb_is_master - report wb always as master encoder
36 */
37static bool sde_encoder_phys_wb_is_master(struct sde_encoder_phys *phys_enc)
38{
39 return true;
40}
41
42/**
Alan Kwongbb27c092016-07-20 16:41:25 -040043 * sde_encoder_phys_wb_get_intr_type - get interrupt type based on block mode
44 * @hw_wb: Pointer to h/w writeback driver
45 */
46static enum sde_intr_type sde_encoder_phys_wb_get_intr_type(
47 struct sde_hw_wb *hw_wb)
48{
49 return (hw_wb->caps->features & BIT(SDE_WB_BLOCK_MODE)) ?
50 SDE_IRQ_TYPE_WB_ROT_COMP : SDE_IRQ_TYPE_WB_WFD_COMP;
51}
52
53/**
Alan Kwong5d324e42016-07-28 22:56:18 -040054 * sde_encoder_phys_wb_set_ot_limit - set OT limit for writeback interface
55 * @phys_enc: Pointer to physical encoder
56 */
57static void sde_encoder_phys_wb_set_ot_limit(
58 struct sde_encoder_phys *phys_enc)
59{
60 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
61 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
62 struct sde_vbif_set_ot_params ot_params;
63
64 memset(&ot_params, 0, sizeof(ot_params));
65 ot_params.xin_id = hw_wb->caps->xin_id;
66 ot_params.num = hw_wb->idx - WB_0;
67 ot_params.width = wb_enc->wb_roi.w;
68 ot_params.height = wb_enc->wb_roi.h;
69 ot_params.is_wfd = true;
70 ot_params.frame_rate = phys_enc->cached_mode.vrefresh;
71 ot_params.vbif_idx = hw_wb->caps->vbif_idx;
72 ot_params.clk_ctrl = hw_wb->caps->clk_ctrl;
73 ot_params.rd = false;
74
75 sde_vbif_set_ot_limit(phys_enc->sde_kms, &ot_params);
76}
77
78/**
Alan Kwongbb27c092016-07-20 16:41:25 -040079 * sde_encoder_phys_wb_set_traffic_shaper - set traffic shaper for writeback
80 * @phys_enc: Pointer to physical encoder
81 */
82static void sde_encoder_phys_wb_set_traffic_shaper(
83 struct sde_encoder_phys *phys_enc)
84{
85 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
86 struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg;
87
88 /* traffic shaper is only enabled for rotator */
89 wb_cfg->ts_cfg.en = false;
90}
91
92/**
93 * sde_encoder_phys_setup_cdm - setup chroma down block
94 * @phys_enc: Pointer to physical encoder
95 * @fb: Pointer to output framebuffer
96 * @format: Output format
97 */
98void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc,
99 struct drm_framebuffer *fb, const struct sde_format *format,
100 struct sde_rect *wb_roi)
101{
102 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
103 struct sde_hw_cdm_cfg *cdm_cfg = &phys_enc->cdm_cfg;
104 int ret;
105
106 if (!SDE_FORMAT_IS_YUV(format)) {
107 SDE_DEBUG("[cdm_disable fmt:%x]\n",
108 format->base.pixel_format);
109
110 if (hw_cdm && hw_cdm->ops.disable)
111 hw_cdm->ops.disable(hw_cdm);
112
113 return;
114 }
115
116 memset(cdm_cfg, 0, sizeof(struct sde_hw_cdm_cfg));
117
118 cdm_cfg->output_width = wb_roi->w;
119 cdm_cfg->output_height = wb_roi->h;
120 cdm_cfg->output_fmt = format;
121 cdm_cfg->output_type = CDM_CDWN_OUTPUT_WB;
122 cdm_cfg->output_bit_depth = CDM_CDWN_OUTPUT_8BIT;
123
124 /* enable 10 bit logic */
125 switch (cdm_cfg->output_fmt->chroma_sample) {
126 case SDE_CHROMA_RGB:
127 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
128 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
129 break;
130 case SDE_CHROMA_H2V1:
131 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
132 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
133 break;
134 case SDE_CHROMA_420:
135 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
136 cdm_cfg->v_cdwn_type = CDM_CDWN_OFFSITE;
137 break;
138 case SDE_CHROMA_H1V2:
139 default:
140 SDE_ERROR("unsupported chroma sampling type\n");
141 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
142 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
143 break;
144 }
145
146 SDE_DEBUG("[cdm_enable:%d,%d,%X,%d,%d,%d,%d]\n",
147 cdm_cfg->output_width,
148 cdm_cfg->output_height,
149 cdm_cfg->output_fmt->base.pixel_format,
150 cdm_cfg->output_type,
151 cdm_cfg->output_bit_depth,
152 cdm_cfg->h_cdwn_type,
153 cdm_cfg->v_cdwn_type);
154
155 if (hw_cdm && hw_cdm->ops.setup_cdwn) {
156 ret = hw_cdm->ops.setup_cdwn(hw_cdm, cdm_cfg);
157 if (ret < 0) {
158 SDE_ERROR("failed to setup CDM %d\n", ret);
159 return;
160 }
161 }
162
163 if (hw_cdm && hw_cdm->ops.enable) {
164 ret = hw_cdm->ops.enable(hw_cdm, cdm_cfg);
165 if (ret < 0) {
166 SDE_ERROR("failed to enable CDM %d\n", ret);
167 return;
168 }
169 }
170}
171
172/**
173 * sde_encoder_phys_wb_setup_fb - setup output framebuffer
174 * @phys_enc: Pointer to physical encoder
175 * @fb: Pointer to output framebuffer
176 * @wb_roi: Pointer to output region of interest
177 */
178static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc,
179 struct drm_framebuffer *fb, struct sde_rect *wb_roi)
180{
181 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
Clarence Ip03521982016-08-26 10:49:47 -0400182 struct sde_hw_wb *hw_wb;
183 struct sde_hw_wb_cfg *wb_cfg;
Alan Kwongbb27c092016-07-20 16:41:25 -0400184 const struct msm_format *format;
185 int ret, mmu_id;
186
Clarence Ip03521982016-08-26 10:49:47 -0400187 if (!phys_enc) {
188 SDE_ERROR("invalid encoder\n");
189 return;
190 }
191
192 hw_wb = wb_enc->hw_wb;
193 wb_cfg = &wb_enc->wb_cfg;
Alan Kwongbb27c092016-07-20 16:41:25 -0400194 memset(wb_cfg, 0, sizeof(struct sde_hw_wb_cfg));
195
Clarence Ip03521982016-08-26 10:49:47 -0400196 wb_cfg->intf_mode = phys_enc->intf_mode;
Alan Kwongbb27c092016-07-20 16:41:25 -0400197 wb_cfg->is_secure = (fb->flags & DRM_MODE_FB_SECURE) ? true : false;
198 mmu_id = (wb_cfg->is_secure) ?
199 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] :
200 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE];
201
202 SDE_DEBUG("[fb_secure:%d]\n", wb_cfg->is_secure);
203
204 format = msm_framebuffer_format(fb);
Dhaval Patelccbcb3d2016-08-22 11:58:14 -0700205 if (!format) {
206 SDE_DEBUG("invalid format for fb\n");
207 return;
208 }
209
Alan Kwongbb27c092016-07-20 16:41:25 -0400210 wb_cfg->dest.format = sde_get_sde_format_ext(
211 format->pixel_format,
212 fb->modifier,
213 drm_format_num_planes(fb->pixel_format));
214 if (!wb_cfg->dest.format) {
215 /* this error should be detected during atomic_check */
216 SDE_ERROR("failed to get format %x\n", format->pixel_format);
217 return;
218 }
219
220 ret = sde_format_populate_layout_with_roi(mmu_id, fb, wb_roi,
221 &wb_cfg->dest);
222 if (ret) {
223 /* this error should be detected during atomic_check */
224 SDE_DEBUG("failed to populate layout %d\n", ret);
225 return;
226 }
227
228 if ((wb_cfg->dest.format->fetch_planes == SDE_PLANE_PLANAR) &&
229 (wb_cfg->dest.format->element[0] == C1_B_Cb))
230 swap(wb_cfg->dest.plane_addr[1], wb_cfg->dest.plane_addr[2]);
231
232 SDE_DEBUG("[fb_offset:%8.8x,%8.8x,%8.8x,%8.8x]\n",
233 wb_cfg->dest.plane_addr[0],
234 wb_cfg->dest.plane_addr[1],
235 wb_cfg->dest.plane_addr[2],
236 wb_cfg->dest.plane_addr[3]);
237 SDE_DEBUG("[fb_stride:%8.8x,%8.8x,%8.8x,%8.8x]\n",
238 wb_cfg->dest.plane_pitch[0],
239 wb_cfg->dest.plane_pitch[1],
240 wb_cfg->dest.plane_pitch[2],
241 wb_cfg->dest.plane_pitch[3]);
242
243 if (hw_wb->ops.setup_outformat)
244 hw_wb->ops.setup_outformat(hw_wb, wb_cfg);
245
246 if (hw_wb->ops.setup_outaddress)
247 hw_wb->ops.setup_outaddress(hw_wb, wb_cfg);
248}
249
250/**
251 * sde_encoder_phys_wb_setup_cdp - setup chroma down prefetch block
252 * @phys_enc: Pointer to physical encoder
253 */
254static void sde_encoder_phys_wb_setup_cdp(struct sde_encoder_phys *phys_enc)
255{
256 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
257 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
258 struct sde_hw_intf_cfg *intf_cfg = &wb_enc->intf_cfg;
259
260 memset(intf_cfg, 0, sizeof(struct sde_hw_intf_cfg));
261
262 intf_cfg->intf = SDE_NONE;
263 intf_cfg->wb = hw_wb->idx;
264
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400265 if (phys_enc->hw_ctl && phys_enc->hw_ctl->ops.setup_intf_cfg)
Alan Kwongbb27c092016-07-20 16:41:25 -0400266 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl,
267 intf_cfg);
268}
269
270/**
271 * sde_encoder_phys_wb_atomic_check - verify and fixup given atomic states
272 * @phys_enc: Pointer to physical encoder
273 * @crtc_state: Pointer to CRTC atomic state
274 * @conn_state: Pointer to connector atomic state
275 */
276static int sde_encoder_phys_wb_atomic_check(
277 struct sde_encoder_phys *phys_enc,
278 struct drm_crtc_state *crtc_state,
279 struct drm_connector_state *conn_state)
280{
281 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
282 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
283 const struct sde_wb_cfg *wb_cfg = hw_wb->caps;
284 struct drm_framebuffer *fb;
285 const struct sde_format *fmt;
286 struct sde_rect wb_roi;
287 const struct drm_display_mode *mode = &crtc_state->mode;
288 int rc;
289
290 SDE_DEBUG("[atomic_check:%d,%d,\"%s\",%d,%d]\n",
291 hw_wb->idx - WB_0, mode->base.id, mode->name,
292 mode->hdisplay, mode->vdisplay);
293
294 memset(&wb_roi, 0, sizeof(struct sde_rect));
295
296 rc = sde_wb_connector_state_get_output_roi(conn_state, &wb_roi);
297 if (rc) {
298 SDE_ERROR("failed to get roi %d\n", rc);
299 return rc;
300 }
301
302 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi.x, wb_roi.y,
303 wb_roi.w, wb_roi.h);
304
305 fb = sde_wb_connector_state_get_output_fb(conn_state);
306 if (!fb) {
307 SDE_ERROR("no output framebuffer\n");
308 return -EINVAL;
309 }
310
311 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
312 fb->width, fb->height);
313
314 fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
315 drm_format_num_planes(fb->pixel_format));
316 if (!fmt) {
317 SDE_ERROR("unsupported output pixel format:%d\n",
318 fb->pixel_format);
319 return -EINVAL;
320 }
321
322 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
323 fb->modifier[0]);
324
325 if (SDE_FORMAT_IS_YUV(fmt) &&
326 !(wb_cfg->features & BIT(SDE_WB_YUV_CONFIG))) {
327 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
328 return -EINVAL;
329 }
330
331 if (SDE_FORMAT_IS_UBWC(fmt) &&
332 !(wb_cfg->features & BIT(SDE_WB_UBWC_1_0))) {
333 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
334 return -EINVAL;
335 }
336
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400337 phys_enc->needs_cdm = SDE_FORMAT_IS_YUV(fmt);
338
Alan Kwongbb27c092016-07-20 16:41:25 -0400339 if (wb_roi.w && wb_roi.h) {
340 if (wb_roi.w != mode->hdisplay) {
341 SDE_ERROR("invalid roi w=%d, mode w=%d\n", wb_roi.w,
342 mode->hdisplay);
343 return -EINVAL;
344 } else if (wb_roi.h != mode->vdisplay) {
345 SDE_ERROR("invalid roi h=%d, mode h=%d\n", wb_roi.h,
346 mode->vdisplay);
347 return -EINVAL;
348 } else if (wb_roi.x + wb_roi.w > fb->width) {
349 SDE_ERROR("invalid roi x=%d, w=%d, fb w=%d\n",
350 wb_roi.x, wb_roi.w, fb->width);
351 return -EINVAL;
352 } else if (wb_roi.y + wb_roi.h > fb->height) {
353 SDE_ERROR("invalid roi y=%d, h=%d, fb h=%d\n",
354 wb_roi.y, wb_roi.h, fb->height);
355 return -EINVAL;
356 } else if (wb_roi.w > wb_cfg->sblk->maxlinewidth) {
357 SDE_ERROR("invalid roi w=%d, maxlinewidth=%u\n",
358 wb_roi.w, wb_cfg->sblk->maxlinewidth);
359 return -EINVAL;
360 }
361 } else {
362 if (wb_roi.x || wb_roi.y) {
363 SDE_ERROR("invalid roi x=%d, y=%d\n",
364 wb_roi.x, wb_roi.y);
365 return -EINVAL;
366 } else if (fb->width != mode->hdisplay) {
367 SDE_ERROR("invalid fb w=%d, mode w=%d\n", fb->width,
368 mode->hdisplay);
369 return -EINVAL;
370 } else if (fb->height != mode->vdisplay) {
371 SDE_ERROR("invalid fb h=%d, mode h=%d\n", fb->height,
372 mode->vdisplay);
373 return -EINVAL;
374 } else if (fb->width > wb_cfg->sblk->maxlinewidth) {
375 SDE_ERROR("invalid fb w=%d, maxlinewidth=%u\n",
376 fb->width, wb_cfg->sblk->maxlinewidth);
377 return -EINVAL;
378 }
379 }
380
381 return 0;
382}
383
384/**
385 * sde_encoder_phys_wb_flush - flush hardware update
386 * @phys_enc: Pointer to physical encoder
387 */
388static void sde_encoder_phys_wb_flush(struct sde_encoder_phys *phys_enc)
389{
390 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
391 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
392 struct sde_hw_ctl *hw_ctl = phys_enc->hw_ctl;
393 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
394 u32 flush_mask = 0;
395
396 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
397
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400398 if (!hw_ctl) {
399 SDE_DEBUG("[wb:%d] no ctl assigned\n", hw_wb->idx - WB_0);
400 return;
401 }
402
Alan Kwongbb27c092016-07-20 16:41:25 -0400403 if (hw_ctl->ops.get_bitmask_wb)
404 hw_ctl->ops.get_bitmask_wb(hw_ctl, &flush_mask, hw_wb->idx);
405
406 if (hw_ctl->ops.get_bitmask_cdm && hw_cdm)
407 hw_ctl->ops.get_bitmask_cdm(hw_ctl, &flush_mask, hw_cdm->idx);
408
409 if (hw_ctl->ops.update_pending_flush)
410 hw_ctl->ops.update_pending_flush(hw_ctl, flush_mask);
411
412 SDE_DEBUG("Flushing CTL_ID %d, flush_mask %x, WB %d\n",
413 hw_ctl->idx - CTL_0, flush_mask, hw_wb->idx - WB_0);
414}
415
416/**
417 * sde_encoder_phys_wb_setup - setup writeback encoder
418 * @phys_enc: Pointer to physical encoder
419 */
420static void sde_encoder_phys_wb_setup(
421 struct sde_encoder_phys *phys_enc)
422{
423 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
424 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
425 struct drm_display_mode mode = phys_enc->cached_mode;
426 struct drm_framebuffer *fb;
427 struct sde_rect *wb_roi = &wb_enc->wb_roi;
428
429 SDE_DEBUG("[mode_set:%d,%d,\"%s\",%d,%d]\n",
430 hw_wb->idx - WB_0, mode.base.id, mode.name,
431 mode.hdisplay, mode.vdisplay);
432
433 memset(wb_roi, 0, sizeof(struct sde_rect));
434
435 fb = sde_wb_get_output_fb(wb_enc->wb_dev);
436 if (!fb) {
437 SDE_DEBUG("no output framebuffer\n");
438 return;
439 }
440
441 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
442 fb->width, fb->height);
443
444 sde_wb_get_output_roi(wb_enc->wb_dev, wb_roi);
445 if (wb_roi->w == 0 || wb_roi->h == 0) {
446 wb_roi->x = 0;
447 wb_roi->y = 0;
448 wb_roi->w = fb->width;
449 wb_roi->h = fb->height;
450 }
451
452 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi->x, wb_roi->y,
453 wb_roi->w, wb_roi->h);
454
455 wb_enc->wb_fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
456 drm_format_num_planes(fb->pixel_format));
457 if (!wb_enc->wb_fmt) {
458 SDE_ERROR("unsupported output pixel format: %d\n",
459 fb->pixel_format);
460 return;
461 }
462
463 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
464 fb->modifier[0]);
465
Alan Kwong5d324e42016-07-28 22:56:18 -0400466 sde_encoder_phys_wb_set_ot_limit(phys_enc);
467
Alan Kwongbb27c092016-07-20 16:41:25 -0400468 sde_encoder_phys_wb_set_traffic_shaper(phys_enc);
469
470 sde_encoder_phys_setup_cdm(phys_enc, fb, wb_enc->wb_fmt, wb_roi);
471
472 sde_encoder_phys_wb_setup_fb(phys_enc, fb, wb_roi);
473
474 sde_encoder_phys_wb_setup_cdp(phys_enc);
475}
476
477/**
478 * sde_encoder_phys_wb_unregister_irq - unregister writeback interrupt handler
479 * @phys_enc: Pointer to physical encoder
480 */
481static int sde_encoder_phys_wb_unregister_irq(
482 struct sde_encoder_phys *phys_enc)
483{
484 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
485 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
486
487 if (wb_enc->bypass_irqreg)
488 return 0;
489
490 sde_disable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
491 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx, NULL);
492
493 SDE_DEBUG("un-register IRQ for wb %d, irq_idx=%d\n",
494 hw_wb->idx - WB_0,
495 wb_enc->irq_idx);
496
497 return 0;
498}
499
500/**
501 * sde_encoder_phys_wb_done_irq - writeback interrupt handler
502 * @arg: Pointer to writeback encoder
503 * @irq_idx: interrupt index
504 */
505static void sde_encoder_phys_wb_done_irq(void *arg, int irq_idx)
506{
507 struct sde_encoder_phys_wb *wb_enc = arg;
508 struct sde_encoder_phys *phys_enc = &wb_enc->base;
509 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
510
511 SDE_DEBUG("[wb:%d,%u]\n", hw_wb->idx - WB_0,
512 wb_enc->frame_count);
513
514 complete_all(&wb_enc->wbdone_complete);
515
516 phys_enc->parent_ops.handle_vblank_virt(phys_enc->parent);
517}
518
519/**
520 * sde_encoder_phys_wb_register_irq - register writeback interrupt handler
521 * @phys_enc: Pointer to physical encoder
522 */
523static int sde_encoder_phys_wb_register_irq(struct sde_encoder_phys *phys_enc)
524{
525 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
526 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
527 struct sde_irq_callback irq_cb;
528 enum sde_intr_type intr_type;
529 int ret = 0;
530
531 if (wb_enc->bypass_irqreg)
532 return 0;
533
534 intr_type = sde_encoder_phys_wb_get_intr_type(hw_wb);
535 wb_enc->irq_idx = sde_irq_idx_lookup(phys_enc->sde_kms,
536 intr_type, hw_wb->idx);
537 if (wb_enc->irq_idx < 0) {
538 SDE_ERROR(
539 "failed to lookup IRQ index for WB_DONE with wb=%d\n",
540 hw_wb->idx - WB_0);
541 return -EINVAL;
542 }
543
544 irq_cb.func = sde_encoder_phys_wb_done_irq;
545 irq_cb.arg = wb_enc;
546 ret = sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
547 &irq_cb);
548 if (ret) {
549 SDE_ERROR("failed to register IRQ callback WB_DONE\n");
550 return ret;
551 }
552
553 ret = sde_enable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
554 if (ret) {
555 SDE_ERROR(
556 "failed to enable IRQ for WB_DONE, wb %d, irq_idx=%d\n",
557 hw_wb->idx - WB_0,
558 wb_enc->irq_idx);
559 wb_enc->irq_idx = -EINVAL;
560
561 /* Unregister callback on IRQ enable failure */
562 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
563 NULL);
564 return ret;
565 }
566
567 SDE_DEBUG("registered IRQ for wb %d, irq_idx=%d\n",
568 hw_wb->idx - WB_0,
569 wb_enc->irq_idx);
570
571 return ret;
572}
573
574/**
575 * sde_encoder_phys_wb_mode_set - set display mode
576 * @phys_enc: Pointer to physical encoder
577 * @mode: Pointer to requested display mode
578 * @adj_mode: Pointer to adjusted display mode
579 */
580static void sde_encoder_phys_wb_mode_set(
581 struct sde_encoder_phys *phys_enc,
582 struct drm_display_mode *mode,
583 struct drm_display_mode *adj_mode)
584{
585 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400586 struct sde_rm *rm = &phys_enc->sde_kms->rm;
Alan Kwongbb27c092016-07-20 16:41:25 -0400587 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400588 struct sde_rm_hw_iter iter;
589 int i, instance;
Alan Kwongbb27c092016-07-20 16:41:25 -0400590
591 phys_enc->cached_mode = *adj_mode;
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400592 instance = phys_enc->split_role == ENC_ROLE_SLAVE ? 1 : 0;
Alan Kwongbb27c092016-07-20 16:41:25 -0400593
594 SDE_DEBUG("[mode_set_cache:%d,%d,\"%s\",%d,%d]\n",
595 hw_wb->idx - WB_0, mode->base.id,
596 mode->name, mode->hdisplay, mode->vdisplay);
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400597
598 /* Retrieve previously allocated HW Resources. CTL shouldn't fail */
599 sde_rm_init_hw_iter(&iter, phys_enc->parent->base.id, SDE_HW_BLK_CTL);
600 for (i = 0; i <= instance; i++) {
601 sde_rm_get_hw(rm, &iter);
602 if (i == instance)
603 phys_enc->hw_ctl = (struct sde_hw_ctl *) iter.hw;
604 }
605
606 if (IS_ERR_OR_NULL(phys_enc->hw_ctl)) {
607 SDE_ERROR("failed init ctl: %ld\n", PTR_ERR(phys_enc->hw_ctl));
608 phys_enc->hw_ctl = NULL;
609 return;
610 }
611
612 /* CDM is optional */
613 sde_rm_init_hw_iter(&iter, phys_enc->parent->base.id, SDE_HW_BLK_CDM);
614 for (i = 0; i <= instance; i++) {
615 sde_rm_get_hw(rm, &iter);
616 if (i == instance)
617 phys_enc->hw_cdm = (struct sde_hw_cdm *) iter.hw;
618 }
619
620 if (IS_ERR_OR_NULL(phys_enc->hw_cdm)) {
621 if (phys_enc->needs_cdm) {
622 SDE_ERROR("CDM required but not allocated: %ld\n",
623 PTR_ERR(phys_enc->hw_cdm));
624 phys_enc->hw_ctl = NULL;
625 }
626 phys_enc->hw_cdm = NULL;
627 }
Alan Kwongbb27c092016-07-20 16:41:25 -0400628}
629
630/**
631 * sde_encoder_phys_wb_control_vblank_irq - Control vblank interrupt
632 * @phys_enc: Pointer to physical encoder
633 * @enable: Enable interrupt
634 */
635static int sde_encoder_phys_wb_control_vblank_irq(
636 struct sde_encoder_phys *phys_enc,
637 bool enable)
638{
639 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
640 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
641 int ret = 0;
642
643 SDE_DEBUG("[wb:%d,%d]\n", hw_wb->idx - WB_0, enable);
644
645 if (enable)
646 ret = sde_encoder_phys_wb_register_irq(phys_enc);
647 else
648 ret = sde_encoder_phys_wb_unregister_irq(phys_enc);
649
650 if (ret)
651 SDE_ERROR("control vblank irq error %d, enable %d\n", ret,
652 enable);
653
654 return ret;
655}
656
657/**
658 * sde_encoder_phys_wb_wait_for_commit_done - wait until request is committed
659 * @phys_enc: Pointer to physical encoder
660 */
661static int sde_encoder_phys_wb_wait_for_commit_done(
662 struct sde_encoder_phys *phys_enc)
663{
664 unsigned long ret;
665 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
666 u32 irq_status;
667 u64 wb_time = 0;
668 int rc = 0;
669
670 /* Return EWOULDBLOCK since we know the wait isn't necessary */
671 if (WARN_ON(phys_enc->enable_state != SDE_ENC_ENABLED))
672 return -EWOULDBLOCK;
673
674 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
675
676 ret = wait_for_completion_timeout(&wb_enc->wbdone_complete,
677 msecs_to_jiffies(wb_enc->wbdone_timeout));
678
679 if (!ret) {
680 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
681
682 irq_status = sde_read_irq(phys_enc->sde_kms,
683 wb_enc->irq_idx, true);
684 if (irq_status) {
685 SDE_DEBUG("wb:%d done but irq not triggered\n",
686 wb_enc->wb_dev->wb_idx - WB_0);
687 sde_encoder_phys_wb_done_irq(wb_enc, wb_enc->irq_idx);
688 } else {
689 SDE_ERROR("wb:%d kickoff timed out\n",
690 wb_enc->wb_dev->wb_idx - WB_0);
691 rc = -ETIMEDOUT;
692 }
693 }
694
695 sde_encoder_phys_wb_unregister_irq(phys_enc);
696
697 if (!rc)
698 wb_enc->end_time = ktime_get();
699
700 /* once operation is done, disable traffic shaper */
701 if (wb_enc->wb_cfg.ts_cfg.en && wb_enc->hw_wb &&
702 wb_enc->hw_wb->ops.setup_trafficshaper) {
703 wb_enc->wb_cfg.ts_cfg.en = false;
704 wb_enc->hw_wb->ops.setup_trafficshaper(
705 wb_enc->hw_wb, &wb_enc->wb_cfg);
706 }
707
708 /* remove vote for iommu/clk/bus */
709 wb_enc->frame_count++;
710
711 if (!rc) {
712 wb_time = (u64)ktime_to_us(wb_enc->end_time) -
713 (u64)ktime_to_us(wb_enc->start_time);
714 SDE_DEBUG("wb:%d took %llu us\n",
715 wb_enc->wb_dev->wb_idx - WB_0, wb_time);
716 }
717
718 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, wb_time);
719
720 return rc;
721}
722
723/**
724 * sde_encoder_phys_wb_prepare_for_kickoff - pre-kickoff processing
725 * @phys_enc: Pointer to physical encoder
726 * @need_to_wait: Wait for next submission
727 */
728static void sde_encoder_phys_wb_prepare_for_kickoff(
729 struct sde_encoder_phys *phys_enc,
730 bool *need_to_wait)
731{
732 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
733 int ret;
734
735 SDE_DEBUG("[wb:%d,%u]\n", wb_enc->hw_wb->idx - WB_0,
736 wb_enc->kickoff_count);
737
738 *need_to_wait = false;
739
740 reinit_completion(&wb_enc->wbdone_complete);
741
742 ret = sde_encoder_phys_wb_register_irq(phys_enc);
743 if (ret) {
744 SDE_ERROR("failed to register irq %d\n", ret);
745 return;
746 }
747
748 wb_enc->kickoff_count++;
749
750 /* set OT limit & enable traffic shaper */
751 sde_encoder_phys_wb_setup(phys_enc);
752
753 sde_encoder_phys_wb_flush(phys_enc);
754
755 /* vote for iommu/clk/bus */
756 wb_enc->start_time = ktime_get();
757
758 MSM_EVT(DEV(phys_enc), *need_to_wait, wb_enc->kickoff_count);
759}
760
761/**
762 * sde_encoder_phys_wb_handle_post_kickoff - post-kickoff processing
763 * @phys_enc: Pointer to physical encoder
764 */
765static void sde_encoder_phys_wb_handle_post_kickoff(
766 struct sde_encoder_phys *phys_enc)
767{
768 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
769
770 SDE_DEBUG("[wb:%d]\n", wb_enc->hw_wb->idx - WB_0);
771
772 MSM_EVT(DEV(phys_enc), 0, 0);
773}
774
775/**
776 * sde_encoder_phys_wb_enable - enable writeback encoder
777 * @phys_enc: Pointer to physical encoder
778 */
779static void sde_encoder_phys_wb_enable(struct sde_encoder_phys *phys_enc)
780{
781 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
782 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
783 struct drm_connector *connector;
784
785 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
786
787 /* find associated writeback connector */
788 drm_for_each_connector(connector, phys_enc->parent->dev) {
789 if (connector->encoder == phys_enc->parent)
790 break;
791 }
792 if (!connector || connector->encoder != phys_enc->parent) {
793 SDE_ERROR("failed to find writeback connector\n");
794 return;
795 }
796 wb_enc->wb_dev = sde_wb_connector_get_wb(connector);
797
798 phys_enc->enable_state = SDE_ENC_ENABLED;
799}
800
801/**
802 * sde_encoder_phys_wb_disable - disable writeback encoder
803 * @phys_enc: Pointer to physical encoder
804 */
805static void sde_encoder_phys_wb_disable(struct sde_encoder_phys *phys_enc)
806{
807 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
808 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
809
810 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
811
812 if (phys_enc->enable_state == SDE_ENC_DISABLED) {
813 SDE_ERROR("encoder is already disabled\n");
814 return;
815 }
816
817 if (wb_enc->frame_count != wb_enc->kickoff_count) {
818 SDE_DEBUG("[wait_for_done: wb:%d, frame:%u, kickoff:%u]\n",
819 hw_wb->idx - WB_0, wb_enc->frame_count,
820 wb_enc->kickoff_count);
821 sde_encoder_phys_wb_wait_for_commit_done(phys_enc);
822 }
823
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400824 if (phys_enc->hw_cdm && phys_enc->hw_cdm->ops.disable) {
825 SDE_DEBUG_DRIVER("[cdm_disable]\n");
826 phys_enc->hw_cdm->ops.disable(phys_enc->hw_cdm);
827 }
828
Alan Kwongbb27c092016-07-20 16:41:25 -0400829 phys_enc->enable_state = SDE_ENC_DISABLED;
830}
831
832/**
833 * sde_encoder_phys_wb_get_hw_resources - get hardware resources
834 * @phys_enc: Pointer to physical encoder
835 * @hw_res: Pointer to encoder resources
836 */
837static void sde_encoder_phys_wb_get_hw_resources(
838 struct sde_encoder_phys *phys_enc,
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400839 struct sde_encoder_hw_resources *hw_res,
840 struct drm_connector_state *conn_state)
Alan Kwongbb27c092016-07-20 16:41:25 -0400841{
842 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
Clarence Ip03521982016-08-26 10:49:47 -0400843 struct sde_hw_wb *hw_wb;
Alan Kwongbb27c092016-07-20 16:41:25 -0400844
Clarence Ip03521982016-08-26 10:49:47 -0400845 if (!phys_enc) {
846 SDE_ERROR("invalid encoder\n");
847 return;
848 }
849 hw_wb = wb_enc->hw_wb;
Alan Kwongbb27c092016-07-20 16:41:25 -0400850 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
Clarence Ip03521982016-08-26 10:49:47 -0400851 hw_res->wbs[hw_wb->idx - WB_0] = phys_enc->intf_mode;
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400852 hw_res->needs_cdm = phys_enc->needs_cdm;
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400853}
Lloyd Atkinson11f34442016-08-11 11:19:52 -0400854
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400855/**
856 * sde_encoder_phys_wb_needs_ctl_start - Whether encoder needs ctl_start
857 * @phys_enc: Pointer to physical encoder
858 * @Return: Whether encoder needs ctl_start
859 */
860static bool sde_encoder_phys_wb_needs_ctl_start(
861 struct sde_encoder_phys *phys_enc)
862{
863 return true;
Alan Kwongbb27c092016-07-20 16:41:25 -0400864}
865
866#ifdef CONFIG_DEBUG_FS
867/**
868 * sde_encoder_phys_wb_init_debugfs - initialize writeback encoder debugfs
869 * @phys_enc: Pointer to physical encoder
870 * @sde_kms: Pointer to SDE KMS object
871 */
872static int sde_encoder_phys_wb_init_debugfs(
873 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
874{
875 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
876
877 if (!phys_enc || !kms || !wb_enc->hw_wb)
878 return -EINVAL;
879
880 snprintf(wb_enc->wb_name, ARRAY_SIZE(wb_enc->wb_name), "encoder_wb%d",
881 wb_enc->hw_wb->idx - WB_0);
882
883 wb_enc->debugfs_root =
884 debugfs_create_dir(wb_enc->wb_name,
885 sde_debugfs_get_root(kms));
886 if (!wb_enc->debugfs_root) {
887 SDE_ERROR("failed to create debugfs\n");
888 return -ENOMEM;
889 }
890
891 if (!debugfs_create_u32("wbdone_timeout", 0644,
892 wb_enc->debugfs_root, &wb_enc->wbdone_timeout)) {
893 SDE_ERROR("failed to create debugfs/wbdone_timeout\n");
894 return -ENOMEM;
895 }
896
897 if (!debugfs_create_u32("bypass_irqreg", 0644,
898 wb_enc->debugfs_root, &wb_enc->bypass_irqreg)) {
899 SDE_ERROR("failed to create debugfs/bypass_irqreg\n");
900 return -ENOMEM;
901 }
902
903 return 0;
904}
905
906/**
907 * sde_encoder_phys_wb_destroy_debugfs - destroy writeback encoder debugfs
908 * @phys_enc: Pointer to physical encoder
909 */
910static void sde_encoder_phys_wb_destroy_debugfs(
911 struct sde_encoder_phys *phys_enc)
912{
913 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
914
915 if (!phys_enc)
916 return;
917
918 debugfs_remove_recursive(wb_enc->debugfs_root);
919}
920#else
921static void sde_encoder_phys_wb_init_debugfs(
922 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
923{
924}
925static void sde_encoder_phys_wb_destroy_debugfs(
926 struct sde_encoder_phys *phys_enc)
927{
928}
929#endif
930
931/**
932 * sde_encoder_phys_wb_destroy - destroy writeback encoder
933 * @phys_enc: Pointer to physical encoder
934 */
935static void sde_encoder_phys_wb_destroy(struct sde_encoder_phys *phys_enc)
936{
937 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
938 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
939
940 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
941
942 if (!phys_enc)
943 return;
944
945 sde_encoder_phys_wb_destroy_debugfs(phys_enc);
946
Alan Kwongbb27c092016-07-20 16:41:25 -0400947 kfree(wb_enc);
948}
949
950/**
951 * sde_encoder_phys_wb_init_ops - initialize writeback operations
952 * @ops: Pointer to encoder operation table
953 */
954static void sde_encoder_phys_wb_init_ops(struct sde_encoder_phys_ops *ops)
955{
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400956 ops->is_master = sde_encoder_phys_wb_is_master;
Alan Kwongbb27c092016-07-20 16:41:25 -0400957 ops->mode_set = sde_encoder_phys_wb_mode_set;
958 ops->enable = sde_encoder_phys_wb_enable;
959 ops->disable = sde_encoder_phys_wb_disable;
960 ops->destroy = sde_encoder_phys_wb_destroy;
961 ops->atomic_check = sde_encoder_phys_wb_atomic_check;
962 ops->get_hw_resources = sde_encoder_phys_wb_get_hw_resources;
963 ops->control_vblank_irq = sde_encoder_phys_wb_control_vblank_irq;
964 ops->wait_for_commit_done = sde_encoder_phys_wb_wait_for_commit_done;
965 ops->prepare_for_kickoff = sde_encoder_phys_wb_prepare_for_kickoff;
966 ops->handle_post_kickoff = sde_encoder_phys_wb_handle_post_kickoff;
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400967 ops->needs_ctl_start = sde_encoder_phys_wb_needs_ctl_start;
Alan Kwongbb27c092016-07-20 16:41:25 -0400968}
969
970/**
971 * sde_encoder_phys_wb_init - initialize writeback encoder
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400972 * @init: Pointer to init info structure with initialization params
Alan Kwongbb27c092016-07-20 16:41:25 -0400973 */
974struct sde_encoder_phys *sde_encoder_phys_wb_init(
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400975 struct sde_enc_phys_init_params *p)
Alan Kwongbb27c092016-07-20 16:41:25 -0400976{
977 struct sde_encoder_phys *phys_enc;
978 struct sde_encoder_phys_wb *wb_enc;
979 struct sde_hw_mdp *hw_mdp;
980 int ret = 0;
981
982 SDE_DEBUG("\n");
983
984 wb_enc = kzalloc(sizeof(*wb_enc), GFP_KERNEL);
985 if (!wb_enc) {
986 ret = -ENOMEM;
987 goto fail_alloc;
988 }
989 wb_enc->irq_idx = -EINVAL;
990 wb_enc->wbdone_timeout = WAIT_TIMEOUT_MSEC;
991 init_completion(&wb_enc->wbdone_complete);
992
993 phys_enc = &wb_enc->base;
994
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400995 if (p->sde_kms->vbif[VBIF_NRT]) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400996 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400997 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400998 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400999 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -04001000 } else {
1001 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001002 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -04001003 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001004 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -04001005 }
1006
Lloyd Atkinson11f34442016-08-11 11:19:52 -04001007 hw_mdp = sde_rm_get_mdp(&p->sde_kms->rm);
Alan Kwongbb27c092016-07-20 16:41:25 -04001008 if (IS_ERR_OR_NULL(hw_mdp)) {
1009 ret = PTR_ERR(hw_mdp);
1010 SDE_ERROR("failed to init hw_top: %d\n", ret);
1011 goto fail_mdp_init;
1012 }
1013 phys_enc->hw_mdptop = hw_mdp;
1014
Lloyd Atkinson11f34442016-08-11 11:19:52 -04001015 /**
1016 * hw_wb resource permanently assigned to this encoder
1017 * Other resources allocated at atomic commit time by use case
1018 */
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001019 if (p->wb_idx != SDE_NONE) {
Lloyd Atkinson11f34442016-08-11 11:19:52 -04001020 struct sde_rm_hw_iter iter;
Alan Kwongbb27c092016-07-20 16:41:25 -04001021
Lloyd Atkinson11f34442016-08-11 11:19:52 -04001022 sde_rm_init_hw_iter(&iter, 0, SDE_HW_BLK_WB);
1023 while (sde_rm_get_hw(&p->sde_kms->rm, &iter)) {
1024 struct sde_hw_wb *hw_wb = (struct sde_hw_wb *)iter.hw;
1025
1026 if (hw_wb->idx == p->wb_idx) {
1027 wb_enc->hw_wb = hw_wb;
1028 break;
1029 }
1030 }
1031
1032 if (!wb_enc->hw_wb) {
1033 ret = -EINVAL;
1034 SDE_ERROR("failed to init hw_wb%d\n", p->wb_idx - WB_0);
Alan Kwongbb27c092016-07-20 16:41:25 -04001035 goto fail_wb_init;
1036 }
Alan Kwongbb27c092016-07-20 16:41:25 -04001037 } else {
1038 ret = -EINVAL;
1039 SDE_ERROR("invalid wb_idx\n");
1040 goto fail_wb_check;
1041 }
1042
Alan Kwongbb27c092016-07-20 16:41:25 -04001043 sde_encoder_phys_wb_init_ops(&phys_enc->ops);
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001044 phys_enc->parent = p->parent;
1045 phys_enc->parent_ops = p->parent_ops;
1046 phys_enc->sde_kms = p->sde_kms;
1047 phys_enc->split_role = p->split_role;
Clarence Ip03521982016-08-26 10:49:47 -04001048 phys_enc->intf_mode = INTF_MODE_WB_LINE;
Alan Kwongbb27c092016-07-20 16:41:25 -04001049 spin_lock_init(&phys_enc->spin_lock);
1050
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001051 ret = sde_encoder_phys_wb_init_debugfs(phys_enc, p->sde_kms);
Alan Kwongbb27c092016-07-20 16:41:25 -04001052 if (ret) {
1053 SDE_ERROR("failed to init debugfs %d\n", ret);
1054 goto fail_debugfs_init;
1055 }
1056
1057 SDE_DEBUG("Created sde_encoder_phys_wb for wb %d\n",
1058 wb_enc->hw_wb->idx - WB_0);
1059
1060 return phys_enc;
1061
1062fail_debugfs_init:
Alan Kwongbb27c092016-07-20 16:41:25 -04001063fail_wb_init:
1064fail_wb_check:
Alan Kwongbb27c092016-07-20 16:41:25 -04001065fail_mdp_init:
1066 kfree(wb_enc);
1067fail_alloc:
1068 return ERR_PTR(ret);
1069}
1070