blob: 1180d536d1eb6cf8c2d59b4d1432a0f65be85675 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Dave Jonesf4432c52008-10-20 13:31:45 -04002 * (C) 2001-2004 Dave Jones. <davej@redhat.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * (C) 2002 Padraig Brady. <padraig@antefacto.com>
4 *
5 * Licensed under the terms of the GNU GPL License version 2.
6 * Based upon datasheets & sample CPUs kindly provided by VIA.
7 *
8 * VIA have currently 3 different versions of Longhaul.
9 * Version 1 (Longhaul) uses the BCR2 MSR at 0x1147.
10 * It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0.
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +010011 * Version 2 of longhaul is backward compatible with v1, but adds
12 * LONGHAUL MSR for purpose of both frequency and voltage scaling.
13 * Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C).
Linus Torvalds1da177e2005-04-16 15:20:36 -070014 * Version 3 of longhaul got renamed to Powersaver and redesigned
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +010015 * to use only the POWERSAVER MSR at 0x110a.
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 * It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
17 * It's pretty much the same feature wise to longhaul v2, though
18 * there is provision for scaling FSB too, but this doesn't work
19 * too well in practice so we don't even try to use this.
20 *
21 * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
22 */
23
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/cpufreq.h>
Rafa³ Bilski179da8e2006-08-08 19:12:20 +020029#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/slab.h>
31#include <linux/string.h>
Rafał Bilski73e107d2007-05-28 21:56:19 +020032#include <linux/delay.h>
Dave Jonesac617bd2009-01-17 23:29:53 -050033#include <linux/timex.h>
34#include <linux/io.h>
35#include <linux/acpi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37#include <asm/msr.h>
Andi Kleenfa8031a2012-01-26 00:09:12 +010038#include <asm/cpu_device_id.h>
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +020039#include <acpi/processor.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
41#include "longhaul.h"
42
43#define PFX "longhaul: "
44
45#define TYPE_LONGHAUL_V1 1
46#define TYPE_LONGHAUL_V2 2
47#define TYPE_POWERSAVER 3
48
49#define CPU_SAMUEL 1
50#define CPU_SAMUEL2 2
51#define CPU_EZRA 3
52#define CPU_EZRA_T 4
53#define CPU_NEHEMIAH 5
Rafa³ Bilski980342a2007-01-31 23:42:47 +010054#define CPU_NEHEMIAH_C 6
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
Rafa³ Bilski264166e2006-12-24 14:04:23 +010056/* Flags */
57#define USE_ACPI_C3 (1 << 1)
58#define USE_NORTHBRIDGE (1 << 2)
59
Linus Torvalds1da177e2005-04-16 15:20:36 -070060static int cpu_model;
Dave Jonesac617bd2009-01-17 23:29:53 -050061static unsigned int numscales = 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -070062static unsigned int fsb;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020063
Dave Jonesbd5ab262007-02-22 19:11:16 -050064static const struct mV_pos *vrm_mV_table;
65static const unsigned char *mV_vrm_table;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020066
67static unsigned int highest_speed, lowest_speed; /* kHz */
Linus Torvalds1da177e2005-04-16 15:20:36 -070068static unsigned int minmult, maxmult;
69static int can_scale_voltage;
Dave Jonesac617bd2009-01-17 23:29:53 -050070static struct acpi_processor *pr;
71static struct acpi_processor_cx *cx;
Rafał Bilski275bc6b2007-06-05 22:08:50 +020072static u32 acpi_regs_addr;
Rafa³ Bilski264166e2006-12-24 14:04:23 +010073static u8 longhaul_flags;
Rafał Bilski73e107d2007-05-28 21:56:19 +020074static unsigned int longhaul_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
76/* Module parameters */
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +020077static int scale_voltage;
Rafał Bilski905497c2007-07-08 21:51:26 +020078static int disable_acpi_c3;
Rafal Bilski52a26382007-10-07 00:24:32 -070079static int revid_errata;
Rafał Bilskib5811bc2012-12-15 00:45:02 +010080static int enable;
Linus Torvalds1da177e2005-04-16 15:20:36 -070081
Linus Torvalds1da177e2005-04-16 15:20:36 -070082/* Clock ratios multiplied by 10 */
Dave Jonesac617bd2009-01-17 23:29:53 -050083static int mults[32];
84static int eblcr[32];
Linus Torvalds1da177e2005-04-16 15:20:36 -070085static int longhaul_version;
86static struct cpufreq_frequency_table *longhaul_table;
87
Linus Torvalds1da177e2005-04-16 15:20:36 -070088static char speedbuffer[8];
89
90static char *print_speed(int speed)
91{
Dave Jonese2aa8732006-05-30 17:37:15 -040092 if (speed < 1000) {
Dave Jonesac617bd2009-01-17 23:29:53 -050093 snprintf(speedbuffer, sizeof(speedbuffer), "%dMHz", speed);
Dave Jonese2aa8732006-05-30 17:37:15 -040094 return speedbuffer;
95 }
96
97 if (speed%1000 == 0)
98 snprintf(speedbuffer, sizeof(speedbuffer),
99 "%dGHz", speed/1000);
100 else
101 snprintf(speedbuffer, sizeof(speedbuffer),
102 "%d.%dGHz", speed/1000, (speed%1000)/100);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
104 return speedbuffer;
105}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
107
108static unsigned int calc_speed(int mult)
109{
110 int khz;
111 khz = (mult/10)*fsb;
112 if (mult%10)
113 khz += fsb/2;
114 khz *= 1000;
115 return khz;
116}
117
118
119static int longhaul_get_cpu_mult(void)
120{
Dave Jonesac617bd2009-01-17 23:29:53 -0500121 unsigned long invalue = 0, lo, hi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700122
Dave Jonesac617bd2009-01-17 23:29:53 -0500123 rdmsr(MSR_IA32_EBL_CR_POWERON, lo, hi);
124 invalue = (lo & (1<<22|1<<23|1<<24|1<<25))>>22;
125 if (longhaul_version == TYPE_LONGHAUL_V2 ||
126 longhaul_version == TYPE_POWERSAVER) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 if (lo & (1<<27))
Dave Jonesac617bd2009-01-17 23:29:53 -0500128 invalue += 16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500130 return eblcr[invalue];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131}
132
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200133/* For processor with BCR2 MSR */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
Dave Jonesac617bd2009-01-17 23:29:53 -0500135static void do_longhaul1(unsigned int mults_index)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136{
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200137 union msr_bcr2 bcr2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200139 rdmsrl(MSR_VIA_BCR2, bcr2.val);
140 /* Enable software clock multiplier */
141 bcr2.bits.ESOFTBF = 1;
Dave Jonesac617bd2009-01-17 23:29:53 -0500142 bcr2.bits.CLOCKMUL = mults_index & 0xff;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200144 /* Sync to timer tick */
Zachary Amsden4bb0d3e2005-09-03 15:56:36 -0700145 safe_halt();
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200146 /* Change frequency on next halt or sleep */
147 wrmsrl(MSR_VIA_BCR2, bcr2.val);
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200148 /* Invoke transition */
149 ACPI_FLUSH_CPU_CACHE();
150 halt();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200152 /* Disable software clock multiplier */
Dave Jones3be6a482005-05-31 19:03:51 -0700153 local_irq_disable();
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200154 rdmsrl(MSR_VIA_BCR2, bcr2.val);
155 bcr2.bits.ESOFTBF = 0;
156 wrmsrl(MSR_VIA_BCR2, bcr2.val);
157}
Dave Jones3be6a482005-05-31 19:03:51 -0700158
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200159/* For processor with Longhaul MSR */
Dave Jones11746312005-05-31 19:03:51 -0700160
Dave Jonesac617bd2009-01-17 23:29:53 -0500161static void do_powersaver(int cx_address, unsigned int mults_index,
Rafał Bilski73e107d2007-05-28 21:56:19 +0200162 unsigned int dir)
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200163{
164 union msr_longhaul longhaul;
165 u32 t;
Dave Jones3be6a482005-05-31 19:03:51 -0700166
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200167 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100168 /* Setup new frequency */
Rafal Bilski52a26382007-10-07 00:24:32 -0700169 if (!revid_errata)
170 longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
171 else
172 longhaul.bits.RevisionKey = 0;
Dave Jonesac617bd2009-01-17 23:29:53 -0500173 longhaul.bits.SoftBusRatio = mults_index & 0xf;
174 longhaul.bits.SoftBusRatio4 = (mults_index & 0x10) >> 4;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100175 /* Setup new voltage */
176 if (can_scale_voltage)
Dave Jonesac617bd2009-01-17 23:29:53 -0500177 longhaul.bits.SoftVID = (mults_index >> 8) & 0x1f;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200178 /* Sync to timer tick */
179 safe_halt();
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100180 /* Raise voltage if necessary */
Rafał Bilski73e107d2007-05-28 21:56:19 +0200181 if (can_scale_voltage && dir) {
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100182 longhaul.bits.EnableSoftVID = 1;
183 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
184 /* Change voltage */
185 if (!cx_address) {
186 ACPI_FLUSH_CPU_CACHE();
187 halt();
188 } else {
189 ACPI_FLUSH_CPU_CACHE();
190 /* Invoke C3 */
191 inb(cx_address);
192 /* Dummy op - must do something useless after P_LVL3
193 * read */
Dave Jonesbd0561c2007-02-10 20:36:29 -0500194 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100195 }
196 longhaul.bits.EnableSoftVID = 0;
197 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100198 }
199
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200200 /* Change frequency on next halt or sleep */
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100201 longhaul.bits.EnableSoftBusRatio = 1;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200202 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100203 if (!cx_address) {
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200204 ACPI_FLUSH_CPU_CACHE();
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200205 halt();
206 } else {
207 ACPI_FLUSH_CPU_CACHE();
208 /* Invoke C3 */
209 inb(cx_address);
210 /* Dummy op - must do something useless after P_LVL3 read */
Alexey Starikovskiycee324b2007-02-02 19:48:22 +0300211 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200212 }
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200213 /* Disable bus ratio bit */
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200214 longhaul.bits.EnableSoftBusRatio = 0;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200215 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100216
217 /* Reduce voltage if necessary */
Rafał Bilski73e107d2007-05-28 21:56:19 +0200218 if (can_scale_voltage && !dir) {
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100219 longhaul.bits.EnableSoftVID = 1;
220 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
221 /* Change voltage */
222 if (!cx_address) {
223 ACPI_FLUSH_CPU_CACHE();
224 halt();
225 } else {
226 ACPI_FLUSH_CPU_CACHE();
227 /* Invoke C3 */
228 inb(cx_address);
229 /* Dummy op - must do something useless after P_LVL3
230 * read */
Dave Jonesbd0561c2007-02-10 20:36:29 -0500231 t = inl(acpi_gbl_FADT.xpm_timer_block.address);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100232 }
233 longhaul.bits.EnableSoftVID = 0;
234 wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100235 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236}
237
238/**
239 * longhaul_set_cpu_frequency()
Dave Jonesac617bd2009-01-17 23:29:53 -0500240 * @mults_index : bitpattern of the new multiplier.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 *
242 * Sets a new clock ratio.
243 */
244
Rafał Bilski73e107d2007-05-28 21:56:19 +0200245static void longhaul_setstate(unsigned int table_index)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700246{
Dave Jonesac617bd2009-01-17 23:29:53 -0500247 unsigned int mults_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 int speed, mult;
249 struct cpufreq_freqs freqs;
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200250 unsigned long flags;
251 unsigned int pic1_mask, pic2_mask;
Rafał Bilski689eba72007-06-07 22:31:24 +0200252 u16 bm_status = 0;
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200253 u32 bm_timeout = 1000;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200254 unsigned int dir = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255
Dave Jonesac617bd2009-01-17 23:29:53 -0500256 mults_index = longhaul_table[table_index].index;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200257 /* Safety precautions */
Dave Jonesac617bd2009-01-17 23:29:53 -0500258 mult = mults[mults_index & 0x1f];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259 if (mult == -1)
260 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 speed = calc_speed(mult);
262 if ((speed > highest_speed) || (speed < lowest_speed))
263 return;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200264 /* Voltage transition before frequency transition? */
265 if (can_scale_voltage && longhaul_index < table_index)
266 dir = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267
268 freqs.old = calc_speed(longhaul_get_cpu_mult());
269 freqs.new = speed;
270 freqs.cpu = 0; /* longhaul.c is UP only driver */
271
272 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
273
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200274 pr_debug("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275 fsb, mult/10, mult%10, print_speed(speed/1000));
Rafal Bilski52a26382007-10-07 00:24:32 -0700276retry_loop:
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200277 preempt_disable();
278 local_irq_save(flags);
279
280 pic2_mask = inb(0xA1);
281 pic1_mask = inb(0x21); /* works on C3. save mask. */
Dave Jonesac617bd2009-01-17 23:29:53 -0500282 outb(0xFF, 0xA1); /* Overkill */
283 outb(0xFE, 0x21); /* TMR0 only */
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200284
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200285 /* Wait while PCI bus is busy. */
Rafał Bilski689eba72007-06-07 22:31:24 +0200286 if (acpi_regs_addr && (longhaul_flags & USE_NORTHBRIDGE
287 || ((pr != NULL) && pr->flags.bm_control))) {
288 bm_status = inw(acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200289 bm_status &= 1 << 4;
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200290 while (bm_status && bm_timeout) {
Rafał Bilski689eba72007-06-07 22:31:24 +0200291 outw(1 << 4, acpi_regs_addr);
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200292 bm_timeout--;
Rafał Bilski689eba72007-06-07 22:31:24 +0200293 bm_status = inw(acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200294 bm_status &= 1 << 4;
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200295 }
296 }
297
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100298 if (longhaul_flags & USE_NORTHBRIDGE) {
299 /* Disable AGP and PCI arbiters */
300 outb(3, 0x22);
301 } else if ((pr != NULL) && pr->flags.bm_control) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200302 /* Disable bus master arbitration */
Lin Mingfb318cb2009-03-18 09:09:01 +0800303 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200304 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305 switch (longhaul_version) {
306
307 /*
308 * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])
309 * Software controlled multipliers only.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310 */
311 case TYPE_LONGHAUL_V1:
Dave Jonesac617bd2009-01-17 23:29:53 -0500312 do_longhaul1(mults_index);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313 break;
314
315 /*
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100316 * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5B] and Ezra [C5C]
317 *
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318 * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 * Nehemiah can do FSB scaling too, but this has never been proven
320 * to work in practice.
321 */
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100322 case TYPE_LONGHAUL_V2:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 case TYPE_POWERSAVER:
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100324 if (longhaul_flags & USE_ACPI_C3) {
325 /* Don't allow wakeup */
Lin Mingfb318cb2009-03-18 09:09:01 +0800326 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 0);
Dave Jonesac617bd2009-01-17 23:29:53 -0500327 do_powersaver(cx->address, mults_index, dir);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100328 } else {
Dave Jonesac617bd2009-01-17 23:29:53 -0500329 do_powersaver(0, mults_index, dir);
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100330 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331 break;
332 }
333
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100334 if (longhaul_flags & USE_NORTHBRIDGE) {
335 /* Enable arbiters */
336 outb(0, 0x22);
337 } else if ((pr != NULL) && pr->flags.bm_control) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200338 /* Enable bus master arbitration */
Lin Mingfb318cb2009-03-18 09:09:01 +0800339 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200340 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500341 outb(pic2_mask, 0xA1); /* restore mask */
342 outb(pic1_mask, 0x21);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200343
344 local_irq_restore(flags);
345 preempt_enable();
346
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100347 freqs.new = calc_speed(longhaul_get_cpu_mult());
Rafal Bilski52a26382007-10-07 00:24:32 -0700348 /* Check if requested frequency is set. */
349 if (unlikely(freqs.new != speed)) {
350 printk(KERN_INFO PFX "Failed to set requested frequency!\n");
351 /* Revision ID = 1 but processor is expecting revision key
352 * equal to 0. Jumpers at the bottom of processor will change
353 * multiplier and FSB, but will not change bits in Longhaul
354 * MSR nor enable voltage scaling. */
355 if (!revid_errata) {
356 printk(KERN_INFO PFX "Enabling \"Ignore Revision ID\" "
357 "option.\n");
358 revid_errata = 1;
359 msleep(200);
360 goto retry_loop;
361 }
362 /* Why ACPI C3 sometimes doesn't work is a mystery for me.
363 * But it does happen. Processor is entering ACPI C3 state,
364 * but it doesn't change frequency. I tried poking various
365 * bits in northbridge registers, but without success. */
366 if (longhaul_flags & USE_ACPI_C3) {
367 printk(KERN_INFO PFX "Disabling ACPI C3 support.\n");
368 longhaul_flags &= ~USE_ACPI_C3;
369 if (revid_errata) {
370 printk(KERN_INFO PFX "Disabling \"Ignore "
371 "Revision ID\" option.\n");
372 revid_errata = 0;
373 }
374 msleep(200);
375 goto retry_loop;
376 }
377 /* This shouldn't happen. Longhaul ver. 2 was reported not
378 * working on processors without voltage scaling, but with
379 * RevID = 1. RevID errata will make things right. Just
380 * to be 100% sure. */
381 if (longhaul_version == TYPE_LONGHAUL_V2) {
382 printk(KERN_INFO PFX "Switching to Longhaul ver. 1\n");
383 longhaul_version = TYPE_LONGHAUL_V1;
384 msleep(200);
385 goto retry_loop;
386 }
387 }
388 /* Report true CPU frequency */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
Rafał Bilski489dc5c2007-05-17 22:39:02 +0200390
391 if (!bm_timeout)
Dave Jonesac617bd2009-01-17 23:29:53 -0500392 printk(KERN_INFO PFX "Warning: Timeout while waiting for "
393 "idle PCI bus.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394}
395
396/*
397 * Centaur decided to make life a little more tricky.
398 * Only longhaul v1 is allowed to read EBLCR BSEL[0:1].
399 * Samuel2 and above have to try and guess what the FSB is.
400 * We do this by assuming we booted at maximum multiplier, and interpolate
401 * between that value multiplied by possible FSBs and cpu_mhz which
402 * was calculated at boot time. Really ugly, but no other way to do this.
403 */
404
405#define ROUNDING 0xf
406
Rafa³ Bilski24ebead2007-01-01 23:49:34 +0100407static int guess_fsb(int mult)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408{
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100409 int speed = cpu_khz / 1000;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 int i;
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100411 int speeds[] = { 666, 1000, 1333, 2000 };
412 int f_max, f_min;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413
Rafa³ Bilski46ef9552007-02-04 15:58:46 +0100414 for (i = 0; i < 4; i++) {
415 f_max = ((speeds[i] * mult) + 50) / 100;
416 f_max += (ROUNDING / 2);
417 f_min = f_max - ROUNDING;
418 if ((speed <= f_max) && (speed >= f_min))
419 return speeds[i] / 10;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 }
421 return 0;
422}
423
424
Holger Freyther25305732010-07-19 03:29:03 +0800425static int __cpuinit longhaul_get_ranges(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426{
Rafał Bilski73e107d2007-05-28 21:56:19 +0200427 unsigned int i, j, k = 0;
428 unsigned int ratio;
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100429 int mult;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100431 /* Get current frequency */
432 mult = longhaul_get_cpu_mult();
433 if (mult == -1) {
434 printk(KERN_INFO PFX "Invalid (reserved) multiplier!\n");
435 return -EINVAL;
436 }
437 fsb = guess_fsb(mult);
438 if (fsb == 0) {
439 printk(KERN_INFO PFX "Invalid (reserved) FSB!\n");
440 return -EINVAL;
441 }
442 /* Get max multiplier - as we always did.
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300443 * Longhaul MSR is useful only when voltage scaling is enabled.
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100444 * C3 is booting at max anyway. */
445 maxmult = mult;
446 /* Get min multiplier */
Rafa³ Bilski9addf3b2007-02-07 22:53:29 +0100447 switch (cpu_model) {
448 case CPU_NEHEMIAH:
449 minmult = 50;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700450 break;
Rafa³ Bilski9addf3b2007-02-07 22:53:29 +0100451 case CPU_NEHEMIAH_C:
452 minmult = 40;
453 break;
454 default:
455 minmult = 30;
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100456 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 }
458
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200459 pr_debug("MinMult:%d.%dx MaxMult:%d.%dx\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460 minmult/10, minmult%10, maxmult/10, maxmult%10);
461
Linus Torvalds1da177e2005-04-16 15:20:36 -0700462 highest_speed = calc_speed(maxmult);
463 lowest_speed = calc_speed(minmult);
Dominik Brodowski2d06d8c2011-03-27 15:04:46 +0200464 pr_debug("FSB:%dMHz Lowest speed: %s Highest speed:%s\n", fsb,
Alexey Starikovskiycee324b2007-02-02 19:48:22 +0300465 print_speed(lowest_speed/1000),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700466 print_speed(highest_speed/1000));
467
468 if (lowest_speed == highest_speed) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500469 printk(KERN_INFO PFX "highestspeed == lowest, aborting.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470 return -EINVAL;
471 }
472 if (lowest_speed > highest_speed) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500473 printk(KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700474 lowest_speed, highest_speed);
475 return -EINVAL;
476 }
477
Dave Jonesac617bd2009-01-17 23:29:53 -0500478 longhaul_table = kmalloc((numscales + 1) * sizeof(*longhaul_table),
479 GFP_KERNEL);
480 if (!longhaul_table)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 return -ENOMEM;
482
Rafał Bilski73e107d2007-05-28 21:56:19 +0200483 for (j = 0; j < numscales; j++) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500484 ratio = mults[j];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485 if (ratio == -1)
486 continue;
487 if (ratio > maxmult || ratio < minmult)
488 continue;
489 longhaul_table[k].frequency = calc_speed(ratio);
490 longhaul_table[k].index = j;
491 k++;
492 }
Rafał Bilski73e107d2007-05-28 21:56:19 +0200493 if (k <= 1) {
494 kfree(longhaul_table);
495 return -ENODEV;
496 }
497 /* Sort */
498 for (j = 0; j < k - 1; j++) {
499 unsigned int min_f, min_i;
500 min_f = longhaul_table[j].frequency;
501 min_i = j;
502 for (i = j + 1; i < k; i++) {
503 if (longhaul_table[i].frequency < min_f) {
504 min_f = longhaul_table[i].frequency;
505 min_i = i;
506 }
507 }
508 if (min_i != j) {
Dave Jones91420222009-02-04 15:28:54 -0500509 swap(longhaul_table[j].frequency,
510 longhaul_table[min_i].frequency);
511 swap(longhaul_table[j].index,
512 longhaul_table[min_i].index);
Rafał Bilski73e107d2007-05-28 21:56:19 +0200513 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 }
515
Rafał Bilski73e107d2007-05-28 21:56:19 +0200516 longhaul_table[k].frequency = CPUFREQ_TABLE_END;
517
518 /* Find index we are running on */
519 for (j = 0; j < k; j++) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500520 if (mults[longhaul_table[j].index & 0x1f] == mult) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200521 longhaul_index = j;
522 break;
523 }
524 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700525 return 0;
526}
527
528
Holger Freyther25305732010-07-19 03:29:03 +0800529static void __cpuinit longhaul_setup_voltagescaling(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700530{
531 union msr_longhaul longhaul;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200532 struct mV_pos minvid, maxvid, vid;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200533 unsigned int j, speed, pos, kHz_step, numvscales;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100534 int min_vid_speed;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200536 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
537 if (!(longhaul.bits.RevisionID & 1)) {
538 printk(KERN_INFO PFX "Voltage scaling not supported by CPU.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539 return;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200540 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200542 if (!longhaul.bits.VRMRev) {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200543 printk(KERN_INFO PFX "VRM 8.5\n");
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200544 vrm_mV_table = &vrm85_mV[0];
545 mV_vrm_table = &mV_vrm85[0];
546 } else {
Rafał Bilski73e107d2007-05-28 21:56:19 +0200547 printk(KERN_INFO PFX "Mobile VRM\n");
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100548 if (cpu_model < CPU_NEHEMIAH)
549 return;
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200550 vrm_mV_table = &mobilevrm_mV[0];
551 mV_vrm_table = &mV_mobilevrm[0];
552 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200554 minvid = vrm_mV_table[longhaul.bits.MinimumVID];
555 maxvid = vrm_mV_table[longhaul.bits.MaximumVID];
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200556
557 if (minvid.mV == 0 || maxvid.mV == 0 || minvid.mV > maxvid.mV) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500558 printk(KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 "Voltage scaling disabled.\n",
Dave Jonesac617bd2009-01-17 23:29:53 -0500560 minvid.mV/1000, minvid.mV%1000,
561 maxvid.mV/1000, maxvid.mV%1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 return;
563 }
564
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200565 if (minvid.mV == maxvid.mV) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500566 printk(KERN_INFO PFX "Claims to support voltage scaling but "
567 "min & max are both %d.%03d. "
568 "Voltage scaling disabled\n",
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200569 maxvid.mV/1000, maxvid.mV%1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570 return;
571 }
572
Dave Jonesac617bd2009-01-17 23:29:53 -0500573 /* How many voltage steps*/
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100574 numvscales = maxvid.pos - minvid.pos + 1;
575 printk(KERN_INFO PFX
576 "Max VID=%d.%03d "
577 "Min VID=%d.%03d, "
578 "%d possible voltage scales\n",
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200579 maxvid.mV/1000, maxvid.mV%1000,
580 minvid.mV/1000, minvid.mV%1000,
581 numvscales);
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100582
583 /* Calculate max frequency at min voltage */
584 j = longhaul.bits.MinMHzBR;
585 if (longhaul.bits.MinMHzBR4)
586 j += 16;
Dave Jonesac617bd2009-01-17 23:29:53 -0500587 min_vid_speed = eblcr[j];
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100588 if (min_vid_speed == -1)
589 return;
590 switch (longhaul.bits.MinMHzFSB) {
591 case 0:
592 min_vid_speed *= 13333;
593 break;
594 case 1:
595 min_vid_speed *= 10000;
596 break;
597 case 3:
598 min_vid_speed *= 6666;
599 break;
600 default:
601 return;
602 break;
603 }
604 if (min_vid_speed >= highest_speed)
605 return;
606 /* Calculate kHz for one voltage step */
607 kHz_step = (highest_speed - min_vid_speed) / numvscales;
608
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200609 j = 0;
610 while (longhaul_table[j].frequency != CPUFREQ_TABLE_END) {
611 speed = longhaul_table[j].frequency;
Rafa³ Bilski348f31e2007-02-08 18:56:04 +0100612 if (speed > min_vid_speed)
613 pos = (speed - min_vid_speed) / kHz_step + minvid.pos;
614 else
615 pos = minvid.pos;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200616 longhaul_table[j].index |= mV_vrm_table[pos] << 8;
617 vid = vrm_mV_table[mV_vrm_table[pos]];
Dave Jonesac617bd2009-01-17 23:29:53 -0500618 printk(KERN_INFO PFX "f: %d kHz, index: %d, vid: %d mV\n",
619 speed, j, vid.mV);
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +0200620 j++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700621 }
622
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623 can_scale_voltage = 1;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200624 printk(KERN_INFO PFX "Voltage scaling enabled.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625}
626
627
628static int longhaul_verify(struct cpufreq_policy *policy)
629{
630 return cpufreq_frequency_table_verify(policy, longhaul_table);
631}
632
633
634static int longhaul_target(struct cpufreq_policy *policy,
635 unsigned int target_freq, unsigned int relation)
636{
637 unsigned int table_index = 0;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200638 unsigned int i;
639 unsigned int dir = 0;
640 u8 vid, current_vid;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641
Dave Jonesac617bd2009-01-17 23:29:53 -0500642 if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq,
643 relation, &table_index))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700644 return -EINVAL;
645
Rafał Bilski73e107d2007-05-28 21:56:19 +0200646 /* Don't set same frequency again */
647 if (longhaul_index == table_index)
648 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649
Rafał Bilski73e107d2007-05-28 21:56:19 +0200650 if (!can_scale_voltage)
651 longhaul_setstate(table_index);
652 else {
653 /* On test system voltage transitions exceeding single
654 * step up or down were turning motherboard off. Both
655 * "ondemand" and "userspace" are unsafe. C7 is doing
656 * this in hardware, C3 is old and we need to do this
657 * in software. */
658 i = longhaul_index;
Dave Jonesac617bd2009-01-17 23:29:53 -0500659 current_vid = (longhaul_table[longhaul_index].index >> 8);
660 current_vid &= 0x1f;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200661 if (table_index > longhaul_index)
662 dir = 1;
663 while (i != table_index) {
664 vid = (longhaul_table[i].index >> 8) & 0x1f;
665 if (vid != current_vid) {
666 longhaul_setstate(i);
667 current_vid = vid;
668 msleep(200);
669 }
670 if (dir)
671 i++;
672 else
673 i--;
674 }
675 longhaul_setstate(table_index);
676 }
677 longhaul_index = table_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 return 0;
679}
680
681
682static unsigned int longhaul_get(unsigned int cpu)
683{
684 if (cpu)
685 return 0;
686 return calc_speed(longhaul_get_cpu_mult());
687}
688
Adrian Bunkc4a96c12006-07-09 19:53:08 +0200689static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
690 u32 nesting_level,
691 void *context, void **return_value)
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200692{
693 struct acpi_device *d;
694
Dave Jonesac617bd2009-01-17 23:29:53 -0500695 if (acpi_bus_get_device(obj_handle, &d))
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200696 return 0;
Dave Jonesac617bd2009-01-17 23:29:53 -0500697
Jan Engelhardtade1af72008-01-30 13:33:23 +0100698 *return_value = acpi_driver_data(d);
Rafa³ Bilskidadb49d2006-07-03 07:19:05 +0200699 return 1;
700}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200702/* VIA don't support PM2 reg, but have something similar */
703static int enable_arbiter_disable(void)
704{
705 struct pci_dev *dev;
Rafał Bilski73e107d2007-05-28 21:56:19 +0200706 int status = 1;
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200707 int reg;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200708 u8 pci_cmd;
709
710 /* Find PLE133 host bridge */
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200711 reg = 0x78;
Rafał Bilskifb48e152007-03-02 20:12:27 +0100712 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8601_0,
713 NULL);
Linus Torvalds4d5709a2007-10-12 15:42:01 -0700714 /* Find PM133/VT8605 host bridge */
715 if (dev == NULL)
716 dev = pci_get_device(PCI_VENDOR_ID_VIA,
717 PCI_DEVICE_ID_VIA_8605_0, NULL);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200718 /* Find CLE266 host bridge */
719 if (dev == NULL) {
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200720 reg = 0x76;
Rafał Bilskifb48e152007-03-02 20:12:27 +0100721 dev = pci_get_device(PCI_VENDOR_ID_VIA,
722 PCI_DEVICE_ID_VIA_862X_0, NULL);
Rafa³ Bilskidb2fb9d2006-11-30 03:47:41 +0100723 /* Find CN400 V-Link host bridge */
724 if (dev == NULL)
Rafał Bilskifb48e152007-03-02 20:12:27 +0100725 dev = pci_get_device(PCI_VENDOR_ID_VIA, 0x7259, NULL);
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200726 }
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200727 if (dev != NULL) {
728 /* Enable access to port 0x22 */
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200729 pci_read_config_byte(dev, reg, &pci_cmd);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100730 if (!(pci_cmd & 1<<7)) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200731 pci_cmd |= 1<<7;
rafalbilski@interia.pl7f1be892006-09-24 20:28:13 +0200732 pci_write_config_byte(dev, reg, pci_cmd);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100733 pci_read_config_byte(dev, reg, &pci_cmd);
734 if (!(pci_cmd & 1<<7)) {
735 printk(KERN_ERR PFX
736 "Can't enable access to port 0x22.\n");
Rafał Bilskifb48e152007-03-02 20:12:27 +0100737 status = 0;
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100738 }
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200739 }
Rafał Bilskifb48e152007-03-02 20:12:27 +0100740 pci_dev_put(dev);
741 return status;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200742 }
743 return 0;
744}
745
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200746static int longhaul_setup_southbridge(void)
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100747{
748 struct pci_dev *dev;
749 u8 pci_cmd;
750
751 /* Find VT8235 southbridge */
Rafał Bilskifb48e152007-03-02 20:12:27 +0100752 dev = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, NULL);
Rafał Bilski920dd0f2007-05-17 22:35:29 +0200753 if (dev == NULL)
Dave Jonesac617bd2009-01-17 23:29:53 -0500754 /* Find VT8237 southbridge */
Rafał Bilski920dd0f2007-05-17 22:35:29 +0200755 dev = pci_get_device(PCI_VENDOR_ID_VIA,
756 PCI_DEVICE_ID_VIA_8237, NULL);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100757 if (dev != NULL) {
758 /* Set transition time to max */
759 pci_read_config_byte(dev, 0xec, &pci_cmd);
760 pci_cmd &= ~(1 << 2);
761 pci_write_config_byte(dev, 0xec, pci_cmd);
762 pci_read_config_byte(dev, 0xe4, &pci_cmd);
763 pci_cmd &= ~(1 << 7);
764 pci_write_config_byte(dev, 0xe4, pci_cmd);
765 pci_read_config_byte(dev, 0xe5, &pci_cmd);
766 pci_cmd |= 1 << 7;
767 pci_write_config_byte(dev, 0xe5, pci_cmd);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200768 /* Get address of ACPI registers block*/
769 pci_read_config_byte(dev, 0x81, &pci_cmd);
770 if (pci_cmd & 1 << 7) {
771 pci_read_config_dword(dev, 0x88, &acpi_regs_addr);
772 acpi_regs_addr &= 0xff00;
Dave Jonesac617bd2009-01-17 23:29:53 -0500773 printk(KERN_INFO PFX "ACPI I/O at 0x%x\n",
774 acpi_regs_addr);
Rafał Bilski275bc6b2007-06-05 22:08:50 +0200775 }
776
Rafał Bilskifb48e152007-03-02 20:12:27 +0100777 pci_dev_put(dev);
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100778 return 1;
779 }
780 return 0;
781}
782
Holger Freyther25305732010-07-19 03:29:03 +0800783static int __cpuinit longhaul_cpu_init(struct cpufreq_policy *policy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784{
Mike Travis92cb7612007-10-19 20:35:04 +0200785 struct cpuinfo_x86 *c = &cpu_data(0);
Dave Jonesac617bd2009-01-17 23:29:53 -0500786 char *cpuname = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700787 int ret;
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100788 u32 lo, hi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700789
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200790 /* Check what we have on this motherboard */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 switch (c->x86_model) {
792 case 6:
793 cpu_model = CPU_SAMUEL;
794 cpuname = "C3 'Samuel' [C5A]";
795 longhaul_version = TYPE_LONGHAUL_V1;
Dave Jonesac617bd2009-01-17 23:29:53 -0500796 memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
797 memcpy(eblcr, samuel1_eblcr, sizeof(samuel1_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 break;
799
800 case 7:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801 switch (c->x86_mask) {
802 case 0:
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100803 longhaul_version = TYPE_LONGHAUL_V1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804 cpu_model = CPU_SAMUEL2;
805 cpuname = "C3 'Samuel 2' [C5B]";
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100806 /* Note, this is not a typo, early Samuel2's had
807 * Samuel1 ratios. */
Dave Jonesac617bd2009-01-17 23:29:53 -0500808 memcpy(mults, samuel1_mults, sizeof(samuel1_mults));
809 memcpy(eblcr, samuel2_eblcr, sizeof(samuel2_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700810 break;
811 case 1 ... 15:
Krzysztof Heltf7f3cad2009-10-24 17:25:38 +0200812 longhaul_version = TYPE_LONGHAUL_V2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813 if (c->x86_mask < 8) {
814 cpu_model = CPU_SAMUEL2;
815 cpuname = "C3 'Samuel 2' [C5B]";
816 } else {
817 cpu_model = CPU_EZRA;
818 cpuname = "C3 'Ezra' [C5C]";
819 }
Dave Jonesac617bd2009-01-17 23:29:53 -0500820 memcpy(mults, ezra_mults, sizeof(ezra_mults));
821 memcpy(eblcr, ezra_eblcr, sizeof(ezra_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700822 break;
823 }
824 break;
825
826 case 8:
827 cpu_model = CPU_EZRA_T;
828 cpuname = "C3 'Ezra-T' [C5M]";
829 longhaul_version = TYPE_POWERSAVER;
Dave Jonesac617bd2009-01-17 23:29:53 -0500830 numscales = 32;
831 memcpy(mults, ezrat_mults, sizeof(ezrat_mults));
832 memcpy(eblcr, ezrat_eblcr, sizeof(ezrat_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 break;
834
835 case 9:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836 longhaul_version = TYPE_POWERSAVER;
Rafa³ Bilski0d44b2b2007-01-31 23:50:49 +0100837 numscales = 32;
Dave Jonesac617bd2009-01-17 23:29:53 -0500838 memcpy(mults, nehemiah_mults, sizeof(nehemiah_mults));
839 memcpy(eblcr, nehemiah_eblcr, sizeof(nehemiah_eblcr));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840 switch (c->x86_mask) {
841 case 0 ... 1:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100842 cpu_model = CPU_NEHEMIAH;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100843 cpuname = "C3 'Nehemiah A' [C5XLOE]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 break;
845 case 2 ... 4:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100846 cpu_model = CPU_NEHEMIAH;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100847 cpuname = "C3 'Nehemiah B' [C5XLOH]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700848 break;
849 case 5 ... 15:
Rafa³ Bilski980342a2007-01-31 23:42:47 +0100850 cpu_model = CPU_NEHEMIAH_C;
Rafa³ Bilskie57501c2007-02-08 23:12:02 +0100851 cpuname = "C3 'Nehemiah C' [C5P]";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 break;
853 }
854 break;
855
856 default:
857 cpuname = "Unknown";
858 break;
859 }
Rafa³ Bilski2b8c0e12007-02-14 22:00:37 +0100860 /* Check Longhaul ver. 2 */
861 if (longhaul_version == TYPE_LONGHAUL_V2) {
862 rdmsr(MSR_VIA_LONGHAUL, lo, hi);
863 if (lo == 0 && hi == 0)
864 /* Looks like MSR isn't present */
865 longhaul_version = TYPE_LONGHAUL_V1;
866 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867
Dave Jonesac617bd2009-01-17 23:29:53 -0500868 printk(KERN_INFO PFX "VIA %s CPU detected. ", cpuname);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700869 switch (longhaul_version) {
870 case TYPE_LONGHAUL_V1:
871 case TYPE_LONGHAUL_V2:
Dave Jonesac617bd2009-01-17 23:29:53 -0500872 printk(KERN_CONT "Longhaul v%d supported.\n", longhaul_version);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873 break;
874 case TYPE_POWERSAVER:
Dave Jonesac617bd2009-01-17 23:29:53 -0500875 printk(KERN_CONT "Powersaver supported.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700876 break;
877 };
878
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100879 /* Doesn't hurt */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200880 longhaul_setup_southbridge();
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100881
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200882 /* Find ACPI data for processor */
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100883 acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
Lin Ming22635762009-11-13 10:06:08 +0800884 ACPI_UINT32_MAX, &longhaul_walk_callback, NULL,
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100885 NULL, (void *)&pr);
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200886
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100887 /* Check ACPI support for C3 state */
Dave Jones7ab77e02007-04-20 15:58:00 -0400888 if (pr != NULL && longhaul_version == TYPE_POWERSAVER) {
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200889 cx = &pr->power.states[ACPI_STATE_C3];
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200890 if (cx->address > 0 && cx->latency <= 1000)
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100891 longhaul_flags |= USE_ACPI_C3;
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200892 }
Rafał Bilski905497c2007-07-08 21:51:26 +0200893 /* Disable if it isn't working */
894 if (disable_acpi_c3)
895 longhaul_flags &= ~USE_ACPI_C3;
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100896 /* Check if northbridge is friendly */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200897 if (enable_arbiter_disable())
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100898 longhaul_flags |= USE_NORTHBRIDGE;
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200899
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100900 /* Check ACPI support for bus master arbiter disable */
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200901 if (!(longhaul_flags & USE_ACPI_C3
902 || longhaul_flags & USE_NORTHBRIDGE)
903 && ((pr == NULL) || !(pr->flags.bm_control))) {
Rafa³ Bilski264166e2006-12-24 14:04:23 +0100904 printk(KERN_ERR PFX
905 "No ACPI support. Unsupported northbridge.\n");
906 return -ENODEV;
907 }
908
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100909 if (longhaul_flags & USE_NORTHBRIDGE)
Rafał Bilski7d5edcc2007-05-17 22:33:46 +0200910 printk(KERN_INFO PFX "Using northbridge support.\n");
911 if (longhaul_flags & USE_ACPI_C3)
912 printk(KERN_INFO PFX "Using ACPI support.\n");
Rafa³ Bilski179da8e2006-08-08 19:12:20 +0200913
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 ret = longhaul_get_ranges();
915 if (ret != 0)
916 return ret;
917
Rafa³ Bilski786f46b2007-02-04 18:43:12 +0100918 if ((longhaul_version != TYPE_LONGHAUL_V1) && (scale_voltage != 0))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919 longhaul_setup_voltagescaling();
920
Dave Jones6778bae2005-05-31 19:03:51 -0700921 policy->cpuinfo.transition_latency = 200000; /* nsec */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922 policy->cur = calc_speed(longhaul_get_cpu_mult());
923
924 ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
925 if (ret)
926 return ret;
927
928 cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
929
930 return 0;
931}
932
Bill Pembertonc0e61cb2012-11-21 01:18:49 +0100933static int longhaul_cpu_exit(struct cpufreq_policy *policy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934{
935 cpufreq_frequency_table_put_attr(policy->cpu);
936 return 0;
937}
938
Dave Jonesac617bd2009-01-17 23:29:53 -0500939static struct freq_attr *longhaul_attr[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 &cpufreq_freq_attr_scaling_available_freqs,
941 NULL,
942};
943
Linus Torvalds221dee22007-02-26 14:55:48 -0800944static struct cpufreq_driver longhaul_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945 .verify = longhaul_verify,
946 .target = longhaul_target,
947 .get = longhaul_get,
948 .init = longhaul_cpu_init,
Bill Pembertonce2650d2012-11-21 01:18:30 +0100949 .exit = longhaul_cpu_exit,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950 .name = "longhaul",
951 .owner = THIS_MODULE,
952 .attr = longhaul_attr,
953};
954
Andi Kleenfa8031a2012-01-26 00:09:12 +0100955static const struct x86_cpu_id longhaul_id[] = {
956 { X86_VENDOR_CENTAUR, 6 },
957 {}
958};
959MODULE_DEVICE_TABLE(x86cpu, longhaul_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960
961static int __init longhaul_init(void)
962{
Mike Travis92cb7612007-10-19 20:35:04 +0200963 struct cpuinfo_x86 *c = &cpu_data(0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964
Andi Kleenfa8031a2012-01-26 00:09:12 +0100965 if (!x86_match_cpu(longhaul_id))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 return -ENODEV;
967
Rafał Bilskib5811bc2012-12-15 00:45:02 +0100968 if (!enable) {
969 printk(KERN_ERR PFX "Option \"enable\" not set. Aborting.\n");
970 return -ENODEV;
971 }
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200972#ifdef CONFIG_SMP
973 if (num_online_cpus() > 1) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500974 printk(KERN_ERR PFX "More than 1 CPU detected, "
975 "longhaul disabled.\n");
Dave Jones1cfe2012006-12-28 22:30:16 -0500976 return -ENODEV;
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200977 }
978#endif
979#ifdef CONFIG_X86_IO_APIC
980 if (cpu_has_apic) {
Dave Jonesac617bd2009-01-17 23:29:53 -0500981 printk(KERN_ERR PFX "APIC detected. Longhaul is currently "
982 "broken in this configuration.\n");
Rafa³ Bilski48b7bde2006-07-04 17:50:57 +0200983 return -ENODEV;
984 }
985#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 switch (c->x86_model) {
987 case 6 ... 9:
988 return cpufreq_register_driver(&longhaul_driver);
Dave Jones8ec98222006-12-17 19:07:35 -0500989 case 10:
990 printk(KERN_ERR PFX "Use acpi-cpufreq driver for VIA C7\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700991 default:
Fernando Carrijoc19a28e2009-01-07 18:09:08 -0800992 ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993 }
994
995 return -ENODEV;
996}
997
998
999static void __exit longhaul_exit(void)
1000{
Dave Jones8eebf1a2006-05-30 17:40:16 -04001001 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002
Dave Jonesac617bd2009-01-17 23:29:53 -05001003 for (i = 0; i < numscales; i++) {
1004 if (mults[i] == maxmult) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005 longhaul_setstate(i);
1006 break;
1007 }
1008 }
1009
1010 cpufreq_unregister_driver(&longhaul_driver);
1011 kfree(longhaul_table);
1012}
1013
Rafal Bilski52a26382007-10-07 00:24:32 -07001014/* Even if BIOS is exporting ACPI C3 state, and it is used
1015 * with success when CPU is idle, this state doesn't
1016 * trigger frequency transition in some cases. */
Dave Jonesac617bd2009-01-17 23:29:53 -05001017module_param(disable_acpi_c3, int, 0644);
Rafał Bilski905497c2007-07-08 21:51:26 +02001018MODULE_PARM_DESC(disable_acpi_c3, "Don't use ACPI C3 support");
Lucas De Marchi0d2eb442011-03-17 16:24:16 -03001019/* Change CPU voltage with frequency. Very useful to save
Rafal Bilski52a26382007-10-07 00:24:32 -07001020 * power, but most VIA C3 processors aren't supporting it. */
Dave Jonesac617bd2009-01-17 23:29:53 -05001021module_param(scale_voltage, int, 0644);
Rafa³ Bilskidb44aaf2006-08-16 01:07:33 +02001022MODULE_PARM_DESC(scale_voltage, "Scale voltage of processor");
Rafal Bilski52a26382007-10-07 00:24:32 -07001023/* Force revision key to 0 for processors which doesn't
1024 * support voltage scaling, but are introducing itself as
1025 * such. */
1026module_param(revid_errata, int, 0644);
1027MODULE_PARM_DESC(revid_errata, "Ignore CPU Revision ID");
Rafał Bilskib5811bc2012-12-15 00:45:02 +01001028/* By default driver is disabled to prevent incompatible
1029 * system freeze. */
1030module_param(enable, int, 0644);
1031MODULE_PARM_DESC(enable, "Enable driver");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001032
Dave Jonesac617bd2009-01-17 23:29:53 -05001033MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
1034MODULE_DESCRIPTION("Longhaul driver for VIA Cyrix processors.");
1035MODULE_LICENSE("GPL");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001036
Rafa³ Bilski0d6daba2006-07-07 08:48:26 +02001037late_initcall(longhaul_init);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001038module_exit(longhaul_exit);