blob: 5980399029b41d40337b41b19a6014e37a69ef0b [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
29
30unsigned int ath10k_debug_mask;
31static bool uart_print;
32static unsigned int ath10k_p2p;
33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
34module_param(uart_print, bool, 0644);
35module_param_named(p2p, ath10k_p2p, uint, 0644);
36MODULE_PARM_DESC(debug_mask, "Debugging mask");
37MODULE_PARM_DESC(uart_print, "Uart target debugging");
38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
39
40static const struct ath10k_hw_params ath10k_hw_params_list[] = {
41 {
Kalle Valo5e3dd152013-06-12 20:52:10 +030042 .id = QCA988X_HW_2_0_VERSION,
43 .name = "qca988x hw2.0",
44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
45 .fw = {
46 .dir = QCA988X_HW_2_0_FW_DIR,
47 .fw = QCA988X_HW_2_0_FW_FILE,
48 .otp = QCA988X_HW_2_0_OTP_FILE,
49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
50 },
51 },
52};
53
54static void ath10k_send_suspend_complete(struct ath10k *ar)
55{
Kalle Valoeffea962013-09-08 17:55:44 +030056 ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +030057
Marek Puzyniak9042e172014-02-10 17:14:23 +010058 complete(&ar->target_suspend);
Kalle Valo5e3dd152013-06-12 20:52:10 +030059}
60
Kalle Valo5e3dd152013-06-12 20:52:10 +030061static int ath10k_init_configure_target(struct ath10k *ar)
62{
63 u32 param_host;
64 int ret;
65
66 /* tell target which HTC version it is used*/
67 ret = ath10k_bmi_write32(ar, hi_app_host_interest,
68 HTC_PROTOCOL_VERSION);
69 if (ret) {
70 ath10k_err("settings HTC version failed\n");
71 return ret;
72 }
73
74 /* set the firmware mode to STA/IBSS/AP */
75 ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
76 if (ret) {
77 ath10k_err("setting firmware mode (1/2) failed\n");
78 return ret;
79 }
80
81 /* TODO following parameters need to be re-visited. */
82 /* num_device */
83 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
84 /* Firmware mode */
85 /* FIXME: Why FW_MODE_AP ??.*/
86 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
87 /* mac_addr_method */
88 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
89 /* firmware_bridge */
90 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
91 /* fwsubmode */
92 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
93
94 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
95 if (ret) {
96 ath10k_err("setting firmware mode (2/2) failed\n");
97 return ret;
98 }
99
100 /* We do all byte-swapping on the host */
101 ret = ath10k_bmi_write32(ar, hi_be, 0);
102 if (ret) {
103 ath10k_err("setting host CPU BE mode failed\n");
104 return ret;
105 }
106
107 /* FW descriptor/Data swap flags */
108 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
109
110 if (ret) {
111 ath10k_err("setting FW data/desc swap flags failed\n");
112 return ret;
113 }
114
115 return 0;
116}
117
118static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
119 const char *dir,
120 const char *file)
121{
122 char filename[100];
123 const struct firmware *fw;
124 int ret;
125
126 if (file == NULL)
127 return ERR_PTR(-ENOENT);
128
129 if (dir == NULL)
130 dir = ".";
131
132 snprintf(filename, sizeof(filename), "%s/%s", dir, file);
133 ret = request_firmware(&fw, filename, ar->dev);
134 if (ret)
135 return ERR_PTR(ret);
136
137 return fw;
138}
139
Kalle Valo958df3a2013-09-27 19:55:01 +0300140static int ath10k_push_board_ext_data(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300141{
142 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
143 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
144 u32 board_ext_data_addr;
145 int ret;
146
147 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
148 if (ret) {
149 ath10k_err("could not read board ext data addr (%d)\n", ret);
150 return ret;
151 }
152
Kalle Valob52b7682013-09-08 17:55:38 +0300153 ath10k_dbg(ATH10K_DBG_BOOT,
Kalle Valoeffea962013-09-08 17:55:44 +0300154 "boot push board extended data addr 0x%x\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300155 board_ext_data_addr);
156
157 if (board_ext_data_addr == 0)
158 return 0;
159
Kalle Valo958df3a2013-09-27 19:55:01 +0300160 if (ar->board_len != (board_data_size + board_ext_data_size)) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300161 ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
Kalle Valo958df3a2013-09-27 19:55:01 +0300162 ar->board_len, board_data_size, board_ext_data_size);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300163 return -EINVAL;
164 }
165
166 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
Kalle Valo958df3a2013-09-27 19:55:01 +0300167 ar->board_data + board_data_size,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300168 board_ext_data_size);
169 if (ret) {
170 ath10k_err("could not write board ext data (%d)\n", ret);
171 return ret;
172 }
173
174 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
175 (board_ext_data_size << 16) | 1);
176 if (ret) {
177 ath10k_err("could not write board ext data bit (%d)\n", ret);
178 return ret;
179 }
180
181 return 0;
182}
183
184static int ath10k_download_board_data(struct ath10k *ar)
185{
186 u32 board_data_size = QCA988X_BOARD_DATA_SZ;
187 u32 address;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300188 int ret;
189
Kalle Valo958df3a2013-09-27 19:55:01 +0300190 ret = ath10k_push_board_ext_data(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300191 if (ret) {
192 ath10k_err("could not push board ext data (%d)\n", ret);
193 goto exit;
194 }
195
196 ret = ath10k_bmi_read32(ar, hi_board_data, &address);
197 if (ret) {
198 ath10k_err("could not read board data addr (%d)\n", ret);
199 goto exit;
200 }
201
Kalle Valo958df3a2013-09-27 19:55:01 +0300202 ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
203 min_t(u32, board_data_size,
204 ar->board_len));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300205 if (ret) {
206 ath10k_err("could not write board data (%d)\n", ret);
207 goto exit;
208 }
209
210 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
211 if (ret) {
212 ath10k_err("could not write board data bit (%d)\n", ret);
213 goto exit;
214 }
215
216exit:
Kalle Valo5e3dd152013-06-12 20:52:10 +0300217 return ret;
218}
219
220static int ath10k_download_and_run_otp(struct ath10k *ar)
221{
Kalle Valod6d4a582014-03-11 17:33:19 +0200222 u32 result, address = ar->hw_params.patch_load_addr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300223 int ret;
224
225 /* OTP is optional */
226
Kalle Valo7f06ea12014-03-11 17:33:28 +0200227 if (!ar->otp_data || !ar->otp_len) {
Ben Greear36a8f412014-03-24 12:20:42 -0700228 ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
229 ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300230 return 0;
Kalle Valo7f06ea12014-03-11 17:33:28 +0200231 }
232
233 ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
234 address, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300235
Kalle Valo958df3a2013-09-27 19:55:01 +0300236 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300237 if (ret) {
238 ath10k_err("could not write otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200239 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300240 }
241
Kalle Valod6d4a582014-03-11 17:33:19 +0200242 ret = ath10k_bmi_execute(ar, address, 0, &result);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300243 if (ret) {
244 ath10k_err("could not execute otp (%d)\n", ret);
Kalle Valo7f06ea12014-03-11 17:33:28 +0200245 return ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300246 }
247
Kalle Valo7f06ea12014-03-11 17:33:28 +0200248 ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
249
250 if (result != 0) {
251 ath10k_err("otp calibration failed: %d", result);
252 return -EINVAL;
253 }
254
255 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256}
257
258static int ath10k_download_fw(struct ath10k *ar)
259{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300260 u32 address;
261 int ret;
262
Kalle Valo5e3dd152013-06-12 20:52:10 +0300263 address = ar->hw_params.patch_load_addr;
264
Kalle Valo958df3a2013-09-27 19:55:01 +0300265 ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
266 ar->firmware_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300267 if (ret) {
268 ath10k_err("could not write fw (%d)\n", ret);
269 goto exit;
270 }
271
272exit:
Michal Kazior29385052013-07-16 09:38:58 +0200273 return ret;
274}
275
276static void ath10k_core_free_firmware_files(struct ath10k *ar)
277{
Kalle Valo36527912013-09-27 19:54:55 +0300278 if (ar->board && !IS_ERR(ar->board))
279 release_firmware(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200280
281 if (ar->otp && !IS_ERR(ar->otp))
282 release_firmware(ar->otp);
283
284 if (ar->firmware && !IS_ERR(ar->firmware))
285 release_firmware(ar->firmware);
286
Kalle Valo36527912013-09-27 19:54:55 +0300287 ar->board = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300288 ar->board_data = NULL;
289 ar->board_len = 0;
290
Michal Kazior29385052013-07-16 09:38:58 +0200291 ar->otp = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300292 ar->otp_data = NULL;
293 ar->otp_len = 0;
294
Michal Kazior29385052013-07-16 09:38:58 +0200295 ar->firmware = NULL;
Kalle Valo958df3a2013-09-27 19:55:01 +0300296 ar->firmware_data = NULL;
297 ar->firmware_len = 0;
Michal Kazior29385052013-07-16 09:38:58 +0200298}
299
Kalle Valo1a222432013-09-27 19:55:07 +0300300static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
Michal Kazior29385052013-07-16 09:38:58 +0200301{
302 int ret = 0;
303
304 if (ar->hw_params.fw.fw == NULL) {
305 ath10k_err("firmware file not defined\n");
306 return -EINVAL;
307 }
308
309 if (ar->hw_params.fw.board == NULL) {
310 ath10k_err("board data file not defined");
311 return -EINVAL;
312 }
313
Kalle Valo36527912013-09-27 19:54:55 +0300314 ar->board = ath10k_fetch_fw_file(ar,
315 ar->hw_params.fw.dir,
316 ar->hw_params.fw.board);
317 if (IS_ERR(ar->board)) {
318 ret = PTR_ERR(ar->board);
Michal Kazior29385052013-07-16 09:38:58 +0200319 ath10k_err("could not fetch board data (%d)\n", ret);
320 goto err;
321 }
322
Kalle Valo958df3a2013-09-27 19:55:01 +0300323 ar->board_data = ar->board->data;
324 ar->board_len = ar->board->size;
325
Michal Kazior29385052013-07-16 09:38:58 +0200326 ar->firmware = ath10k_fetch_fw_file(ar,
327 ar->hw_params.fw.dir,
328 ar->hw_params.fw.fw);
329 if (IS_ERR(ar->firmware)) {
330 ret = PTR_ERR(ar->firmware);
331 ath10k_err("could not fetch firmware (%d)\n", ret);
332 goto err;
333 }
334
Kalle Valo958df3a2013-09-27 19:55:01 +0300335 ar->firmware_data = ar->firmware->data;
336 ar->firmware_len = ar->firmware->size;
337
Michal Kazior29385052013-07-16 09:38:58 +0200338 /* OTP may be undefined. If so, don't fetch it at all */
339 if (ar->hw_params.fw.otp == NULL)
340 return 0;
341
342 ar->otp = ath10k_fetch_fw_file(ar,
343 ar->hw_params.fw.dir,
344 ar->hw_params.fw.otp);
345 if (IS_ERR(ar->otp)) {
346 ret = PTR_ERR(ar->otp);
347 ath10k_err("could not fetch otp (%d)\n", ret);
348 goto err;
349 }
350
Kalle Valo958df3a2013-09-27 19:55:01 +0300351 ar->otp_data = ar->otp->data;
352 ar->otp_len = ar->otp->size;
353
Michal Kazior29385052013-07-16 09:38:58 +0200354 return 0;
355
356err:
357 ath10k_core_free_firmware_files(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300358 return ret;
359}
360
Kalle Valo1a222432013-09-27 19:55:07 +0300361static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
362{
363 size_t magic_len, len, ie_len;
364 int ie_id, i, index, bit, ret;
365 struct ath10k_fw_ie *hdr;
366 const u8 *data;
367 __le32 *timestamp;
368
369 /* first fetch the firmware file (firmware-*.bin) */
370 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
371 if (IS_ERR(ar->firmware)) {
Ben Greear53c02282014-03-24 12:20:41 -0700372 ath10k_err("could not fetch firmware file '%s/%s': %ld\n",
373 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
Kalle Valo1a222432013-09-27 19:55:07 +0300374 return PTR_ERR(ar->firmware);
375 }
376
377 data = ar->firmware->data;
378 len = ar->firmware->size;
379
380 /* magic also includes the null byte, check that as well */
381 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
382
383 if (len < magic_len) {
Ben Greear53c02282014-03-24 12:20:41 -0700384 ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n",
385 ar->hw_params.fw.dir, name, len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200386 ret = -EINVAL;
387 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300388 }
389
390 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
Ben Greear53c02282014-03-24 12:20:41 -0700391 ath10k_err("invalid firmware magic\n");
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200392 ret = -EINVAL;
393 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300394 }
395
396 /* jump over the padding */
397 magic_len = ALIGN(magic_len, 4);
398
399 len -= magic_len;
400 data += magic_len;
401
402 /* loop elements */
403 while (len > sizeof(struct ath10k_fw_ie)) {
404 hdr = (struct ath10k_fw_ie *)data;
405
406 ie_id = le32_to_cpu(hdr->id);
407 ie_len = le32_to_cpu(hdr->len);
408
409 len -= sizeof(*hdr);
410 data += sizeof(*hdr);
411
412 if (len < ie_len) {
Ben Greear53c02282014-03-24 12:20:41 -0700413 ath10k_err("invalid length for FW IE %d (%zu < %zu)\n",
Kalle Valo1a222432013-09-27 19:55:07 +0300414 ie_id, len, ie_len);
Michal Kazior9bab1cc2013-10-04 08:13:20 +0200415 ret = -EINVAL;
416 goto err;
Kalle Valo1a222432013-09-27 19:55:07 +0300417 }
418
419 switch (ie_id) {
420 case ATH10K_FW_IE_FW_VERSION:
421 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
422 break;
423
424 memcpy(ar->hw->wiphy->fw_version, data, ie_len);
425 ar->hw->wiphy->fw_version[ie_len] = '\0';
426
427 ath10k_dbg(ATH10K_DBG_BOOT,
428 "found fw version %s\n",
429 ar->hw->wiphy->fw_version);
430 break;
431 case ATH10K_FW_IE_TIMESTAMP:
432 if (ie_len != sizeof(u32))
433 break;
434
435 timestamp = (__le32 *)data;
436
437 ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
438 le32_to_cpup(timestamp));
439 break;
440 case ATH10K_FW_IE_FEATURES:
441 ath10k_dbg(ATH10K_DBG_BOOT,
442 "found firmware features ie (%zd B)\n",
443 ie_len);
444
445 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
446 index = i / 8;
447 bit = i % 8;
448
449 if (index == ie_len)
450 break;
451
Ben Greearf591a1a2014-02-04 19:51:38 +0200452 if (data[index] & (1 << bit)) {
453 ath10k_dbg(ATH10K_DBG_BOOT,
454 "Enabling feature bit: %i\n",
455 i);
Kalle Valo1a222432013-09-27 19:55:07 +0300456 __set_bit(i, ar->fw_features);
Ben Greearf591a1a2014-02-04 19:51:38 +0200457 }
Kalle Valo1a222432013-09-27 19:55:07 +0300458 }
459
460 ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
461 ar->fw_features,
462 sizeof(ar->fw_features));
463 break;
464 case ATH10K_FW_IE_FW_IMAGE:
465 ath10k_dbg(ATH10K_DBG_BOOT,
466 "found fw image ie (%zd B)\n",
467 ie_len);
468
469 ar->firmware_data = data;
470 ar->firmware_len = ie_len;
471
472 break;
473 case ATH10K_FW_IE_OTP_IMAGE:
474 ath10k_dbg(ATH10K_DBG_BOOT,
475 "found otp image ie (%zd B)\n",
476 ie_len);
477
478 ar->otp_data = data;
479 ar->otp_len = ie_len;
480
481 break;
482 default:
483 ath10k_warn("Unknown FW IE: %u\n",
484 le32_to_cpu(hdr->id));
485 break;
486 }
487
488 /* jump over the padding */
489 ie_len = ALIGN(ie_len, 4);
490
491 len -= ie_len;
492 data += ie_len;
Fengguang Wue05634e2013-10-08 21:48:15 +0300493 }
Kalle Valo1a222432013-09-27 19:55:07 +0300494
495 if (!ar->firmware_data || !ar->firmware_len) {
Ben Greear53c02282014-03-24 12:20:41 -0700496 ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
497 ar->hw_params.fw.dir, name);
Kalle Valo1a222432013-09-27 19:55:07 +0300498 ret = -ENOMEDIUM;
499 goto err;
500 }
501
502 /* now fetch the board file */
503 if (ar->hw_params.fw.board == NULL) {
504 ath10k_err("board data file not defined");
505 ret = -EINVAL;
506 goto err;
507 }
508
509 ar->board = ath10k_fetch_fw_file(ar,
510 ar->hw_params.fw.dir,
511 ar->hw_params.fw.board);
512 if (IS_ERR(ar->board)) {
513 ret = PTR_ERR(ar->board);
Ben Greear53c02282014-03-24 12:20:41 -0700514 ath10k_err("could not fetch board data '%s/%s' (%d)\n",
515 ar->hw_params.fw.dir, ar->hw_params.fw.board,
516 ret);
Kalle Valo1a222432013-09-27 19:55:07 +0300517 goto err;
518 }
519
520 ar->board_data = ar->board->data;
521 ar->board_len = ar->board->size;
522
523 return 0;
524
525err:
526 ath10k_core_free_firmware_files(ar);
527 return ret;
528}
529
530static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
531{
532 int ret;
533
Ben Greear53c02282014-03-24 12:20:41 -0700534 ar->fw_api = 2;
535 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
536
Kalle Valo1a222432013-09-27 19:55:07 +0300537 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
Ben Greear53c02282014-03-24 12:20:41 -0700538 if (ret == 0)
539 goto success;
540
541 ar->fw_api = 1;
542 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
Kalle Valo1a222432013-09-27 19:55:07 +0300543
544 ret = ath10k_core_fetch_firmware_api_1(ar);
545 if (ret)
546 return ret;
547
Ben Greear53c02282014-03-24 12:20:41 -0700548success:
Kalle Valo1a222432013-09-27 19:55:07 +0300549 ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
550
551 return 0;
552}
553
Kalle Valo5e3dd152013-06-12 20:52:10 +0300554static int ath10k_init_download_firmware(struct ath10k *ar)
555{
556 int ret;
557
558 ret = ath10k_download_board_data(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700559 if (ret) {
560 ath10k_err("failed to download board data: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300561 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700562 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300563
564 ret = ath10k_download_and_run_otp(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700565 if (ret) {
566 ath10k_err("failed to run otp: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300567 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700568 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300569
570 ret = ath10k_download_fw(ar);
Ben Greear36a8f412014-03-24 12:20:42 -0700571 if (ret) {
572 ath10k_err("failed to download firmware: %d\n", ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300573 return ret;
Ben Greear36a8f412014-03-24 12:20:42 -0700574 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300575
576 return ret;
577}
578
579static int ath10k_init_uart(struct ath10k *ar)
580{
581 int ret;
582
583 /*
584 * Explicitly setting UART prints to zero as target turns it on
585 * based on scratch registers.
586 */
587 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
588 if (ret) {
589 ath10k_warn("could not disable UART prints (%d)\n", ret);
590 return ret;
591 }
592
Kalle Valoc8c39af2013-11-20 10:00:41 +0200593 if (!uart_print)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300595
596 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
597 if (ret) {
598 ath10k_warn("could not enable UART prints (%d)\n", ret);
599 return ret;
600 }
601
602 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
603 if (ret) {
604 ath10k_warn("could not enable UART prints (%d)\n", ret);
605 return ret;
606 }
607
Bartosz Markowski03fc1372013-09-03 14:24:02 +0200608 /* Set the UART baud rate to 19200. */
609 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
610 if (ret) {
611 ath10k_warn("could not set the baud rate (%d)\n", ret);
612 return ret;
613 }
614
Kalle Valo5e3dd152013-06-12 20:52:10 +0300615 ath10k_info("UART prints enabled\n");
616 return 0;
617}
618
619static int ath10k_init_hw_params(struct ath10k *ar)
620{
621 const struct ath10k_hw_params *uninitialized_var(hw_params);
622 int i;
623
624 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
625 hw_params = &ath10k_hw_params_list[i];
626
627 if (hw_params->id == ar->target_version)
628 break;
629 }
630
631 if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
632 ath10k_err("Unsupported hardware version: 0x%x\n",
633 ar->target_version);
634 return -EINVAL;
635 }
636
637 ar->hw_params = *hw_params;
638
Kalle Valoc8c39af2013-11-20 10:00:41 +0200639 ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
640 ar->hw_params.name, ar->target_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300641
642 return 0;
643}
644
Michal Kazioraffd3212013-07-16 09:54:35 +0200645static void ath10k_core_restart(struct work_struct *work)
646{
647 struct ath10k *ar = container_of(work, struct ath10k, restart_work);
648
649 mutex_lock(&ar->conf_mutex);
650
651 switch (ar->state) {
652 case ATH10K_STATE_ON:
Michal Kazioraffd3212013-07-16 09:54:35 +0200653 ar->state = ATH10K_STATE_RESTARTING;
Michal Kazior216a1832014-04-23 19:30:04 +0300654 ath10k_halt(ar);
Michal Kazioraffd3212013-07-16 09:54:35 +0200655 ieee80211_restart_hw(ar->hw);
656 break;
657 case ATH10K_STATE_OFF:
Michal Kazior5e90de82013-10-16 16:46:05 +0300658 /* this can happen if driver is being unloaded
659 * or if the crash happens during FW probing */
Michal Kazioraffd3212013-07-16 09:54:35 +0200660 ath10k_warn("cannot restart a device that hasn't been started\n");
661 break;
662 case ATH10K_STATE_RESTARTING:
663 case ATH10K_STATE_RESTARTED:
664 ar->state = ATH10K_STATE_WEDGED;
665 /* fall through */
666 case ATH10K_STATE_WEDGED:
667 ath10k_warn("device is wedged, will not restart\n");
668 break;
669 }
670
671 mutex_unlock(&ar->conf_mutex);
672}
673
Michal Kaziordd30a362013-07-16 09:38:51 +0200674int ath10k_core_start(struct ath10k *ar)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300675{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300676 int status;
677
Kalle Valo60631c52013-10-08 21:45:25 +0300678 lockdep_assert_held(&ar->conf_mutex);
679
Michal Kazior64d151d2013-07-16 09:38:53 +0200680 ath10k_bmi_start(ar);
681
Kalle Valo5e3dd152013-06-12 20:52:10 +0300682 if (ath10k_init_configure_target(ar)) {
683 status = -EINVAL;
684 goto err;
685 }
686
687 status = ath10k_init_download_firmware(ar);
688 if (status)
689 goto err;
690
691 status = ath10k_init_uart(ar);
692 if (status)
693 goto err;
694
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300695 ar->htc.htc_ops.target_send_suspend_complete =
696 ath10k_send_suspend_complete;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300697
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300698 status = ath10k_htc_init(ar);
699 if (status) {
700 ath10k_err("could not init HTC (%d)\n", status);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300701 goto err;
702 }
703
704 status = ath10k_bmi_done(ar);
705 if (status)
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300706 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300707
708 status = ath10k_wmi_attach(ar);
709 if (status) {
710 ath10k_err("WMI attach failed: %d\n", status);
Michal Kaziorcd003fa2013-07-05 16:15:13 +0300711 goto err;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300712 }
713
Michal Kazior95bf21f2014-05-16 17:15:39 +0300714 status = ath10k_htt_init(ar);
715 if (status) {
716 ath10k_err("failed to init htt: %d\n", status);
717 goto err_wmi_detach;
718 }
719
720 status = ath10k_htt_tx_alloc(&ar->htt);
721 if (status) {
722 ath10k_err("failed to alloc htt tx: %d\n", status);
723 goto err_wmi_detach;
724 }
725
726 status = ath10k_htt_rx_alloc(&ar->htt);
727 if (status) {
728 ath10k_err("failed to alloc htt rx: %d\n", status);
729 goto err_htt_tx_detach;
730 }
731
Michal Kazior67e3c632013-11-08 08:05:18 +0100732 status = ath10k_hif_start(ar);
733 if (status) {
734 ath10k_err("could not start HIF: %d\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300735 goto err_htt_rx_detach;
Michal Kazior67e3c632013-11-08 08:05:18 +0100736 }
737
738 status = ath10k_htc_wait_target(&ar->htc);
739 if (status) {
740 ath10k_err("failed to connect to HTC: %d\n", status);
741 goto err_hif_stop;
742 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300743
Michal Kazior95bf21f2014-05-16 17:15:39 +0300744 status = ath10k_htt_connect(&ar->htt);
Michal Kazioredb82362013-07-05 16:15:14 +0300745 if (status) {
Michal Kazior95bf21f2014-05-16 17:15:39 +0300746 ath10k_err("failed to connect htt (%d)\n", status);
Michal Kazior67e3c632013-11-08 08:05:18 +0100747 goto err_hif_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300748 }
749
Michal Kazior95bf21f2014-05-16 17:15:39 +0300750 status = ath10k_wmi_connect(ar);
751 if (status) {
752 ath10k_err("could not connect wmi: %d\n", status);
753 goto err_hif_stop;
754 }
755
756 status = ath10k_htc_start(&ar->htc);
757 if (status) {
758 ath10k_err("failed to start htc: %d\n", status);
759 goto err_hif_stop;
760 }
761
762 status = ath10k_wmi_wait_for_service_ready(ar);
763 if (status <= 0) {
764 ath10k_warn("wmi service ready event not received");
765 status = -ETIMEDOUT;
766 goto err_htc_stop;
767 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300768
Kalle Valoc8c39af2013-11-20 10:00:41 +0200769 ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
770 ar->hw->wiphy->fw_version);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300771
Kalle Valo5e3dd152013-06-12 20:52:10 +0300772 status = ath10k_wmi_cmd_init(ar);
773 if (status) {
774 ath10k_err("could not send WMI init command (%d)\n", status);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300775 goto err_htc_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300776 }
777
778 status = ath10k_wmi_wait_for_unified_ready(ar);
779 if (status <= 0) {
780 ath10k_err("wmi unified ready event not received\n");
781 status = -ETIMEDOUT;
Michal Kazior95bf21f2014-05-16 17:15:39 +0300782 goto err_htc_stop;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300783 }
784
Michal Kazior95bf21f2014-05-16 17:15:39 +0300785 status = ath10k_htt_setup(&ar->htt);
786 if (status) {
787 ath10k_err("failed to setup htt: %d\n", status);
788 goto err_htc_stop;
789 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300790
Kalle Valodb66ea02013-09-03 11:44:03 +0300791 status = ath10k_debug_start(ar);
792 if (status)
Michal Kazior95bf21f2014-05-16 17:15:39 +0300793 goto err_htc_stop;
Kalle Valodb66ea02013-09-03 11:44:03 +0300794
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200795 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
Michal Kazior05791192013-10-16 15:44:45 +0300796 INIT_LIST_HEAD(&ar->arvifs);
Michal Kazior1a1b8a82013-07-16 09:38:55 +0200797
Kalle Valo650b91f2013-11-20 10:00:49 +0200798 if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags))
Kalle Valoc5086712014-03-28 09:33:04 +0200799 ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n",
800 ar->hw_params.name,
801 ar->target_version,
802 ar->chip_id,
803 ar->hw->wiphy->fw_version,
804 ar->fw_api,
Kalle Valo650b91f2013-11-20 10:00:49 +0200805 ar->htt.target_version_major,
806 ar->htt.target_version_minor);
807
808 __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags);
Kalle Valoc8c39af2013-11-20 10:00:41 +0200809
Michal Kaziordd30a362013-07-16 09:38:51 +0200810 return 0;
811
Michal Kazior95bf21f2014-05-16 17:15:39 +0300812err_htc_stop:
Michal Kaziordd30a362013-07-16 09:38:51 +0200813 ath10k_htc_stop(&ar->htc);
Michal Kazior67e3c632013-11-08 08:05:18 +0100814err_hif_stop:
815 ath10k_hif_stop(ar);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300816err_htt_rx_detach:
817 ath10k_htt_rx_free(&ar->htt);
818err_htt_tx_detach:
819 ath10k_htt_tx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200820err_wmi_detach:
821 ath10k_wmi_detach(ar);
822err:
823 return status;
824}
Michal Kazior818bdd12013-07-16 09:38:57 +0200825EXPORT_SYMBOL(ath10k_core_start);
Michal Kaziordd30a362013-07-16 09:38:51 +0200826
Marek Puzyniak00f54822014-02-10 17:14:24 +0100827int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
828{
829 int ret;
830
831 reinit_completion(&ar->target_suspend);
832
833 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
834 if (ret) {
835 ath10k_warn("could not suspend target (%d)\n", ret);
836 return ret;
837 }
838
839 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
840
841 if (ret == 0) {
842 ath10k_warn("suspend timed out - target pause event never came\n");
843 return -ETIMEDOUT;
844 }
845
846 return 0;
847}
848
Michal Kaziordd30a362013-07-16 09:38:51 +0200849void ath10k_core_stop(struct ath10k *ar)
850{
Kalle Valo60631c52013-10-08 21:45:25 +0300851 lockdep_assert_held(&ar->conf_mutex);
852
Marek Puzyniak00f54822014-02-10 17:14:24 +0100853 /* try to suspend target */
Michal Kazior216a1832014-04-23 19:30:04 +0300854 if (ar->state != ATH10K_STATE_RESTARTING)
855 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
856
Kalle Valodb66ea02013-09-03 11:44:03 +0300857 ath10k_debug_stop(ar);
Michal Kaziordd30a362013-07-16 09:38:51 +0200858 ath10k_htc_stop(&ar->htc);
Michal Kazior95bf21f2014-05-16 17:15:39 +0300859 ath10k_hif_stop(ar);
860 ath10k_htt_tx_free(&ar->htt);
861 ath10k_htt_rx_free(&ar->htt);
Michal Kaziordd30a362013-07-16 09:38:51 +0200862 ath10k_wmi_detach(ar);
863}
Michal Kazior818bdd12013-07-16 09:38:57 +0200864EXPORT_SYMBOL(ath10k_core_stop);
865
866/* mac80211 manages fw/hw initialization through start/stop hooks. However in
867 * order to know what hw capabilities should be advertised to mac80211 it is
868 * necessary to load the firmware (and tear it down immediately since start
869 * hook will try to init it again) before registering */
870static int ath10k_core_probe_fw(struct ath10k *ar)
871{
Michal Kazior29385052013-07-16 09:38:58 +0200872 struct bmi_target_info target_info;
873 int ret = 0;
Michal Kazior818bdd12013-07-16 09:38:57 +0200874
875 ret = ath10k_hif_power_up(ar);
876 if (ret) {
877 ath10k_err("could not start pci hif (%d)\n", ret);
878 return ret;
879 }
880
Michal Kazior29385052013-07-16 09:38:58 +0200881 memset(&target_info, 0, sizeof(target_info));
882 ret = ath10k_bmi_get_target_info(ar, &target_info);
883 if (ret) {
884 ath10k_err("could not get target info (%d)\n", ret);
885 ath10k_hif_power_down(ar);
886 return ret;
887 }
888
889 ar->target_version = target_info.version;
890 ar->hw->wiphy->hw_version = target_info.version;
891
892 ret = ath10k_init_hw_params(ar);
893 if (ret) {
894 ath10k_err("could not get hw params (%d)\n", ret);
895 ath10k_hif_power_down(ar);
896 return ret;
897 }
898
899 ret = ath10k_core_fetch_firmware_files(ar);
900 if (ret) {
901 ath10k_err("could not fetch firmware files (%d)\n", ret);
902 ath10k_hif_power_down(ar);
903 return ret;
904 }
905
Kalle Valo60631c52013-10-08 21:45:25 +0300906 mutex_lock(&ar->conf_mutex);
907
Michal Kazior818bdd12013-07-16 09:38:57 +0200908 ret = ath10k_core_start(ar);
909 if (ret) {
910 ath10k_err("could not init core (%d)\n", ret);
Michal Kazior29385052013-07-16 09:38:58 +0200911 ath10k_core_free_firmware_files(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200912 ath10k_hif_power_down(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300913 mutex_unlock(&ar->conf_mutex);
Michal Kazior818bdd12013-07-16 09:38:57 +0200914 return ret;
915 }
916
917 ath10k_core_stop(ar);
Kalle Valo60631c52013-10-08 21:45:25 +0300918
919 mutex_unlock(&ar->conf_mutex);
920
Michal Kazior818bdd12013-07-16 09:38:57 +0200921 ath10k_hif_power_down(ar);
922 return 0;
923}
Michal Kaziordd30a362013-07-16 09:38:51 +0200924
Kalle Valoe01ae682013-09-01 11:22:14 +0300925static int ath10k_core_check_chip_id(struct ath10k *ar)
926{
927 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
928
Kalle Valoeffea962013-09-08 17:55:44 +0300929 ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
930 ar->chip_id, hw_revision);
931
Kalle Valoe01ae682013-09-01 11:22:14 +0300932 /* Check that we are not using hw1.0 (some of them have same pci id
933 * as hw2.0) before doing anything else as ath10k crashes horribly
934 * due to missing hw1.0 workarounds. */
935 switch (hw_revision) {
936 case QCA988X_HW_1_0_CHIP_ID_REV:
937 ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
938 return -EOPNOTSUPP;
939
940 case QCA988X_HW_2_0_CHIP_ID_REV:
941 /* known hardware revision, continue normally */
942 return 0;
943
944 default:
945 ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
946 ar->chip_id);
947 return 0;
948 }
949
950 return 0;
951}
952
Michal Kazior6782cb62014-05-23 12:28:47 +0200953static void ath10k_core_register_work(struct work_struct *work)
Michal Kaziordd30a362013-07-16 09:38:51 +0200954{
Michal Kazior6782cb62014-05-23 12:28:47 +0200955 struct ath10k *ar = container_of(work, struct ath10k, register_work);
Michal Kaziordd30a362013-07-16 09:38:51 +0200956 int status;
957
Michal Kazior818bdd12013-07-16 09:38:57 +0200958 status = ath10k_core_probe_fw(ar);
959 if (status) {
960 ath10k_err("could not probe fw (%d)\n", status);
Michal Kazior6782cb62014-05-23 12:28:47 +0200961 goto err;
Michal Kazior818bdd12013-07-16 09:38:57 +0200962 }
Michal Kaziordd30a362013-07-16 09:38:51 +0200963
Kalle Valo5e3dd152013-06-12 20:52:10 +0300964 status = ath10k_mac_register(ar);
Michal Kazior818bdd12013-07-16 09:38:57 +0200965 if (status) {
966 ath10k_err("could not register to mac80211 (%d)\n", status);
Michal Kazior29385052013-07-16 09:38:58 +0200967 goto err_release_fw;
Michal Kazior818bdd12013-07-16 09:38:57 +0200968 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300969
970 status = ath10k_debug_create(ar);
971 if (status) {
972 ath10k_err("unable to initialize debugfs\n");
973 goto err_unregister_mac;
974 }
975
Michal Kazior6782cb62014-05-23 12:28:47 +0200976 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
977 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300978
979err_unregister_mac:
980 ath10k_mac_unregister(ar);
Michal Kazior29385052013-07-16 09:38:58 +0200981err_release_fw:
982 ath10k_core_free_firmware_files(ar);
Michal Kazior6782cb62014-05-23 12:28:47 +0200983err:
984 device_release_driver(ar->dev);
985 return;
986}
987
988int ath10k_core_register(struct ath10k *ar, u32 chip_id)
989{
990 int status;
991
992 ar->chip_id = chip_id;
993
994 status = ath10k_core_check_chip_id(ar);
995 if (status) {
996 ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
997 return status;
998 }
999
1000 queue_work(ar->workqueue, &ar->register_work);
1001
1002 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001003}
1004EXPORT_SYMBOL(ath10k_core_register);
1005
1006void ath10k_core_unregister(struct ath10k *ar)
1007{
Michal Kazior6782cb62014-05-23 12:28:47 +02001008 cancel_work_sync(&ar->register_work);
1009
1010 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
1011 return;
1012
Kalle Valo5e3dd152013-06-12 20:52:10 +03001013 /* We must unregister from mac80211 before we stop HTC and HIF.
1014 * Otherwise we will fail to submit commands to FW and mac80211 will be
1015 * unhappy about callback failures. */
1016 ath10k_mac_unregister(ar);
Kalle Valodb66ea02013-09-03 11:44:03 +03001017
Michal Kazior29385052013-07-16 09:38:58 +02001018 ath10k_core_free_firmware_files(ar);
Ben Greear6f1f56e2013-11-04 09:18:16 -08001019
1020 ath10k_debug_destroy(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001021}
1022EXPORT_SYMBOL(ath10k_core_unregister);
1023
Michal Kazior0d0a6932014-05-23 12:28:45 +02001024struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
1025 const struct ath10k_hif_ops *hif_ops)
1026{
1027 struct ath10k *ar;
1028
1029 ar = ath10k_mac_create();
1030 if (!ar)
1031 return NULL;
1032
1033 ar->ath_common.priv = ar;
1034 ar->ath_common.hw = ar->hw;
1035
1036 ar->p2p = !!ath10k_p2p;
1037 ar->dev = dev;
1038
1039 ar->hif.priv = hif_priv;
1040 ar->hif.ops = hif_ops;
1041
1042 init_completion(&ar->scan.started);
1043 init_completion(&ar->scan.completed);
1044 init_completion(&ar->scan.on_channel);
1045 init_completion(&ar->target_suspend);
1046
1047 init_completion(&ar->install_key_done);
1048 init_completion(&ar->vdev_setup_done);
1049
1050 setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
1051
1052 ar->workqueue = create_singlethread_workqueue("ath10k_wq");
1053 if (!ar->workqueue)
1054 goto err_wq;
1055
1056 mutex_init(&ar->conf_mutex);
1057 spin_lock_init(&ar->data_lock);
1058
1059 INIT_LIST_HEAD(&ar->peers);
1060 init_waitqueue_head(&ar->peer_mapping_wq);
1061
1062 init_completion(&ar->offchan_tx_completed);
1063 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
1064 skb_queue_head_init(&ar->offchan_tx_queue);
1065
1066 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
1067 skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
1068
Michal Kazior6782cb62014-05-23 12:28:47 +02001069 INIT_WORK(&ar->register_work, ath10k_core_register_work);
Michal Kazior0d0a6932014-05-23 12:28:45 +02001070 INIT_WORK(&ar->restart_work, ath10k_core_restart);
1071
1072 return ar;
1073
1074err_wq:
1075 ath10k_mac_destroy(ar);
1076 return NULL;
1077}
1078EXPORT_SYMBOL(ath10k_core_create);
1079
1080void ath10k_core_destroy(struct ath10k *ar)
1081{
1082 flush_workqueue(ar->workqueue);
1083 destroy_workqueue(ar->workqueue);
1084
1085 ath10k_mac_destroy(ar);
1086}
1087EXPORT_SYMBOL(ath10k_core_destroy);
1088
Kalle Valo5e3dd152013-06-12 20:52:10 +03001089MODULE_AUTHOR("Qualcomm Atheros");
1090MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1091MODULE_LICENSE("Dual BSD/GPL");