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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* yellowfin.c: A Packet Engines G-NIC ethernet driver for linux. */
2/*
3 Written 1997-2001 by Donald Becker.
4
5 This software may be used and distributed according to the terms of
6 the GNU General Public License (GPL), incorporated herein by reference.
7 Drivers based on or derived from this code fall under the GPL and must
8 retain the authorship, copyright and license notice. This file is not
9 a complete program and may only be used when the entire operating
10 system is licensed under the GPL.
11
12 This driver is for the Packet Engines G-NIC PCI Gigabit Ethernet adapter.
13 It also supports the Symbios Logic version of the same chip core.
14
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
18 Annapolis MD 21403
19
20 Support and updates available at
21 http://www.scyld.com/network/yellowfin.html
Jeff Garzik03a8c662006-06-27 07:57:22 -040022 [link no longer provides useful info -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Linus Torvalds1da177e2005-04-16 15:20:36 -070024*/
25
26#define DRV_NAME "yellowfin"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040027#define DRV_VERSION "2.1"
28#define DRV_RELDATE "Sep 11, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#define PFX DRV_NAME ": "
31
32/* The user-configurable values.
33 These may be modified when a driver module is loaded.*/
34
35static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
36/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
37static int max_interrupt_work = 20;
38static int mtu;
39#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
40/* System-wide count of bogus-rx frames. */
41static int bogus_rx;
42static int dma_ctrl = 0x004A0263; /* Constrained by errata */
43static int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
44#elif defined(YF_NEW) /* A future perfect board :->. */
45static int dma_ctrl = 0x00CAC277; /* Override when loading module! */
46static int fifo_cfg = 0x0028;
47#else
Arjan van de Venf71e1302006-03-03 21:33:57 -050048static const int dma_ctrl = 0x004A0263; /* Constrained by errata */
49static const int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
Linus Torvalds1da177e2005-04-16 15:20:36 -070050#endif
51
52/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
53 Setting to > 1514 effectively disables this feature. */
54static int rx_copybreak;
55
56/* Used to pass the media type, etc.
57 No media types are currently defined. These exist for driver
58 interoperability.
59*/
60#define MAX_UNITS 8 /* More are supported, limit only on options */
61static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
62static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
63
64/* Do ugly workaround for GX server chipset errata. */
65static int gx_fix;
66
67/* Operational parameters that are set at compile time. */
68
69/* Keep the ring sizes a power of two for efficiency.
70 Making the Tx ring too long decreases the effectiveness of channel
71 bonding and packet priority.
72 There are no ill effects from too-large receive rings. */
73#define TX_RING_SIZE 16
74#define TX_QUEUE_SIZE 12 /* Must be > 4 && <= TX_RING_SIZE */
75#define RX_RING_SIZE 64
76#define STATUS_TOTAL_SIZE TX_RING_SIZE*sizeof(struct tx_status_words)
77#define TX_TOTAL_SIZE 2*TX_RING_SIZE*sizeof(struct yellowfin_desc)
78#define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct yellowfin_desc)
79
80/* Operational parameters that usually are not changed. */
81/* Time in jiffies before concluding the transmitter is hung. */
82#define TX_TIMEOUT (2*HZ)
83#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
84
85#define yellowfin_debug debug
86
87#include <linux/module.h>
88#include <linux/kernel.h>
89#include <linux/string.h>
90#include <linux/timer.h>
91#include <linux/errno.h>
92#include <linux/ioport.h>
93#include <linux/slab.h>
94#include <linux/interrupt.h>
95#include <linux/pci.h>
96#include <linux/init.h>
97#include <linux/mii.h>
98#include <linux/netdevice.h>
99#include <linux/etherdevice.h>
100#include <linux/skbuff.h>
101#include <linux/ethtool.h>
102#include <linux/crc32.h>
103#include <linux/bitops.h>
104#include <asm/uaccess.h>
105#include <asm/processor.h> /* Processor type for cache alignment. */
106#include <asm/unaligned.h>
107#include <asm/io.h>
108
109/* These identify the driver base version and may not be removed. */
Stephen Hemminger72854842009-02-26 10:19:27 +0000110static const char version[] __devinitconst =
111 KERN_INFO DRV_NAME ".c:v1.05 1/09/2001 Written by Donald Becker <becker@scyld.com>\n"
112 KERN_INFO " (unofficial 2.4.x port, " DRV_VERSION ", " DRV_RELDATE ")\n";
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
114MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
115MODULE_DESCRIPTION("Packet Engines Yellowfin G-NIC Gigabit Ethernet driver");
116MODULE_LICENSE("GPL");
117
118module_param(max_interrupt_work, int, 0);
119module_param(mtu, int, 0);
120module_param(debug, int, 0);
121module_param(rx_copybreak, int, 0);
122module_param_array(options, int, NULL, 0);
123module_param_array(full_duplex, int, NULL, 0);
124module_param(gx_fix, int, 0);
125MODULE_PARM_DESC(max_interrupt_work, "G-NIC maximum events handled per interrupt");
126MODULE_PARM_DESC(mtu, "G-NIC MTU (all boards)");
127MODULE_PARM_DESC(debug, "G-NIC debug level (0-7)");
128MODULE_PARM_DESC(rx_copybreak, "G-NIC copy breakpoint for copy-only-tiny-frames");
129MODULE_PARM_DESC(options, "G-NIC: Bits 0-3: media type, bit 17: full duplex");
130MODULE_PARM_DESC(full_duplex, "G-NIC full duplex setting(s) (1)");
131MODULE_PARM_DESC(gx_fix, "G-NIC: enable GX server chipset bug workaround (0-1)");
132
133/*
134 Theory of Operation
135
136I. Board Compatibility
137
138This device driver is designed for the Packet Engines "Yellowfin" Gigabit
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400139Ethernet adapter. The G-NIC 64-bit PCI card is supported, as well as the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140Symbios 53C885E dual function chip.
141
142II. Board-specific settings
143
144PCI bus devices are configured by the system at boot time, so no jumpers
145need to be set on the board. The system BIOS preferably should assign the
146PCI INTA signal to an otherwise unused system IRQ line.
147Note: Kernel versions earlier than 1.3.73 do not support shared PCI
148interrupt lines.
149
150III. Driver operation
151
152IIIa. Ring buffers
153
154The Yellowfin uses the Descriptor Based DMA Architecture specified by Apple.
155This is a descriptor list scheme similar to that used by the EEPro100 and
156Tulip. This driver uses two statically allocated fixed-size descriptor lists
157formed into rings by a branch from the final descriptor to the beginning of
158the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
159
160The driver allocates full frame size skbuffs for the Rx ring buffers at
161open() time and passes the skb->data field to the Yellowfin as receive data
162buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
163a fresh skbuff is allocated and the frame is copied to the new skbuff.
164When the incoming frame is larger, the skbuff is passed directly up the
165protocol stack and replaced by a newly allocated skbuff.
166
167The RX_COPYBREAK value is chosen to trade-off the memory wasted by
168using a full-sized skbuff for small frames vs. the copying costs of larger
169frames. For small frames the copying cost is negligible (esp. considering
170that we are pre-loading the cache with immediately useful header
171information). For large frames the copying cost is non-trivial, and the
172larger copy might flush the cache of useful data.
173
174IIIC. Synchronization
175
176The driver runs as two independent, single-threaded flows of control. One
177is the send-packet routine, which enforces single-threaded use by the
178dev->tbusy flag. The other thread is the interrupt handler, which is single
179threaded by the hardware and other software.
180
181The send packet thread has partial control over the Tx ring and 'dev->tbusy'
182flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
183queue slot is empty, it clears the tbusy flag when finished otherwise it sets
184the 'yp->tx_full' flag.
185
186The interrupt handler has exclusive control over the Rx ring and records stats
187from the Tx ring. After reaping the stats, it marks the Tx queue entry as
188empty by incrementing the dirty_tx mark. Iff the 'yp->tx_full' flag is set, it
189clears both the tx_full and tbusy flags.
190
191IV. Notes
192
193Thanks to Kim Stearns of Packet Engines for providing a pair of G-NIC boards.
194Thanks to Bruce Faust of Digitalscape for providing both their SYM53C885 board
195and an AlphaStation to verifty the Alpha port!
196
197IVb. References
198
199Yellowfin Engineering Design Specification, 4/23/97 Preliminary/Confidential
200Symbios SYM53C885 PCI-SCSI/Fast Ethernet Multifunction Controller Preliminary
201 Data Manual v3.0
202http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
203http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
204
205IVc. Errata
206
207See Packet Engines confidential appendix (prototype chips only).
208*/
209
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400210
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212enum capability_flags {
213 HasMII=1, FullTxStatus=2, IsGigabit=4, HasMulticastBug=8, FullRxStatus=16,
214 HasMACAddrBug=32, /* Only on early revs. */
215 DontUseEeprom=64, /* Don't read the MAC from the EEPROm. */
216};
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400217
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218/* The PCI I/O space extent. */
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400219enum {
220 YELLOWFIN_SIZE = 0x100,
221};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223struct pci_id_info {
224 const char *name;
225 struct match_info {
226 int pci, pci_mask, subsystem, subsystem_mask;
227 int revision, revision_mask; /* Only 8 bits. */
228 } id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 int drv_flags; /* Driver use, intended as capability flags. */
230};
231
Arjan van de Venf71e1302006-03-03 21:33:57 -0500232static const struct pci_id_info pci_id_tbl[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 {"Yellowfin G-NIC Gigabit Ethernet", { 0x07021000, 0xffffffff},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 FullTxStatus | IsGigabit | HasMulticastBug | HasMACAddrBug | DontUseEeprom},
235 {"Symbios SYM83C885", { 0x07011000, 0xffffffff},
Jeff Garzikc3d8e682006-06-27 08:54:34 -0400236 HasMII | DontUseEeprom },
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400237 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238};
239
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400240static const struct pci_device_id yellowfin_pci_tbl[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 { 0x1000, 0x0702, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
242 { 0x1000, 0x0701, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
Jeff Garzik1f1bd5f2006-06-26 23:47:50 -0400243 { }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244};
245MODULE_DEVICE_TABLE (pci, yellowfin_pci_tbl);
246
247
248/* Offsets to the Yellowfin registers. Various sizes and alignments. */
249enum yellowfin_offsets {
250 TxCtrl=0x00, TxStatus=0x04, TxPtr=0x0C,
251 TxIntrSel=0x10, TxBranchSel=0x14, TxWaitSel=0x18,
252 RxCtrl=0x40, RxStatus=0x44, RxPtr=0x4C,
253 RxIntrSel=0x50, RxBranchSel=0x54, RxWaitSel=0x58,
254 EventStatus=0x80, IntrEnb=0x82, IntrClear=0x84, IntrStatus=0x86,
255 ChipRev=0x8C, DMACtrl=0x90, TxThreshold=0x94,
256 Cnfg=0xA0, FrameGap0=0xA2, FrameGap1=0xA4,
257 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
258 MII_Status=0xAE,
259 RxDepth=0xB8, FlowCtrl=0xBC,
260 AddrMode=0xD0, StnAddr=0xD2, HashTbl=0xD8, FIFOcfg=0xF8,
261 EEStatus=0xF0, EECtrl=0xF1, EEAddr=0xF2, EERead=0xF3, EEWrite=0xF4,
262 EEFeature=0xF5,
263};
264
265/* The Yellowfin Rx and Tx buffer descriptors.
266 Elements are written as 32 bit for endian portability. */
267struct yellowfin_desc {
Al Viroe5a31422007-12-22 17:53:02 +0000268 __le32 dbdma_cmd;
269 __le32 addr;
270 __le32 branch_addr;
271 __le32 result_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700272};
273
274struct tx_status_words {
275#ifdef __BIG_ENDIAN
276 u16 tx_errs;
277 u16 tx_cnt;
278 u16 paused;
279 u16 total_tx_cnt;
280#else /* Little endian chips. */
281 u16 tx_cnt;
282 u16 tx_errs;
283 u16 total_tx_cnt;
284 u16 paused;
285#endif /* __BIG_ENDIAN */
286};
287
288/* Bits in yellowfin_desc.cmd */
289enum desc_cmd_bits {
290 CMD_TX_PKT=0x10000000, CMD_RX_BUF=0x20000000, CMD_TXSTATUS=0x30000000,
291 CMD_NOP=0x60000000, CMD_STOP=0x70000000,
292 BRANCH_ALWAYS=0x0C0000, INTR_ALWAYS=0x300000, WAIT_ALWAYS=0x030000,
293 BRANCH_IFTRUE=0x040000,
294};
295
296/* Bits in yellowfin_desc.status */
297enum desc_status_bits { RX_EOP=0x0040, };
298
299/* Bits in the interrupt status/mask registers. */
300enum intr_status_bits {
301 IntrRxDone=0x01, IntrRxInvalid=0x02, IntrRxPCIFault=0x04,IntrRxPCIErr=0x08,
302 IntrTxDone=0x10, IntrTxInvalid=0x20, IntrTxPCIFault=0x40,IntrTxPCIErr=0x80,
303 IntrEarlyRx=0x100, IntrWakeup=0x200, };
304
305#define PRIV_ALIGN 31 /* Required alignment mask */
306#define MII_CNT 4
307struct yellowfin_private {
308 /* Descriptor rings first for alignment.
309 Tx requires a second descriptor for status. */
310 struct yellowfin_desc *rx_ring;
311 struct yellowfin_desc *tx_ring;
312 struct sk_buff* rx_skbuff[RX_RING_SIZE];
313 struct sk_buff* tx_skbuff[TX_RING_SIZE];
314 dma_addr_t rx_ring_dma;
315 dma_addr_t tx_ring_dma;
316
317 struct tx_status_words *tx_status;
318 dma_addr_t tx_status_dma;
319
320 struct timer_list timer; /* Media selection timer. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 /* Frequently used and paired value: keep adjacent for cache effect. */
322 int chip_id, drv_flags;
323 struct pci_dev *pci_dev;
324 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
325 unsigned int rx_buf_sz; /* Based on MTU+slack. */
326 struct tx_status_words *tx_tail_desc;
327 unsigned int cur_tx, dirty_tx;
328 int tx_threshold;
329 unsigned int tx_full:1; /* The Tx queue is full. */
330 unsigned int full_duplex:1; /* Full-duplex operation requested. */
331 unsigned int duplex_lock:1;
332 unsigned int medialock:1; /* Do not sense media. */
333 unsigned int default_port:4; /* Last dev->if_port value. */
334 /* MII transceiver section. */
335 int mii_cnt; /* MII device addresses. */
336 u16 advertising; /* NWay media advertisement */
337 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used */
338 spinlock_t lock;
339 void __iomem *base;
340};
341
342static int read_eeprom(void __iomem *ioaddr, int location);
343static int mdio_read(void __iomem *ioaddr, int phy_id, int location);
344static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value);
345static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
346static int yellowfin_open(struct net_device *dev);
347static void yellowfin_timer(unsigned long data);
348static void yellowfin_tx_timeout(struct net_device *dev);
349static void yellowfin_init_ring(struct net_device *dev);
350static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100351static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352static int yellowfin_rx(struct net_device *dev);
353static void yellowfin_error(struct net_device *dev, int intr_status);
354static int yellowfin_close(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355static void set_rx_mode(struct net_device *dev);
Jeff Garzik7282d492006-09-13 14:30:00 -0400356static const struct ethtool_ops ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357
Stephen Hemmingerbfd82c32008-11-21 17:35:16 -0800358static const struct net_device_ops netdev_ops = {
359 .ndo_open = yellowfin_open,
360 .ndo_stop = yellowfin_close,
361 .ndo_start_xmit = yellowfin_start_xmit,
362 .ndo_set_multicast_list = set_rx_mode,
363 .ndo_change_mtu = eth_change_mtu,
364 .ndo_validate_addr = eth_validate_addr,
Stephen Hemmingerfe96aaa2009-01-09 11:13:14 +0000365 .ndo_set_mac_address = eth_mac_addr,
Stephen Hemmingerbfd82c32008-11-21 17:35:16 -0800366 .ndo_do_ioctl = netdev_ioctl,
367 .ndo_tx_timeout = yellowfin_tx_timeout,
368};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369
370static int __devinit yellowfin_init_one(struct pci_dev *pdev,
371 const struct pci_device_id *ent)
372{
373 struct net_device *dev;
374 struct yellowfin_private *np;
375 int irq;
376 int chip_idx = ent->driver_data;
377 static int find_cnt;
378 void __iomem *ioaddr;
379 int i, option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
380 int drv_flags = pci_id_tbl[chip_idx].drv_flags;
381 void *ring_space;
382 dma_addr_t ring_dma;
383#ifdef USE_IO_OPS
384 int bar = 0;
385#else
386 int bar = 1;
387#endif
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400388
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389/* when built into the kernel, we only print version if device is found */
390#ifndef MODULE
391 static int printed_version;
392 if (!printed_version++)
393 printk(version);
394#endif
395
396 i = pci_enable_device(pdev);
397 if (i) return i;
398
399 dev = alloc_etherdev(sizeof(*np));
400 if (!dev) {
401 printk (KERN_ERR PFX "cannot allocate ethernet device\n");
402 return -ENOMEM;
403 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404 SET_NETDEV_DEV(dev, &pdev->dev);
405
406 np = netdev_priv(dev);
407
408 if (pci_request_regions(pdev, DRV_NAME))
409 goto err_out_free_netdev;
410
411 pci_set_master (pdev);
412
413 ioaddr = pci_iomap(pdev, bar, YELLOWFIN_SIZE);
414 if (!ioaddr)
415 goto err_out_free_res;
416
417 irq = pdev->irq;
418
419 if (drv_flags & DontUseEeprom)
420 for (i = 0; i < 6; i++)
421 dev->dev_addr[i] = ioread8(ioaddr + StnAddr + i);
422 else {
423 int ee_offset = (read_eeprom(ioaddr, 6) == 0xff ? 0x100 : 0);
424 for (i = 0; i < 6; i++)
425 dev->dev_addr[i] = read_eeprom(ioaddr, ee_offset + i);
426 }
427
428 /* Reset the chip. */
429 iowrite32(0x80000000, ioaddr + DMACtrl);
430
431 dev->base_addr = (unsigned long)ioaddr;
432 dev->irq = irq;
433
434 pci_set_drvdata(pdev, dev);
435 spin_lock_init(&np->lock);
436
437 np->pci_dev = pdev;
438 np->chip_id = chip_idx;
439 np->drv_flags = drv_flags;
440 np->base = ioaddr;
441
442 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
443 if (!ring_space)
444 goto err_out_cleardev;
445 np->tx_ring = (struct yellowfin_desc *)ring_space;
446 np->tx_ring_dma = ring_dma;
447
448 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
449 if (!ring_space)
450 goto err_out_unmap_tx;
451 np->rx_ring = (struct yellowfin_desc *)ring_space;
452 np->rx_ring_dma = ring_dma;
453
454 ring_space = pci_alloc_consistent(pdev, STATUS_TOTAL_SIZE, &ring_dma);
455 if (!ring_space)
456 goto err_out_unmap_rx;
457 np->tx_status = (struct tx_status_words *)ring_space;
458 np->tx_status_dma = ring_dma;
459
460 if (dev->mem_start)
461 option = dev->mem_start;
462
463 /* The lower four bits are the media type. */
464 if (option > 0) {
465 if (option & 0x200)
466 np->full_duplex = 1;
467 np->default_port = option & 15;
468 if (np->default_port)
469 np->medialock = 1;
470 }
471 if (find_cnt < MAX_UNITS && full_duplex[find_cnt] > 0)
472 np->full_duplex = 1;
473
474 if (np->full_duplex)
475 np->duplex_lock = 1;
476
477 /* The Yellowfin-specific entries in the device structure. */
Stephen Hemmingerbfd82c32008-11-21 17:35:16 -0800478 dev->netdev_ops = &netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 SET_ETHTOOL_OPS(dev, &ethtool_ops);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 dev->watchdog_timeo = TX_TIMEOUT;
481
482 if (mtu)
483 dev->mtu = mtu;
484
485 i = register_netdev(dev);
486 if (i)
487 goto err_out_unmap_status;
488
Johannes Berge1749612008-10-27 15:59:26 -0700489 printk(KERN_INFO "%s: %s type %8x at %p, %pM, IRQ %d.\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490 dev->name, pci_id_tbl[chip_idx].name,
Joe Perches0795af52007-10-03 17:59:30 -0700491 ioread32(ioaddr + ChipRev), ioaddr,
Johannes Berge1749612008-10-27 15:59:26 -0700492 dev->dev_addr, irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493
494 if (np->drv_flags & HasMII) {
495 int phy, phy_idx = 0;
496 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
497 int mii_status = mdio_read(ioaddr, phy, 1);
498 if (mii_status != 0xffff && mii_status != 0x0000) {
499 np->phys[phy_idx++] = phy;
500 np->advertising = mdio_read(ioaddr, phy, 4);
501 printk(KERN_INFO "%s: MII PHY found at address %d, status "
502 "0x%4.4x advertising %4.4x.\n",
503 dev->name, phy, mii_status, np->advertising);
504 }
505 }
506 np->mii_cnt = phy_idx;
507 }
508
509 find_cnt++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400510
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 return 0;
512
513err_out_unmap_status:
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400514 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 np->tx_status_dma);
516err_out_unmap_rx:
517 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
518err_out_unmap_tx:
519 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
520err_out_cleardev:
521 pci_set_drvdata(pdev, NULL);
522 pci_iounmap(pdev, ioaddr);
523err_out_free_res:
524 pci_release_regions(pdev);
525err_out_free_netdev:
526 free_netdev (dev);
527 return -ENODEV;
528}
529
530static int __devinit read_eeprom(void __iomem *ioaddr, int location)
531{
532 int bogus_cnt = 10000; /* Typical 33Mhz: 1050 ticks */
533
534 iowrite8(location, ioaddr + EEAddr);
535 iowrite8(0x30 | ((location >> 8) & 7), ioaddr + EECtrl);
536 while ((ioread8(ioaddr + EEStatus) & 0x80) && --bogus_cnt > 0)
537 ;
538 return ioread8(ioaddr + EERead);
539}
540
541/* MII Managemen Data I/O accesses.
542 These routines assume the MDIO controller is idle, and do not exit until
543 the command is finished. */
544
545static int mdio_read(void __iomem *ioaddr, int phy_id, int location)
546{
547 int i;
548
549 iowrite16((phy_id<<8) + location, ioaddr + MII_Addr);
550 iowrite16(1, ioaddr + MII_Cmd);
551 for (i = 10000; i >= 0; i--)
552 if ((ioread16(ioaddr + MII_Status) & 1) == 0)
553 break;
554 return ioread16(ioaddr + MII_Rd_Data);
555}
556
557static void mdio_write(void __iomem *ioaddr, int phy_id, int location, int value)
558{
559 int i;
560
561 iowrite16((phy_id<<8) + location, ioaddr + MII_Addr);
562 iowrite16(value, ioaddr + MII_Wr_Data);
563
564 /* Wait for the command to finish. */
565 for (i = 10000; i >= 0; i--)
566 if ((ioread16(ioaddr + MII_Status) & 1) == 0)
567 break;
568 return;
569}
570
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400571
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572static int yellowfin_open(struct net_device *dev)
573{
574 struct yellowfin_private *yp = netdev_priv(dev);
575 void __iomem *ioaddr = yp->base;
576 int i;
577
578 /* Reset the chip. */
579 iowrite32(0x80000000, ioaddr + DMACtrl);
580
Thomas Gleixner1fb9df52006-07-01 19:29:39 -0700581 i = request_irq(dev->irq, &yellowfin_interrupt, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582 if (i) return i;
583
584 if (yellowfin_debug > 1)
585 printk(KERN_DEBUG "%s: yellowfin_open() irq %d.\n",
586 dev->name, dev->irq);
587
588 yellowfin_init_ring(dev);
589
590 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr);
591 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr);
592
593 for (i = 0; i < 6; i++)
594 iowrite8(dev->dev_addr[i], ioaddr + StnAddr + i);
595
596 /* Set up various condition 'select' registers.
597 There are no options here. */
598 iowrite32(0x00800080, ioaddr + TxIntrSel); /* Interrupt on Tx abort */
599 iowrite32(0x00800080, ioaddr + TxBranchSel); /* Branch on Tx abort */
600 iowrite32(0x00400040, ioaddr + TxWaitSel); /* Wait on Tx status */
601 iowrite32(0x00400040, ioaddr + RxIntrSel); /* Interrupt on Rx done */
602 iowrite32(0x00400040, ioaddr + RxBranchSel); /* Branch on Rx error */
603 iowrite32(0x00400040, ioaddr + RxWaitSel); /* Wait on Rx done */
604
605 /* Initialize other registers: with so many this eventually this will
606 converted to an offset/value list. */
607 iowrite32(dma_ctrl, ioaddr + DMACtrl);
608 iowrite16(fifo_cfg, ioaddr + FIFOcfg);
609 /* Enable automatic generation of flow control frames, period 0xffff. */
610 iowrite32(0x0030FFFF, ioaddr + FlowCtrl);
611
612 yp->tx_threshold = 32;
613 iowrite32(yp->tx_threshold, ioaddr + TxThreshold);
614
615 if (dev->if_port == 0)
616 dev->if_port = yp->default_port;
617
618 netif_start_queue(dev);
619
620 /* Setting the Rx mode will start the Rx process. */
621 if (yp->drv_flags & IsGigabit) {
622 /* We are always in full-duplex mode with gigabit! */
623 yp->full_duplex = 1;
624 iowrite16(0x01CF, ioaddr + Cnfg);
625 } else {
626 iowrite16(0x0018, ioaddr + FrameGap0); /* 0060/4060 for non-MII 10baseT */
627 iowrite16(0x1018, ioaddr + FrameGap1);
628 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
629 }
630 set_rx_mode(dev);
631
632 /* Enable interrupts by setting the interrupt mask. */
633 iowrite16(0x81ff, ioaddr + IntrEnb); /* See enum intr_status_bits */
634 iowrite16(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
635 iowrite32(0x80008000, ioaddr + RxCtrl); /* Start Rx and Tx channels. */
636 iowrite32(0x80008000, ioaddr + TxCtrl);
637
638 if (yellowfin_debug > 2) {
639 printk(KERN_DEBUG "%s: Done yellowfin_open().\n",
640 dev->name);
641 }
642
643 /* Set the timer to check for link beat. */
644 init_timer(&yp->timer);
645 yp->timer.expires = jiffies + 3*HZ;
646 yp->timer.data = (unsigned long)dev;
647 yp->timer.function = &yellowfin_timer; /* timer handler */
648 add_timer(&yp->timer);
649
650 return 0;
651}
652
653static void yellowfin_timer(unsigned long data)
654{
655 struct net_device *dev = (struct net_device *)data;
656 struct yellowfin_private *yp = netdev_priv(dev);
657 void __iomem *ioaddr = yp->base;
658 int next_tick = 60*HZ;
659
660 if (yellowfin_debug > 3) {
661 printk(KERN_DEBUG "%s: Yellowfin timer tick, status %8.8x.\n",
662 dev->name, ioread16(ioaddr + IntrStatus));
663 }
664
665 if (yp->mii_cnt) {
666 int bmsr = mdio_read(ioaddr, yp->phys[0], MII_BMSR);
667 int lpa = mdio_read(ioaddr, yp->phys[0], MII_LPA);
668 int negotiated = lpa & yp->advertising;
669 if (yellowfin_debug > 1)
670 printk(KERN_DEBUG "%s: MII #%d status register is %4.4x, "
671 "link partner capability %4.4x.\n",
672 dev->name, yp->phys[0], bmsr, lpa);
673
674 yp->full_duplex = mii_duplex(yp->duplex_lock, negotiated);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400675
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676 iowrite16(0x101C | (yp->full_duplex ? 2 : 0), ioaddr + Cnfg);
677
678 if (bmsr & BMSR_LSTATUS)
679 next_tick = 60*HZ;
680 else
681 next_tick = 3*HZ;
682 }
683
684 yp->timer.expires = jiffies + next_tick;
685 add_timer(&yp->timer);
686}
687
688static void yellowfin_tx_timeout(struct net_device *dev)
689{
690 struct yellowfin_private *yp = netdev_priv(dev);
691 void __iomem *ioaddr = yp->base;
692
693 printk(KERN_WARNING "%s: Yellowfin transmit timed out at %d/%d Tx "
694 "status %4.4x, Rx status %4.4x, resetting...\n",
695 dev->name, yp->cur_tx, yp->dirty_tx,
696 ioread32(ioaddr + TxStatus), ioread32(ioaddr + RxStatus));
697
698 /* Note: these should be KERN_DEBUG. */
699 if (yellowfin_debug) {
700 int i;
701 printk(KERN_WARNING " Rx ring %p: ", yp->rx_ring);
702 for (i = 0; i < RX_RING_SIZE; i++)
703 printk(" %8.8x", yp->rx_ring[i].result_status);
704 printk("\n"KERN_WARNING" Tx ring %p: ", yp->tx_ring);
705 for (i = 0; i < TX_RING_SIZE; i++)
706 printk(" %4.4x /%8.8x", yp->tx_status[i].tx_errs,
707 yp->tx_ring[i].result_status);
708 printk("\n");
709 }
710
711 /* If the hardware is found to hang regularly, we will update the code
712 to reinitialize the chip here. */
713 dev->if_port = 0;
714
715 /* Wake the potentially-idle transmit channel. */
716 iowrite32(0x10001000, yp->base + TxCtrl);
717 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
718 netif_wake_queue (dev); /* Typical path */
719
Eric Dumazetcdd0db02009-05-28 00:00:41 +0000720 dev->trans_start = jiffies; /* prevent tx timeout */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700721 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700722}
723
724/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
725static void yellowfin_init_ring(struct net_device *dev)
726{
727 struct yellowfin_private *yp = netdev_priv(dev);
728 int i;
729
730 yp->tx_full = 0;
731 yp->cur_rx = yp->cur_tx = 0;
732 yp->dirty_tx = 0;
733
734 yp->rx_buf_sz = (dev->mtu <= 1500 ? PKT_BUF_SZ : dev->mtu + 32);
735
736 for (i = 0; i < RX_RING_SIZE; i++) {
737 yp->rx_ring[i].dbdma_cmd =
738 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
739 yp->rx_ring[i].branch_addr = cpu_to_le32(yp->rx_ring_dma +
740 ((i+1)%RX_RING_SIZE)*sizeof(struct yellowfin_desc));
741 }
742
743 for (i = 0; i < RX_RING_SIZE; i++) {
744 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
745 yp->rx_skbuff[i] = skb;
746 if (skb == NULL)
747 break;
748 skb->dev = dev; /* Mark as being used by this device. */
749 skb_reserve(skb, 2); /* 16 byte align the IP header. */
750 yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -0700751 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700752 }
753 yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP);
754 yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
755
756#define NO_TXSTATS
757#ifdef NO_TXSTATS
758 /* In this mode the Tx ring needs only a single descriptor. */
759 for (i = 0; i < TX_RING_SIZE; i++) {
760 yp->tx_skbuff[i] = NULL;
761 yp->tx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
762 yp->tx_ring[i].branch_addr = cpu_to_le32(yp->tx_ring_dma +
763 ((i+1)%TX_RING_SIZE)*sizeof(struct yellowfin_desc));
764 }
765 /* Wrap ring */
766 yp->tx_ring[--i].dbdma_cmd = cpu_to_le32(CMD_STOP | BRANCH_ALWAYS);
767#else
768{
769 int j;
770
771 /* Tx ring needs a pair of descriptors, the second for the status. */
772 for (i = 0; i < TX_RING_SIZE; i++) {
773 j = 2*i;
774 yp->tx_skbuff[i] = 0;
775 /* Branch on Tx error. */
776 yp->tx_ring[j].dbdma_cmd = cpu_to_le32(CMD_STOP);
777 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
Mariusz Kozlowski80950f82008-03-28 14:41:29 -0700778 (j+1)*sizeof(struct yellowfin_desc));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 j++;
780 if (yp->flags & FullTxStatus) {
781 yp->tx_ring[j].dbdma_cmd =
782 cpu_to_le32(CMD_TXSTATUS | sizeof(*yp->tx_status));
783 yp->tx_ring[j].request_cnt = sizeof(*yp->tx_status);
784 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
Mariusz Kozlowski80950f82008-03-28 14:41:29 -0700785 i*sizeof(struct tx_status_words));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700786 } else {
787 /* Symbios chips write only tx_errs word. */
788 yp->tx_ring[j].dbdma_cmd =
789 cpu_to_le32(CMD_TXSTATUS | INTR_ALWAYS | 2);
790 yp->tx_ring[j].request_cnt = 2;
791 /* Om pade ummmmm... */
792 yp->tx_ring[j].addr = cpu_to_le32(yp->tx_status_dma +
793 i*sizeof(struct tx_status_words) +
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400794 &(yp->tx_status[0].tx_errs) -
Linus Torvalds1da177e2005-04-16 15:20:36 -0700795 &(yp->tx_status[0]));
796 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400797 yp->tx_ring[j].branch_addr = cpu_to_le32(yp->tx_ring_dma +
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 ((j+1)%(2*TX_RING_SIZE))*sizeof(struct yellowfin_desc));
799 }
800 /* Wrap ring */
801 yp->tx_ring[++j].dbdma_cmd |= cpu_to_le32(BRANCH_ALWAYS | INTR_ALWAYS);
802}
803#endif
804 yp->tx_tail_desc = &yp->tx_status[0];
805 return;
806}
807
808static int yellowfin_start_xmit(struct sk_buff *skb, struct net_device *dev)
809{
810 struct yellowfin_private *yp = netdev_priv(dev);
811 unsigned entry;
812 int len = skb->len;
813
814 netif_stop_queue (dev);
815
816 /* Note: Ordering is important here, set the field with the
817 "ownership" bit last, and only then increment cur_tx. */
818
819 /* Calculate the next Tx descriptor entry. */
820 entry = yp->cur_tx % TX_RING_SIZE;
821
822 if (gx_fix) { /* Note: only works for paddable protocols e.g. IP. */
823 int cacheline_end = ((unsigned long)skb->data + skb->len) % 32;
824 /* Fix GX chipset errata. */
825 if (cacheline_end > 24 || cacheline_end == 0) {
826 len = skb->len + 32 - cacheline_end + 1;
Herbert Xu5b057c62006-06-23 02:06:41 -0700827 if (skb_padto(skb, len)) {
828 yp->tx_skbuff[entry] = NULL;
829 netif_wake_queue(dev);
Patrick McHardy6ed10652009-06-23 06:03:08 +0000830 return NETDEV_TX_OK;
Herbert Xu5b057c62006-06-23 02:06:41 -0700831 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832 }
833 }
834 yp->tx_skbuff[entry] = skb;
835
836#ifdef NO_TXSTATS
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400837 yp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838 skb->data, len, PCI_DMA_TODEVICE));
839 yp->tx_ring[entry].result_status = 0;
840 if (entry >= TX_RING_SIZE-1) {
841 /* New stop command. */
842 yp->tx_ring[0].dbdma_cmd = cpu_to_le32(CMD_STOP);
843 yp->tx_ring[TX_RING_SIZE-1].dbdma_cmd =
844 cpu_to_le32(CMD_TX_PKT|BRANCH_ALWAYS | len);
845 } else {
846 yp->tx_ring[entry+1].dbdma_cmd = cpu_to_le32(CMD_STOP);
847 yp->tx_ring[entry].dbdma_cmd =
848 cpu_to_le32(CMD_TX_PKT | BRANCH_IFTRUE | len);
849 }
850 yp->cur_tx++;
851#else
852 yp->tx_ring[entry<<1].request_cnt = len;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400853 yp->tx_ring[entry<<1].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 skb->data, len, PCI_DMA_TODEVICE));
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400855 /* The input_last (status-write) command is constant, but we must
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856 rewrite the subsequent 'stop' command. */
857
858 yp->cur_tx++;
859 {
860 unsigned next_entry = yp->cur_tx % TX_RING_SIZE;
861 yp->tx_ring[next_entry<<1].dbdma_cmd = cpu_to_le32(CMD_STOP);
862 }
863 /* Final step -- overwrite the old 'stop' command. */
864
865 yp->tx_ring[entry<<1].dbdma_cmd =
866 cpu_to_le32( ((entry % 6) == 0 ? CMD_TX_PKT|INTR_ALWAYS|BRANCH_IFTRUE :
867 CMD_TX_PKT | BRANCH_IFTRUE) | len);
868#endif
869
870 /* Non-x86 Todo: explicitly flush cache lines here. */
871
872 /* Wake the potentially-idle transmit channel. */
873 iowrite32(0x10001000, yp->base + TxCtrl);
874
875 if (yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE)
876 netif_start_queue (dev); /* Typical path */
877 else
878 yp->tx_full = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879
880 if (yellowfin_debug > 4) {
881 printk(KERN_DEBUG "%s: Yellowfin transmit frame #%d queued in slot %d.\n",
882 dev->name, yp->cur_tx, entry);
883 }
Patrick McHardy6ed10652009-06-23 06:03:08 +0000884 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700885}
886
887/* The interrupt handler does all of the Rx thread work and cleans up
888 after the Tx thread. */
David Howells7d12e782006-10-05 14:55:46 +0100889static irqreturn_t yellowfin_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890{
891 struct net_device *dev = dev_instance;
892 struct yellowfin_private *yp;
893 void __iomem *ioaddr;
894 int boguscnt = max_interrupt_work;
895 unsigned int handled = 0;
896
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897 yp = netdev_priv(dev);
898 ioaddr = yp->base;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400899
Linus Torvalds1da177e2005-04-16 15:20:36 -0700900 spin_lock (&yp->lock);
901
902 do {
903 u16 intr_status = ioread16(ioaddr + IntrClear);
904
905 if (yellowfin_debug > 4)
906 printk(KERN_DEBUG "%s: Yellowfin interrupt, status %4.4x.\n",
907 dev->name, intr_status);
908
909 if (intr_status == 0)
910 break;
911 handled = 1;
912
913 if (intr_status & (IntrRxDone | IntrEarlyRx)) {
914 yellowfin_rx(dev);
915 iowrite32(0x10001000, ioaddr + RxCtrl); /* Wake Rx engine. */
916 }
917
918#ifdef NO_TXSTATS
919 for (; yp->cur_tx - yp->dirty_tx > 0; yp->dirty_tx++) {
920 int entry = yp->dirty_tx % TX_RING_SIZE;
921 struct sk_buff *skb;
922
923 if (yp->tx_ring[entry].result_status == 0)
924 break;
925 skb = yp->tx_skbuff[entry];
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700926 dev->stats.tx_packets++;
927 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700928 /* Free the original skb. */
Al Viroe5a31422007-12-22 17:53:02 +0000929 pci_unmap_single(yp->pci_dev, le32_to_cpu(yp->tx_ring[entry].addr),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 skb->len, PCI_DMA_TODEVICE);
931 dev_kfree_skb_irq(skb);
932 yp->tx_skbuff[entry] = NULL;
933 }
934 if (yp->tx_full
935 && yp->cur_tx - yp->dirty_tx < TX_QUEUE_SIZE - 4) {
936 /* The ring is no longer full, clear tbusy. */
937 yp->tx_full = 0;
938 netif_wake_queue(dev);
939 }
940#else
941 if ((intr_status & IntrTxDone) || (yp->tx_tail_desc->tx_errs)) {
942 unsigned dirty_tx = yp->dirty_tx;
943
944 for (dirty_tx = yp->dirty_tx; yp->cur_tx - dirty_tx > 0;
945 dirty_tx++) {
946 /* Todo: optimize this. */
947 int entry = dirty_tx % TX_RING_SIZE;
948 u16 tx_errs = yp->tx_status[entry].tx_errs;
949 struct sk_buff *skb;
950
951#ifndef final_version
952 if (yellowfin_debug > 5)
953 printk(KERN_DEBUG "%s: Tx queue %d check, Tx status "
954 "%4.4x %4.4x %4.4x %4.4x.\n",
955 dev->name, entry,
956 yp->tx_status[entry].tx_cnt,
957 yp->tx_status[entry].tx_errs,
958 yp->tx_status[entry].total_tx_cnt,
959 yp->tx_status[entry].paused);
960#endif
961 if (tx_errs == 0)
962 break; /* It still hasn't been Txed */
963 skb = yp->tx_skbuff[entry];
964 if (tx_errs & 0xF810) {
965 /* There was an major error, log it. */
966#ifndef final_version
967 if (yellowfin_debug > 1)
968 printk(KERN_DEBUG "%s: Transmit error, Tx status %4.4x.\n",
969 dev->name, tx_errs);
970#endif
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700971 dev->stats.tx_errors++;
972 if (tx_errs & 0xF800) dev->stats.tx_aborted_errors++;
973 if (tx_errs & 0x0800) dev->stats.tx_carrier_errors++;
974 if (tx_errs & 0x2000) dev->stats.tx_window_errors++;
975 if (tx_errs & 0x8000) dev->stats.tx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 } else {
977#ifndef final_version
978 if (yellowfin_debug > 4)
979 printk(KERN_DEBUG "%s: Normal transmit, Tx status %4.4x.\n",
980 dev->name, tx_errs);
981#endif
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700982 dev->stats.tx_bytes += skb->len;
983 dev->stats.collisions += tx_errs & 15;
984 dev->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 }
986 /* Free the original skb. */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400987 pci_unmap_single(yp->pci_dev,
988 yp->tx_ring[entry<<1].addr, skb->len,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989 PCI_DMA_TODEVICE);
990 dev_kfree_skb_irq(skb);
991 yp->tx_skbuff[entry] = 0;
992 /* Mark status as empty. */
993 yp->tx_status[entry].tx_errs = 0;
994 }
995
996#ifndef final_version
997 if (yp->cur_tx - dirty_tx > TX_RING_SIZE) {
998 printk(KERN_ERR "%s: Out-of-sync dirty pointer, %d vs. %d, full=%d.\n",
999 dev->name, dirty_tx, yp->cur_tx, yp->tx_full);
1000 dirty_tx += TX_RING_SIZE;
1001 }
1002#endif
1003
1004 if (yp->tx_full
1005 && yp->cur_tx - dirty_tx < TX_QUEUE_SIZE - 2) {
1006 /* The ring is no longer full, clear tbusy. */
1007 yp->tx_full = 0;
1008 netif_wake_queue(dev);
1009 }
1010
1011 yp->dirty_tx = dirty_tx;
1012 yp->tx_tail_desc = &yp->tx_status[dirty_tx % TX_RING_SIZE];
1013 }
1014#endif
1015
1016 /* Log errors and other uncommon events. */
1017 if (intr_status & 0x2ee) /* Abnormal error summary. */
1018 yellowfin_error(dev, intr_status);
1019
1020 if (--boguscnt < 0) {
1021 printk(KERN_WARNING "%s: Too much work at interrupt, "
1022 "status=0x%4.4x.\n",
1023 dev->name, intr_status);
1024 break;
1025 }
1026 } while (1);
1027
1028 if (yellowfin_debug > 3)
1029 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1030 dev->name, ioread16(ioaddr + IntrStatus));
1031
1032 spin_unlock (&yp->lock);
1033 return IRQ_RETVAL(handled);
1034}
1035
1036/* This routine is logically part of the interrupt handler, but separated
1037 for clarity and better register allocation. */
1038static int yellowfin_rx(struct net_device *dev)
1039{
1040 struct yellowfin_private *yp = netdev_priv(dev);
1041 int entry = yp->cur_rx % RX_RING_SIZE;
1042 int boguscnt = yp->dirty_rx + RX_RING_SIZE - yp->cur_rx;
1043
1044 if (yellowfin_debug > 4) {
1045 printk(KERN_DEBUG " In yellowfin_rx(), entry %d status %8.8x.\n",
1046 entry, yp->rx_ring[entry].result_status);
1047 printk(KERN_DEBUG " #%d desc. %8.8x %8.8x %8.8x.\n",
1048 entry, yp->rx_ring[entry].dbdma_cmd, yp->rx_ring[entry].addr,
1049 yp->rx_ring[entry].result_status);
1050 }
1051
1052 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1053 while (1) {
1054 struct yellowfin_desc *desc = &yp->rx_ring[entry];
1055 struct sk_buff *rx_skb = yp->rx_skbuff[entry];
1056 s16 frame_status;
1057 u16 desc_status;
1058 int data_size;
1059 u8 *buf_addr;
1060
1061 if(!desc->result_status)
1062 break;
Al Viroe5a31422007-12-22 17:53:02 +00001063 pci_dma_sync_single_for_cpu(yp->pci_dev, le32_to_cpu(desc->addr),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064 yp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1065 desc_status = le32_to_cpu(desc->result_status) >> 16;
David S. Miller689be432005-06-28 15:25:31 -07001066 buf_addr = rx_skb->data;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001067 data_size = (le32_to_cpu(desc->dbdma_cmd) -
Linus Torvalds1da177e2005-04-16 15:20:36 -07001068 le32_to_cpu(desc->result_status)) & 0xffff;
Harvey Harrison6caf52a42008-04-29 01:03:36 -07001069 frame_status = get_unaligned_le16(&(buf_addr[data_size - 2]));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001070 if (yellowfin_debug > 4)
1071 printk(KERN_DEBUG " yellowfin_rx() status was %4.4x.\n",
1072 frame_status);
1073 if (--boguscnt < 0)
1074 break;
1075 if ( ! (desc_status & RX_EOP)) {
1076 if (data_size != 0)
1077 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned multiple buffers,"
1078 " status %4.4x, data_size %d!\n", dev->name, desc_status, data_size);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001079 dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001080 } else if ((yp->drv_flags & IsGigabit) && (frame_status & 0x0038)) {
1081 /* There was a error. */
1082 if (yellowfin_debug > 3)
1083 printk(KERN_DEBUG " yellowfin_rx() Rx error was %4.4x.\n",
1084 frame_status);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001085 dev->stats.rx_errors++;
1086 if (frame_status & 0x0060) dev->stats.rx_length_errors++;
1087 if (frame_status & 0x0008) dev->stats.rx_frame_errors++;
1088 if (frame_status & 0x0010) dev->stats.rx_crc_errors++;
1089 if (frame_status < 0) dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001090 } else if ( !(yp->drv_flags & IsGigabit) &&
1091 ((buf_addr[data_size-1] & 0x85) || buf_addr[data_size-2] & 0xC0)) {
1092 u8 status1 = buf_addr[data_size-2];
1093 u8 status2 = buf_addr[data_size-1];
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001094 dev->stats.rx_errors++;
1095 if (status1 & 0xC0) dev->stats.rx_length_errors++;
1096 if (status2 & 0x03) dev->stats.rx_frame_errors++;
1097 if (status2 & 0x04) dev->stats.rx_crc_errors++;
1098 if (status2 & 0x80) dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001099#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
1100 } else if ((yp->flags & HasMACAddrBug) &&
1101 memcmp(le32_to_cpu(yp->rx_ring_dma +
1102 entry*sizeof(struct yellowfin_desc)),
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001103 dev->dev_addr, 6) != 0 &&
Linus Torvalds1da177e2005-04-16 15:20:36 -07001104 memcmp(le32_to_cpu(yp->rx_ring_dma +
1105 entry*sizeof(struct yellowfin_desc)),
1106 "\377\377\377\377\377\377", 6) != 0) {
Johannes Berge1749612008-10-27 15:59:26 -07001107 if (bogus_rx++ == 0)
1108 printk(KERN_WARNING "%s: Bad frame to %pM\n",
1109 dev->name, buf_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001110#endif
1111 } else {
1112 struct sk_buff *skb;
1113 int pkt_len = data_size -
1114 (yp->chip_id ? 7 : 8 + buf_addr[data_size - 8]);
1115 /* To verify: Yellowfin Length should omit the CRC! */
1116
1117#ifndef final_version
1118 if (yellowfin_debug > 4)
1119 printk(KERN_DEBUG " yellowfin_rx() normal Rx pkt length %d"
1120 " of %d, bogus_cnt %d.\n",
1121 pkt_len, data_size, boguscnt);
1122#endif
1123 /* Check if the packet is long enough to just pass up the skbuff
1124 without copying to a properly sized skbuff. */
1125 if (pkt_len > rx_copybreak) {
1126 skb_put(skb = rx_skb, pkt_len);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001127 pci_unmap_single(yp->pci_dev,
Al Viroe5a31422007-12-22 17:53:02 +00001128 le32_to_cpu(yp->rx_ring[entry].addr),
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001129 yp->rx_buf_sz,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001130 PCI_DMA_FROMDEVICE);
1131 yp->rx_skbuff[entry] = NULL;
1132 } else {
1133 skb = dev_alloc_skb(pkt_len + 2);
1134 if (skb == NULL)
1135 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001136 skb_reserve(skb, 2); /* 16 byte align the IP header */
David S. Miller8c7b7fa2007-07-10 22:08:12 -07001137 skb_copy_to_linear_data(skb, rx_skb->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001138 skb_put(skb, pkt_len);
Al Viroe5a31422007-12-22 17:53:02 +00001139 pci_dma_sync_single_for_device(yp->pci_dev,
1140 le32_to_cpu(desc->addr),
1141 yp->rx_buf_sz,
1142 PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001143 }
1144 skb->protocol = eth_type_trans(skb, dev);
1145 netif_rx(skb);
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001146 dev->stats.rx_packets++;
1147 dev->stats.rx_bytes += pkt_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001148 }
1149 entry = (++yp->cur_rx) % RX_RING_SIZE;
1150 }
1151
1152 /* Refill the Rx ring buffers. */
1153 for (; yp->cur_rx - yp->dirty_rx > 0; yp->dirty_rx++) {
1154 entry = yp->dirty_rx % RX_RING_SIZE;
1155 if (yp->rx_skbuff[entry] == NULL) {
1156 struct sk_buff *skb = dev_alloc_skb(yp->rx_buf_sz);
1157 if (skb == NULL)
1158 break; /* Better luck next round. */
1159 yp->rx_skbuff[entry] = skb;
1160 skb->dev = dev; /* Mark as being used by this device. */
1161 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1162 yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001163 skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164 }
1165 yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP);
1166 yp->rx_ring[entry].result_status = 0; /* Clear complete bit. */
1167 if (entry != 0)
1168 yp->rx_ring[entry - 1].dbdma_cmd =
1169 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | yp->rx_buf_sz);
1170 else
1171 yp->rx_ring[RX_RING_SIZE - 1].dbdma_cmd =
1172 cpu_to_le32(CMD_RX_BUF | INTR_ALWAYS | BRANCH_ALWAYS
1173 | yp->rx_buf_sz);
1174 }
1175
1176 return 0;
1177}
1178
1179static void yellowfin_error(struct net_device *dev, int intr_status)
1180{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1182 dev->name, intr_status);
1183 /* Hmmmmm, it's not clear what to do here. */
1184 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001185 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001186 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
Jeff Garzik09f75cd2007-10-03 17:41:50 -07001187 dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001188}
1189
1190static int yellowfin_close(struct net_device *dev)
1191{
1192 struct yellowfin_private *yp = netdev_priv(dev);
1193 void __iomem *ioaddr = yp->base;
1194 int i;
1195
1196 netif_stop_queue (dev);
1197
1198 if (yellowfin_debug > 1) {
1199 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x "
1200 "Rx %4.4x Int %2.2x.\n",
1201 dev->name, ioread16(ioaddr + TxStatus),
1202 ioread16(ioaddr + RxStatus),
1203 ioread16(ioaddr + IntrStatus));
1204 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1205 dev->name, yp->cur_tx, yp->dirty_tx, yp->cur_rx, yp->dirty_rx);
1206 }
1207
1208 /* Disable interrupts by clearing the interrupt mask. */
1209 iowrite16(0x0000, ioaddr + IntrEnb);
1210
1211 /* Stop the chip's Tx and Rx processes. */
1212 iowrite32(0x80000000, ioaddr + RxCtrl);
1213 iowrite32(0x80000000, ioaddr + TxCtrl);
1214
1215 del_timer(&yp->timer);
1216
1217#if defined(__i386__)
1218 if (yellowfin_debug > 2) {
1219 printk("\n"KERN_DEBUG" Tx ring at %8.8llx:\n",
1220 (unsigned long long)yp->tx_ring_dma);
1221 for (i = 0; i < TX_RING_SIZE*2; i++)
1222 printk(" %c #%d desc. %8.8x %8.8x %8.8x %8.8x.\n",
1223 ioread32(ioaddr + TxPtr) == (long)&yp->tx_ring[i] ? '>' : ' ',
1224 i, yp->tx_ring[i].dbdma_cmd, yp->tx_ring[i].addr,
1225 yp->tx_ring[i].branch_addr, yp->tx_ring[i].result_status);
1226 printk(KERN_DEBUG " Tx status %p:\n", yp->tx_status);
1227 for (i = 0; i < TX_RING_SIZE; i++)
1228 printk(" #%d status %4.4x %4.4x %4.4x %4.4x.\n",
1229 i, yp->tx_status[i].tx_cnt, yp->tx_status[i].tx_errs,
1230 yp->tx_status[i].total_tx_cnt, yp->tx_status[i].paused);
1231
1232 printk("\n"KERN_DEBUG " Rx ring %8.8llx:\n",
1233 (unsigned long long)yp->rx_ring_dma);
1234 for (i = 0; i < RX_RING_SIZE; i++) {
1235 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x %8.8x\n",
1236 ioread32(ioaddr + RxPtr) == (long)&yp->rx_ring[i] ? '>' : ' ',
1237 i, yp->rx_ring[i].dbdma_cmd, yp->rx_ring[i].addr,
1238 yp->rx_ring[i].result_status);
1239 if (yellowfin_debug > 6) {
1240 if (get_unaligned((u8*)yp->rx_ring[i].addr) != 0x69) {
1241 int j;
1242 for (j = 0; j < 0x50; j++)
1243 printk(" %4.4x",
1244 get_unaligned(((u16*)yp->rx_ring[i].addr) + j));
1245 printk("\n");
1246 }
1247 }
1248 }
1249 }
1250#endif /* __i386__ debugging only */
1251
1252 free_irq(dev->irq, dev);
1253
1254 /* Free all the skbuffs in the Rx queue. */
1255 for (i = 0; i < RX_RING_SIZE; i++) {
1256 yp->rx_ring[i].dbdma_cmd = cpu_to_le32(CMD_STOP);
Al Viroe5a31422007-12-22 17:53:02 +00001257 yp->rx_ring[i].addr = cpu_to_le32(0xBADF00D0); /* An invalid address. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258 if (yp->rx_skbuff[i]) {
1259 dev_kfree_skb(yp->rx_skbuff[i]);
1260 }
1261 yp->rx_skbuff[i] = NULL;
1262 }
1263 for (i = 0; i < TX_RING_SIZE; i++) {
1264 if (yp->tx_skbuff[i])
1265 dev_kfree_skb(yp->tx_skbuff[i]);
1266 yp->tx_skbuff[i] = NULL;
1267 }
1268
1269#ifdef YF_PROTOTYPE /* Support for prototype hardware errata. */
1270 if (yellowfin_debug > 0) {
1271 printk(KERN_DEBUG "%s: Received %d frames that we should not have.\n",
1272 dev->name, bogus_rx);
1273 }
1274#endif
1275
1276 return 0;
1277}
1278
Linus Torvalds1da177e2005-04-16 15:20:36 -07001279/* Set or clear the multicast filter for this adaptor. */
1280
1281static void set_rx_mode(struct net_device *dev)
1282{
1283 struct yellowfin_private *yp = netdev_priv(dev);
1284 void __iomem *ioaddr = yp->base;
1285 u16 cfg_value = ioread16(ioaddr + Cnfg);
1286
1287 /* Stop the Rx process to change any value. */
1288 iowrite16(cfg_value & ~0x1000, ioaddr + Cnfg);
1289 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001290 iowrite16(0x000F, ioaddr + AddrMode);
1291 } else if ((dev->mc_count > 64) || (dev->flags & IFF_ALLMULTI)) {
1292 /* Too many to filter well, or accept all multicasts. */
1293 iowrite16(0x000B, ioaddr + AddrMode);
1294 } else if (dev->mc_count > 0) { /* Must use the multicast hash table. */
1295 struct dev_mc_list *mclist;
1296 u16 hash_table[4];
1297 int i;
1298 memset(hash_table, 0, sizeof(hash_table));
1299 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1300 i++, mclist = mclist->next) {
1301 unsigned int bit;
1302
1303 /* Due to a bug in the early chip versions, multiple filter
1304 slots must be set for each address. */
1305 if (yp->drv_flags & HasMulticastBug) {
1306 bit = (ether_crc_le(3, mclist->dmi_addr) >> 3) & 0x3f;
1307 hash_table[bit >> 4] |= (1 << bit);
1308 bit = (ether_crc_le(4, mclist->dmi_addr) >> 3) & 0x3f;
1309 hash_table[bit >> 4] |= (1 << bit);
1310 bit = (ether_crc_le(5, mclist->dmi_addr) >> 3) & 0x3f;
1311 hash_table[bit >> 4] |= (1 << bit);
1312 }
1313 bit = (ether_crc_le(6, mclist->dmi_addr) >> 3) & 0x3f;
1314 hash_table[bit >> 4] |= (1 << bit);
1315 }
1316 /* Copy the hash table to the chip. */
1317 for (i = 0; i < 4; i++)
1318 iowrite16(hash_table[i], ioaddr + HashTbl + i*2);
1319 iowrite16(0x0003, ioaddr + AddrMode);
1320 } else { /* Normal, unicast/broadcast-only mode. */
1321 iowrite16(0x0001, ioaddr + AddrMode);
1322 }
1323 /* Restart the Rx process. */
1324 iowrite16(cfg_value | 0x1000, ioaddr + Cnfg);
1325}
1326
1327static void yellowfin_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1328{
1329 struct yellowfin_private *np = netdev_priv(dev);
1330 strcpy(info->driver, DRV_NAME);
1331 strcpy(info->version, DRV_VERSION);
1332 strcpy(info->bus_info, pci_name(np->pci_dev));
1333}
1334
Jeff Garzik7282d492006-09-13 14:30:00 -04001335static const struct ethtool_ops ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001336 .get_drvinfo = yellowfin_get_drvinfo
1337};
1338
1339static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1340{
1341 struct yellowfin_private *np = netdev_priv(dev);
1342 void __iomem *ioaddr = np->base;
1343 struct mii_ioctl_data *data = if_mii(rq);
1344
1345 switch(cmd) {
1346 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
1347 data->phy_id = np->phys[0] & 0x1f;
1348 /* Fall Through */
1349
1350 case SIOCGMIIREG: /* Read MII PHY register. */
1351 data->val_out = mdio_read(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f);
1352 return 0;
1353
1354 case SIOCSMIIREG: /* Write MII PHY register. */
1355 if (!capable(CAP_NET_ADMIN))
1356 return -EPERM;
1357 if (data->phy_id == np->phys[0]) {
1358 u16 value = data->val_in;
1359 switch (data->reg_num) {
1360 case 0:
1361 /* Check for autonegotiation on or reset. */
1362 np->medialock = (value & 0x9000) ? 0 : 1;
1363 if (np->medialock)
1364 np->full_duplex = (value & 0x0100) ? 1 : 0;
1365 break;
1366 case 4: np->advertising = value; break;
1367 }
1368 /* Perhaps check_duplex(dev), depending on chip semantics. */
1369 }
1370 mdio_write(ioaddr, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
1371 return 0;
1372 default:
1373 return -EOPNOTSUPP;
1374 }
1375}
1376
1377
1378static void __devexit yellowfin_remove_one (struct pci_dev *pdev)
1379{
1380 struct net_device *dev = pci_get_drvdata(pdev);
1381 struct yellowfin_private *np;
1382
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02001383 BUG_ON(!dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001384 np = netdev_priv(dev);
1385
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001386 pci_free_consistent(pdev, STATUS_TOTAL_SIZE, np->tx_status,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001387 np->tx_status_dma);
1388 pci_free_consistent(pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
1389 pci_free_consistent(pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
1390 unregister_netdev (dev);
1391
1392 pci_iounmap(pdev, np->base);
1393
1394 pci_release_regions (pdev);
1395
1396 free_netdev (dev);
1397 pci_set_drvdata(pdev, NULL);
1398}
1399
1400
1401static struct pci_driver yellowfin_driver = {
1402 .name = DRV_NAME,
1403 .id_table = yellowfin_pci_tbl,
1404 .probe = yellowfin_init_one,
1405 .remove = __devexit_p(yellowfin_remove_one),
1406};
1407
1408
1409static int __init yellowfin_init (void)
1410{
1411/* when a module, this is printed whether or not devices are found in probe */
1412#ifdef MODULE
1413 printk(version);
1414#endif
Jeff Garzik29917622006-08-19 17:48:59 -04001415 return pci_register_driver(&yellowfin_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001416}
1417
1418
1419static void __exit yellowfin_cleanup (void)
1420{
1421 pci_unregister_driver (&yellowfin_driver);
1422}
1423
1424
1425module_init(yellowfin_init);
1426module_exit(yellowfin_cleanup);