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David Brownell8ae12a02006-01-08 13:34:19 -08001#
2# SPI driver configuration
3#
4# NOTE: the reason this doesn't show SPI slave support is mostly that
5# nobody's needed a slave side API yet. The master-role API is not
6# fully appropriate there, so it'd need some thought to do well.
7#
Alessandro Guido79d8c7a2008-04-28 02:14:16 -07008menuconfig SPI
David Brownell8ae12a02006-01-08 13:34:19 -08009 bool "SPI support"
Alessandro Guido79d8c7a2008-04-28 02:14:16 -070010 depends on HAS_IOMEM
David Brownell8ae12a02006-01-08 13:34:19 -080011 help
12 The "Serial Peripheral Interface" is a low level synchronous
13 protocol. Chips that support SPI can have data transfer rates
14 up to several tens of Mbit/sec. Chips are addressed with a
15 controller and a chipselect. Most SPI slaves don't support
16 dynamic device discovery; some are even write-only or read-only.
17
Matt LaPlante3cb2fcc2006-11-30 05:22:59 +010018 SPI is widely used by microcontrollers to talk with sensors,
David Brownell8ae12a02006-01-08 13:34:19 -080019 eeprom and flash memory, codecs and various other controller
20 chips, analog to digital (and d-to-a) converters, and more.
21 MMC and SD cards can be accessed using SPI protocol; and for
22 DataFlash cards used in MMC sockets, SPI must always be used.
23
24 SPI is one of a family of similar protocols using a four wire
25 interface (select, clock, data in, data out) including Microwire
26 (half duplex), SSP, SSI, and PSP. This driver framework should
27 work with most such devices and controllers.
28
Alessandro Guido79d8c7a2008-04-28 02:14:16 -070029if SPI
30
David Brownell8ae12a02006-01-08 13:34:19 -080031config SPI_DEBUG
32 boolean "Debug support for SPI drivers"
Alessandro Guido79d8c7a2008-04-28 02:14:16 -070033 depends on DEBUG_KERNEL
David Brownell8ae12a02006-01-08 13:34:19 -080034 help
35 Say "yes" to enable debug messaging (like dev_dbg and pr_debug),
36 sysfs, and debugfs support in SPI controller and protocol drivers.
37
38#
39# MASTER side ... talking to discrete SPI slave chips including microcontrollers
40#
41
42config SPI_MASTER
43# boolean "SPI Master Support"
44 boolean
45 default SPI
46 help
47 If your system has an master-capable SPI controller (which
48 provides the clock and chipselect), you can enable that
49 controller and the protocol drivers for the SPI slave chips
50 that are connected.
51
Robert P. J. Day6291fe22008-07-23 21:29:53 -070052if SPI_MASTER
53
David Brownell8ae12a02006-01-08 13:34:19 -080054comment "SPI Master Controller Drivers"
David Brownell8ae12a02006-01-08 13:34:19 -080055
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080056config SPI_ATMEL
57 tristate "Atmel SPI Controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -070058 depends on (ARCH_AT91 || AVR32)
Haavard Skinnemoen754ce4f2007-02-14 00:33:09 -080059 help
60 This selects a driver for the Atmel SPI Controller, present on
61 many AT32 (AVR32) and AT91 (ARM) chips.
62
Wu, Bryana5f6abd2007-05-06 14:50:34 -070063config SPI_BFIN
64 tristate "SPI controller driver for ADI Blackfin5xx"
Robert P. J. Day6291fe22008-07-23 21:29:53 -070065 depends on BLACKFIN
Wu, Bryana5f6abd2007-05-06 14:50:34 -070066 help
67 This is the SPI controller master driver for Blackfin 5xx processor.
68
Jan Nikitenko63bd2352007-05-08 00:32:25 -070069config SPI_AU1550
70 tristate "Au1550/Au12x0 SPI Controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -070071 depends on (SOC_AU1550 || SOC_AU1200) && EXPERIMENTAL
Jan Nikitenko63bd2352007-05-08 00:32:25 -070072 select SPI_BITBANG
73 help
74 If you say yes to this option, support will be included for the
75 Au1550 SPI controller (may also work with Au1200,Au1210,Au1250).
76
77 This driver can also be built as a module. If so, the module
78 will be called au1550_spi.
79
David Brownell9904f222006-01-08 13:34:26 -080080config SPI_BITBANG
David Brownelld29389d2009-01-06 14:41:41 -080081 tristate "Utilities for Bitbanging SPI masters"
David Brownell9904f222006-01-08 13:34:26 -080082 help
83 With a few GPIO pins, your system can bitbang the SPI protocol.
84 Select this to get SPI support through I/O pins (GPIO, parallel
85 port, etc). Or, some systems' SPI master controller drivers use
86 this code to manage the per-word or per-transfer accesses to the
87 hardware shift registers.
88
89 This is library code, and is automatically selected by drivers that
90 need it. You only need to select this explicitly to support driver
91 modules that aren't part of this kernel tree.
David Brownell8ae12a02006-01-08 13:34:19 -080092
David Brownell71117632006-01-08 13:34:29 -080093config SPI_BUTTERFLY
94 tristate "Parallel port adapter for AVR Butterfly (DEVELOPMENT)"
Robert P. J. Day6291fe22008-07-23 21:29:53 -070095 depends on PARPORT
David Brownell71117632006-01-08 13:34:29 -080096 select SPI_BITBANG
97 help
98 This uses a custom parallel port cable to connect to an AVR
99 Butterfly <http://www.atmel.com/products/avr/butterfly>, an
100 inexpensive battery powered microcontroller evaluation board.
101 This same cable can be used to flash new firmware.
102
David Brownelld29389d2009-01-06 14:41:41 -0800103config SPI_GPIO
104 tristate "GPIO-based bitbanging SPI Master"
105 depends on GENERIC_GPIO
106 select SPI_BITBANG
107 help
108 This simple GPIO bitbanging SPI master uses the arch-neutral GPIO
109 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
110 slaves connected to a bus using this driver are configured as usual,
111 except that the spi_board_info.controller_data holds the GPIO number
112 for the chipselect used by this controller driver.
113
114 Note that this driver often won't achieve even 1 Mbit/sec speeds,
115 making it unusually slow for SPI. If your platform can inline
116 GPIO operations, you should be able to leverage that for better
117 speed with a custom version of this driver; see the source code.
118
Andrea Paterniani69c202a2007-02-12 00:52:39 -0800119config SPI_IMX
120 tristate "Freescale iMX SPI controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700121 depends on ARCH_IMX && EXPERIMENTAL
Andrea Paterniani69c202a2007-02-12 00:52:39 -0800122 help
123 This enables using the Freescale iMX SPI controller in master
124 mode.
125
Kaiwan N Billimoria78961a52007-07-17 04:04:05 -0700126config SPI_LM70_LLP
127 tristate "Parallel port adapter for LM70 eval board (DEVELOPMENT)"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700128 depends on PARPORT && EXPERIMENTAL
Kaiwan N Billimoria78961a52007-07-17 04:04:05 -0700129 select SPI_BITBANG
130 help
131 This driver supports the NS LM70 LLP Evaluation Board,
132 which interfaces to an LM70 temperature sensor using
133 a parallel port.
134
Dragos Carp00b8fd22007-05-10 22:22:52 -0700135config SPI_MPC52xx_PSC
136 tristate "Freescale MPC52xx PSC SPI controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700137 depends on PPC_MPC52xx && EXPERIMENTAL
Dragos Carp00b8fd22007-05-10 22:22:52 -0700138 help
139 This enables using the Freescale MPC52xx Programmable Serial
140 Controller in master SPI mode.
141
Kumar Galaccf06992006-05-20 15:00:15 -0700142config SPI_MPC83xx
Anton Vorontsov328329a2007-10-16 01:27:47 -0700143 tristate "Freescale MPC83xx/QUICC Engine SPI controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700144 depends on (PPC_83xx || QUICC_ENGINE) && EXPERIMENTAL
Kumar Galaccf06992006-05-20 15:00:15 -0700145 help
Anton Vorontsov328329a2007-10-16 01:27:47 -0700146 This enables using the Freescale MPC83xx and QUICC Engine SPI
147 controllers in master mode.
Kumar Galaccf06992006-05-20 15:00:15 -0700148
149 Note, this driver uniquely supports the SPI controller on the MPC83xx
Anton Vorontsov328329a2007-10-16 01:27:47 -0700150 family of PowerPC processors, plus processors with QUICC Engine
151 technology. This driver uses a simple set of shift registers for data
152 (opposed to the CPM based descriptor model).
Kumar Galaccf06992006-05-20 15:00:15 -0700153
David Brownellfdb3c182007-02-12 00:52:37 -0800154config SPI_OMAP_UWIRE
155 tristate "OMAP1 MicroWire"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700156 depends on ARCH_OMAP1
David Brownellfdb3c182007-02-12 00:52:37 -0800157 select SPI_BITBANG
158 help
159 This hooks up to the MicroWire controller on OMAP1 chips.
160
Samuel Ortizccdc7bf2007-07-17 04:04:13 -0700161config SPI_OMAP24XX
Girishccc7bae2008-02-06 01:38:16 -0800162 tristate "McSPI driver for OMAP24xx/OMAP34xx"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700163 depends on ARCH_OMAP24XX || ARCH_OMAP34XX
Samuel Ortizccdc7bf2007-07-17 04:04:13 -0700164 help
Girishccc7bae2008-02-06 01:38:16 -0800165 SPI master controller for OMAP24xx/OMAP34xx Multichannel SPI
Samuel Ortizccdc7bf2007-07-17 04:04:13 -0700166 (McSPI) modules.
Andrea Paterniani69c202a2007-02-12 00:52:39 -0800167
Shadi Ammouri60cadec2008-08-05 13:01:09 -0700168config SPI_ORION
169 tristate "Orion SPI master (EXPERIMENTAL)"
170 depends on PLAT_ORION && EXPERIMENTAL
171 help
172 This enables using the SPI master controller on the Orion chips.
173
Stephen Streete0c99052006-03-07 23:53:24 -0800174config SPI_PXA2XX
175 tristate "PXA2xx SSP SPI master"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700176 depends on ARCH_PXA && EXPERIMENTAL
eric miao2f1a74e2007-11-21 18:50:53 +0800177 select PXA_SSP
Stephen Streete0c99052006-03-07 23:53:24 -0800178 help
179 This enables using a PXA2xx SSP port as a SPI master controller.
180 The driver can be configured to use any SSP port and additional
181 documentation can be found a Documentation/spi/pxa2xx.
182
David Brownell85abfaa2007-02-12 00:52:36 -0800183config SPI_S3C24XX
184 tristate "Samsung S3C24XX series SPI"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700185 depends on ARCH_S3C2410 && EXPERIMENTAL
David Brownellda0abc22007-07-17 04:04:09 -0700186 select SPI_BITBANG
David Brownell85abfaa2007-02-12 00:52:36 -0800187 help
188 SPI driver for Samsung S3C24XX series ARM SoCs
189
Ben Dooks1fc75472006-05-20 15:00:17 -0700190config SPI_S3C24XX_GPIO
191 tristate "Samsung S3C24XX series SPI by GPIO"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700192 depends on ARCH_S3C2410 && EXPERIMENTAL
David Brownellda0abc22007-07-17 04:04:09 -0700193 select SPI_BITBANG
Ben Dooks1fc75472006-05-20 15:00:17 -0700194 help
195 SPI driver for Samsung S3C24XX series ARM SoCs using
196 GPIO lines to provide the SPI bus. This can be used where
197 the inbuilt hardware cannot provide the transfer mode, or
198 where the board is using non hardware connected pins.
Andrei Konovalovae918c02007-07-17 04:04:11 -0700199
Magnus Damm37e46642008-02-06 01:38:15 -0800200config SPI_SH_SCI
201 tristate "SuperH SCI SPI controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700202 depends on SUPERH
Magnus Damm37e46642008-02-06 01:38:15 -0800203 select SPI_BITBANG
204 help
205 SPI driver for SuperH SCI blocks.
206
Atsushi Nemotof2cac672007-07-17 04:04:15 -0700207config SPI_TXX9
208 tristate "Toshiba TXx9 SPI controller"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700209 depends on GENERIC_GPIO && CPU_TX49XX
Atsushi Nemotof2cac672007-07-17 04:04:15 -0700210 help
211 SPI driver for Toshiba TXx9 MIPS SoCs
212
Andrei Konovalovae918c02007-07-17 04:04:11 -0700213config SPI_XILINX
214 tristate "Xilinx SPI controller"
Michal Simek6fa612b2009-05-11 15:49:12 +0200215 depends on (XILINX_VIRTEX || MICROBLAZE) && EXPERIMENTAL
Andrei Konovalovae918c02007-07-17 04:04:11 -0700216 select SPI_BITBANG
217 help
218 This exposes the SPI controller IP from the Xilinx EDK.
219
220 See the "OPB Serial Peripheral Interface (SPI) (v1.00e)"
221 Product Specification document (DS464) for hardware details.
222
David Brownell8ae12a02006-01-08 13:34:19 -0800223#
224# Add new SPI master controllers in alphabetical order above this line
225#
226
David Brownell8ae12a02006-01-08 13:34:19 -0800227#
228# There are lots of SPI device types, with sensors and memory
229# being probably the most widely used ones.
230#
231comment "SPI Protocol Masters"
David Brownell8ae12a02006-01-08 13:34:19 -0800232
Andrea Paterniani814a8d52007-05-08 00:32:15 -0700233config SPI_SPIDEV
234 tristate "User mode SPI device driver support"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700235 depends on EXPERIMENTAL
Andrea Paterniani814a8d52007-05-08 00:32:15 -0700236 help
237 This supports user mode SPI protocol drivers.
238
239 Note that this application programming interface is EXPERIMENTAL
240 and hence SUBJECT TO CHANGE WITHOUT NOTICE while it stabilizes.
241
Ben Dooks447aef12007-07-17 04:04:10 -0700242config SPI_TLE62X0
243 tristate "Infineon TLE62X0 (for power switching)"
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700244 depends on SYSFS
Ben Dooks447aef12007-07-17 04:04:10 -0700245 help
246 SPI driver for Infineon TLE62X0 series line driver chips,
247 such as the TLE6220, TLE6230 and TLE6240. This provides a
248 sysfs interface, with each line presented as a kind of GPIO
249 exposing both switch control and diagnostic feedback.
250
David Brownell8ae12a02006-01-08 13:34:19 -0800251#
252# Add new SPI protocol masters in alphabetical order above this line
253#
254
Robert P. J. Day6291fe22008-07-23 21:29:53 -0700255endif # SPI_MASTER
256
David Brownell8ae12a02006-01-08 13:34:19 -0800257# (slave support would go here)
258
Alessandro Guido79d8c7a2008-04-28 02:14:16 -0700259endif # SPI