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Robert P. J. Day96532ba2008-02-03 15:06:26 +02001#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
Linus Torvalds1da177e2005-04-16 15:20:36 -07003
Andrew Morton842fa692011-11-02 13:39:33 -07004#include <linux/string.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/device.h>
6#include <linux/err.h>
FUJITA Tomonorif0402a22009-01-05 23:59:01 +09007#include <linux/dma-attrs.h>
Alexey Dobriyanb7f080c2011-06-16 11:01:34 +00008#include <linux/dma-direction.h>
FUJITA Tomonorif0402a22009-01-05 23:59:01 +09009#include <linux/scatterlist.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070010
Bjorn Helgaas77f2ea22014-04-30 11:20:53 -060011/*
12 * A dma_addr_t can hold any valid DMA or bus address for the platform.
13 * It can be given to a device to use as a DMA source or target. A CPU cannot
14 * reference a dma_addr_t directly because there may be translation between
15 * its physical address space and the bus address space.
16 */
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090017struct dma_map_ops {
Marek Szyprowski613c4572012-03-28 16:36:27 +020018 void* (*alloc)(struct device *dev, size_t size,
19 dma_addr_t *dma_handle, gfp_t gfp,
20 struct dma_attrs *attrs);
21 void (*free)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle,
23 struct dma_attrs *attrs);
Marek Szyprowski9adc5372011-12-21 16:55:33 +010024 int (*mmap)(struct device *, struct vm_area_struct *,
25 void *, dma_addr_t, size_t, struct dma_attrs *attrs);
26
Marek Szyprowskid2b74282012-06-13 10:05:52 +020027 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
28 dma_addr_t, size_t, struct dma_attrs *attrs);
29
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090030 dma_addr_t (*map_page)(struct device *dev, struct page *page,
31 unsigned long offset, size_t size,
32 enum dma_data_direction dir,
33 struct dma_attrs *attrs);
34 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
35 size_t size, enum dma_data_direction dir,
36 struct dma_attrs *attrs);
Ricardo Ribalda Delgado04abab62015-02-11 13:53:15 +010037 /*
38 * map_sg returns 0 on error and a value > 0 on success.
39 * It should never return a value < 0.
40 */
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090041 int (*map_sg)(struct device *dev, struct scatterlist *sg,
42 int nents, enum dma_data_direction dir,
43 struct dma_attrs *attrs);
44 void (*unmap_sg)(struct device *dev,
45 struct scatterlist *sg, int nents,
46 enum dma_data_direction dir,
47 struct dma_attrs *attrs);
48 void (*sync_single_for_cpu)(struct device *dev,
49 dma_addr_t dma_handle, size_t size,
50 enum dma_data_direction dir);
51 void (*sync_single_for_device)(struct device *dev,
52 dma_addr_t dma_handle, size_t size,
53 enum dma_data_direction dir);
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090054 void (*sync_sg_for_cpu)(struct device *dev,
55 struct scatterlist *sg, int nents,
56 enum dma_data_direction dir);
57 void (*sync_sg_for_device)(struct device *dev,
58 struct scatterlist *sg, int nents,
59 enum dma_data_direction dir);
60 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
61 int (*dma_supported)(struct device *dev, u64 mask);
FUJITA Tomonorif726f30e2009-08-04 19:08:24 +000062 int (*set_dma_mask)(struct device *dev, u64 mask);
Milton Miller3a8f7552011-06-24 09:05:23 +000063#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
64 u64 (*get_required_mask)(struct device *dev);
65#endif
FUJITA Tomonorif0402a22009-01-05 23:59:01 +090066 int is_phys;
67};
68
Andrew Morton8f286c32007-10-18 03:05:07 -070069#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
Borislav Petkov34c65382007-10-18 03:05:06 -070070
James Bottomley32e8f702007-10-16 01:23:55 -070071#define DMA_MASK_NONE 0x0ULL
72
Rolf Eike Beerd6bd3a32006-09-29 01:59:48 -070073static inline int valid_dma_direction(int dma_direction)
74{
75 return ((dma_direction == DMA_BIDIRECTIONAL) ||
76 (dma_direction == DMA_TO_DEVICE) ||
77 (dma_direction == DMA_FROM_DEVICE));
78}
79
James Bottomley32e8f702007-10-16 01:23:55 -070080static inline int is_device_dma_capable(struct device *dev)
81{
82 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
83}
84
Dan Williams1b0fac42007-07-15 23:40:26 -070085#ifdef CONFIG_HAS_DMA
Linus Torvalds1da177e2005-04-16 15:20:36 -070086#include <asm/dma-mapping.h>
Dan Williams1b0fac42007-07-15 23:40:26 -070087#else
88#include <asm-generic/dma-mapping-broken.h>
89#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +090091static inline u64 dma_get_mask(struct device *dev)
92{
FUJITA Tomonori07a2c012008-09-19 02:02:05 +090093 if (dev && dev->dma_mask && *dev->dma_mask)
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +090094 return *dev->dma_mask;
Yang Hongyang284901a2009-04-06 19:01:15 -070095 return DMA_BIT_MASK(32);
FUJITA Tomonori589fc9a2008-09-12 19:42:34 +090096}
97
Rob Herring58af4a22012-03-20 14:33:01 -050098#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
FUJITA Tomonori710224f2010-09-22 13:04:55 -070099int dma_set_coherent_mask(struct device *dev, u64 mask);
100#else
FUJITA Tomonori6a1961f2010-03-10 15:23:39 -0800101static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
102{
103 if (!dma_supported(dev, mask))
104 return -EIO;
105 dev->coherent_dma_mask = mask;
106 return 0;
107}
FUJITA Tomonori710224f2010-09-22 13:04:55 -0700108#endif
FUJITA Tomonori6a1961f2010-03-10 15:23:39 -0800109
Russell King4aa806b2013-06-26 13:49:44 +0100110/*
111 * Set both the DMA mask and the coherent DMA mask to the same thing.
112 * Note that we don't check the return value from dma_set_coherent_mask()
113 * as the DMA API guarantees that the coherent DMA mask can be set to
114 * the same or smaller than the streaming DMA mask.
115 */
116static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
117{
118 int rc = dma_set_mask(dev, mask);
119 if (rc == 0)
120 dma_set_coherent_mask(dev, mask);
121 return rc;
122}
123
Russell Kingfa6a8d62013-06-27 12:21:45 +0100124/*
125 * Similar to the above, except it deals with the case where the device
126 * does not have dev->dma_mask appropriately setup.
127 */
128static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
129{
130 dev->dma_mask = &dev->coherent_dma_mask;
131 return dma_set_mask_and_coherent(dev, mask);
132}
133
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134extern u64 dma_get_required_mask(struct device *dev);
135
Will Deacona3a60f82014-08-27 15:49:10 +0100136#ifndef arch_setup_dma_ops
Will Deacon97890ba2014-08-27 16:24:20 +0100137static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
138 u64 size, struct iommu_ops *iommu,
139 bool coherent) { }
140#endif
141
142#ifndef arch_teardown_dma_ops
143static inline void arch_teardown_dma_ops(struct device *dev) { }
Santosh Shilimkar591c1ee2014-04-24 11:30:04 -0400144#endif
145
FUJITA Tomonori6b7b6512008-02-04 22:27:55 -0800146static inline unsigned int dma_get_max_seg_size(struct device *dev)
147{
148 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
149}
150
151static inline unsigned int dma_set_max_seg_size(struct device *dev,
152 unsigned int size)
153{
154 if (dev->dma_parms) {
155 dev->dma_parms->max_segment_size = size;
156 return 0;
157 } else
158 return -EIO;
159}
160
FUJITA Tomonorid22a6962008-02-04 22:28:13 -0800161static inline unsigned long dma_get_seg_boundary(struct device *dev)
162{
163 return dev->dma_parms ?
164 dev->dma_parms->segment_boundary_mask : 0xffffffff;
165}
166
167static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
168{
169 if (dev->dma_parms) {
170 dev->dma_parms->segment_boundary_mask = mask;
171 return 0;
172 } else
173 return -EIO;
174}
175
Santosh Shilimkar00c8f162013-07-29 14:18:48 +0100176#ifndef dma_max_pfn
177static inline unsigned long dma_max_pfn(struct device *dev)
178{
179 return *dev->dma_mask >> PAGE_SHIFT;
180}
181#endif
182
Andrew Morton842fa692011-11-02 13:39:33 -0700183static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
184 dma_addr_t *dma_handle, gfp_t flag)
185{
Joe Perchesede23fa2013-08-26 22:45:23 -0700186 void *ret = dma_alloc_coherent(dev, size, dma_handle,
187 flag | __GFP_ZERO);
Andrew Morton842fa692011-11-02 13:39:33 -0700188 return ret;
189}
190
Heiko Carstense259f192010-08-13 09:39:18 +0200191#ifdef CONFIG_HAS_DMA
FUJITA Tomonori4565f012010-08-10 18:03:22 -0700192static inline int dma_get_cache_alignment(void)
193{
194#ifdef ARCH_DMA_MINALIGN
195 return ARCH_DMA_MINALIGN;
196#endif
197 return 1;
198}
Heiko Carstense259f192010-08-13 09:39:18 +0200199#endif
FUJITA Tomonori4565f012010-08-10 18:03:22 -0700200
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201/* flags for the coherent memory api */
202#define DMA_MEMORY_MAP 0x01
203#define DMA_MEMORY_IO 0x02
204#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
205#define DMA_MEMORY_EXCLUSIVE 0x08
206
207#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
208static inline int
Bjorn Helgaas88a984b2014-05-20 16:54:22 -0600209dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 dma_addr_t device_addr, size_t size, int flags)
211{
212 return 0;
213}
214
215static inline void
216dma_release_declared_memory(struct device *dev)
217{
218}
219
220static inline void *
221dma_mark_declared_memory_occupied(struct device *dev,
222 dma_addr_t device_addr, size_t size)
223{
224 return ERR_PTR(-EBUSY);
225}
226#endif
227
Tejun Heo9ac78492007-01-20 16:00:26 +0900228/*
229 * Managed DMA API
230 */
231extern void *dmam_alloc_coherent(struct device *dev, size_t size,
232 dma_addr_t *dma_handle, gfp_t gfp);
233extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
234 dma_addr_t dma_handle);
235extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
236 dma_addr_t *dma_handle, gfp_t gfp);
237extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
238 dma_addr_t dma_handle);
239#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
Bjorn Helgaas88a984b2014-05-20 16:54:22 -0600240extern int dmam_declare_coherent_memory(struct device *dev,
241 phys_addr_t phys_addr,
Tejun Heo9ac78492007-01-20 16:00:26 +0900242 dma_addr_t device_addr, size_t size,
243 int flags);
244extern void dmam_release_declared_memory(struct device *dev);
245#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
246static inline int dmam_declare_coherent_memory(struct device *dev,
Bjorn Helgaas88a984b2014-05-20 16:54:22 -0600247 phys_addr_t phys_addr, dma_addr_t device_addr,
Tejun Heo9ac78492007-01-20 16:00:26 +0900248 size_t size, gfp_t gfp)
249{
250 return 0;
251}
252
253static inline void dmam_release_declared_memory(struct device *dev)
254{
255}
256#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
257
Arthur Kepner74bc7ce2008-04-29 01:00:30 -0700258#ifndef CONFIG_HAVE_DMA_ATTRS
259struct dma_attrs;
260
261#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
262 dma_map_single(dev, cpu_addr, size, dir)
263
264#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
265 dma_unmap_single(dev, dma_addr, size, dir)
266
267#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
268 dma_map_sg(dev, sgl, nents, dir)
269
270#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
271 dma_unmap_sg(dev, sgl, nents, dir)
272
Thierry Redingb4bbb102014-06-27 11:56:58 +0200273#else
274static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
275 dma_addr_t *dma_addr, gfp_t gfp)
276{
277 DEFINE_DMA_ATTRS(attrs);
278 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
279 return dma_alloc_attrs(dev, size, dma_addr, gfp, &attrs);
280}
281
282static inline void dma_free_writecombine(struct device *dev, size_t size,
283 void *cpu_addr, dma_addr_t dma_addr)
284{
285 DEFINE_DMA_ATTRS(attrs);
286 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
287 return dma_free_attrs(dev, size, cpu_addr, dma_addr, &attrs);
288}
289
290static inline int dma_mmap_writecombine(struct device *dev,
291 struct vm_area_struct *vma,
292 void *cpu_addr, dma_addr_t dma_addr,
293 size_t size)
294{
295 DEFINE_DMA_ATTRS(attrs);
296 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
297 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
298}
Arthur Kepner74bc7ce2008-04-29 01:00:30 -0700299#endif /* CONFIG_HAVE_DMA_ATTRS */
300
FUJITA Tomonori0acedc12010-03-10 15:23:31 -0800301#ifdef CONFIG_NEED_DMA_MAP_STATE
302#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
303#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
304#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
305#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
306#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
307#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
308#else
309#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
310#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
311#define dma_unmap_addr(PTR, ADDR_NAME) (0)
312#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
313#define dma_unmap_len(PTR, LEN_NAME) (0)
314#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
315#endif
316
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317#endif