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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * drivers/mtd/nand/spia.c
3 *
4 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
5 *
6 *
7 * 10-29-2001 TG change to support hardwarespecific access
8 * to controllines (due to change in nand.c)
9 * page_cache added
10 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000011 * $Id: spia.c,v 1.25 2005/11/07 11:14:31 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * Overview:
18 * This is a device driver for the NAND flash device found on the
19 * SPIA board which utilizes the Toshiba TC58V64AFT part. This is
20 * a 64Mibit (8MiB x 8 bits) NAND flash device.
21 */
22
23#include <linux/kernel.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/module.h>
27#include <linux/mtd/mtd.h>
28#include <linux/mtd/nand.h>
29#include <linux/mtd/partitions.h>
30#include <asm/io.h>
31
32/*
33 * MTD structure for SPIA board
34 */
35static struct mtd_info *spia_mtd = NULL;
36
37/*
38 * Values specific to the SPIA board (used with EP7212 processor)
39 */
40#define SPIA_IO_BASE 0xd0000000 /* Start of EP7212 IO address space */
41#define SPIA_FIO_BASE 0xf0000000 /* Address where flash is mapped */
David Woodhousee0c7d762006-05-13 18:07:53 +010042#define SPIA_PEDR 0x0080 /*
43 * IO offset to Port E data register
44 * where the CLE, ALE and NCE pins
45 * are wired to.
46 */
47#define SPIA_PEDDR 0x00c0 /*
48 * IO offset to Port E data direction
49 * register so we can control the IO
50 * lines.
51 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
53/*
54 * Module stuff
55 */
56
57static int spia_io_base = SPIA_IO_BASE;
58static int spia_fio_base = SPIA_FIO_BASE;
59static int spia_pedr = SPIA_PEDR;
60static int spia_peddr = SPIA_PEDDR;
61
62module_param(spia_io_base, int, 0);
63module_param(spia_fio_base, int, 0);
64module_param(spia_pedr, int, 0);
65module_param(spia_peddr, int, 0);
66
67/*
68 * Define partitions for flash device
69 */
Jesper Juhl3c6bee12006-01-09 20:54:01 -080070static const struct mtd_partition partition_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 {
David Woodhousee0c7d762006-05-13 18:07:53 +010072 .name = "SPIA flash partition 1",
73 .offset = 0,
74 .size = 2 * 1024 * 1024},
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 {
David Woodhousee0c7d762006-05-13 18:07:53 +010076 .name = "SPIA flash partition 2",
77 .offset = 2 * 1024 * 1024,
78 .size = 6 * 1024 * 1024}
Linus Torvalds1da177e2005-04-16 15:20:36 -070079};
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
David Woodhousee0c7d762006-05-13 18:07:53 +010081#define NUM_PARTITIONS 2
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
Thomas Gleixner61b03bd2005-11-07 11:15:49 +000083/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 * hardware specific access to control-lines
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020085 *
86 * ctrl:
87 * NAND_CNE: bit 0 -> bit 2
88 * NAND_CLE: bit 1 -> bit 0
89 * NAND_ALE: bit 2 -> bit 1
90 */
David Woodhousee0c7d762006-05-13 18:07:53 +010091static void spia_hwcontrol(struct mtd_info *mtd, int cmd)
92{
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020093 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020095 if (ctrl & NAND_CTRL_CHANGE) {
96 void __iomem *addr = spia_io_base + spia_pedr;
97 unsigned char bits;
Linus Torvalds1da177e2005-04-16 15:20:36 -070098
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +020099 bits = (ctrl & NAND_CNE) << 2;
100 bits |= (ctrl & NAND_CLE | NAND_ALE) >> 1;
101 writeb((readb(addr) & ~0x7) | bits, addr);
David Woodhousee0c7d762006-05-13 18:07:53 +0100102 }
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200103
104 if (cmd != NAND_CMD_NONE)
105 writeb(cmd, chip->IO_ADDR_W);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106}
107
108/*
109 * Main initialization routine
110 */
David Woodhousecead4db2006-05-16 13:54:50 +0100111static int __init spia_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112{
113 struct nand_chip *this;
114
115 /* Allocate memory for MTD device structure and private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100116 spia_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 if (!spia_mtd) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100118 printk("Unable to allocate SPIA NAND MTD device structure.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 return -ENOMEM;
120 }
121
122 /* Get pointer to private data */
David Woodhousee0c7d762006-05-13 18:07:53 +0100123 this = (struct nand_chip *)(&spia_mtd[1]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124
125 /* Initialize structures */
David Woodhousee0c7d762006-05-13 18:07:53 +0100126 memset(spia_mtd, 0, sizeof(struct mtd_info));
127 memset(this, 0, sizeof(struct nand_chip));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128
129 /* Link the private data with the MTD structure */
130 spia_mtd->priv = this;
David Woodhouse552d9202006-05-14 01:20:46 +0100131 spia_mtd->owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132
133 /*
134 * Set GPIO Port E control register so that the pins are configured
135 * to be outputs for controlling the NAND flash.
136 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100137 (*(volatile unsigned char *)(spia_io_base + spia_peddr)) = 0x07;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138
139 /* Set address of NAND IO lines */
David Woodhousee0c7d762006-05-13 18:07:53 +0100140 this->IO_ADDR_R = (void __iomem *)spia_fio_base;
141 this->IO_ADDR_W = (void __iomem *)spia_fio_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 /* Set address of hardware control function */
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200143 this->cmd_ctrl = spia_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 /* 15 us command delay time */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000145 this->chip_delay = 15;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146
147 /* Scan to find existence of the device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100148 if (nand_scan(spia_mtd, 1)) {
149 kfree(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 return -ENXIO;
151 }
152
153 /* Register the partitions */
154 add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS);
155
156 /* Return happy */
157 return 0;
158}
David Woodhousee0c7d762006-05-13 18:07:53 +0100159
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160module_init(spia_init);
161
162/*
163 * Clean up routine
164 */
David Woodhousee0c7d762006-05-13 18:07:53 +0100165static void __exit spia_cleanup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166{
167 /* Release resources, unregister device */
David Woodhousee0c7d762006-05-13 18:07:53 +0100168 nand_release(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169
170 /* Free the MTD device structure */
David Woodhousee0c7d762006-05-13 18:07:53 +0100171 kfree(spia_mtd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172}
David Woodhousee0c7d762006-05-13 18:07:53 +0100173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174module_exit(spia_cleanup);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175
176MODULE_LICENSE("GPL");
177MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com");
178MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on SPIA board");