blob: 3c891d78ba582a8ff8cb3411c3d704b9ea80ad7e [file] [log] [blame]
Jeeja KPa40e6932015-07-09 15:20:08 +05301/*
2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 *
20 */
21
22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include "skl.h"
Jeeja KPb663a8c2015-10-07 11:31:57 +010027#include "skl-topology.h"
Jeeja KPa40e6932015-07-09 15:20:08 +053028
29#define HDA_MONO 1
30#define HDA_STEREO 2
31
32static struct snd_pcm_hardware azx_pcm_hw = {
33 .info = (SNDRV_PCM_INFO_MMAP |
34 SNDRV_PCM_INFO_INTERLEAVED |
35 SNDRV_PCM_INFO_BLOCK_TRANSFER |
36 SNDRV_PCM_INFO_MMAP_VALID |
37 SNDRV_PCM_INFO_PAUSE |
38 SNDRV_PCM_INFO_SYNC_START |
39 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
40 SNDRV_PCM_INFO_HAS_LINK_ATIME |
41 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
42 .formats = SNDRV_PCM_FMTBIT_S16_LE,
43 .rates = SNDRV_PCM_RATE_48000,
44 .rate_min = 48000,
45 .rate_max = 48000,
46 .channels_min = 2,
47 .channels_max = 2,
48 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
49 .period_bytes_min = 128,
50 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
51 .periods_min = 2,
52 .periods_max = AZX_MAX_FRAG,
53 .fifo_size = 0,
54};
55
56static inline
57struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
58{
59 return substream->runtime->private_data;
60}
61
62static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
63{
64 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
65 struct hdac_stream *hstream = hdac_stream(stream);
66 struct hdac_bus *bus = hstream->bus;
67
68 return hbus_to_ebus(bus);
69}
70
71static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
72 struct snd_pcm_substream *substream,
73 size_t size)
74{
75 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
76
77 hdac_stream(stream)->bufsize = 0;
78 hdac_stream(stream)->period_bytes = 0;
79 hdac_stream(stream)->format_val = 0;
80
81 return snd_pcm_lib_malloc_pages(substream, size);
82}
83
84static int skl_substream_free_pages(struct hdac_bus *bus,
85 struct snd_pcm_substream *substream)
86{
87 return snd_pcm_lib_free_pages(substream);
88}
89
90static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
91 struct snd_pcm_runtime *runtime)
92{
93 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
94
95 /* avoid wrap-around with wall-clock */
96 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
97 20, 178000000);
98}
99
Jeeja KP05057002015-07-09 15:20:11 +0530100static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
101{
102 if (ebus->ppcap)
103 return HDAC_EXT_STREAM_TYPE_HOST;
104 else
105 return HDAC_EXT_STREAM_TYPE_COUPLED;
106}
107
Jeeja KPa40e6932015-07-09 15:20:08 +0530108static int skl_pcm_open(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
112 struct hdac_ext_stream *stream;
113 struct snd_pcm_runtime *runtime = substream->runtime;
114 struct skl_dma_params *dma_params;
Jeeja KPa40e6932015-07-09 15:20:08 +0530115
116 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
Jeeja KPa40e6932015-07-09 15:20:08 +0530117
118 stream = snd_hdac_ext_stream_assign(ebus, substream,
Jeeja KP05057002015-07-09 15:20:11 +0530119 skl_get_host_stream_type(ebus));
Jeeja KPa40e6932015-07-09 15:20:08 +0530120 if (stream == NULL)
121 return -EBUSY;
122
123 skl_set_pcm_constrains(ebus, runtime);
124
125 /*
126 * disable WALLCLOCK timestamps for capture streams
127 * until we figure out how to handle digital inputs
128 */
129 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
130 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
131 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
132 }
133
134 runtime->private_data = stream;
135
136 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
137 if (!dma_params)
138 return -ENOMEM;
139
140 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
141 snd_soc_dai_set_dma_data(dai, substream, dma_params);
142
143 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
144 dma_params->stream_tag);
145 snd_pcm_set_sync(substream);
146
147 return 0;
148}
149
150static int skl_get_format(struct snd_pcm_substream *substream,
151 struct snd_soc_dai *dai)
152{
153 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
154 struct skl_dma_params *dma_params;
Jeeja KP05057002015-07-09 15:20:11 +0530155 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KPa40e6932015-07-09 15:20:08 +0530156 int format_val = 0;
Jeeja KPa40e6932015-07-09 15:20:08 +0530157
Jeeja KP05057002015-07-09 15:20:11 +0530158 if (ebus->ppcap) {
159 struct snd_pcm_runtime *runtime = substream->runtime;
160
161 format_val = snd_hdac_calc_stream_format(runtime->rate,
162 runtime->channels,
163 runtime->format,
164 32, 0);
165 } else {
166 struct snd_soc_dai *codec_dai = rtd->codec_dai;
167
168 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
169 if (dma_params)
170 format_val = dma_params->format;
171 }
Jeeja KPa40e6932015-07-09 15:20:08 +0530172
173 return format_val;
174}
175
176static int skl_pcm_prepare(struct snd_pcm_substream *substream,
177 struct snd_soc_dai *dai)
178{
179 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
180 unsigned int format_val;
181 int err;
182
183 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
Jeeja KPa40e6932015-07-09 15:20:08 +0530184
185 format_val = skl_get_format(substream, dai);
186 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
187 hdac_stream(stream)->stream_tag, format_val);
188 snd_hdac_stream_reset(hdac_stream(stream));
189
190 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
191 if (err < 0)
192 return err;
193
194 err = snd_hdac_stream_setup(hdac_stream(stream));
195 if (err < 0)
196 return err;
197
198 hdac_stream(stream)->prepared = 1;
199
200 return err;
201}
202
203static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
204 struct snd_pcm_hw_params *params,
205 struct snd_soc_dai *dai)
206{
207 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KP05057002015-07-09 15:20:11 +0530208 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
Jeeja KPa40e6932015-07-09 15:20:08 +0530209 struct snd_pcm_runtime *runtime = substream->runtime;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100210 struct skl_pipe_params p_params = {0};
211 struct skl_module_cfg *m_cfg;
Jeeja KP05057002015-07-09 15:20:11 +0530212 int ret, dma_id;
Jeeja KPa40e6932015-07-09 15:20:08 +0530213
214 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
215 ret = skl_substream_alloc_pages(ebus, substream,
216 params_buffer_bytes(params));
217 if (ret < 0)
218 return ret;
219
220 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
221 runtime->rate, runtime->channels, runtime->format);
222
Jeeja KP05057002015-07-09 15:20:11 +0530223 dma_id = hdac_stream(stream)->stream_tag - 1;
224 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
225
Jeeja KPb663a8c2015-10-07 11:31:57 +0100226 p_params.s_fmt = snd_pcm_format_width(params_format(params));
227 p_params.ch = params_channels(params);
228 p_params.s_freq = params_rate(params);
229 p_params.host_dma_id = dma_id;
230 p_params.stream = substream->stream;
231
232 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
233 if (m_cfg)
234 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
235
Jeeja KPa40e6932015-07-09 15:20:08 +0530236 return 0;
237}
238
239static void skl_pcm_close(struct snd_pcm_substream *substream,
240 struct snd_soc_dai *dai)
241{
242 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
Jeeja KP05057002015-07-09 15:20:11 +0530243 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KPa40e6932015-07-09 15:20:08 +0530244 struct skl_dma_params *dma_params = NULL;
245
246 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
Jeeja KP05057002015-07-09 15:20:11 +0530247
248 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
Jeeja KPa40e6932015-07-09 15:20:08 +0530249
250 dma_params = snd_soc_dai_get_dma_data(dai, substream);
251 /*
252 * now we should set this to NULL as we are freeing by the
253 * dma_params
254 */
255 snd_soc_dai_set_dma_data(dai, substream, NULL);
256
Jeeja KPa40e6932015-07-09 15:20:08 +0530257 kfree(dma_params);
258}
259
260static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
261 struct snd_soc_dai *dai)
262{
263 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
264 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
265
266 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
267
268 snd_hdac_stream_cleanup(hdac_stream(stream));
269 hdac_stream(stream)->prepared = 0;
270
271 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
272}
273
Jeeja KPb663a8c2015-10-07 11:31:57 +0100274static int skl_be_hw_params(struct snd_pcm_substream *substream,
275 struct snd_pcm_hw_params *params,
276 struct snd_soc_dai *dai)
277{
278 struct skl_pipe_params p_params = {0};
279
280 p_params.s_fmt = snd_pcm_format_width(params_format(params));
281 p_params.ch = params_channels(params);
282 p_params.s_freq = params_rate(params);
283 p_params.stream = substream->stream;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100284
Jeeja KP4bd073f2015-10-27 09:22:45 +0900285 return skl_tplg_be_update_params(dai, &p_params);
Jeeja KPb663a8c2015-10-07 11:31:57 +0100286}
287
Jeeja KPd1730c32015-10-27 09:22:53 +0900288static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
289 int cmd)
290{
291 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
292 struct hdac_bus *bus = ebus_to_hbus(ebus);
293 struct hdac_ext_stream *stream;
294 int start;
295 unsigned long cookie;
296 struct hdac_stream *hstr;
297
298 stream = get_hdac_ext_stream(substream);
299 hstr = hdac_stream(stream);
300
301 if (!hstr->prepared)
302 return -EPIPE;
303
304 switch (cmd) {
305 case SNDRV_PCM_TRIGGER_START:
306 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
307 case SNDRV_PCM_TRIGGER_RESUME:
308 start = 1;
309 break;
310
311 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
312 case SNDRV_PCM_TRIGGER_SUSPEND:
313 case SNDRV_PCM_TRIGGER_STOP:
314 start = 0;
315 break;
316
317 default:
318 return -EINVAL;
319 }
320
321 spin_lock_irqsave(&bus->reg_lock, cookie);
322
323 if (start) {
324 snd_hdac_stream_start(hdac_stream(stream), true);
325 snd_hdac_stream_timecounter_init(hstr, 0);
326 } else {
327 snd_hdac_stream_stop(hdac_stream(stream));
328 }
329
330 spin_unlock_irqrestore(&bus->reg_lock, cookie);
331
332 return 0;
333}
334
Jeeja KPb663a8c2015-10-07 11:31:57 +0100335static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
336 struct snd_soc_dai *dai)
337{
338 struct skl *skl = get_skl_ctx(dai->dev);
339 struct skl_sst *ctx = skl->skl_sst;
340 struct skl_module_cfg *mconfig;
Jeeja KP7e3a17d2015-11-23 22:26:24 +0530341 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
342 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
Jeeja KPd1730c32015-10-27 09:22:53 +0900343 int ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100344
345 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
346 if (!mconfig)
347 return -EIO;
348
349 switch (cmd) {
Jeeja KP7e3a17d2015-11-23 22:26:24 +0530350 case SNDRV_PCM_TRIGGER_RESUME:
351 skl_pcm_prepare(substream, dai);
Jeeja KPd1730c32015-10-27 09:22:53 +0900352 case SNDRV_PCM_TRIGGER_START:
Jeeja KPb663a8c2015-10-07 11:31:57 +0100353 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
Jeeja KPd1730c32015-10-27 09:22:53 +0900354 /*
355 * Start HOST DMA and Start FE Pipe.This is to make sure that
356 * there are no underrun/overrun in the case when the FE
357 * pipeline is started but there is a delay in starting the
358 * DMA channel on the host.
359 */
Jeeja KP7e3a17d2015-11-23 22:26:24 +0530360 snd_hdac_ext_stream_decouple(ebus, stream, true);
Jeeja KPd1730c32015-10-27 09:22:53 +0900361 ret = skl_decoupled_trigger(substream, cmd);
362 if (ret < 0)
363 return ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100364 return skl_run_pipe(ctx, mconfig->pipe);
Jeeja KPd1730c32015-10-27 09:22:53 +0900365 break;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100366
367 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
368 case SNDRV_PCM_TRIGGER_SUSPEND:
Jeeja KPd1730c32015-10-27 09:22:53 +0900369 case SNDRV_PCM_TRIGGER_STOP:
370 /*
371 * Stop FE Pipe first and stop DMA. This is to make sure that
372 * there are no underrun/overrun in the case if there is a delay
373 * between the two operations.
374 */
375 ret = skl_stop_pipe(ctx, mconfig->pipe);
376 if (ret < 0)
377 return ret;
378
379 ret = skl_decoupled_trigger(substream, cmd);
Jeeja KP7e3a17d2015-11-23 22:26:24 +0530380 if (cmd == SNDRV_PCM_TRIGGER_SUSPEND)
381 snd_hdac_ext_stream_decouple(ebus, stream, false);
Jeeja KPd1730c32015-10-27 09:22:53 +0900382 break;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100383
384 default:
Jeeja KPd1730c32015-10-27 09:22:53 +0900385 return -EINVAL;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100386 }
Jeeja KPd1730c32015-10-27 09:22:53 +0900387
388 return 0;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100389}
390
Jeeja KP05057002015-07-09 15:20:11 +0530391static int skl_link_hw_params(struct snd_pcm_substream *substream,
392 struct snd_pcm_hw_params *params,
393 struct snd_soc_dai *dai)
394{
395 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
396 struct hdac_ext_stream *link_dev;
397 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
398 struct skl_dma_params *dma_params;
399 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100400 struct skl_pipe_params p_params = {0};
Jeeja KP05057002015-07-09 15:20:11 +0530401
Jeeja KP05057002015-07-09 15:20:11 +0530402 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
403 HDAC_EXT_STREAM_TYPE_LINK);
404 if (!link_dev)
405 return -EBUSY;
406
407 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
408
409 /* set the stream tag in the codec dai dma params */
410 dma_params = (struct skl_dma_params *)
411 snd_soc_dai_get_dma_data(codec_dai, substream);
412 if (dma_params)
413 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag;
414 snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params);
Jeeja KPb663a8c2015-10-07 11:31:57 +0100415
416 p_params.s_fmt = snd_pcm_format_width(params_format(params));
417 p_params.ch = params_channels(params);
418 p_params.s_freq = params_rate(params);
419 p_params.stream = substream->stream;
420 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
421
Jeeja KP4bd073f2015-10-27 09:22:45 +0900422 return skl_tplg_be_update_params(dai, &p_params);
Jeeja KP05057002015-07-09 15:20:11 +0530423}
424
425static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
426 struct snd_soc_dai *dai)
427{
428 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
429 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
430 struct hdac_ext_stream *link_dev =
431 snd_soc_dai_get_dma_data(dai, substream);
432 unsigned int format_val = 0;
433 struct skl_dma_params *dma_params;
434 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Jeeja KP05057002015-07-09 15:20:11 +0530435 struct hdac_ext_link *link;
436
Jeeja KP05057002015-07-09 15:20:11 +0530437 if (link_dev->link_prepared) {
438 dev_dbg(dai->dev, "already stream is prepared - returning\n");
439 return 0;
440 }
Jeeja KP05057002015-07-09 15:20:11 +0530441
442 dma_params = (struct skl_dma_params *)
443 snd_soc_dai_get_dma_data(codec_dai, substream);
444 if (dma_params)
445 format_val = dma_params->format;
446 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
447 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
448
449 snd_hdac_ext_link_stream_reset(link_dev);
450
451 snd_hdac_ext_link_stream_setup(link_dev, format_val);
452
453 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
454 if (!link)
455 return -EINVAL;
456
457 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
458 link_dev->link_prepared = 1;
459
460 return 0;
461}
462
463static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
464 int cmd, struct snd_soc_dai *dai)
465{
466 struct hdac_ext_stream *link_dev =
467 snd_soc_dai_get_dma_data(dai, substream);
468
469 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
470 switch (cmd) {
471 case SNDRV_PCM_TRIGGER_START:
472 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
473 case SNDRV_PCM_TRIGGER_RESUME:
474 snd_hdac_ext_link_stream_start(link_dev);
475 break;
476
477 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
478 case SNDRV_PCM_TRIGGER_SUSPEND:
479 case SNDRV_PCM_TRIGGER_STOP:
480 snd_hdac_ext_link_stream_clear(link_dev);
481 break;
482
483 default:
484 return -EINVAL;
485 }
486 return 0;
487}
488
489static int skl_link_hw_free(struct snd_pcm_substream *substream,
490 struct snd_soc_dai *dai)
491{
492 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
493 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
494 struct hdac_ext_stream *link_dev =
495 snd_soc_dai_get_dma_data(dai, substream);
496 struct hdac_ext_link *link;
497
498 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
499
500 link_dev->link_prepared = 0;
501
502 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
503 if (!link)
504 return -EINVAL;
505
506 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
507 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
508 return 0;
509}
510
Jeeja KPa40e6932015-07-09 15:20:08 +0530511static struct snd_soc_dai_ops skl_pcm_dai_ops = {
512 .startup = skl_pcm_open,
513 .shutdown = skl_pcm_close,
514 .prepare = skl_pcm_prepare,
515 .hw_params = skl_pcm_hw_params,
516 .hw_free = skl_pcm_hw_free,
Jeeja KPb663a8c2015-10-07 11:31:57 +0100517 .trigger = skl_pcm_trigger,
Jeeja KPa40e6932015-07-09 15:20:08 +0530518};
519
Jeeja KP05057002015-07-09 15:20:11 +0530520static struct snd_soc_dai_ops skl_dmic_dai_ops = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100521 .hw_params = skl_be_hw_params,
Jeeja KPb663a8c2015-10-07 11:31:57 +0100522};
523
524static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100525 .hw_params = skl_be_hw_params,
Jeeja KP05057002015-07-09 15:20:11 +0530526};
527
528static struct snd_soc_dai_ops skl_link_dai_ops = {
Jeeja KP05057002015-07-09 15:20:11 +0530529 .prepare = skl_link_pcm_prepare,
530 .hw_params = skl_link_hw_params,
531 .hw_free = skl_link_hw_free,
532 .trigger = skl_link_pcm_trigger,
Jeeja KP05057002015-07-09 15:20:11 +0530533};
534
Jeeja KPa40e6932015-07-09 15:20:08 +0530535static struct snd_soc_dai_driver skl_platform_dai[] = {
536{
537 .name = "System Pin",
538 .ops = &skl_pcm_dai_ops,
539 .playback = {
540 .stream_name = "System Playback",
541 .channels_min = HDA_MONO,
542 .channels_max = HDA_STEREO,
543 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
544 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
545 },
546 .capture = {
547 .stream_name = "System Capture",
548 .channels_min = HDA_MONO,
549 .channels_max = HDA_STEREO,
550 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
551 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
552 },
553},
554{
Jeeja KP05057002015-07-09 15:20:11 +0530555 .name = "Reference Pin",
556 .ops = &skl_pcm_dai_ops,
557 .capture = {
558 .stream_name = "Reference Capture",
559 .channels_min = HDA_MONO,
560 .channels_max = HDA_STEREO,
561 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
562 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
563 },
564},
565{
Jeeja KPa40e6932015-07-09 15:20:08 +0530566 .name = "Deepbuffer Pin",
567 .ops = &skl_pcm_dai_ops,
568 .playback = {
569 .stream_name = "Deepbuffer Playback",
570 .channels_min = HDA_STEREO,
571 .channels_max = HDA_STEREO,
572 .rates = SNDRV_PCM_RATE_48000,
573 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
574 },
575},
576{
577 .name = "LowLatency Pin",
578 .ops = &skl_pcm_dai_ops,
579 .playback = {
580 .stream_name = "Low Latency Playback",
581 .channels_min = HDA_STEREO,
582 .channels_max = HDA_STEREO,
583 .rates = SNDRV_PCM_RATE_48000,
584 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
585 },
586},
Jeeja KP05057002015-07-09 15:20:11 +0530587/* BE CPU Dais */
588{
Jeeja KPb663a8c2015-10-07 11:31:57 +0100589 .name = "SSP0 Pin",
590 .ops = &skl_be_ssp_dai_ops,
591 .playback = {
592 .stream_name = "ssp0 Tx",
593 .channels_min = HDA_STEREO,
594 .channels_max = HDA_STEREO,
595 .rates = SNDRV_PCM_RATE_48000,
596 .formats = SNDRV_PCM_FMTBIT_S16_LE,
597 },
598 .capture = {
599 .stream_name = "ssp0 Rx",
600 .channels_min = HDA_STEREO,
601 .channels_max = HDA_STEREO,
602 .rates = SNDRV_PCM_RATE_48000,
603 .formats = SNDRV_PCM_FMTBIT_S16_LE,
604 },
605},
606{
Jeeja KPc80fd4d2015-11-05 22:53:06 +0530607 .name = "SSP1 Pin",
608 .ops = &skl_be_ssp_dai_ops,
609 .playback = {
610 .stream_name = "ssp1 Tx",
611 .channels_min = HDA_STEREO,
612 .channels_max = HDA_STEREO,
613 .rates = SNDRV_PCM_RATE_48000,
614 .formats = SNDRV_PCM_FMTBIT_S16_LE,
615 },
616 .capture = {
617 .stream_name = "ssp1 Rx",
618 .channels_min = HDA_STEREO,
619 .channels_max = HDA_STEREO,
620 .rates = SNDRV_PCM_RATE_48000,
621 .formats = SNDRV_PCM_FMTBIT_S16_LE,
622 },
623},
624{
Jeeja KP05057002015-07-09 15:20:11 +0530625 .name = "iDisp Pin",
626 .ops = &skl_link_dai_ops,
627 .playback = {
628 .stream_name = "iDisp Tx",
629 .channels_min = HDA_STEREO,
630 .channels_max = HDA_STEREO,
631 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
632 .formats = SNDRV_PCM_FMTBIT_S16_LE,
633 },
634},
635{
636 .name = "DMIC01 Pin",
637 .ops = &skl_dmic_dai_ops,
638 .capture = {
639 .stream_name = "DMIC01 Rx",
640 .channels_min = HDA_STEREO,
641 .channels_max = HDA_STEREO,
642 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
643 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
644 },
645},
646{
Jeeja KP05057002015-07-09 15:20:11 +0530647 .name = "HD-Codec Pin",
648 .ops = &skl_link_dai_ops,
649 .playback = {
650 .stream_name = "HD-Codec Tx",
651 .channels_min = HDA_STEREO,
652 .channels_max = HDA_STEREO,
653 .rates = SNDRV_PCM_RATE_48000,
654 .formats = SNDRV_PCM_FMTBIT_S16_LE,
655 },
656 .capture = {
657 .stream_name = "HD-Codec Rx",
658 .channels_min = HDA_STEREO,
659 .channels_max = HDA_STEREO,
660 .rates = SNDRV_PCM_RATE_48000,
661 .formats = SNDRV_PCM_FMTBIT_S16_LE,
662 },
663},
Jeeja KPa40e6932015-07-09 15:20:08 +0530664};
665
666static int skl_platform_open(struct snd_pcm_substream *substream)
667{
668 struct snd_pcm_runtime *runtime;
669 struct snd_soc_pcm_runtime *rtd = substream->private_data;
670 struct snd_soc_dai_link *dai_link = rtd->dai_link;
671
672 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
673 dai_link->cpu_dai_name);
674
675 runtime = substream->runtime;
676 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
677
678 return 0;
679}
680
Jeeja KPb663a8c2015-10-07 11:31:57 +0100681static int skl_coupled_trigger(struct snd_pcm_substream *substream,
Jeeja KPa40e6932015-07-09 15:20:08 +0530682 int cmd)
683{
684 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
685 struct hdac_bus *bus = ebus_to_hbus(ebus);
686 struct hdac_ext_stream *stream;
687 struct snd_pcm_substream *s;
688 bool start;
689 int sbits = 0;
690 unsigned long cookie;
691 struct hdac_stream *hstr;
692
693 stream = get_hdac_ext_stream(substream);
694 hstr = hdac_stream(stream);
695
696 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
697
698 if (!hstr->prepared)
699 return -EPIPE;
700
701 switch (cmd) {
702 case SNDRV_PCM_TRIGGER_START:
703 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
704 case SNDRV_PCM_TRIGGER_RESUME:
705 start = true;
706 break;
707
708 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
709 case SNDRV_PCM_TRIGGER_SUSPEND:
710 case SNDRV_PCM_TRIGGER_STOP:
711 start = false;
712 break;
713
714 default:
715 return -EINVAL;
716 }
717
718 snd_pcm_group_for_each_entry(s, substream) {
719 if (s->pcm->card != substream->pcm->card)
720 continue;
721 stream = get_hdac_ext_stream(s);
722 sbits |= 1 << hdac_stream(stream)->index;
723 snd_pcm_trigger_done(s, substream);
724 }
725
726 spin_lock_irqsave(&bus->reg_lock, cookie);
727
728 /* first, set SYNC bits of corresponding streams */
729 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
730
731 snd_pcm_group_for_each_entry(s, substream) {
732 if (s->pcm->card != substream->pcm->card)
733 continue;
734 stream = get_hdac_ext_stream(s);
735 if (start)
736 snd_hdac_stream_start(hdac_stream(stream), true);
737 else
738 snd_hdac_stream_stop(hdac_stream(stream));
739 }
740 spin_unlock_irqrestore(&bus->reg_lock, cookie);
741
742 snd_hdac_stream_sync(hstr, start, sbits);
743
744 spin_lock_irqsave(&bus->reg_lock, cookie);
745
746 /* reset SYNC bits */
747 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
748 if (start)
749 snd_hdac_stream_timecounter_init(hstr, sbits);
750 spin_unlock_irqrestore(&bus->reg_lock, cookie);
751
752 return 0;
753}
754
Jeeja KP05057002015-07-09 15:20:11 +0530755static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
756 int cmd)
757{
758 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
759
Jeeja KPd1730c32015-10-27 09:22:53 +0900760 if (!ebus->ppcap)
Jeeja KPb663a8c2015-10-07 11:31:57 +0100761 return skl_coupled_trigger(substream, cmd);
Jeeja KPd1730c32015-10-27 09:22:53 +0900762
763 return 0;
Jeeja KP05057002015-07-09 15:20:11 +0530764}
765
Jeeja KPa40e6932015-07-09 15:20:08 +0530766/* calculate runtime delay from LPIB */
767static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus,
768 struct hdac_ext_stream *sstream,
769 unsigned int pos)
770{
771 struct hdac_bus *bus = ebus_to_hbus(ebus);
772 struct hdac_stream *hstream = hdac_stream(sstream);
773 struct snd_pcm_substream *substream = hstream->substream;
774 int stream = substream->stream;
775 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream);
776 int delay;
777
778 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
779 delay = pos - lpib_pos;
780 else
781 delay = lpib_pos - pos;
782
783 if (delay < 0) {
784 if (delay >= hstream->delay_negative_threshold)
785 delay = 0;
786 else
787 delay += hstream->bufsize;
788 }
789
790 if (delay >= hstream->period_bytes) {
791 dev_info(bus->dev,
792 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
793 delay, hstream->period_bytes);
794 delay = 0;
795 }
796
797 return bytes_to_frames(substream->runtime, delay);
798}
799
800static unsigned int skl_get_position(struct hdac_ext_stream *hstream,
801 int codec_delay)
802{
803 struct hdac_stream *hstr = hdac_stream(hstream);
804 struct snd_pcm_substream *substream = hstr->substream;
Vinod Koulc7b2a442015-10-30 20:34:20 +0530805 struct hdac_ext_bus *ebus;
Jeeja KPa40e6932015-07-09 15:20:08 +0530806 unsigned int pos;
807 int delay;
808
809 /* use the position buffer as default */
810 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
811
812 if (pos >= hdac_stream(hstream)->bufsize)
813 pos = 0;
814
815 if (substream->runtime) {
Vinod Koulc7b2a442015-10-30 20:34:20 +0530816 ebus = get_bus_ctx(substream);
Jeeja KPa40e6932015-07-09 15:20:08 +0530817 delay = skl_get_delay_from_lpib(ebus, hstream, pos)
818 + codec_delay;
819 substream->runtime->delay += delay;
820 }
821
822 return pos;
823}
824
825static snd_pcm_uframes_t skl_platform_pcm_pointer
826 (struct snd_pcm_substream *substream)
827{
828 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
829
830 return bytes_to_frames(substream->runtime,
831 skl_get_position(hstream, 0));
832}
833
834static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
835 u64 nsec)
836{
837 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
838 struct snd_soc_dai *codec_dai = rtd->codec_dai;
839 u64 codec_frames, codec_nsecs;
840
841 if (!codec_dai->driver->ops->delay)
842 return nsec;
843
844 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
845 codec_nsecs = div_u64(codec_frames * 1000000000LL,
846 substream->runtime->rate);
847
848 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
849 return nsec + codec_nsecs;
850
851 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
852}
853
854static int skl_get_time_info(struct snd_pcm_substream *substream,
855 struct timespec *system_ts, struct timespec *audio_ts,
856 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
857 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
858{
859 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
860 struct hdac_stream *hstr = hdac_stream(sstream);
861 u64 nsec;
862
863 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
864 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
865
866 snd_pcm_gettime(substream->runtime, system_ts);
867
868 nsec = timecounter_read(&hstr->tc);
869 nsec = div_u64(nsec, 3); /* can be optimized */
870 if (audio_tstamp_config->report_delay)
871 nsec = skl_adjust_codec_delay(substream, nsec);
872
873 *audio_ts = ns_to_timespec(nsec);
874
875 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
876 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
877 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
878
879 } else {
880 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
881 }
882
883 return 0;
884}
885
886static struct snd_pcm_ops skl_platform_ops = {
887 .open = skl_platform_open,
888 .ioctl = snd_pcm_lib_ioctl,
889 .trigger = skl_platform_pcm_trigger,
890 .pointer = skl_platform_pcm_pointer,
891 .get_time_info = skl_get_time_info,
892 .mmap = snd_pcm_lib_default_mmap,
893 .page = snd_pcm_sgbuf_ops_page,
894};
895
896static void skl_pcm_free(struct snd_pcm *pcm)
897{
898 snd_pcm_lib_preallocate_free_for_all(pcm);
899}
900
901#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
902
903static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
904{
905 struct snd_soc_dai *dai = rtd->cpu_dai;
906 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
907 struct snd_pcm *pcm = rtd->pcm;
908 unsigned int size;
909 int retval = 0;
910 struct skl *skl = ebus_to_skl(ebus);
911
912 if (dai->driver->playback.channels_min ||
913 dai->driver->capture.channels_min) {
914 /* buffer pre-allocation */
915 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
916 if (size > MAX_PREALLOC_SIZE)
917 size = MAX_PREALLOC_SIZE;
918 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
919 SNDRV_DMA_TYPE_DEV_SG,
920 snd_dma_pci_data(skl->pci),
921 size, MAX_PREALLOC_SIZE);
922 if (retval) {
923 dev_err(dai->dev, "dma buffer allocationf fail\n");
924 return retval;
925 }
926 }
927
928 return retval;
929}
930
Jeeja KPb663a8c2015-10-07 11:31:57 +0100931static int skl_platform_soc_probe(struct snd_soc_platform *platform)
932{
933 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
934
935 if (ebus->ppcap)
936 return skl_tplg_init(platform, ebus);
937
938 return 0;
939}
Jeeja KPa40e6932015-07-09 15:20:08 +0530940static struct snd_soc_platform_driver skl_platform_drv = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100941 .probe = skl_platform_soc_probe,
Jeeja KPa40e6932015-07-09 15:20:08 +0530942 .ops = &skl_platform_ops,
943 .pcm_new = skl_pcm_new,
944 .pcm_free = skl_pcm_free,
945};
946
947static const struct snd_soc_component_driver skl_component = {
948 .name = "pcm",
949};
950
951int skl_platform_register(struct device *dev)
952{
953 int ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100954 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
955 struct skl *skl = ebus_to_skl(ebus);
956
957 INIT_LIST_HEAD(&skl->ppl_list);
Jeeja KPa40e6932015-07-09 15:20:08 +0530958
959 ret = snd_soc_register_platform(dev, &skl_platform_drv);
960 if (ret) {
961 dev_err(dev, "soc platform registration failed %d\n", ret);
962 return ret;
963 }
964 ret = snd_soc_register_component(dev, &skl_component,
965 skl_platform_dai,
966 ARRAY_SIZE(skl_platform_dai));
967 if (ret) {
968 dev_err(dev, "soc component registration failed %d\n", ret);
969 snd_soc_unregister_platform(dev);
970 }
971
972 return ret;
973
974}
975
976int skl_platform_unregister(struct device *dev)
977{
978 snd_soc_unregister_component(dev);
979 snd_soc_unregister_platform(dev);
980 return 0;
981}