Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 3 | * copy of this software and associated documentation files (the "Software"), |
| 4 | * to deal in the Software without restriction, including without limitation |
| 5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 6 | * and/or sell copies of the Software, and to permit persons to whom the |
| 7 | * Software is furnished to do so, subject to the following conditions: |
| 8 | * |
| 9 | * The above copyright notice and this permission notice shall be included in |
| 10 | * all copies or substantial portions of the Software. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 18 | * OTHER DEALINGS IN THE SOFTWARE. |
| 19 | * |
| 20 | * Authors: Rafał Miłecki <zajec5@gmail.com> |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 21 | * Alex Deucher <alexdeucher@gmail.com> |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 22 | */ |
| 23 | #include "drmP.h" |
| 24 | #include "radeon.h" |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 25 | #include "avivod.h" |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 26 | #ifdef CONFIG_ACPI |
| 27 | #include <linux/acpi.h> |
| 28 | #endif |
| 29 | #include <linux/power_supply.h> |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 30 | #include <linux/hwmon.h> |
| 31 | #include <linux/hwmon-sysfs.h> |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 32 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 33 | #define RADEON_IDLE_LOOP_MS 100 |
| 34 | #define RADEON_RECLOCK_DELAY_MS 200 |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 35 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 |
Alex Deucher | 2031f77 | 2010-04-22 12:52:11 -0400 | [diff] [blame] | 36 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 37 | |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 38 | static const char *radeon_pm_state_type_name[5] = { |
| 39 | "Default", |
| 40 | "Powersave", |
| 41 | "Battery", |
| 42 | "Balanced", |
| 43 | "Performance", |
| 44 | }; |
| 45 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 46 | static void radeon_dynpm_idle_work_handler(struct work_struct *work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 47 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 48 | static bool radeon_pm_in_vbl(struct radeon_device *rdev); |
| 49 | static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish); |
| 50 | static void radeon_pm_update_profile(struct radeon_device *rdev); |
| 51 | static void radeon_pm_set_clocks(struct radeon_device *rdev); |
| 52 | |
| 53 | #define ACPI_AC_CLASS "ac_adapter" |
| 54 | |
| 55 | #ifdef CONFIG_ACPI |
| 56 | static int radeon_acpi_event(struct notifier_block *nb, |
| 57 | unsigned long val, |
| 58 | void *data) |
| 59 | { |
| 60 | struct radeon_device *rdev = container_of(nb, struct radeon_device, acpi_nb); |
| 61 | struct acpi_bus_event *entry = (struct acpi_bus_event *)data; |
| 62 | |
| 63 | if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { |
| 64 | if (power_supply_is_system_supplied() > 0) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 65 | DRM_DEBUG_DRIVER("pm: AC\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 66 | else |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 67 | DRM_DEBUG_DRIVER("pm: DC\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 68 | |
| 69 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 70 | if (rdev->pm.profile == PM_PROFILE_AUTO) { |
| 71 | mutex_lock(&rdev->pm.mutex); |
| 72 | radeon_pm_update_profile(rdev); |
| 73 | radeon_pm_set_clocks(rdev); |
| 74 | mutex_unlock(&rdev->pm.mutex); |
| 75 | } |
| 76 | } |
| 77 | } |
| 78 | |
| 79 | return NOTIFY_OK; |
| 80 | } |
| 81 | #endif |
| 82 | |
| 83 | static void radeon_pm_update_profile(struct radeon_device *rdev) |
| 84 | { |
| 85 | switch (rdev->pm.profile) { |
| 86 | case PM_PROFILE_DEFAULT: |
| 87 | rdev->pm.profile_index = PM_PROFILE_DEFAULT_IDX; |
| 88 | break; |
| 89 | case PM_PROFILE_AUTO: |
| 90 | if (power_supply_is_system_supplied() > 0) { |
| 91 | if (rdev->pm.active_crtc_count > 1) |
| 92 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; |
| 93 | else |
| 94 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; |
| 95 | } else { |
| 96 | if (rdev->pm.active_crtc_count > 1) |
Alex Deucher | c9e75b2 | 2010-06-02 17:56:01 -0400 | [diff] [blame] | 97 | rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 98 | else |
Alex Deucher | c9e75b2 | 2010-06-02 17:56:01 -0400 | [diff] [blame] | 99 | rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 100 | } |
| 101 | break; |
| 102 | case PM_PROFILE_LOW: |
| 103 | if (rdev->pm.active_crtc_count > 1) |
| 104 | rdev->pm.profile_index = PM_PROFILE_LOW_MH_IDX; |
| 105 | else |
| 106 | rdev->pm.profile_index = PM_PROFILE_LOW_SH_IDX; |
| 107 | break; |
Alex Deucher | c9e75b2 | 2010-06-02 17:56:01 -0400 | [diff] [blame] | 108 | case PM_PROFILE_MID: |
| 109 | if (rdev->pm.active_crtc_count > 1) |
| 110 | rdev->pm.profile_index = PM_PROFILE_MID_MH_IDX; |
| 111 | else |
| 112 | rdev->pm.profile_index = PM_PROFILE_MID_SH_IDX; |
| 113 | break; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 114 | case PM_PROFILE_HIGH: |
| 115 | if (rdev->pm.active_crtc_count > 1) |
| 116 | rdev->pm.profile_index = PM_PROFILE_HIGH_MH_IDX; |
| 117 | else |
| 118 | rdev->pm.profile_index = PM_PROFILE_HIGH_SH_IDX; |
| 119 | break; |
| 120 | } |
| 121 | |
| 122 | if (rdev->pm.active_crtc_count == 0) { |
| 123 | rdev->pm.requested_power_state_index = |
| 124 | rdev->pm.profiles[rdev->pm.profile_index].dpms_off_ps_idx; |
| 125 | rdev->pm.requested_clock_mode_index = |
| 126 | rdev->pm.profiles[rdev->pm.profile_index].dpms_off_cm_idx; |
| 127 | } else { |
| 128 | rdev->pm.requested_power_state_index = |
| 129 | rdev->pm.profiles[rdev->pm.profile_index].dpms_on_ps_idx; |
| 130 | rdev->pm.requested_clock_mode_index = |
| 131 | rdev->pm.profiles[rdev->pm.profile_index].dpms_on_cm_idx; |
| 132 | } |
| 133 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 134 | |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 135 | static void radeon_unmap_vram_bos(struct radeon_device *rdev) |
| 136 | { |
| 137 | struct radeon_bo *bo, *n; |
| 138 | |
| 139 | if (list_empty(&rdev->gem.objects)) |
| 140 | return; |
| 141 | |
| 142 | list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) { |
| 143 | if (bo->tbo.mem.mem_type == TTM_PL_VRAM) |
| 144 | ttm_bo_unmap_virtual(&bo->tbo); |
| 145 | } |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 146 | } |
| 147 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 148 | static void radeon_sync_with_vblank(struct radeon_device *rdev) |
| 149 | { |
| 150 | if (rdev->pm.active_crtcs) { |
| 151 | rdev->pm.vblank_sync = false; |
| 152 | wait_event_timeout( |
| 153 | rdev->irq.vblank_queue, rdev->pm.vblank_sync, |
| 154 | msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT)); |
| 155 | } |
| 156 | } |
| 157 | |
| 158 | static void radeon_set_power_state(struct radeon_device *rdev) |
| 159 | { |
| 160 | u32 sclk, mclk; |
Alex Deucher | 9264587 | 2010-05-27 17:01:41 -0400 | [diff] [blame] | 161 | bool misc_after = false; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 162 | |
| 163 | if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && |
| 164 | (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) |
| 165 | return; |
| 166 | |
| 167 | if (radeon_gui_idle(rdev)) { |
| 168 | sclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
| 169 | clock_info[rdev->pm.requested_clock_mode_index].sclk; |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 170 | if (sclk > rdev->pm.default_sclk) |
| 171 | sclk = rdev->pm.default_sclk; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 172 | |
| 173 | mclk = rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
| 174 | clock_info[rdev->pm.requested_clock_mode_index].mclk; |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 175 | if (mclk > rdev->pm.default_mclk) |
| 176 | mclk = rdev->pm.default_mclk; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 177 | |
Alex Deucher | 9264587 | 2010-05-27 17:01:41 -0400 | [diff] [blame] | 178 | /* upvolt before raising clocks, downvolt after lowering clocks */ |
| 179 | if (sclk < rdev->pm.current_sclk) |
| 180 | misc_after = true; |
| 181 | |
| 182 | radeon_sync_with_vblank(rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 183 | |
| 184 | if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 185 | if (!radeon_pm_in_vbl(rdev)) |
| 186 | return; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 187 | } |
| 188 | |
Alex Deucher | 9264587 | 2010-05-27 17:01:41 -0400 | [diff] [blame] | 189 | radeon_pm_prepare(rdev); |
| 190 | |
| 191 | if (!misc_after) |
| 192 | /* voltage, pcie lanes, etc.*/ |
| 193 | radeon_pm_misc(rdev); |
| 194 | |
| 195 | /* set engine clock */ |
| 196 | if (sclk != rdev->pm.current_sclk) { |
| 197 | radeon_pm_debug_check_in_vbl(rdev, false); |
| 198 | radeon_set_engine_clock(rdev, sclk); |
| 199 | radeon_pm_debug_check_in_vbl(rdev, true); |
| 200 | rdev->pm.current_sclk = sclk; |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 201 | DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk); |
Alex Deucher | 9264587 | 2010-05-27 17:01:41 -0400 | [diff] [blame] | 202 | } |
| 203 | |
| 204 | /* set memory clock */ |
| 205 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { |
| 206 | radeon_pm_debug_check_in_vbl(rdev, false); |
| 207 | radeon_set_memory_clock(rdev, mclk); |
| 208 | radeon_pm_debug_check_in_vbl(rdev, true); |
| 209 | rdev->pm.current_mclk = mclk; |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 210 | DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk); |
Alex Deucher | 9264587 | 2010-05-27 17:01:41 -0400 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | if (misc_after) |
| 214 | /* voltage, pcie lanes, etc.*/ |
| 215 | radeon_pm_misc(rdev); |
| 216 | |
| 217 | radeon_pm_finish(rdev); |
| 218 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 219 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; |
| 220 | rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; |
| 221 | } else |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 222 | DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 223 | } |
| 224 | |
| 225 | static void radeon_pm_set_clocks(struct radeon_device *rdev) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 226 | { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 227 | int i; |
| 228 | |
Alex Deucher | 4e186b2 | 2010-08-13 10:53:35 -0400 | [diff] [blame] | 229 | /* no need to take locks, etc. if nothing's going to change */ |
| 230 | if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && |
| 231 | (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) |
| 232 | return; |
| 233 | |
Matthew Garrett | 612e06c | 2010-04-27 17:16:58 -0400 | [diff] [blame] | 234 | mutex_lock(&rdev->ddev->struct_mutex); |
| 235 | mutex_lock(&rdev->vram_mutex); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 236 | mutex_lock(&rdev->cp.mutex); |
Alex Deucher | 4f3218c | 2010-04-29 16:14:02 -0400 | [diff] [blame] | 237 | |
| 238 | /* gui idle int has issues on older chips it seems */ |
| 239 | if (rdev->family >= CHIP_R600) { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 240 | if (rdev->irq.installed) { |
| 241 | /* wait for GPU idle */ |
| 242 | rdev->pm.gui_idle = false; |
| 243 | rdev->irq.gui_idle = true; |
| 244 | radeon_irq_set(rdev); |
| 245 | wait_event_interruptible_timeout( |
| 246 | rdev->irq.idle_queue, rdev->pm.gui_idle, |
| 247 | msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT)); |
| 248 | rdev->irq.gui_idle = false; |
| 249 | radeon_irq_set(rdev); |
| 250 | } |
Matthew Garrett | 01434b4 | 2010-04-30 15:48:23 -0400 | [diff] [blame] | 251 | } else { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 252 | if (rdev->cp.ready) { |
| 253 | struct radeon_fence *fence; |
| 254 | radeon_ring_alloc(rdev, 64); |
| 255 | radeon_fence_create(rdev, &fence); |
| 256 | radeon_fence_emit(rdev, fence); |
| 257 | radeon_ring_commit(rdev); |
| 258 | radeon_fence_wait(fence, false); |
| 259 | radeon_fence_unref(&fence); |
| 260 | } |
Alex Deucher | 4f3218c | 2010-04-29 16:14:02 -0400 | [diff] [blame] | 261 | } |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 262 | radeon_unmap_vram_bos(rdev); |
| 263 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 264 | if (rdev->irq.installed) { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 265 | for (i = 0; i < rdev->num_crtc; i++) { |
| 266 | if (rdev->pm.active_crtcs & (1 << i)) { |
| 267 | rdev->pm.req_vblank |= (1 << i); |
| 268 | drm_vblank_get(rdev->ddev, i); |
| 269 | } |
| 270 | } |
| 271 | } |
Alex Deucher | 539d241 | 2010-04-29 00:22:43 -0400 | [diff] [blame] | 272 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 273 | radeon_set_power_state(rdev); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 274 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 275 | if (rdev->irq.installed) { |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 276 | for (i = 0; i < rdev->num_crtc; i++) { |
| 277 | if (rdev->pm.req_vblank & (1 << i)) { |
| 278 | rdev->pm.req_vblank &= ~(1 << i); |
| 279 | drm_vblank_put(rdev->ddev, i); |
| 280 | } |
| 281 | } |
| 282 | } |
Matthew Garrett | 5876dd2 | 2010-04-26 15:52:20 -0400 | [diff] [blame] | 283 | |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 284 | /* update display watermarks based on new power state */ |
| 285 | radeon_update_bandwidth_info(rdev); |
| 286 | if (rdev->pm.active_crtc_count) |
| 287 | radeon_bandwidth_update(rdev); |
| 288 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 289 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
Matthew Garrett | 2aba631 | 2010-04-26 15:45:23 -0400 | [diff] [blame] | 290 | |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 291 | mutex_unlock(&rdev->cp.mutex); |
Matthew Garrett | 612e06c | 2010-04-27 17:16:58 -0400 | [diff] [blame] | 292 | mutex_unlock(&rdev->vram_mutex); |
| 293 | mutex_unlock(&rdev->ddev->struct_mutex); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 294 | } |
| 295 | |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 296 | static void radeon_pm_print_states(struct radeon_device *rdev) |
| 297 | { |
| 298 | int i, j; |
| 299 | struct radeon_power_state *power_state; |
| 300 | struct radeon_pm_clock_info *clock_info; |
| 301 | |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 302 | DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 303 | for (i = 0; i < rdev->pm.num_power_states; i++) { |
| 304 | power_state = &rdev->pm.power_state[i]; |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 305 | DRM_DEBUG_DRIVER("State %d: %s\n", i, |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 306 | radeon_pm_state_type_name[power_state->type]); |
| 307 | if (i == rdev->pm.default_power_state_index) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 308 | DRM_DEBUG_DRIVER("\tDefault"); |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 309 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 310 | DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes); |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 311 | if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 312 | DRM_DEBUG_DRIVER("\tSingle display only\n"); |
| 313 | DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes); |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 314 | for (j = 0; j < power_state->num_clock_modes; j++) { |
| 315 | clock_info = &(power_state->clock_info[j]); |
| 316 | if (rdev->flags & RADEON_IS_IGP) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 317 | DRM_DEBUG_DRIVER("\t\t%d e: %d%s\n", |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 318 | j, |
| 319 | clock_info->sclk * 10, |
| 320 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); |
| 321 | else |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 322 | DRM_DEBUG_DRIVER("\t\t%d e: %d\tm: %d\tv: %d%s\n", |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 323 | j, |
| 324 | clock_info->sclk * 10, |
| 325 | clock_info->mclk * 10, |
| 326 | clock_info->voltage.voltage, |
| 327 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); |
| 328 | } |
| 329 | } |
| 330 | } |
| 331 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 332 | static ssize_t radeon_get_pm_profile(struct device *dev, |
| 333 | struct device_attribute *attr, |
| 334 | char *buf) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 335 | { |
| 336 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 337 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 338 | int cp = rdev->pm.profile; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 339 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 340 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 341 | (cp == PM_PROFILE_AUTO) ? "auto" : |
| 342 | (cp == PM_PROFILE_LOW) ? "low" : |
Daniel J Blueman | 12e27be | 2010-07-28 12:25:58 +0100 | [diff] [blame] | 343 | (cp == PM_PROFILE_MID) ? "mid" : |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 344 | (cp == PM_PROFILE_HIGH) ? "high" : "default"); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 345 | } |
| 346 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 347 | static ssize_t radeon_set_pm_profile(struct device *dev, |
| 348 | struct device_attribute *attr, |
| 349 | const char *buf, |
| 350 | size_t count) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 351 | { |
| 352 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 353 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 354 | |
| 355 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 356 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 357 | if (strncmp("default", buf, strlen("default")) == 0) |
| 358 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
| 359 | else if (strncmp("auto", buf, strlen("auto")) == 0) |
| 360 | rdev->pm.profile = PM_PROFILE_AUTO; |
| 361 | else if (strncmp("low", buf, strlen("low")) == 0) |
| 362 | rdev->pm.profile = PM_PROFILE_LOW; |
Alex Deucher | c9e75b2 | 2010-06-02 17:56:01 -0400 | [diff] [blame] | 363 | else if (strncmp("mid", buf, strlen("mid")) == 0) |
| 364 | rdev->pm.profile = PM_PROFILE_MID; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 365 | else if (strncmp("high", buf, strlen("high")) == 0) |
| 366 | rdev->pm.profile = PM_PROFILE_HIGH; |
| 367 | else { |
Thomas Renninger | 1783e4b | 2011-03-23 15:14:09 +0000 | [diff] [blame] | 368 | count = -EINVAL; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 369 | goto fail; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 370 | } |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 371 | radeon_pm_update_profile(rdev); |
| 372 | radeon_pm_set_clocks(rdev); |
Thomas Renninger | 1783e4b | 2011-03-23 15:14:09 +0000 | [diff] [blame] | 373 | } else |
| 374 | count = -EINVAL; |
| 375 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 376 | fail: |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 377 | mutex_unlock(&rdev->pm.mutex); |
| 378 | |
| 379 | return count; |
| 380 | } |
| 381 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 382 | static ssize_t radeon_get_pm_method(struct device *dev, |
| 383 | struct device_attribute *attr, |
| 384 | char *buf) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 385 | { |
| 386 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 387 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 388 | int pm = rdev->pm.pm_method; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 389 | |
| 390 | return snprintf(buf, PAGE_SIZE, "%s\n", |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 391 | (pm == PM_METHOD_DYNPM) ? "dynpm" : "profile"); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 392 | } |
| 393 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 394 | static ssize_t radeon_set_pm_method(struct device *dev, |
| 395 | struct device_attribute *attr, |
| 396 | const char *buf, |
| 397 | size_t count) |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 398 | { |
| 399 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 400 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 401 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 402 | |
| 403 | if (strncmp("dynpm", buf, strlen("dynpm")) == 0) { |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 404 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 405 | rdev->pm.pm_method = PM_METHOD_DYNPM; |
| 406 | rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; |
| 407 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 408 | mutex_unlock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 409 | } else if (strncmp("profile", buf, strlen("profile")) == 0) { |
| 410 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 411 | /* disable dynpm */ |
| 412 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 413 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 414 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 415 | mutex_unlock(&rdev->pm.mutex); |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 416 | cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 417 | } else { |
Thomas Renninger | 1783e4b | 2011-03-23 15:14:09 +0000 | [diff] [blame] | 418 | count = -EINVAL; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 419 | goto fail; |
| 420 | } |
| 421 | radeon_pm_compute_clocks(rdev); |
| 422 | fail: |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 423 | return count; |
| 424 | } |
| 425 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 426 | static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile); |
| 427 | static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method); |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 428 | |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 429 | static ssize_t radeon_hwmon_show_temp(struct device *dev, |
| 430 | struct device_attribute *attr, |
| 431 | char *buf) |
| 432 | { |
| 433 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
| 434 | struct radeon_device *rdev = ddev->dev_private; |
Alex Deucher | 20d391d | 2011-02-01 16:12:34 -0500 | [diff] [blame] | 435 | int temp; |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 436 | |
| 437 | switch (rdev->pm.int_thermal_type) { |
| 438 | case THERMAL_TYPE_RV6XX: |
| 439 | temp = rv6xx_get_temp(rdev); |
| 440 | break; |
| 441 | case THERMAL_TYPE_RV770: |
| 442 | temp = rv770_get_temp(rdev); |
| 443 | break; |
| 444 | case THERMAL_TYPE_EVERGREEN: |
Alex Deucher | 4fddba1 | 2011-01-06 21:19:22 -0500 | [diff] [blame] | 445 | case THERMAL_TYPE_NI: |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 446 | temp = evergreen_get_temp(rdev); |
| 447 | break; |
Alex Deucher | e33df25 | 2010-11-22 17:56:32 -0500 | [diff] [blame] | 448 | case THERMAL_TYPE_SUMO: |
| 449 | temp = sumo_get_temp(rdev); |
| 450 | break; |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 451 | default: |
| 452 | temp = 0; |
| 453 | break; |
| 454 | } |
| 455 | |
| 456 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); |
| 457 | } |
| 458 | |
| 459 | static ssize_t radeon_hwmon_show_name(struct device *dev, |
| 460 | struct device_attribute *attr, |
| 461 | char *buf) |
| 462 | { |
| 463 | return sprintf(buf, "radeon\n"); |
| 464 | } |
| 465 | |
| 466 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0); |
| 467 | static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0); |
| 468 | |
| 469 | static struct attribute *hwmon_attributes[] = { |
| 470 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
| 471 | &sensor_dev_attr_name.dev_attr.attr, |
| 472 | NULL |
| 473 | }; |
| 474 | |
| 475 | static const struct attribute_group hwmon_attrgroup = { |
| 476 | .attrs = hwmon_attributes, |
| 477 | }; |
| 478 | |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 479 | static int radeon_hwmon_init(struct radeon_device *rdev) |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 480 | { |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 481 | int err = 0; |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 482 | |
| 483 | rdev->pm.int_hwmon_dev = NULL; |
| 484 | |
| 485 | switch (rdev->pm.int_thermal_type) { |
| 486 | case THERMAL_TYPE_RV6XX: |
| 487 | case THERMAL_TYPE_RV770: |
| 488 | case THERMAL_TYPE_EVERGREEN: |
Alex Deucher | e33df25 | 2010-11-22 17:56:32 -0500 | [diff] [blame] | 489 | case THERMAL_TYPE_SUMO: |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 490 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 491 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { |
| 492 | err = PTR_ERR(rdev->pm.int_hwmon_dev); |
| 493 | dev_err(rdev->dev, |
| 494 | "Unable to register hwmon device: %d\n", err); |
| 495 | break; |
| 496 | } |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 497 | dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev); |
| 498 | err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj, |
| 499 | &hwmon_attrgroup); |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 500 | if (err) { |
| 501 | dev_err(rdev->dev, |
| 502 | "Unable to create hwmon sysfs file: %d\n", err); |
| 503 | hwmon_device_unregister(rdev->dev); |
| 504 | } |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 505 | break; |
| 506 | default: |
| 507 | break; |
| 508 | } |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 509 | |
| 510 | return err; |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 511 | } |
| 512 | |
| 513 | static void radeon_hwmon_fini(struct radeon_device *rdev) |
| 514 | { |
| 515 | if (rdev->pm.int_hwmon_dev) { |
| 516 | sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup); |
| 517 | hwmon_device_unregister(rdev->pm.int_hwmon_dev); |
| 518 | } |
| 519 | } |
| 520 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 521 | void radeon_pm_suspend(struct radeon_device *rdev) |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 522 | { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 523 | mutex_lock(&rdev->pm.mutex); |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 524 | if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 525 | if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) |
| 526 | rdev->pm.dynpm_state = DYNPM_STATE_SUSPENDED; |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 527 | } |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 528 | mutex_unlock(&rdev->pm.mutex); |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 529 | |
| 530 | cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 531 | } |
| 532 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 533 | void radeon_pm_resume(struct radeon_device *rdev) |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 534 | { |
Alex Deucher | ed18a36 | 2011-01-06 21:19:32 -0500 | [diff] [blame] | 535 | /* set up the default clocks if the MC ucode is loaded */ |
| 536 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { |
| 537 | if (rdev->pm.default_vddc) |
| 538 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc); |
| 539 | if (rdev->pm.default_sclk) |
| 540 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); |
| 541 | if (rdev->pm.default_mclk) |
| 542 | radeon_set_memory_clock(rdev, rdev->pm.default_mclk); |
| 543 | } |
Alex Deucher | f8ed8b4 | 2010-06-07 17:49:51 -0400 | [diff] [blame] | 544 | /* asic init will reset the default power state */ |
| 545 | mutex_lock(&rdev->pm.mutex); |
| 546 | rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; |
| 547 | rdev->pm.current_clock_mode_index = 0; |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 548 | rdev->pm.current_sclk = rdev->pm.default_sclk; |
| 549 | rdev->pm.current_mclk = rdev->pm.default_mclk; |
Alex Deucher | 4d60173 | 2010-06-07 18:15:18 -0400 | [diff] [blame] | 550 | rdev->pm.current_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 551 | if (rdev->pm.pm_method == PM_METHOD_DYNPM |
| 552 | && rdev->pm.dynpm_state == DYNPM_STATE_SUSPENDED) { |
| 553 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 554 | schedule_delayed_work(&rdev->pm.dynpm_idle_work, |
| 555 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 556 | } |
Alex Deucher | f8ed8b4 | 2010-06-07 17:49:51 -0400 | [diff] [blame] | 557 | mutex_unlock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 558 | radeon_pm_compute_clocks(rdev); |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 559 | } |
| 560 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 561 | int radeon_pm_init(struct radeon_device *rdev) |
| 562 | { |
Dave Airlie | 26481fb | 2010-05-18 19:00:14 +1000 | [diff] [blame] | 563 | int ret; |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 564 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 565 | /* default to profile method */ |
| 566 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
Alex Deucher | f8ed8b4 | 2010-06-07 17:49:51 -0400 | [diff] [blame] | 567 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 568 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 569 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 570 | rdev->pm.dynpm_can_upclock = true; |
| 571 | rdev->pm.dynpm_can_downclock = true; |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 572 | rdev->pm.default_sclk = rdev->clock.default_sclk; |
| 573 | rdev->pm.default_mclk = rdev->clock.default_mclk; |
Alex Deucher | f8ed8b4 | 2010-06-07 17:49:51 -0400 | [diff] [blame] | 574 | rdev->pm.current_sclk = rdev->clock.default_sclk; |
| 575 | rdev->pm.current_mclk = rdev->clock.default_mclk; |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 576 | rdev->pm.int_thermal_type = THERMAL_TYPE_NONE; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 577 | |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 578 | if (rdev->bios) { |
| 579 | if (rdev->is_atom_bios) |
| 580 | radeon_atombios_get_power_modes(rdev); |
| 581 | else |
| 582 | radeon_combios_get_power_modes(rdev); |
Rafał Miłecki | f712d0c | 2010-06-07 18:29:44 -0400 | [diff] [blame] | 583 | radeon_pm_print_states(rdev); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 584 | radeon_pm_init_profile(rdev); |
Alex Deucher | ed18a36 | 2011-01-06 21:19:32 -0500 | [diff] [blame] | 585 | /* set up the default clocks if the MC ucode is loaded */ |
| 586 | if (ASIC_IS_DCE5(rdev) && rdev->mc_fw) { |
| 587 | if (rdev->pm.default_vddc) |
| 588 | radeon_atom_set_voltage(rdev, rdev->pm.default_vddc); |
| 589 | if (rdev->pm.default_sclk) |
| 590 | radeon_set_engine_clock(rdev, rdev->pm.default_sclk); |
| 591 | if (rdev->pm.default_mclk) |
| 592 | radeon_set_memory_clock(rdev, rdev->pm.default_mclk); |
| 593 | } |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 594 | } |
| 595 | |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 596 | /* set up the internal thermal sensor if applicable */ |
Dan Carpenter | 0d18abe | 2010-08-09 21:59:42 +0200 | [diff] [blame] | 597 | ret = radeon_hwmon_init(rdev); |
| 598 | if (ret) |
| 599 | return ret; |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 600 | |
| 601 | INIT_DELAYED_WORK(&rdev->pm.dynpm_idle_work, radeon_dynpm_idle_work_handler); |
| 602 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 603 | if (rdev->pm.num_power_states > 1) { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 604 | /* where's the best place to put these? */ |
Dave Airlie | 26481fb | 2010-05-18 19:00:14 +1000 | [diff] [blame] | 605 | ret = device_create_file(rdev->dev, &dev_attr_power_profile); |
| 606 | if (ret) |
| 607 | DRM_ERROR("failed to create device file for power profile\n"); |
| 608 | ret = device_create_file(rdev->dev, &dev_attr_power_method); |
| 609 | if (ret) |
| 610 | DRM_ERROR("failed to create device file for power method\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 611 | |
| 612 | #ifdef CONFIG_ACPI |
| 613 | rdev->acpi_nb.notifier_call = radeon_acpi_event; |
| 614 | register_acpi_notifier(&rdev->acpi_nb); |
| 615 | #endif |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 616 | if (radeon_debugfs_pm_init(rdev)) { |
| 617 | DRM_ERROR("Failed to register debugfs file for PM!\n"); |
| 618 | } |
| 619 | |
| 620 | DRM_INFO("radeon: power management initialized\n"); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 621 | } |
| 622 | |
| 623 | return 0; |
| 624 | } |
| 625 | |
Alex Deucher | 29fb52c | 2010-03-11 10:01:17 -0500 | [diff] [blame] | 626 | void radeon_pm_fini(struct radeon_device *rdev) |
| 627 | { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 628 | if (rdev->pm.num_power_states > 1) { |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 629 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 630 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 631 | rdev->pm.profile = PM_PROFILE_DEFAULT; |
| 632 | radeon_pm_update_profile(rdev); |
| 633 | radeon_pm_set_clocks(rdev); |
| 634 | } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 635 | /* reset default clocks */ |
| 636 | rdev->pm.dynpm_state = DYNPM_STATE_DISABLED; |
| 637 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
| 638 | radeon_pm_set_clocks(rdev); |
| 639 | } |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 640 | mutex_unlock(&rdev->pm.mutex); |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 641 | |
| 642 | cancel_delayed_work_sync(&rdev->pm.dynpm_idle_work); |
Alex Deucher | 58e21df | 2010-03-22 13:31:08 -0400 | [diff] [blame] | 643 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 644 | device_remove_file(rdev->dev, &dev_attr_power_profile); |
| 645 | device_remove_file(rdev->dev, &dev_attr_power_method); |
| 646 | #ifdef CONFIG_ACPI |
| 647 | unregister_acpi_notifier(&rdev->acpi_nb); |
| 648 | #endif |
| 649 | } |
Alex Deucher | a424816 | 2010-04-24 14:50:23 -0400 | [diff] [blame] | 650 | |
Alex Deucher | 0975b16 | 2011-02-02 18:42:03 -0500 | [diff] [blame] | 651 | if (rdev->pm.power_state) |
| 652 | kfree(rdev->pm.power_state); |
| 653 | |
Alex Deucher | 21a8122 | 2010-07-02 12:58:16 -0400 | [diff] [blame] | 654 | radeon_hwmon_fini(rdev); |
Alex Deucher | 29fb52c | 2010-03-11 10:01:17 -0500 | [diff] [blame] | 655 | } |
| 656 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 657 | void radeon_pm_compute_clocks(struct radeon_device *rdev) |
| 658 | { |
| 659 | struct drm_device *ddev = rdev->ddev; |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 660 | struct drm_crtc *crtc; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 661 | struct radeon_crtc *radeon_crtc; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 662 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 663 | if (rdev->pm.num_power_states < 2) |
| 664 | return; |
| 665 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 666 | mutex_lock(&rdev->pm.mutex); |
| 667 | |
| 668 | rdev->pm.active_crtcs = 0; |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 669 | rdev->pm.active_crtc_count = 0; |
| 670 | list_for_each_entry(crtc, |
| 671 | &ddev->mode_config.crtc_list, head) { |
| 672 | radeon_crtc = to_radeon_crtc(crtc); |
| 673 | if (radeon_crtc->enabled) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 674 | rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); |
Alex Deucher | a48b9b4 | 2010-04-22 14:03:55 -0400 | [diff] [blame] | 675 | rdev->pm.active_crtc_count++; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 676 | } |
| 677 | } |
| 678 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 679 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 680 | radeon_pm_update_profile(rdev); |
| 681 | radeon_pm_set_clocks(rdev); |
| 682 | } else if (rdev->pm.pm_method == PM_METHOD_DYNPM) { |
| 683 | if (rdev->pm.dynpm_state != DYNPM_STATE_DISABLED) { |
| 684 | if (rdev->pm.active_crtc_count > 1) { |
| 685 | if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { |
| 686 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
Alex Deucher | d731117 | 2010-05-03 01:13:14 -0400 | [diff] [blame] | 687 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 688 | rdev->pm.dynpm_state = DYNPM_STATE_PAUSED; |
| 689 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_DEFAULT; |
| 690 | radeon_pm_get_dynpm_state(rdev); |
| 691 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 692 | |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 693 | DRM_DEBUG_DRIVER("radeon: dynamic power management deactivated\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 694 | } |
| 695 | } else if (rdev->pm.active_crtc_count == 1) { |
| 696 | /* TODO: Increase clocks if needed for current mode */ |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 697 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 698 | if (rdev->pm.dynpm_state == DYNPM_STATE_MINIMUM) { |
| 699 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
| 700 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_UPCLOCK; |
| 701 | radeon_pm_get_dynpm_state(rdev); |
| 702 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 703 | |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 704 | schedule_delayed_work(&rdev->pm.dynpm_idle_work, |
| 705 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 706 | } else if (rdev->pm.dynpm_state == DYNPM_STATE_PAUSED) { |
| 707 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 708 | schedule_delayed_work(&rdev->pm.dynpm_idle_work, |
| 709 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 710 | DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n"); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 711 | } |
| 712 | } else { /* count == 0 */ |
| 713 | if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { |
| 714 | cancel_delayed_work(&rdev->pm.dynpm_idle_work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 715 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 716 | rdev->pm.dynpm_state = DYNPM_STATE_MINIMUM; |
| 717 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_MINIMUM; |
| 718 | radeon_pm_get_dynpm_state(rdev); |
| 719 | radeon_pm_set_clocks(rdev); |
| 720 | } |
| 721 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 722 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 723 | } |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 724 | |
| 725 | mutex_unlock(&rdev->pm.mutex); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 726 | } |
| 727 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 728 | static bool radeon_pm_in_vbl(struct radeon_device *rdev) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 729 | { |
Mario Kleiner | 75fa0b0 | 2010-10-05 19:57:37 -0400 | [diff] [blame] | 730 | int crtc, vpos, hpos, vbl_status; |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 731 | bool in_vbl = true; |
| 732 | |
Mario Kleiner | 75fa0b0 | 2010-10-05 19:57:37 -0400 | [diff] [blame] | 733 | /* Iterate over all active crtc's. All crtc's must be in vblank, |
| 734 | * otherwise return in_vbl == false. |
| 735 | */ |
| 736 | for (crtc = 0; (crtc < rdev->num_crtc) && in_vbl; crtc++) { |
| 737 | if (rdev->pm.active_crtcs & (1 << crtc)) { |
Mario Kleiner | f5a8020 | 2010-10-23 04:42:17 +0200 | [diff] [blame] | 738 | vbl_status = radeon_get_crtc_scanoutpos(rdev->ddev, crtc, &vpos, &hpos); |
| 739 | if ((vbl_status & DRM_SCANOUTPOS_VALID) && |
| 740 | !(vbl_status & DRM_SCANOUTPOS_INVBL)) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 741 | in_vbl = false; |
| 742 | } |
| 743 | } |
Matthew Garrett | f81f202 | 2010-04-28 12:13:06 -0400 | [diff] [blame] | 744 | |
| 745 | return in_vbl; |
| 746 | } |
| 747 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 748 | static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) |
Matthew Garrett | f81f202 | 2010-04-28 12:13:06 -0400 | [diff] [blame] | 749 | { |
| 750 | u32 stat_crtc = 0; |
| 751 | bool in_vbl = radeon_pm_in_vbl(rdev); |
| 752 | |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 753 | if (in_vbl == false) |
Dave Airlie | d9fdaaf | 2010-08-02 10:42:55 +1000 | [diff] [blame] | 754 | DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc, |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame] | 755 | finish ? "exit" : "entry"); |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 756 | return in_vbl; |
| 757 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 758 | |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 759 | static void radeon_dynpm_idle_work_handler(struct work_struct *work) |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 760 | { |
| 761 | struct radeon_device *rdev; |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 762 | int resched; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 763 | rdev = container_of(work, struct radeon_device, |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 764 | pm.dynpm_idle_work.work); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 765 | |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 766 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 767 | mutex_lock(&rdev->pm.mutex); |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 768 | if (rdev->pm.dynpm_state == DYNPM_STATE_ACTIVE) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 769 | unsigned long irq_flags; |
| 770 | int not_processed = 0; |
| 771 | |
| 772 | read_lock_irqsave(&rdev->fence_drv.lock, irq_flags); |
| 773 | if (!list_empty(&rdev->fence_drv.emited)) { |
| 774 | struct list_head *ptr; |
| 775 | list_for_each(ptr, &rdev->fence_drv.emited) { |
| 776 | /* count up to 3, that's enought info */ |
| 777 | if (++not_processed >= 3) |
| 778 | break; |
| 779 | } |
| 780 | } |
| 781 | read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); |
| 782 | |
| 783 | if (not_processed >= 3) { /* should upclock */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 784 | if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_DOWNCLOCK) { |
| 785 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 786 | } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && |
| 787 | rdev->pm.dynpm_can_upclock) { |
| 788 | rdev->pm.dynpm_planned_action = |
| 789 | DYNPM_ACTION_UPCLOCK; |
| 790 | rdev->pm.dynpm_action_timeout = jiffies + |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 791 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 792 | } |
| 793 | } else if (not_processed == 0) { /* should downclock */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 794 | if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_UPCLOCK) { |
| 795 | rdev->pm.dynpm_planned_action = DYNPM_ACTION_NONE; |
| 796 | } else if (rdev->pm.dynpm_planned_action == DYNPM_ACTION_NONE && |
| 797 | rdev->pm.dynpm_can_downclock) { |
| 798 | rdev->pm.dynpm_planned_action = |
| 799 | DYNPM_ACTION_DOWNCLOCK; |
| 800 | rdev->pm.dynpm_action_timeout = jiffies + |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 801 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 802 | } |
| 803 | } |
| 804 | |
Alex Deucher | d731117 | 2010-05-03 01:13:14 -0400 | [diff] [blame] | 805 | /* Note, radeon_pm_set_clocks is called with static_switch set |
| 806 | * to false since we want to wait for vbl to avoid flicker. |
| 807 | */ |
Alex Deucher | ce8f537 | 2010-05-07 15:10:16 -0400 | [diff] [blame] | 808 | if (rdev->pm.dynpm_planned_action != DYNPM_ACTION_NONE && |
| 809 | jiffies > rdev->pm.dynpm_action_timeout) { |
| 810 | radeon_pm_get_dynpm_state(rdev); |
| 811 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 812 | } |
Rafael J. Wysocki | 3f53eb6 | 2010-06-17 23:02:27 +0000 | [diff] [blame] | 813 | |
Tejun Heo | 32c87fc | 2011-01-03 14:49:32 +0100 | [diff] [blame] | 814 | schedule_delayed_work(&rdev->pm.dynpm_idle_work, |
| 815 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 816 | } |
| 817 | mutex_unlock(&rdev->pm.mutex); |
Matthew Garrett | d9932a3 | 2010-04-26 16:02:26 -0400 | [diff] [blame] | 818 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 819 | } |
| 820 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 821 | /* |
| 822 | * Debugfs info |
| 823 | */ |
| 824 | #if defined(CONFIG_DEBUG_FS) |
| 825 | |
| 826 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) |
| 827 | { |
| 828 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 829 | struct drm_device *dev = node->minor->dev; |
| 830 | struct radeon_device *rdev = dev->dev_private; |
| 831 | |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 832 | seq_printf(m, "default engine clock: %u0 kHz\n", rdev->pm.default_sclk); |
Rafał Miłecki | 6234077 | 2009-12-15 21:46:58 +0100 | [diff] [blame] | 833 | seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
Alex Deucher | 9ace9f7 | 2011-01-06 21:19:26 -0500 | [diff] [blame] | 834 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->pm.default_mclk); |
Rafał Miłecki | 6234077 | 2009-12-15 21:46:58 +0100 | [diff] [blame] | 835 | if (rdev->asic->get_memory_clock) |
| 836 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
Rafał Miłecki | 0fcbe94 | 2010-06-07 18:25:21 -0400 | [diff] [blame] | 837 | if (rdev->pm.current_vddc) |
| 838 | seq_printf(m, "voltage: %u mV\n", rdev->pm.current_vddc); |
Rafał Miłecki | aa5120d | 2010-02-18 20:24:28 +0000 | [diff] [blame] | 839 | if (rdev->asic->get_pcie_lanes) |
| 840 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 841 | |
| 842 | return 0; |
| 843 | } |
| 844 | |
| 845 | static struct drm_info_list radeon_pm_info_list[] = { |
| 846 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, |
| 847 | }; |
| 848 | #endif |
| 849 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 850 | static int radeon_debugfs_pm_init(struct radeon_device *rdev) |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 851 | { |
| 852 | #if defined(CONFIG_DEBUG_FS) |
| 853 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); |
| 854 | #else |
| 855 | return 0; |
| 856 | #endif |
| 857 | } |