blob: d2673060bc8dd7381df444a265878c421d1e57d3 [file] [log] [blame]
Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_pdc202xx_old.c - Promise PDC202xx PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +01005 * (C) 2007 Bartlomiej Zolnierkiewicz
Jeff Garzik669a5db2006-08-29 18:12:40 -04006 *
7 * Based in part on linux/drivers/ide/pci/pdc202xx_old.c
8 *
9 * First cut with LBA48/ATAPI
10 *
11 * TODO:
Alan Cox06b74dd2007-09-26 15:23:17 +010012 * Channel interlock/reset on both required ?
Jeff Garzik669a5db2006-08-29 18:12:40 -040013 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040014
Jeff Garzik669a5db2006-08-29 18:12:40 -040015#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/init.h>
19#include <linux/blkdev.h>
20#include <linux/delay.h>
21#include <scsi/scsi_host.h>
22#include <linux/libata.h>
23
24#define DRV_NAME "pata_pdc202xx_old"
Alan Cox06b74dd2007-09-26 15:23:17 +010025#define DRV_VERSION "0.4.3"
Jeff Garzik669a5db2006-08-29 18:12:40 -040026
Jeff Garzika0fcdc02007-03-09 07:24:15 -050027static int pdc2026x_cable_detect(struct ata_port *ap)
Jeff Garzik669a5db2006-08-29 18:12:40 -040028{
29 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
30 u16 cis;
Jeff Garzik85cd7252006-08-31 00:03:49 -040031
Jeff Garzik669a5db2006-08-29 18:12:40 -040032 pci_read_config_word(pdev, 0x50, &cis);
33 if (cis & (1 << (10 + ap->port_no)))
Alan Coxa0ac38f2007-07-03 15:15:13 +010034 return ATA_CBL_PATA40;
35 return ATA_CBL_PATA80;
Jeff Garzik669a5db2006-08-29 18:12:40 -040036}
37
38/**
Alan Coxada406c2006-11-03 13:18:06 +000039 * pdc202xx_configure_piomode - set chip PIO timing
Jeff Garzik669a5db2006-08-29 18:12:40 -040040 * @ap: ATA interface
41 * @adev: ATA device
42 * @pio: PIO mode
43 *
44 * Called to do the PIO mode setup. Our timing registers are shared
45 * so a configure_dmamode call will undo any work we do here and vice
46 * versa
47 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040048
Alan Coxada406c2006-11-03 13:18:06 +000049static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
Jeff Garzik669a5db2006-08-29 18:12:40 -040050{
51 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +010052 int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
Jeff Garzik669a5db2006-08-29 18:12:40 -040053 static u16 pio_timing[5] = {
54 0x0913, 0x050C , 0x0308, 0x0206, 0x0104
55 };
56 u8 r_ap, r_bp;
57
58 pci_read_config_byte(pdev, port, &r_ap);
59 pci_read_config_byte(pdev, port + 1, &r_bp);
60 r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +010061 r_bp &= ~0x1F;
Jeff Garzik669a5db2006-08-29 18:12:40 -040062 r_ap |= (pio_timing[pio] >> 8);
63 r_bp |= (pio_timing[pio] & 0xFF);
Jeff Garzik85cd7252006-08-31 00:03:49 -040064
Jeff Garzik669a5db2006-08-29 18:12:40 -040065 if (ata_pio_need_iordy(adev))
66 r_ap |= 0x20; /* IORDY enable */
67 if (adev->class == ATA_DEV_ATA)
68 r_ap |= 0x10; /* FIFO enable */
69 pci_write_config_byte(pdev, port, r_ap);
70 pci_write_config_byte(pdev, port + 1, r_bp);
71}
72
73/**
Alan Coxada406c2006-11-03 13:18:06 +000074 * pdc202xx_set_piomode - set initial PIO mode data
Jeff Garzik669a5db2006-08-29 18:12:40 -040075 * @ap: ATA interface
76 * @adev: ATA device
77 *
78 * Called to do the PIO mode setup. Our timing registers are shared
79 * but we want to set the PIO timing by default.
80 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040081
Alan Coxada406c2006-11-03 13:18:06 +000082static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -040083{
Alan Coxada406c2006-11-03 13:18:06 +000084 pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
Jeff Garzik669a5db2006-08-29 18:12:40 -040085}
86
87/**
Alan Coxada406c2006-11-03 13:18:06 +000088 * pdc202xx_configure_dmamode - set DMA mode in chip
Jeff Garzik669a5db2006-08-29 18:12:40 -040089 * @ap: ATA interface
90 * @adev: ATA device
91 *
92 * Load DMA cycle times into the chip ready for a DMA transfer
93 * to occur.
94 */
Jeff Garzik85cd7252006-08-31 00:03:49 -040095
Alan Coxada406c2006-11-03 13:18:06 +000096static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -040097{
98 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +010099 int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400100 static u8 udma_timing[6][2] = {
101 { 0x60, 0x03 }, /* 33 Mhz Clock */
102 { 0x40, 0x02 },
103 { 0x20, 0x01 },
104 { 0x40, 0x02 }, /* 66 Mhz Clock */
105 { 0x20, 0x01 },
Jeff Garzik85cd7252006-08-31 00:03:49 -0400106 { 0x20, 0x01 }
Jeff Garzik669a5db2006-08-29 18:12:40 -0400107 };
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100108 static u8 mdma_timing[3][2] = {
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100109 { 0xe0, 0x0f },
Alan Cox06b74dd2007-09-26 15:23:17 +0100110 { 0x60, 0x04 },
111 { 0x60, 0x03 },
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100112 };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400113 u8 r_bp, r_cp;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400114
Jeff Garzik669a5db2006-08-29 18:12:40 -0400115 pci_read_config_byte(pdev, port + 1, &r_bp);
116 pci_read_config_byte(pdev, port + 2, &r_cp);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400117
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100118 r_bp &= ~0xE0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400119 r_cp &= ~0x0F;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400120
Jeff Garzik669a5db2006-08-29 18:12:40 -0400121 if (adev->dma_mode >= XFER_UDMA_0) {
122 int speed = adev->dma_mode - XFER_UDMA_0;
123 r_bp |= udma_timing[speed][0];
124 r_cp |= udma_timing[speed][1];
Jeff Garzik85cd7252006-08-31 00:03:49 -0400125
Jeff Garzik669a5db2006-08-29 18:12:40 -0400126 } else {
127 int speed = adev->dma_mode - XFER_MW_DMA_0;
Bartlomiej Zolnierkiewicz63ed7102007-03-04 04:48:08 +0100128 r_bp |= mdma_timing[speed][0];
129 r_cp |= mdma_timing[speed][1];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400130 }
131 pci_write_config_byte(pdev, port + 1, r_bp);
132 pci_write_config_byte(pdev, port + 2, r_cp);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400133
Jeff Garzik669a5db2006-08-29 18:12:40 -0400134}
135
136/**
137 * pdc2026x_bmdma_start - DMA engine begin
138 * @qc: ATA command
139 *
140 * In UDMA3 or higher we have to clock switch for the duration of the
141 * DMA transfer sequence.
Alan Cox06b74dd2007-09-26 15:23:17 +0100142 *
143 * Note: The host lock held by the libata layer protects
144 * us from two channels both trying to set DMA bits at once
Jeff Garzik669a5db2006-08-29 18:12:40 -0400145 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400146
Jeff Garzik669a5db2006-08-29 18:12:40 -0400147static void pdc2026x_bmdma_start(struct ata_queued_cmd *qc)
148{
149 struct ata_port *ap = qc->ap;
150 struct ata_device *adev = qc->dev;
151 struct ata_taskfile *tf = &qc->tf;
152 int sel66 = ap->port_no ? 0x08: 0x02;
153
Tejun Heo0d5ff562007-02-01 15:06:36 +0900154 void __iomem *master = ap->host->ports[0]->ioaddr.bmdma_addr;
155 void __iomem *clock = master + 0x11;
156 void __iomem *atapi_reg = master + 0x20 + (4 * ap->port_no);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400157
Jeff Garzik669a5db2006-08-29 18:12:40 -0400158 u32 len;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400159
Jeff Garzik669a5db2006-08-29 18:12:40 -0400160 /* Check we keep host level locking here */
161 if (adev->dma_mode >= XFER_UDMA_2)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900162 iowrite8(ioread8(clock) | sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400163 else
Tejun Heo0d5ff562007-02-01 15:06:36 +0900164 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400165
Jeff Garzik85cd7252006-08-31 00:03:49 -0400166 /* The DMA clocks may have been trashed by a reset. FIXME: make conditional
Jeff Garzik669a5db2006-08-29 18:12:40 -0400167 and move to qc_issue ? */
Alan Coxada406c2006-11-03 13:18:06 +0000168 pdc202xx_set_dmamode(ap, qc->dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400169
170 /* Cases the state machine will not complete correctly without help */
Tejun Heo0dc36882007-12-18 16:34:43 -0500171 if ((tf->flags & ATA_TFLAG_LBA48) || tf->protocol == ATAPI_PROT_DMA) {
Alan Cox5e518812007-03-23 18:57:23 +0000172 len = qc->nbytes / 2;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400173
Jeff Garzik669a5db2006-08-29 18:12:40 -0400174 if (tf->flags & ATA_TFLAG_WRITE)
175 len |= 0x06000000;
176 else
177 len |= 0x05000000;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400178
Tejun Heo0d5ff562007-02-01 15:06:36 +0900179 iowrite32(len, atapi_reg);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400180 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400181
182 /* Activate DMA */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400183 ata_bmdma_start(qc);
184}
185
186/**
187 * pdc2026x_bmdma_end - DMA engine stop
188 * @qc: ATA command
189 *
190 * After a DMA completes we need to put the clock back to 33MHz for
191 * PIO timings.
Alan Cox06b74dd2007-09-26 15:23:17 +0100192 *
193 * Note: The host lock held by the libata layer protects
194 * us from two channels both trying to set DMA bits at once
Jeff Garzik669a5db2006-08-29 18:12:40 -0400195 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400196
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197static void pdc2026x_bmdma_stop(struct ata_queued_cmd *qc)
198{
199 struct ata_port *ap = qc->ap;
200 struct ata_device *adev = qc->dev;
201 struct ata_taskfile *tf = &qc->tf;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400202
Jeff Garzik669a5db2006-08-29 18:12:40 -0400203 int sel66 = ap->port_no ? 0x08: 0x02;
204 /* The clock bits are in the same register for both channels */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900205 void __iomem *master = ap->host->ports[0]->ioaddr.bmdma_addr;
206 void __iomem *clock = master + 0x11;
207 void __iomem *atapi_reg = master + 0x20 + (4 * ap->port_no);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400208
Jeff Garzik669a5db2006-08-29 18:12:40 -0400209 /* Cases the state machine will not complete correctly */
Tejun Heo0dc36882007-12-18 16:34:43 -0500210 if (tf->protocol == ATAPI_PROT_DMA || (tf->flags & ATA_TFLAG_LBA48)) {
Tejun Heo0d5ff562007-02-01 15:06:36 +0900211 iowrite32(0, atapi_reg);
212 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400213 }
Jeff Garzik669a5db2006-08-29 18:12:40 -0400214 /* Flip back to 33Mhz for PIO */
215 if (adev->dma_mode >= XFER_UDMA_2)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900216 iowrite8(ioread8(clock) & ~sel66, clock);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400217 ata_bmdma_stop(qc);
Alan Cox36906d92008-01-04 00:08:49 +0000218 pdc202xx_set_piomode(ap, adev);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400219}
220
221/**
222 * pdc2026x_dev_config - device setup hook
Jeff Garzik669a5db2006-08-29 18:12:40 -0400223 * @adev: newly found device
224 *
225 * Perform chip specific early setup. We need to lock the transfer
226 * sizes to 8bit to avoid making the state engine on the 2026x cards
227 * barf.
228 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400229
Alancd0d3bb2007-03-02 00:56:15 +0000230static void pdc2026x_dev_config(struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400231{
232 adev->max_sectors = 256;
233}
234
Alan Cox36906d92008-01-04 00:08:49 +0000235static int pdc2026x_port_start(struct ata_port *ap)
236{
237 void __iomem *bmdma = ap->ioaddr.bmdma_addr;
238 if (bmdma) {
239 /* Enable burst mode */
240 u8 burst = ioread8(bmdma + 0x1f);
241 iowrite8(burst | 0x01, bmdma + 0x1f);
242 }
243 return ata_sff_port_start(ap);
244}
245
Alan Coxaa8f2372008-01-19 15:51:26 +0000246/**
247 * pdc2026x_check_atapi_dma - Check whether ATAPI DMA can be supported for this command
248 * @qc: Metadata associated with taskfile to check
249 *
250 * Just say no - not supported on older Promise.
251 *
252 * LOCKING:
253 * None (inherited from caller).
254 *
255 * RETURNS: 0 when ATAPI DMA can be used
256 * 1 otherwise
257 */
258
259static int pdc2026x_check_atapi_dma(struct ata_queued_cmd *qc)
260{
261 return 1;
262}
263
Alan Coxada406c2006-11-03 13:18:06 +0000264static struct scsi_host_template pdc202xx_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900265 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400266};
267
268static struct ata_port_operations pdc2024x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900269 .inherits = &ata_bmdma_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400270
Tejun Heo029cfd62008-03-25 12:22:49 +0900271 .cable_detect = ata_cable_40wire,
272 .set_piomode = pdc202xx_set_piomode,
273 .set_dmamode = pdc202xx_set_dmamode,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400274};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400275
276static struct ata_port_operations pdc2026x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900277 .inherits = &pdc2024x_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400278
Tejun Heo029cfd62008-03-25 12:22:49 +0900279 .check_atapi_dma = pdc2026x_check_atapi_dma,
280 .bmdma_start = pdc2026x_bmdma_start,
281 .bmdma_stop = pdc2026x_bmdma_stop,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400282
Tejun Heo029cfd62008-03-25 12:22:49 +0900283 .cable_detect = pdc2026x_cable_detect,
284 .dev_config = pdc2026x_dev_config,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400285
Tejun Heo029cfd62008-03-25 12:22:49 +0900286 .port_start = pdc2026x_port_start,
Jeff Garzik85cd7252006-08-31 00:03:49 -0400287};
Jeff Garzik669a5db2006-08-29 18:12:40 -0400288
Alan Coxada406c2006-11-03 13:18:06 +0000289static int pdc202xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400290{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200291 static const struct ata_port_info info[3] = {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400292 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400293 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400294 .pio_mask = 0x1f,
295 .mwdma_mask = 0x07,
296 .udma_mask = ATA_UDMA2,
297 .port_ops = &pdc2024x_port_ops
Jeff Garzik85cd7252006-08-31 00:03:49 -0400298 },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400299 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400300 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400301 .pio_mask = 0x1f,
302 .mwdma_mask = 0x07,
303 .udma_mask = ATA_UDMA4,
304 .port_ops = &pdc2026x_port_ops
305 },
306 {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400307 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400308 .pio_mask = 0x1f,
309 .mwdma_mask = 0x07,
310 .udma_mask = ATA_UDMA5,
311 .port_ops = &pdc2026x_port_ops
312 }
Jeff Garzik85cd7252006-08-31 00:03:49 -0400313
Jeff Garzik669a5db2006-08-29 18:12:40 -0400314 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200315 const struct ata_port_info *ppi[] = { &info[id->driver_data], NULL };
Jeff Garzik85cd7252006-08-31 00:03:49 -0400316
Jeff Garzik669a5db2006-08-29 18:12:40 -0400317 if (dev->device == PCI_DEVICE_ID_PROMISE_20265) {
318 struct pci_dev *bridge = dev->bus->self;
319 /* Don't grab anything behind a Promise I2O RAID */
320 if (bridge && bridge->vendor == PCI_VENDOR_ID_INTEL) {
Jeff Garzikb4479162007-10-25 20:47:30 -0400321 if (bridge->device == PCI_DEVICE_ID_INTEL_I960)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400322 return -ENODEV;
Jeff Garzikb4479162007-10-25 20:47:30 -0400323 if (bridge->device == PCI_DEVICE_ID_INTEL_I960RM)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400324 return -ENODEV;
325 }
326 }
Tejun Heo9363c382008-04-07 22:47:16 +0900327 return ata_pci_sff_init_one(dev, ppi, &pdc202xx_sht, NULL);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400328}
329
Alan Coxada406c2006-11-03 13:18:06 +0000330static const struct pci_device_id pdc202xx[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400331 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20246), 0 },
332 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20262), 1 },
333 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20263), 1 },
334 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20265), 2 },
335 { PCI_VDEVICE(PROMISE, PCI_DEVICE_ID_PROMISE_20267), 2 },
336
337 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400338};
339
Alan Coxada406c2006-11-03 13:18:06 +0000340static struct pci_driver pdc202xx_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400341 .name = DRV_NAME,
Alan Coxada406c2006-11-03 13:18:06 +0000342 .id_table = pdc202xx,
343 .probe = pdc202xx_init_one,
Alan62d64ae2006-11-27 16:27:20 +0000344 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900345#ifdef CONFIG_PM
Alan62d64ae2006-11-27 16:27:20 +0000346 .suspend = ata_pci_device_suspend,
347 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900348#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400349};
350
Alan Coxada406c2006-11-03 13:18:06 +0000351static int __init pdc202xx_init(void)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400352{
Alan Coxada406c2006-11-03 13:18:06 +0000353 return pci_register_driver(&pdc202xx_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400354}
355
Alan Coxada406c2006-11-03 13:18:06 +0000356static void __exit pdc202xx_exit(void)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400357{
Alan Coxada406c2006-11-03 13:18:06 +0000358 pci_unregister_driver(&pdc202xx_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400359}
360
Jeff Garzik669a5db2006-08-29 18:12:40 -0400361MODULE_AUTHOR("Alan Cox");
362MODULE_DESCRIPTION("low-level driver for Promise 2024x and 20262-20267");
363MODULE_LICENSE("GPL");
Alan Coxada406c2006-11-03 13:18:06 +0000364MODULE_DEVICE_TABLE(pci, pdc202xx);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400365MODULE_VERSION(DRV_VERSION);
366
Alan Coxada406c2006-11-03 13:18:06 +0000367module_init(pdc202xx_init);
368module_exit(pdc202xx_exit);