blob: fe66a2c43fd987265449ce4b67bbdf016a1c0d40 [file] [log] [blame]
Graeme Gregory518fb722011-05-02 16:20:08 -05001/*
2 * tps65910.c -- TI tps65910
3 *
4 * Copyright 2010 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/delay.h>
24#include <linux/slab.h>
25#include <linux/gpio.h>
26#include <linux/mfd/tps65910.h>
27
Graeme Gregory518fb722011-05-02 16:20:08 -050028#define TPS65910_SUPPLY_STATE_ENABLED 0x1
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +053029#define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \
30 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \
Laxman Dewanganf30b0712012-03-07 18:21:49 +053031 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \
32 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
Graeme Gregory518fb722011-05-02 16:20:08 -050033
34/* supported VIO voltages in milivolts */
35static const u16 VIO_VSEL_table[] = {
36 1500, 1800, 2500, 3300,
37};
38
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -050039/* VSEL tables for TPS65910 specific LDOs and dcdc's */
40
41/* supported VDD3 voltages in milivolts */
Graeme Gregory518fb722011-05-02 16:20:08 -050042static const u16 VDD3_VSEL_table[] = {
43 5000,
44};
45
46/* supported VDIG1 voltages in milivolts */
47static const u16 VDIG1_VSEL_table[] = {
48 1200, 1500, 1800, 2700,
49};
50
51/* supported VDIG2 voltages in milivolts */
52static const u16 VDIG2_VSEL_table[] = {
53 1000, 1100, 1200, 1800,
54};
55
56/* supported VPLL voltages in milivolts */
57static const u16 VPLL_VSEL_table[] = {
58 1000, 1100, 1800, 2500,
59};
60
61/* supported VDAC voltages in milivolts */
62static const u16 VDAC_VSEL_table[] = {
63 1800, 2600, 2800, 2850,
64};
65
66/* supported VAUX1 voltages in milivolts */
67static const u16 VAUX1_VSEL_table[] = {
68 1800, 2500, 2800, 2850,
69};
70
71/* supported VAUX2 voltages in milivolts */
72static const u16 VAUX2_VSEL_table[] = {
73 1800, 2800, 2900, 3300,
74};
75
76/* supported VAUX33 voltages in milivolts */
77static const u16 VAUX33_VSEL_table[] = {
78 1800, 2000, 2800, 3300,
79};
80
81/* supported VMMC voltages in milivolts */
82static const u16 VMMC_VSEL_table[] = {
83 1800, 2800, 3000, 3300,
84};
85
86struct tps_info {
87 const char *name;
88 unsigned min_uV;
89 unsigned max_uV;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +053090 u8 n_voltages;
91 const u16 *voltage_table;
Laxman Dewangan0651eed2012-03-13 11:35:20 +053092 int enable_time_us;
Graeme Gregory518fb722011-05-02 16:20:08 -050093};
94
95static struct tps_info tps65910_regs[] = {
96 {
97 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +053098 .enable_time_us = 2200,
Graeme Gregory518fb722011-05-02 16:20:08 -050099 },
100 {
101 .name = "VIO",
102 .min_uV = 1500000,
103 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530104 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
105 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530106 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500107 },
108 {
109 .name = "VDD1",
110 .min_uV = 600000,
111 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530112 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500113 },
114 {
115 .name = "VDD2",
116 .min_uV = 600000,
117 .max_uV = 4500000,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530118 .enable_time_us = 350,
Graeme Gregory518fb722011-05-02 16:20:08 -0500119 },
120 {
121 .name = "VDD3",
122 .min_uV = 5000000,
123 .max_uV = 5000000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530124 .n_voltages = ARRAY_SIZE(VDD3_VSEL_table),
125 .voltage_table = VDD3_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530126 .enable_time_us = 200,
Graeme Gregory518fb722011-05-02 16:20:08 -0500127 },
128 {
129 .name = "VDIG1",
130 .min_uV = 1200000,
131 .max_uV = 2700000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530132 .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table),
133 .voltage_table = VDIG1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530134 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500135 },
136 {
137 .name = "VDIG2",
138 .min_uV = 1000000,
139 .max_uV = 1800000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530140 .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table),
141 .voltage_table = VDIG2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530142 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500143 },
144 {
145 .name = "VPLL",
146 .min_uV = 1000000,
147 .max_uV = 2500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530148 .n_voltages = ARRAY_SIZE(VPLL_VSEL_table),
149 .voltage_table = VPLL_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530150 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500151 },
152 {
153 .name = "VDAC",
154 .min_uV = 1800000,
155 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530156 .n_voltages = ARRAY_SIZE(VDAC_VSEL_table),
157 .voltage_table = VDAC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530158 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500159 },
160 {
161 .name = "VAUX1",
162 .min_uV = 1800000,
163 .max_uV = 2850000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530164 .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table),
165 .voltage_table = VAUX1_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530166 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500167 },
168 {
169 .name = "VAUX2",
170 .min_uV = 1800000,
171 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530172 .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table),
173 .voltage_table = VAUX2_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530174 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500175 },
176 {
177 .name = "VAUX33",
178 .min_uV = 1800000,
179 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530180 .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table),
181 .voltage_table = VAUX33_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530182 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500183 },
184 {
185 .name = "VMMC",
186 .min_uV = 1800000,
187 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530188 .n_voltages = ARRAY_SIZE(VMMC_VSEL_table),
189 .voltage_table = VMMC_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530190 .enable_time_us = 100,
Graeme Gregory518fb722011-05-02 16:20:08 -0500191 },
192};
193
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500194static struct tps_info tps65911_regs[] = {
195 {
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530196 .name = "VRTC",
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530197 .enable_time_us = 2200,
Laxman Dewanganc2f8efd2012-01-18 20:46:56 +0530198 },
199 {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500200 .name = "VIO",
201 .min_uV = 1500000,
202 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530203 .n_voltages = ARRAY_SIZE(VIO_VSEL_table),
204 .voltage_table = VIO_VSEL_table,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530205 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500206 },
207 {
208 .name = "VDD1",
209 .min_uV = 600000,
210 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530211 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530212 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500213 },
214 {
215 .name = "VDD2",
216 .min_uV = 600000,
217 .max_uV = 4500000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530218 .n_voltages = 73,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530219 .enable_time_us = 350,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500220 },
221 {
222 .name = "VDDCTRL",
223 .min_uV = 600000,
224 .max_uV = 1400000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530225 .n_voltages = 65,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530226 .enable_time_us = 900,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500227 },
228 {
229 .name = "LDO1",
230 .min_uV = 1000000,
231 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530232 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530233 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500234 },
235 {
236 .name = "LDO2",
237 .min_uV = 1000000,
238 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530239 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530240 .enable_time_us = 420,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500241 },
242 {
243 .name = "LDO3",
244 .min_uV = 1000000,
245 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530246 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530247 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500248 },
249 {
250 .name = "LDO4",
251 .min_uV = 1000000,
252 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530253 .n_voltages = 47,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530254 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500255 },
256 {
257 .name = "LDO5",
258 .min_uV = 1000000,
259 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530260 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530261 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500262 },
263 {
264 .name = "LDO6",
265 .min_uV = 1000000,
266 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530267 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530268 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500269 },
270 {
271 .name = "LDO7",
272 .min_uV = 1000000,
273 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530274 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530275 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500276 },
277 {
278 .name = "LDO8",
279 .min_uV = 1000000,
280 .max_uV = 3300000,
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530281 .n_voltages = 24,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530282 .enable_time_us = 230,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500283 },
284};
285
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530286#define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits))
287static unsigned int tps65910_ext_sleep_control[] = {
288 0,
289 EXT_CONTROL_REG_BITS(VIO, 1, 0),
290 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
291 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
292 EXT_CONTROL_REG_BITS(VDD3, 1, 3),
293 EXT_CONTROL_REG_BITS(VDIG1, 0, 1),
294 EXT_CONTROL_REG_BITS(VDIG2, 0, 2),
295 EXT_CONTROL_REG_BITS(VPLL, 0, 6),
296 EXT_CONTROL_REG_BITS(VDAC, 0, 7),
297 EXT_CONTROL_REG_BITS(VAUX1, 0, 3),
298 EXT_CONTROL_REG_BITS(VAUX2, 0, 4),
299 EXT_CONTROL_REG_BITS(VAUX33, 0, 5),
300 EXT_CONTROL_REG_BITS(VMMC, 0, 0),
301};
302
303static unsigned int tps65911_ext_sleep_control[] = {
304 0,
305 EXT_CONTROL_REG_BITS(VIO, 1, 0),
306 EXT_CONTROL_REG_BITS(VDD1, 1, 1),
307 EXT_CONTROL_REG_BITS(VDD2, 1, 2),
308 EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3),
309 EXT_CONTROL_REG_BITS(LDO1, 0, 1),
310 EXT_CONTROL_REG_BITS(LDO2, 0, 2),
311 EXT_CONTROL_REG_BITS(LDO3, 0, 7),
312 EXT_CONTROL_REG_BITS(LDO4, 0, 6),
313 EXT_CONTROL_REG_BITS(LDO5, 0, 3),
314 EXT_CONTROL_REG_BITS(LDO6, 0, 0),
315 EXT_CONTROL_REG_BITS(LDO7, 0, 5),
316 EXT_CONTROL_REG_BITS(LDO8, 0, 4),
317};
318
Graeme Gregory518fb722011-05-02 16:20:08 -0500319struct tps65910_reg {
Axel Lin39aa9b62011-07-11 09:57:43 +0800320 struct regulator_desc *desc;
Graeme Gregory518fb722011-05-02 16:20:08 -0500321 struct tps65910 *mfd;
Axel Lin39aa9b62011-07-11 09:57:43 +0800322 struct regulator_dev **rdev;
323 struct tps_info **info;
Graeme Gregory518fb722011-05-02 16:20:08 -0500324 struct mutex mutex;
Axel Lin39aa9b62011-07-11 09:57:43 +0800325 int num_regulators;
Graeme Gregory518fb722011-05-02 16:20:08 -0500326 int mode;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500327 int (*get_ctrl_reg)(int);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530328 unsigned int *ext_sleep_control;
329 unsigned int board_ext_control[TPS65910_NUM_REGS];
Graeme Gregory518fb722011-05-02 16:20:08 -0500330};
331
332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
333{
334 u8 val;
335 int err;
336
337 err = pmic->mfd->read(pmic->mfd, reg, 1, &val);
338 if (err)
339 return err;
340
341 return val;
342}
343
344static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
345{
346 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
347}
348
349static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
350 u8 set_mask, u8 clear_mask)
351{
352 int err, data;
353
354 mutex_lock(&pmic->mutex);
355
356 data = tps65910_read(pmic, reg);
357 if (data < 0) {
358 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
359 err = data;
360 goto out;
361 }
362
363 data &= ~clear_mask;
364 data |= set_mask;
365 err = tps65910_write(pmic, reg, data);
366 if (err)
367 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
368
369out:
370 mutex_unlock(&pmic->mutex);
371 return err;
372}
373
374static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
375{
376 int data;
377
378 mutex_lock(&pmic->mutex);
379
380 data = tps65910_read(pmic, reg);
381 if (data < 0)
382 dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg);
383
384 mutex_unlock(&pmic->mutex);
385 return data;
386}
387
388static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val)
389{
390 int err;
391
392 mutex_lock(&pmic->mutex);
393
394 err = tps65910_write(pmic, reg, val);
395 if (err < 0)
396 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
397
398 mutex_unlock(&pmic->mutex);
399 return err;
400}
401
402static int tps65910_get_ctrl_register(int id)
403{
404 switch (id) {
405 case TPS65910_REG_VRTC:
406 return TPS65910_VRTC;
407 case TPS65910_REG_VIO:
408 return TPS65910_VIO;
409 case TPS65910_REG_VDD1:
410 return TPS65910_VDD1;
411 case TPS65910_REG_VDD2:
412 return TPS65910_VDD2;
413 case TPS65910_REG_VDD3:
414 return TPS65910_VDD3;
415 case TPS65910_REG_VDIG1:
416 return TPS65910_VDIG1;
417 case TPS65910_REG_VDIG2:
418 return TPS65910_VDIG2;
419 case TPS65910_REG_VPLL:
420 return TPS65910_VPLL;
421 case TPS65910_REG_VDAC:
422 return TPS65910_VDAC;
423 case TPS65910_REG_VAUX1:
424 return TPS65910_VAUX1;
425 case TPS65910_REG_VAUX2:
426 return TPS65910_VAUX2;
427 case TPS65910_REG_VAUX33:
428 return TPS65910_VAUX33;
429 case TPS65910_REG_VMMC:
430 return TPS65910_VMMC;
431 default:
432 return -EINVAL;
433 }
434}
435
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500436static int tps65911_get_ctrl_register(int id)
437{
438 switch (id) {
439 case TPS65910_REG_VRTC:
440 return TPS65910_VRTC;
441 case TPS65910_REG_VIO:
442 return TPS65910_VIO;
443 case TPS65910_REG_VDD1:
444 return TPS65910_VDD1;
445 case TPS65910_REG_VDD2:
446 return TPS65910_VDD2;
447 case TPS65911_REG_VDDCTRL:
448 return TPS65911_VDDCTRL;
449 case TPS65911_REG_LDO1:
450 return TPS65911_LDO1;
451 case TPS65911_REG_LDO2:
452 return TPS65911_LDO2;
453 case TPS65911_REG_LDO3:
454 return TPS65911_LDO3;
455 case TPS65911_REG_LDO4:
456 return TPS65911_LDO4;
457 case TPS65911_REG_LDO5:
458 return TPS65911_LDO5;
459 case TPS65911_REG_LDO6:
460 return TPS65911_LDO6;
461 case TPS65911_REG_LDO7:
462 return TPS65911_LDO7;
463 case TPS65911_REG_LDO8:
464 return TPS65911_LDO8;
465 default:
466 return -EINVAL;
467 }
468}
469
Graeme Gregory518fb722011-05-02 16:20:08 -0500470static int tps65910_is_enabled(struct regulator_dev *dev)
471{
472 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
473 int reg, value, id = rdev_get_id(dev);
474
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500475 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500476 if (reg < 0)
477 return reg;
478
479 value = tps65910_reg_read(pmic, reg);
480 if (value < 0)
481 return value;
482
483 return value & TPS65910_SUPPLY_STATE_ENABLED;
484}
485
486static int tps65910_enable(struct regulator_dev *dev)
487{
488 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
489 struct tps65910 *mfd = pmic->mfd;
490 int reg, id = rdev_get_id(dev);
491
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500492 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500493 if (reg < 0)
494 return reg;
495
496 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
497}
498
499static int tps65910_disable(struct regulator_dev *dev)
500{
501 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
502 struct tps65910 *mfd = pmic->mfd;
503 int reg, id = rdev_get_id(dev);
504
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500505 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500506 if (reg < 0)
507 return reg;
508
509 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
510}
511
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530512static int tps65910_enable_time(struct regulator_dev *dev)
513{
514 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
515 int id = rdev_get_id(dev);
516 return pmic->info[id]->enable_time_us;
517}
Graeme Gregory518fb722011-05-02 16:20:08 -0500518
519static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
520{
521 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
522 struct tps65910 *mfd = pmic->mfd;
523 int reg, value, id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500524
525 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500526 if (reg < 0)
527 return reg;
528
529 switch (mode) {
530 case REGULATOR_MODE_NORMAL:
531 return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT,
532 LDO_ST_MODE_BIT);
533 case REGULATOR_MODE_IDLE:
534 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
535 return tps65910_set_bits(mfd, reg, value);
536 case REGULATOR_MODE_STANDBY:
537 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT);
538 }
539
540 return -EINVAL;
541}
542
543static unsigned int tps65910_get_mode(struct regulator_dev *dev)
544{
545 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
546 int reg, value, id = rdev_get_id(dev);
547
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500548 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500549 if (reg < 0)
550 return reg;
551
552 value = tps65910_reg_read(pmic, reg);
553 if (value < 0)
554 return value;
555
Axel Lin58599392012-03-13 07:15:27 +0800556 if (!(value & LDO_ST_ON_BIT))
Graeme Gregory518fb722011-05-02 16:20:08 -0500557 return REGULATOR_MODE_STANDBY;
558 else if (value & LDO_ST_MODE_BIT)
559 return REGULATOR_MODE_IDLE;
560 else
561 return REGULATOR_MODE_NORMAL;
562}
563
Laxman Dewangan18039e02012-03-14 13:00:58 +0530564static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
Graeme Gregory518fb722011-05-02 16:20:08 -0500565{
566 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
Laxman Dewangan18039e02012-03-14 13:00:58 +0530567 int id = rdev_get_id(dev);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500568 int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500569
570 switch (id) {
571 case TPS65910_REG_VDD1:
572 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP);
573 mult = tps65910_reg_read(pmic, TPS65910_VDD1);
574 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
575 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR);
576 sr = opvsel & VDD1_OP_CMD_MASK;
577 opvsel &= VDD1_OP_SEL_MASK;
578 srvsel &= VDD1_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500579 vselmax = 75;
Graeme Gregory518fb722011-05-02 16:20:08 -0500580 break;
581 case TPS65910_REG_VDD2:
582 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP);
583 mult = tps65910_reg_read(pmic, TPS65910_VDD2);
584 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
585 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR);
586 sr = opvsel & VDD2_OP_CMD_MASK;
587 opvsel &= VDD2_OP_SEL_MASK;
588 srvsel &= VDD2_SR_SEL_MASK;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500589 vselmax = 75;
590 break;
591 case TPS65911_REG_VDDCTRL:
592 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP);
593 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR);
594 sr = opvsel & VDDCTRL_OP_CMD_MASK;
595 opvsel &= VDDCTRL_OP_SEL_MASK;
596 srvsel &= VDDCTRL_SR_SEL_MASK;
597 vselmax = 64;
Graeme Gregory518fb722011-05-02 16:20:08 -0500598 break;
599 }
600
601 /* multiplier 0 == 1 but 2,3 normal */
602 if (!mult)
603 mult=1;
604
605 if (sr) {
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500606 /* normalise to valid range */
607 if (srvsel < 3)
608 srvsel = 3;
609 if (srvsel > vselmax)
610 srvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530611 return srvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500612 } else {
613
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500614 /* normalise to valid range*/
615 if (opvsel < 3)
616 opvsel = 3;
617 if (opvsel > vselmax)
618 opvsel = vselmax;
Laxman Dewangan18039e02012-03-14 13:00:58 +0530619 return opvsel - 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500620 }
Laxman Dewangan18039e02012-03-14 13:00:58 +0530621 return -EINVAL;
Graeme Gregory518fb722011-05-02 16:20:08 -0500622}
623
624static int tps65910_get_voltage(struct regulator_dev *dev)
625{
626 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
627 int reg, value, id = rdev_get_id(dev), voltage = 0;
628
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500629 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500630 if (reg < 0)
631 return reg;
632
633 value = tps65910_reg_read(pmic, reg);
634 if (value < 0)
635 return value;
636
637 switch (id) {
638 case TPS65910_REG_VIO:
639 case TPS65910_REG_VDIG1:
640 case TPS65910_REG_VDIG2:
641 case TPS65910_REG_VPLL:
642 case TPS65910_REG_VDAC:
643 case TPS65910_REG_VAUX1:
644 case TPS65910_REG_VAUX2:
645 case TPS65910_REG_VAUX33:
646 case TPS65910_REG_VMMC:
647 value &= LDO_SEL_MASK;
648 value >>= LDO_SEL_SHIFT;
649 break;
650 default:
651 return -EINVAL;
652 }
653
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530654 voltage = pmic->info[id]->voltage_table[value] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500655
656 return voltage;
657}
658
659static int tps65910_get_voltage_vdd3(struct regulator_dev *dev)
660{
661 return 5 * 1000 * 1000;
662}
663
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500664static int tps65911_get_voltage(struct regulator_dev *dev)
665{
666 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
667 int step_mv, id = rdev_get_id(dev);
668 u8 value, reg;
669
670 reg = pmic->get_ctrl_reg(id);
671
672 value = tps65910_reg_read(pmic, reg);
673
674 switch (id) {
675 case TPS65911_REG_LDO1:
676 case TPS65911_REG_LDO2:
677 case TPS65911_REG_LDO4:
678 value &= LDO1_SEL_MASK;
679 value >>= LDO_SEL_SHIFT;
680 /* The first 5 values of the selector correspond to 1V */
681 if (value < 5)
682 value = 0;
683 else
684 value -= 4;
685
686 step_mv = 50;
687 break;
688 case TPS65911_REG_LDO3:
689 case TPS65911_REG_LDO5:
690 case TPS65911_REG_LDO6:
691 case TPS65911_REG_LDO7:
692 case TPS65911_REG_LDO8:
693 value &= LDO3_SEL_MASK;
694 value >>= LDO_SEL_SHIFT;
695 /* The first 3 values of the selector correspond to 1V */
696 if (value < 3)
697 value = 0;
698 else
699 value -= 2;
700
701 step_mv = 100;
702 break;
703 case TPS65910_REG_VIO:
Laxman Dewangane882eae2012-02-17 18:56:11 +0530704 value &= LDO_SEL_MASK;
705 value >>= LDO_SEL_SHIFT;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530706 return pmic->info[id]->voltage_table[value] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500707 default:
708 return -EINVAL;
709 }
710
711 return (LDO_MIN_VOLT + value * step_mv) * 1000;
712}
713
Axel Lin94732b92012-03-09 10:22:20 +0800714static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
715 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500716{
717 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
718 int id = rdev_get_id(dev), vsel;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500719 int dcdc_mult = 0;
Graeme Gregory518fb722011-05-02 16:20:08 -0500720
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500721 switch (id) {
722 case TPS65910_REG_VDD1:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530723 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500724 if (dcdc_mult == 1)
725 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530726 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Graeme Gregory518fb722011-05-02 16:20:08 -0500727
Graeme Gregory518fb722011-05-02 16:20:08 -0500728 tps65910_modify_bits(pmic, TPS65910_VDD1,
729 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
730 VDD1_VGAIN_SEL_MASK);
731 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500732 break;
733 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530734 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500735 if (dcdc_mult == 1)
736 dcdc_mult--;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530737 vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500738
Graeme Gregory518fb722011-05-02 16:20:08 -0500739 tps65910_modify_bits(pmic, TPS65910_VDD2,
740 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
741 VDD1_VGAIN_SEL_MASK);
742 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500743 break;
744 case TPS65911_REG_VDDCTRL:
Laxman Dewanganc4632ae2012-03-07 16:39:05 +0530745 vsel = selector + 3;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500746 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel);
Graeme Gregory518fb722011-05-02 16:20:08 -0500747 }
748
749 return 0;
750}
751
Axel Lin94732b92012-03-09 10:22:20 +0800752static int tps65910_set_voltage_sel(struct regulator_dev *dev,
753 unsigned selector)
Graeme Gregory518fb722011-05-02 16:20:08 -0500754{
755 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
756 int reg, id = rdev_get_id(dev);
757
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500758 reg = pmic->get_ctrl_reg(id);
Graeme Gregory518fb722011-05-02 16:20:08 -0500759 if (reg < 0)
760 return reg;
761
762 switch (id) {
763 case TPS65910_REG_VIO:
764 case TPS65910_REG_VDIG1:
765 case TPS65910_REG_VDIG2:
766 case TPS65910_REG_VPLL:
767 case TPS65910_REG_VDAC:
768 case TPS65910_REG_VAUX1:
769 case TPS65910_REG_VAUX2:
770 case TPS65910_REG_VAUX33:
771 case TPS65910_REG_VMMC:
772 return tps65910_modify_bits(pmic, reg,
773 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
774 }
775
776 return -EINVAL;
777}
778
Axel Lin94732b92012-03-09 10:22:20 +0800779static int tps65911_set_voltage_sel(struct regulator_dev *dev,
780 unsigned selector)
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500781{
782 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
783 int reg, id = rdev_get_id(dev);
784
785 reg = pmic->get_ctrl_reg(id);
786 if (reg < 0)
787 return reg;
788
789 switch (id) {
790 case TPS65911_REG_LDO1:
791 case TPS65911_REG_LDO2:
792 case TPS65911_REG_LDO4:
793 return tps65910_modify_bits(pmic, reg,
794 (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK);
795 case TPS65911_REG_LDO3:
796 case TPS65911_REG_LDO5:
797 case TPS65911_REG_LDO6:
798 case TPS65911_REG_LDO7:
799 case TPS65911_REG_LDO8:
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500800 return tps65910_modify_bits(pmic, reg,
801 (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK);
Laxman Dewangane882eae2012-02-17 18:56:11 +0530802 case TPS65910_REG_VIO:
803 return tps65910_modify_bits(pmic, reg,
804 (selector << LDO_SEL_SHIFT), LDO_SEL_MASK);
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500805 }
806
807 return -EINVAL;
808}
809
810
Graeme Gregory518fb722011-05-02 16:20:08 -0500811static int tps65910_list_voltage_dcdc(struct regulator_dev *dev,
812 unsigned selector)
813{
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500814 int volt, mult = 1, id = rdev_get_id(dev);
Graeme Gregory518fb722011-05-02 16:20:08 -0500815
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500816 switch (id) {
817 case TPS65910_REG_VDD1:
818 case TPS65910_REG_VDD2:
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530819 mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500820 volt = VDD1_2_MIN_VOLT +
Afzal Mohammed780dc9b2011-11-08 18:54:10 +0530821 (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET;
Axel Lind04156b2011-07-10 21:44:09 +0800822 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500823 case TPS65911_REG_VDDCTRL:
824 volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET);
Axel Lind04156b2011-07-10 21:44:09 +0800825 break;
826 default:
827 BUG();
828 return -EINVAL;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500829 }
Graeme Gregory518fb722011-05-02 16:20:08 -0500830
831 return volt * 100 * mult;
832}
833
834static int tps65910_list_voltage(struct regulator_dev *dev,
835 unsigned selector)
836{
837 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
838 int id = rdev_get_id(dev), voltage;
839
840 if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC)
841 return -EINVAL;
842
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530843 if (selector >= pmic->info[id]->n_voltages)
Graeme Gregory518fb722011-05-02 16:20:08 -0500844 return -EINVAL;
845 else
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530846 voltage = pmic->info[id]->voltage_table[selector] * 1000;
Graeme Gregory518fb722011-05-02 16:20:08 -0500847
848 return voltage;
849}
850
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500851static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector)
852{
853 struct tps65910_reg *pmic = rdev_get_drvdata(dev);
854 int step_mv = 0, id = rdev_get_id(dev);
855
856 switch(id) {
857 case TPS65911_REG_LDO1:
858 case TPS65911_REG_LDO2:
859 case TPS65911_REG_LDO4:
860 /* The first 5 values of the selector correspond to 1V */
861 if (selector < 5)
862 selector = 0;
863 else
864 selector -= 4;
865
866 step_mv = 50;
867 break;
868 case TPS65911_REG_LDO3:
869 case TPS65911_REG_LDO5:
870 case TPS65911_REG_LDO6:
871 case TPS65911_REG_LDO7:
872 case TPS65911_REG_LDO8:
873 /* The first 3 values of the selector correspond to 1V */
874 if (selector < 3)
875 selector = 0;
876 else
877 selector -= 2;
878
879 step_mv = 100;
880 break;
881 case TPS65910_REG_VIO:
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +0530882 return pmic->info[id]->voltage_table[selector] * 1000;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500883 default:
884 return -EINVAL;
885 }
886
887 return (LDO_MIN_VOLT + selector * step_mv) * 1000;
888}
889
Laxman Dewangan18039e02012-03-14 13:00:58 +0530890static int tps65910_set_voltage_dcdc_time_sel(struct regulator_dev *dev,
891 unsigned int old_selector, unsigned int new_selector)
892{
893 int id = rdev_get_id(dev);
894 int old_volt, new_volt;
895
896 old_volt = tps65910_list_voltage_dcdc(dev, old_selector);
897 if (old_volt < 0)
898 return old_volt;
899
900 new_volt = tps65910_list_voltage_dcdc(dev, new_selector);
901 if (new_volt < 0)
902 return new_volt;
903
904 /* VDD1 and VDD2 are 12.5mV/us, VDDCTRL is 100mV/20us */
905 switch (id) {
906 case TPS65910_REG_VDD1:
907 case TPS65910_REG_VDD2:
908 return DIV_ROUND_UP(abs(old_volt - new_volt), 12500);
909 case TPS65911_REG_VDDCTRL:
910 return DIV_ROUND_UP(abs(old_volt - new_volt), 5000);
911 }
912 return -EINVAL;
913}
914
Graeme Gregory518fb722011-05-02 16:20:08 -0500915/* Regulator ops (except VRTC) */
916static struct regulator_ops tps65910_ops_dcdc = {
917 .is_enabled = tps65910_is_enabled,
918 .enable = tps65910_enable,
919 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530920 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500921 .set_mode = tps65910_set_mode,
922 .get_mode = tps65910_get_mode,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530923 .get_voltage_sel = tps65910_get_voltage_dcdc_sel,
Axel Lin94732b92012-03-09 10:22:20 +0800924 .set_voltage_sel = tps65910_set_voltage_dcdc_sel,
Laxman Dewangan18039e02012-03-14 13:00:58 +0530925 .set_voltage_time_sel = tps65910_set_voltage_dcdc_time_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500926 .list_voltage = tps65910_list_voltage_dcdc,
927};
928
929static struct regulator_ops tps65910_ops_vdd3 = {
930 .is_enabled = tps65910_is_enabled,
931 .enable = tps65910_enable,
932 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530933 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500934 .set_mode = tps65910_set_mode,
935 .get_mode = tps65910_get_mode,
936 .get_voltage = tps65910_get_voltage_vdd3,
937 .list_voltage = tps65910_list_voltage,
938};
939
940static struct regulator_ops tps65910_ops = {
941 .is_enabled = tps65910_is_enabled,
942 .enable = tps65910_enable,
943 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530944 .enable_time = tps65910_enable_time,
Graeme Gregory518fb722011-05-02 16:20:08 -0500945 .set_mode = tps65910_set_mode,
946 .get_mode = tps65910_get_mode,
947 .get_voltage = tps65910_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800948 .set_voltage_sel = tps65910_set_voltage_sel,
Graeme Gregory518fb722011-05-02 16:20:08 -0500949 .list_voltage = tps65910_list_voltage,
950};
951
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500952static struct regulator_ops tps65911_ops = {
953 .is_enabled = tps65910_is_enabled,
954 .enable = tps65910_enable,
955 .disable = tps65910_disable,
Laxman Dewangan0651eed2012-03-13 11:35:20 +0530956 .enable_time = tps65910_enable_time,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500957 .set_mode = tps65910_set_mode,
958 .get_mode = tps65910_get_mode,
959 .get_voltage = tps65911_get_voltage,
Axel Lin94732b92012-03-09 10:22:20 +0800960 .set_voltage_sel = tps65911_set_voltage_sel,
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -0500961 .list_voltage = tps65911_list_voltage,
962};
963
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530964static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
965 int id, int ext_sleep_config)
966{
967 struct tps65910 *mfd = pmic->mfd;
968 u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF;
969 u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF);
970 int ret;
971
972 /*
973 * Regulator can not be control from multiple external input EN1, EN2
974 * and EN3 together.
975 */
976 if (ext_sleep_config & EXT_SLEEP_CONTROL) {
977 int en_count;
978 en_count = ((ext_sleep_config &
979 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0);
980 en_count += ((ext_sleep_config &
981 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0);
982 en_count += ((ext_sleep_config &
983 TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0);
Laxman Dewanganf30b0712012-03-07 18:21:49 +0530984 en_count += ((ext_sleep_config &
985 TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +0530986 if (en_count > 1) {
987 dev_err(mfd->dev,
988 "External sleep control flag is not proper\n");
989 return -EINVAL;
990 }
991 }
992
993 pmic->board_ext_control[id] = ext_sleep_config;
994
995 /* External EN1 control */
996 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
997 ret = tps65910_set_bits(mfd,
998 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
999 else
1000 ret = tps65910_clear_bits(mfd,
1001 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
1002 if (ret < 0) {
1003 dev_err(mfd->dev,
1004 "Error in configuring external control EN1\n");
1005 return ret;
1006 }
1007
1008 /* External EN2 control */
1009 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
1010 ret = tps65910_set_bits(mfd,
1011 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
1012 else
1013 ret = tps65910_clear_bits(mfd,
1014 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
1015 if (ret < 0) {
1016 dev_err(mfd->dev,
1017 "Error in configuring external control EN2\n");
1018 return ret;
1019 }
1020
1021 /* External EN3 control for TPS65910 LDO only */
1022 if ((tps65910_chip_id(mfd) == TPS65910) &&
1023 (id >= TPS65910_REG_VDIG1)) {
1024 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
1025 ret = tps65910_set_bits(mfd,
1026 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1027 else
1028 ret = tps65910_clear_bits(mfd,
1029 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1030 if (ret < 0) {
1031 dev_err(mfd->dev,
1032 "Error in configuring external control EN3\n");
1033 return ret;
1034 }
1035 }
1036
1037 /* Return if no external control is selected */
1038 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
1039 /* Clear all sleep controls */
1040 ret = tps65910_clear_bits(mfd,
1041 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1042 if (!ret)
1043 ret = tps65910_clear_bits(mfd,
1044 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1045 if (ret < 0)
1046 dev_err(mfd->dev,
1047 "Error in configuring SLEEP register\n");
1048 return ret;
1049 }
1050
1051 /*
1052 * For regulator that has separate operational and sleep register make
1053 * sure that operational is used and clear sleep register to turn
1054 * regulator off when external control is inactive
1055 */
1056 if ((id == TPS65910_REG_VDD1) ||
1057 (id == TPS65910_REG_VDD2) ||
1058 ((id == TPS65911_REG_VDDCTRL) &&
1059 (tps65910_chip_id(mfd) == TPS65911))) {
1060 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1061 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1062 int opvsel = tps65910_reg_read(pmic, op_reg_add);
1063 int srvsel = tps65910_reg_read(pmic, sr_reg_add);
1064 if (opvsel & VDD1_OP_CMD_MASK) {
1065 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1066 ret = tps65910_reg_write(pmic, op_reg_add, reg_val);
1067 if (ret < 0) {
1068 dev_err(mfd->dev,
1069 "Error in configuring op register\n");
1070 return ret;
1071 }
1072 }
1073 ret = tps65910_reg_write(pmic, sr_reg_add, 0);
1074 if (ret < 0) {
1075 dev_err(mfd->dev, "Error in settting sr register\n");
1076 return ret;
1077 }
1078 }
1079
1080 ret = tps65910_clear_bits(mfd,
1081 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301082 if (!ret) {
1083 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
1084 ret = tps65910_set_bits(mfd,
1085 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1086 else
1087 ret = tps65910_clear_bits(mfd,
1088 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1089 }
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301090 if (ret < 0)
1091 dev_err(mfd->dev,
1092 "Error in configuring SLEEP register\n");
Laxman Dewanganf30b0712012-03-07 18:21:49 +05301093
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301094 return ret;
1095}
1096
Graeme Gregory518fb722011-05-02 16:20:08 -05001097static __devinit int tps65910_probe(struct platform_device *pdev)
1098{
1099 struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent);
Mark Brownc1727082012-04-04 00:50:22 +01001100 struct regulator_config config = { };
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001101 struct tps_info *info;
Graeme Gregory518fb722011-05-02 16:20:08 -05001102 struct regulator_init_data *reg_data;
1103 struct regulator_dev *rdev;
1104 struct tps65910_reg *pmic;
1105 struct tps65910_board *pmic_plat_data;
Graeme Gregory518fb722011-05-02 16:20:08 -05001106 int i, err;
1107
1108 pmic_plat_data = dev_get_platdata(tps65910->dev);
1109 if (!pmic_plat_data)
1110 return -EINVAL;
1111
Axel Lin9eb0c422012-04-11 14:40:18 +08001112 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
Graeme Gregory518fb722011-05-02 16:20:08 -05001113 if (!pmic)
1114 return -ENOMEM;
1115
1116 mutex_init(&pmic->mutex);
1117 pmic->mfd = tps65910;
1118 platform_set_drvdata(pdev, pmic);
1119
1120 /* Give control of all register to control port */
1121 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1122 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1123
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001124 switch(tps65910_chip_id(tps65910)) {
1125 case TPS65910:
1126 pmic->get_ctrl_reg = &tps65910_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001127 pmic->num_regulators = ARRAY_SIZE(tps65910_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301128 pmic->ext_sleep_control = tps65910_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001129 info = tps65910_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001130 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001131 case TPS65911:
1132 pmic->get_ctrl_reg = &tps65911_get_ctrl_register;
Axel Lin39aa9b62011-07-11 09:57:43 +08001133 pmic->num_regulators = ARRAY_SIZE(tps65911_regs);
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301134 pmic->ext_sleep_control = tps65911_ext_sleep_control;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001135 info = tps65911_regs;
Axel Lind04156b2011-07-10 21:44:09 +08001136 break;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001137 default:
1138 pr_err("Invalid tps chip version\n");
1139 return -ENODEV;
1140 }
1141
Axel Lin39aa9b62011-07-11 09:57:43 +08001142 pmic->desc = kcalloc(pmic->num_regulators,
1143 sizeof(struct regulator_desc), GFP_KERNEL);
1144 if (!pmic->desc) {
1145 err = -ENOMEM;
Axel Lin9eb0c422012-04-11 14:40:18 +08001146 goto err_out;
Axel Lin39aa9b62011-07-11 09:57:43 +08001147 }
1148
1149 pmic->info = kcalloc(pmic->num_regulators,
1150 sizeof(struct tps_info *), GFP_KERNEL);
1151 if (!pmic->info) {
1152 err = -ENOMEM;
1153 goto err_free_desc;
1154 }
1155
1156 pmic->rdev = kcalloc(pmic->num_regulators,
1157 sizeof(struct regulator_dev *), GFP_KERNEL);
1158 if (!pmic->rdev) {
1159 err = -ENOMEM;
1160 goto err_free_info;
1161 }
1162
Kyle Mannac1fc1482011-11-03 12:08:06 -05001163 for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS;
1164 i++, info++) {
1165
1166 reg_data = pmic_plat_data->tps65910_pmic_init_data[i];
1167
1168 /* Regulator API handles empty constraints but not NULL
1169 * constraints */
1170 if (!reg_data)
1171 continue;
1172
Graeme Gregory518fb722011-05-02 16:20:08 -05001173 /* Register the regulators */
1174 pmic->info[i] = info;
1175
1176 pmic->desc[i].name = info->name;
Axel Lin77fa44d2011-05-12 13:47:50 +08001177 pmic->desc[i].id = i;
Laxman Dewangan7d38a3c2012-01-20 16:36:22 +05301178 pmic->desc[i].n_voltages = info->n_voltages;
Graeme Gregory518fb722011-05-02 16:20:08 -05001179
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001180 if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) {
Graeme Gregory518fb722011-05-02 16:20:08 -05001181 pmic->desc[i].ops = &tps65910_ops_dcdc;
Afzal Mohammed780dc9b2011-11-08 18:54:10 +05301182 pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE *
1183 VDD1_2_NUM_VOLT_COARSE;
Jorge Eduardo Candelariaa320e3c2011-05-16 18:35:03 -05001184 } else if (i == TPS65910_REG_VDD3) {
1185 if (tps65910_chip_id(tps65910) == TPS65910)
1186 pmic->desc[i].ops = &tps65910_ops_vdd3;
1187 else
1188 pmic->desc[i].ops = &tps65910_ops_dcdc;
1189 } else {
1190 if (tps65910_chip_id(tps65910) == TPS65910)
1191 pmic->desc[i].ops = &tps65910_ops;
1192 else
1193 pmic->desc[i].ops = &tps65911_ops;
1194 }
Graeme Gregory518fb722011-05-02 16:20:08 -05001195
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301196 err = tps65910_set_ext_sleep_config(pmic, i,
1197 pmic_plat_data->regulator_ext_sleep_control[i]);
1198 /*
1199 * Failing on regulator for configuring externally control
1200 * is not a serious issue, just throw warning.
1201 */
1202 if (err < 0)
1203 dev_warn(tps65910->dev,
1204 "Failed to initialise ext control config\n");
1205
Graeme Gregory518fb722011-05-02 16:20:08 -05001206 pmic->desc[i].type = REGULATOR_VOLTAGE;
1207 pmic->desc[i].owner = THIS_MODULE;
1208
Mark Brownc1727082012-04-04 00:50:22 +01001209 config.dev = tps65910->dev;
1210 config.init_data = reg_data;
1211 config.driver_data = pmic;
1212
1213 rdev = regulator_register(&pmic->desc[i], &config);
Graeme Gregory518fb722011-05-02 16:20:08 -05001214 if (IS_ERR(rdev)) {
1215 dev_err(tps65910->dev,
1216 "failed to register %s regulator\n",
1217 pdev->name);
1218 err = PTR_ERR(rdev);
Axel Lin39aa9b62011-07-11 09:57:43 +08001219 goto err_unregister_regulator;
Graeme Gregory518fb722011-05-02 16:20:08 -05001220 }
1221
1222 /* Save regulator for cleanup */
1223 pmic->rdev[i] = rdev;
1224 }
1225 return 0;
1226
Axel Lin39aa9b62011-07-11 09:57:43 +08001227err_unregister_regulator:
Graeme Gregory518fb722011-05-02 16:20:08 -05001228 while (--i >= 0)
1229 regulator_unregister(pmic->rdev[i]);
Axel Lin39aa9b62011-07-11 09:57:43 +08001230 kfree(pmic->rdev);
1231err_free_info:
1232 kfree(pmic->info);
1233err_free_desc:
1234 kfree(pmic->desc);
Axel Lin9eb0c422012-04-11 14:40:18 +08001235err_out:
Graeme Gregory518fb722011-05-02 16:20:08 -05001236 return err;
1237}
1238
1239static int __devexit tps65910_remove(struct platform_device *pdev)
1240{
Axel Lin39aa9b62011-07-11 09:57:43 +08001241 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
Graeme Gregory518fb722011-05-02 16:20:08 -05001242 int i;
1243
Axel Lin39aa9b62011-07-11 09:57:43 +08001244 for (i = 0; i < pmic->num_regulators; i++)
1245 regulator_unregister(pmic->rdev[i]);
Graeme Gregory518fb722011-05-02 16:20:08 -05001246
Axel Lin39aa9b62011-07-11 09:57:43 +08001247 kfree(pmic->rdev);
1248 kfree(pmic->info);
1249 kfree(pmic->desc);
Graeme Gregory518fb722011-05-02 16:20:08 -05001250 return 0;
1251}
1252
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301253static void tps65910_shutdown(struct platform_device *pdev)
1254{
1255 struct tps65910_reg *pmic = platform_get_drvdata(pdev);
1256 int i;
1257
1258 /*
1259 * Before bootloader jumps to kernel, it makes sure that required
1260 * external control signals are in desired state so that given rails
1261 * can be configure accordingly.
1262 * If rails are configured to be controlled from external control
1263 * then before shutting down/rebooting the system, the external
1264 * control configuration need to be remove from the rails so that
1265 * its output will be available as per register programming even
1266 * if external controls are removed. This is require when the POR
1267 * value of the control signals are not in active state and before
1268 * bootloader initializes it, the system requires the rail output
1269 * to be active for booting.
1270 */
1271 for (i = 0; i < pmic->num_regulators; i++) {
1272 int err;
1273 if (!pmic->rdev[i])
1274 continue;
1275
1276 err = tps65910_set_ext_sleep_config(pmic, i, 0);
1277 if (err < 0)
1278 dev_err(&pdev->dev,
1279 "Error in clearing external control\n");
1280 }
1281}
1282
Graeme Gregory518fb722011-05-02 16:20:08 -05001283static struct platform_driver tps65910_driver = {
1284 .driver = {
1285 .name = "tps65910-pmic",
1286 .owner = THIS_MODULE,
1287 },
1288 .probe = tps65910_probe,
1289 .remove = __devexit_p(tps65910_remove),
Laxman Dewangan1e0c66f2012-01-28 15:07:57 +05301290 .shutdown = tps65910_shutdown,
Graeme Gregory518fb722011-05-02 16:20:08 -05001291};
1292
1293static int __init tps65910_init(void)
1294{
1295 return platform_driver_register(&tps65910_driver);
1296}
1297subsys_initcall(tps65910_init);
1298
1299static void __exit tps65910_cleanup(void)
1300{
1301 platform_driver_unregister(&tps65910_driver);
1302}
1303module_exit(tps65910_cleanup);
1304
1305MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
Axel Linae0e6542012-02-21 10:14:55 +08001306MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver");
Graeme Gregory518fb722011-05-02 16:20:08 -05001307MODULE_LICENSE("GPL v2");
1308MODULE_ALIAS("platform:tps65910-pmic");