Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called COPYING. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This code implements the DMA subsystem. It provides a HW-neutral interface |
| 24 | * for other kernel code to use asynchronous memory copy capabilities, |
| 25 | * if present, and allows different HW DMA drivers to register as providing |
| 26 | * this capability. |
| 27 | * |
| 28 | * Due to the fact we are accelerating what is already a relatively fast |
| 29 | * operation, the code goes to great lengths to avoid additional overhead, |
| 30 | * such as locking. |
| 31 | * |
| 32 | * LOCKING: |
| 33 | * |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 34 | * The subsystem keeps a global list of dma_device structs it is protected by a |
| 35 | * mutex, dma_list_mutex. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 36 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 37 | * A subsystem can get access to a channel by calling dmaengine_get() followed |
| 38 | * by dma_find_channel(), or if it has need for an exclusive channel it can call |
| 39 | * dma_request_channel(). Once a channel is allocated a reference is taken |
| 40 | * against its corresponding driver to disable removal. |
| 41 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 42 | * Each device has a channels list, which runs unlocked but is never modified |
| 43 | * once the device is registered, it's just setup by the driver. |
| 44 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 45 | * See Documentation/dmaengine.txt for more details |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 46 | */ |
| 47 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 48 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 49 | |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 50 | #include <linux/dma-mapping.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 51 | #include <linux/init.h> |
| 52 | #include <linux/module.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 53 | #include <linux/mm.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 54 | #include <linux/device.h> |
| 55 | #include <linux/dmaengine.h> |
| 56 | #include <linux/hardirq.h> |
| 57 | #include <linux/spinlock.h> |
| 58 | #include <linux/percpu.h> |
| 59 | #include <linux/rcupdate.h> |
| 60 | #include <linux/mutex.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 61 | #include <linux/jiffies.h> |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 62 | #include <linux/rculist.h> |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 63 | #include <linux/idr.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 64 | #include <linux/slab.h> |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 65 | #include <linux/acpi.h> |
| 66 | #include <linux/acpi_dma.h> |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 67 | #include <linux/of_dma.h> |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 68 | #include <linux/mempool.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 69 | |
| 70 | static DEFINE_MUTEX(dma_list_mutex); |
Axel Lin | 21ef4b8 | 2011-07-20 11:32:28 +0800 | [diff] [blame] | 71 | static DEFINE_IDR(dma_idr); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 72 | static LIST_HEAD(dma_device_list); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 73 | static long dmaengine_ref_count; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 74 | |
| 75 | /* --- sysfs implementation --- */ |
| 76 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 77 | /** |
| 78 | * dev_to_dma_chan - convert a device pointer to the its sysfs container object |
| 79 | * @dev - device node |
| 80 | * |
| 81 | * Must be called under dma_list_mutex |
| 82 | */ |
| 83 | static struct dma_chan *dev_to_dma_chan(struct device *dev) |
| 84 | { |
| 85 | struct dma_chan_dev *chan_dev; |
| 86 | |
| 87 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
| 88 | return chan_dev->chan; |
| 89 | } |
| 90 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 91 | static ssize_t memcpy_count_show(struct device *dev, |
| 92 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 93 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 94 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 95 | unsigned long count = 0; |
| 96 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 97 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 98 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 99 | mutex_lock(&dma_list_mutex); |
| 100 | chan = dev_to_dma_chan(dev); |
| 101 | if (chan) { |
| 102 | for_each_possible_cpu(i) |
| 103 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
| 104 | err = sprintf(buf, "%lu\n", count); |
| 105 | } else |
| 106 | err = -ENODEV; |
| 107 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 108 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 109 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 110 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 111 | static DEVICE_ATTR_RO(memcpy_count); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 112 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 113 | static ssize_t bytes_transferred_show(struct device *dev, |
| 114 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 115 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 116 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 117 | unsigned long count = 0; |
| 118 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 119 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 120 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 121 | mutex_lock(&dma_list_mutex); |
| 122 | chan = dev_to_dma_chan(dev); |
| 123 | if (chan) { |
| 124 | for_each_possible_cpu(i) |
| 125 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
| 126 | err = sprintf(buf, "%lu\n", count); |
| 127 | } else |
| 128 | err = -ENODEV; |
| 129 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 130 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 131 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 132 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 133 | static DEVICE_ATTR_RO(bytes_transferred); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 134 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 135 | static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, |
| 136 | char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 137 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 138 | struct dma_chan *chan; |
| 139 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 140 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 141 | mutex_lock(&dma_list_mutex); |
| 142 | chan = dev_to_dma_chan(dev); |
| 143 | if (chan) |
| 144 | err = sprintf(buf, "%d\n", chan->client_count); |
| 145 | else |
| 146 | err = -ENODEV; |
| 147 | mutex_unlock(&dma_list_mutex); |
| 148 | |
| 149 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 150 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 151 | static DEVICE_ATTR_RO(in_use); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 152 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 153 | static struct attribute *dma_dev_attrs[] = { |
| 154 | &dev_attr_memcpy_count.attr, |
| 155 | &dev_attr_bytes_transferred.attr, |
| 156 | &dev_attr_in_use.attr, |
| 157 | NULL, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 158 | }; |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 159 | ATTRIBUTE_GROUPS(dma_dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 160 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 161 | static void chan_dev_release(struct device *dev) |
| 162 | { |
| 163 | struct dma_chan_dev *chan_dev; |
| 164 | |
| 165 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 166 | if (atomic_dec_and_test(chan_dev->idr_ref)) { |
| 167 | mutex_lock(&dma_list_mutex); |
| 168 | idr_remove(&dma_idr, chan_dev->dev_id); |
| 169 | mutex_unlock(&dma_list_mutex); |
| 170 | kfree(chan_dev->idr_ref); |
| 171 | } |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 172 | kfree(chan_dev); |
| 173 | } |
| 174 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 175 | static struct class dma_devclass = { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 176 | .name = "dma", |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 177 | .dev_groups = dma_dev_groups, |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 178 | .dev_release = chan_dev_release, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 179 | }; |
| 180 | |
| 181 | /* --- client and device registration --- */ |
| 182 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 183 | #define dma_device_satisfies_mask(device, mask) \ |
| 184 | __dma_device_satisfies_mask((device), &(mask)) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 185 | static int |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 186 | __dma_device_satisfies_mask(struct dma_device *device, |
| 187 | const dma_cap_mask_t *want) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 188 | { |
| 189 | dma_cap_mask_t has; |
| 190 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 191 | bitmap_and(has.bits, want->bits, device->cap_mask.bits, |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 192 | DMA_TX_TYPE_END); |
| 193 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); |
| 194 | } |
| 195 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 196 | static struct module *dma_chan_to_owner(struct dma_chan *chan) |
| 197 | { |
| 198 | return chan->device->dev->driver->owner; |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * balance_ref_count - catch up the channel reference count |
| 203 | * @chan - channel to balance ->client_count versus dmaengine_ref_count |
| 204 | * |
| 205 | * balance_ref_count must be called under dma_list_mutex |
| 206 | */ |
| 207 | static void balance_ref_count(struct dma_chan *chan) |
| 208 | { |
| 209 | struct module *owner = dma_chan_to_owner(chan); |
| 210 | |
| 211 | while (chan->client_count < dmaengine_ref_count) { |
| 212 | __module_get(owner); |
| 213 | chan->client_count++; |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | /** |
| 218 | * dma_chan_get - try to grab a dma channel's parent driver module |
| 219 | * @chan - channel to grab |
| 220 | * |
| 221 | * Must be called under dma_list_mutex |
| 222 | */ |
| 223 | static int dma_chan_get(struct dma_chan *chan) |
| 224 | { |
| 225 | int err = -ENODEV; |
| 226 | struct module *owner = dma_chan_to_owner(chan); |
| 227 | |
| 228 | if (chan->client_count) { |
| 229 | __module_get(owner); |
| 230 | err = 0; |
| 231 | } else if (try_module_get(owner)) |
| 232 | err = 0; |
| 233 | |
| 234 | if (err == 0) |
| 235 | chan->client_count++; |
| 236 | |
| 237 | /* allocate upon first client reference */ |
| 238 | if (chan->client_count == 1 && err == 0) { |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 239 | int desc_cnt = chan->device->device_alloc_chan_resources(chan); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 240 | |
| 241 | if (desc_cnt < 0) { |
| 242 | err = desc_cnt; |
| 243 | chan->client_count = 0; |
| 244 | module_put(owner); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 245 | } else if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 246 | balance_ref_count(chan); |
| 247 | } |
| 248 | |
| 249 | return err; |
| 250 | } |
| 251 | |
| 252 | /** |
| 253 | * dma_chan_put - drop a reference to a dma channel's parent driver module |
| 254 | * @chan - channel to release |
| 255 | * |
| 256 | * Must be called under dma_list_mutex |
| 257 | */ |
| 258 | static void dma_chan_put(struct dma_chan *chan) |
| 259 | { |
| 260 | if (!chan->client_count) |
| 261 | return; /* this channel failed alloc_chan_resources */ |
| 262 | chan->client_count--; |
| 263 | module_put(dma_chan_to_owner(chan)); |
| 264 | if (chan->client_count == 0) |
| 265 | chan->device->device_free_chan_resources(chan); |
| 266 | } |
| 267 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 268 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
| 269 | { |
| 270 | enum dma_status status; |
| 271 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
| 272 | |
| 273 | dma_async_issue_pending(chan); |
| 274 | do { |
| 275 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 276 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 277 | pr_err("%s: timeout!\n", __func__); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 278 | return DMA_ERROR; |
| 279 | } |
Bartlomiej Zolnierkiewicz | 2cbe7fe | 2012-11-08 10:02:07 +0000 | [diff] [blame] | 280 | if (status != DMA_IN_PROGRESS) |
| 281 | break; |
| 282 | cpu_relax(); |
| 283 | } while (1); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 284 | |
| 285 | return status; |
| 286 | } |
| 287 | EXPORT_SYMBOL(dma_sync_wait); |
| 288 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 289 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 290 | * dma_cap_mask_all - enable iteration over all operation types |
| 291 | */ |
| 292 | static dma_cap_mask_t dma_cap_mask_all; |
| 293 | |
| 294 | /** |
| 295 | * dma_chan_tbl_ent - tracks channel allocations per core/operation |
| 296 | * @chan - associated channel for this entry |
| 297 | */ |
| 298 | struct dma_chan_tbl_ent { |
| 299 | struct dma_chan *chan; |
| 300 | }; |
| 301 | |
| 302 | /** |
| 303 | * channel_table - percpu lookup table for memory-to-memory offload providers |
| 304 | */ |
Tejun Heo | a29d8b8 | 2010-02-02 14:39:15 +0900 | [diff] [blame] | 305 | static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 306 | |
| 307 | static int __init dma_channel_table_init(void) |
| 308 | { |
| 309 | enum dma_transaction_type cap; |
| 310 | int err = 0; |
| 311 | |
| 312 | bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); |
| 313 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 314 | /* 'interrupt', 'private', and 'slave' are channel capabilities, |
| 315 | * but are not associated with an operation so they do not need |
| 316 | * an entry in the channel_table |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 317 | */ |
| 318 | clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 319 | clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 320 | clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); |
| 321 | |
| 322 | for_each_dma_cap_mask(cap, dma_cap_mask_all) { |
| 323 | channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); |
| 324 | if (!channel_table[cap]) { |
| 325 | err = -ENOMEM; |
| 326 | break; |
| 327 | } |
| 328 | } |
| 329 | |
| 330 | if (err) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 331 | pr_err("initialization failure\n"); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 332 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 333 | if (channel_table[cap]) |
| 334 | free_percpu(channel_table[cap]); |
| 335 | } |
| 336 | |
| 337 | return err; |
| 338 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 339 | arch_initcall(dma_channel_table_init); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 340 | |
| 341 | /** |
| 342 | * dma_find_channel - find a channel to carry out the operation |
| 343 | * @tx_type: transaction type |
| 344 | */ |
| 345 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) |
| 346 | { |
Christoph Lameter | e7dcaa4 | 2009-10-03 19:48:23 +0900 | [diff] [blame] | 347 | return this_cpu_read(channel_table[tx_type]->chan); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 348 | } |
| 349 | EXPORT_SYMBOL(dma_find_channel); |
| 350 | |
Dave Jiang | a2bd114 | 2012-04-04 16:10:46 -0700 | [diff] [blame] | 351 | /* |
| 352 | * net_dma_find_channel - find a channel for net_dma |
| 353 | * net_dma has alignment requirements |
| 354 | */ |
| 355 | struct dma_chan *net_dma_find_channel(void) |
| 356 | { |
| 357 | struct dma_chan *chan = dma_find_channel(DMA_MEMCPY); |
| 358 | if (chan && !is_dma_copy_aligned(chan->device, 1, 1, 1)) |
| 359 | return NULL; |
| 360 | |
| 361 | return chan; |
| 362 | } |
| 363 | EXPORT_SYMBOL(net_dma_find_channel); |
| 364 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 365 | /** |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 366 | * dma_issue_pending_all - flush all pending operations across all channels |
| 367 | */ |
| 368 | void dma_issue_pending_all(void) |
| 369 | { |
| 370 | struct dma_device *device; |
| 371 | struct dma_chan *chan; |
| 372 | |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 373 | rcu_read_lock(); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 374 | list_for_each_entry_rcu(device, &dma_device_list, global_node) { |
| 375 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 376 | continue; |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 377 | list_for_each_entry(chan, &device->channels, device_node) |
| 378 | if (chan->client_count) |
| 379 | device->device_issue_pending(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 380 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 381 | rcu_read_unlock(); |
| 382 | } |
| 383 | EXPORT_SYMBOL(dma_issue_pending_all); |
| 384 | |
| 385 | /** |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 386 | * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 387 | */ |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 388 | static bool dma_chan_is_local(struct dma_chan *chan, int cpu) |
| 389 | { |
| 390 | int node = dev_to_node(chan->device->dev); |
| 391 | return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node)); |
| 392 | } |
| 393 | |
| 394 | /** |
| 395 | * min_chan - returns the channel with min count and in the same numa-node as the cpu |
| 396 | * @cap: capability to match |
| 397 | * @cpu: cpu index which the channel should be close to |
| 398 | * |
| 399 | * If some channels are close to the given cpu, the one with the lowest |
| 400 | * reference count is returned. Otherwise, cpu is ignored and only the |
| 401 | * reference count is taken into account. |
| 402 | * Must be called under dma_list_mutex. |
| 403 | */ |
| 404 | static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 405 | { |
| 406 | struct dma_device *device; |
| 407 | struct dma_chan *chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 408 | struct dma_chan *min = NULL; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 409 | struct dma_chan *localmin = NULL; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 410 | |
| 411 | list_for_each_entry(device, &dma_device_list, global_node) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 412 | if (!dma_has_cap(cap, device->cap_mask) || |
| 413 | dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 414 | continue; |
| 415 | list_for_each_entry(chan, &device->channels, device_node) { |
| 416 | if (!chan->client_count) |
| 417 | continue; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 418 | if (!min || chan->table_count < min->table_count) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 419 | min = chan; |
| 420 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 421 | if (dma_chan_is_local(chan, cpu)) |
| 422 | if (!localmin || |
| 423 | chan->table_count < localmin->table_count) |
| 424 | localmin = chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 425 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 426 | } |
| 427 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 428 | chan = localmin ? localmin : min; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 429 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 430 | if (chan) |
| 431 | chan->table_count++; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 432 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 433 | return chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 434 | } |
| 435 | |
| 436 | /** |
| 437 | * dma_channel_rebalance - redistribute the available channels |
| 438 | * |
| 439 | * Optimize for cpu isolation (each cpu gets a dedicated channel for an |
| 440 | * operation type) in the SMP case, and operation isolation (avoid |
| 441 | * multi-tasking channels) in the non-SMP case. Must be called under |
| 442 | * dma_list_mutex. |
| 443 | */ |
| 444 | static void dma_channel_rebalance(void) |
| 445 | { |
| 446 | struct dma_chan *chan; |
| 447 | struct dma_device *device; |
| 448 | int cpu; |
| 449 | int cap; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 450 | |
| 451 | /* undo the last distribution */ |
| 452 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 453 | for_each_possible_cpu(cpu) |
| 454 | per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; |
| 455 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 456 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 457 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 458 | continue; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 459 | list_for_each_entry(chan, &device->channels, device_node) |
| 460 | chan->table_count = 0; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 461 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 462 | |
| 463 | /* don't populate the channel_table if no clients are available */ |
| 464 | if (!dmaengine_ref_count) |
| 465 | return; |
| 466 | |
| 467 | /* redistribute available channels */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 468 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 469 | for_each_online_cpu(cpu) { |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 470 | chan = min_chan(cap, cpu); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 471 | per_cpu_ptr(channel_table[cap], cpu)->chan = chan; |
| 472 | } |
| 473 | } |
| 474 | |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 475 | static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, |
| 476 | struct dma_device *dev, |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 477 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 478 | { |
| 479 | struct dma_chan *chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 480 | |
| 481 | if (!__dma_device_satisfies_mask(dev, mask)) { |
| 482 | pr_debug("%s: wrong capabilities\n", __func__); |
| 483 | return NULL; |
| 484 | } |
| 485 | /* devices with multiple channels need special handling as we need to |
| 486 | * ensure that all channels are either private or public. |
| 487 | */ |
| 488 | if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) |
| 489 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 490 | /* some channels are already publicly allocated */ |
| 491 | if (chan->client_count) |
| 492 | return NULL; |
| 493 | } |
| 494 | |
| 495 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 496 | if (chan->client_count) { |
| 497 | pr_debug("%s: %s busy\n", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 498 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 499 | continue; |
| 500 | } |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 501 | if (fn && !fn(chan, fn_param)) { |
| 502 | pr_debug("%s: %s filter said false\n", |
| 503 | __func__, dma_chan_name(chan)); |
| 504 | continue; |
| 505 | } |
| 506 | return chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 507 | } |
| 508 | |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 509 | return NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 510 | } |
| 511 | |
| 512 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 513 | * dma_request_slave_channel - try to get specific channel exclusively |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 514 | * @chan: target channel |
| 515 | */ |
| 516 | struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) |
| 517 | { |
| 518 | int err = -EBUSY; |
| 519 | |
| 520 | /* lock against __dma_request_channel */ |
| 521 | mutex_lock(&dma_list_mutex); |
| 522 | |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 523 | if (chan->client_count == 0) { |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 524 | err = dma_chan_get(chan); |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 525 | if (err) |
| 526 | pr_debug("%s: failed to get %s: (%d)\n", |
| 527 | __func__, dma_chan_name(chan), err); |
| 528 | } else |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 529 | chan = NULL; |
| 530 | |
| 531 | mutex_unlock(&dma_list_mutex); |
| 532 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 533 | |
| 534 | return chan; |
| 535 | } |
| 536 | EXPORT_SYMBOL_GPL(dma_get_slave_channel); |
| 537 | |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 538 | struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) |
| 539 | { |
| 540 | dma_cap_mask_t mask; |
| 541 | struct dma_chan *chan; |
| 542 | int err; |
| 543 | |
| 544 | dma_cap_zero(mask); |
| 545 | dma_cap_set(DMA_SLAVE, mask); |
| 546 | |
| 547 | /* lock against __dma_request_channel */ |
| 548 | mutex_lock(&dma_list_mutex); |
| 549 | |
| 550 | chan = private_candidate(&mask, device, NULL, NULL); |
| 551 | if (chan) { |
| 552 | err = dma_chan_get(chan); |
| 553 | if (err) { |
| 554 | pr_debug("%s: failed to get %s: (%d)\n", |
| 555 | __func__, dma_chan_name(chan), err); |
| 556 | chan = NULL; |
| 557 | } |
| 558 | } |
| 559 | |
| 560 | mutex_unlock(&dma_list_mutex); |
| 561 | |
| 562 | return chan; |
| 563 | } |
| 564 | EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); |
| 565 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 566 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 567 | * __dma_request_channel - try to allocate an exclusive channel |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 568 | * @mask: capabilities that the channel must satisfy |
| 569 | * @fn: optional callback to disposition available channels |
| 570 | * @fn_param: opaque parameter to pass to dma_filter_fn |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 571 | * |
| 572 | * Returns pointer to appropriate DMA channel on success or NULL. |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 573 | */ |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 574 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
| 575 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 576 | { |
| 577 | struct dma_device *device, *_d; |
| 578 | struct dma_chan *chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 579 | int err; |
| 580 | |
| 581 | /* Find a channel */ |
| 582 | mutex_lock(&dma_list_mutex); |
| 583 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 584 | chan = private_candidate(mask, device, fn, fn_param); |
| 585 | if (chan) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 586 | /* Found a suitable channel, try to grab, prep, and |
| 587 | * return it. We first set DMA_PRIVATE to disable |
| 588 | * balance_ref_count as this channel will not be |
| 589 | * published in the general-purpose allocator |
| 590 | */ |
| 591 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 592 | device->privatecnt++; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 593 | err = dma_chan_get(chan); |
| 594 | |
| 595 | if (err == -ENODEV) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 596 | pr_debug("%s: %s module removed\n", |
| 597 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 598 | list_del_rcu(&device->global_node); |
| 599 | } else if (err) |
Fabio Estevam | d8b5348 | 2012-02-21 12:51:59 -0200 | [diff] [blame] | 600 | pr_debug("%s: failed to get %s: (%d)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 601 | __func__, dma_chan_name(chan), err); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 602 | else |
| 603 | break; |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 604 | if (--device->privatecnt == 0) |
| 605 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 606 | chan = NULL; |
| 607 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 608 | } |
| 609 | mutex_unlock(&dma_list_mutex); |
| 610 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 611 | pr_debug("%s: %s (%s)\n", |
| 612 | __func__, |
| 613 | chan ? "success" : "fail", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 614 | chan ? dma_chan_name(chan) : NULL); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 615 | |
| 616 | return chan; |
| 617 | } |
| 618 | EXPORT_SYMBOL_GPL(__dma_request_channel); |
| 619 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 620 | /** |
| 621 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 622 | * @dev: pointer to client device structure |
| 623 | * @name: slave channel name |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 624 | * |
| 625 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 626 | */ |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 627 | struct dma_chan *dma_request_slave_channel_reason(struct device *dev, |
| 628 | const char *name) |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 629 | { |
| 630 | /* If device-tree is present get slave info from here */ |
| 631 | if (dev->of_node) |
| 632 | return of_dma_request_slave_channel(dev->of_node, name); |
| 633 | |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 634 | /* If device was enumerated by ACPI get slave info from here */ |
Andy Shevchenko | 0f6a928 | 2014-02-06 13:25:40 +0200 | [diff] [blame] | 635 | if (ACPI_HANDLE(dev)) |
| 636 | return acpi_dma_request_slave_chan_by_name(dev, name); |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 637 | |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 638 | return ERR_PTR(-ENODEV); |
| 639 | } |
| 640 | EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason); |
| 641 | |
| 642 | /** |
| 643 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 644 | * @dev: pointer to client device structure |
| 645 | * @name: slave channel name |
| 646 | * |
| 647 | * Returns pointer to appropriate DMA channel on success or NULL. |
| 648 | */ |
| 649 | struct dma_chan *dma_request_slave_channel(struct device *dev, |
| 650 | const char *name) |
| 651 | { |
| 652 | struct dma_chan *ch = dma_request_slave_channel_reason(dev, name); |
| 653 | if (IS_ERR(ch)) |
| 654 | return NULL; |
| 655 | return ch; |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 656 | } |
| 657 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); |
| 658 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 659 | void dma_release_channel(struct dma_chan *chan) |
| 660 | { |
| 661 | mutex_lock(&dma_list_mutex); |
| 662 | WARN_ONCE(chan->client_count != 1, |
| 663 | "chan reference count %d != 1\n", chan->client_count); |
| 664 | dma_chan_put(chan); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 665 | /* drop PRIVATE cap enabled by __dma_request_channel() */ |
| 666 | if (--chan->device->privatecnt == 0) |
| 667 | dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 668 | mutex_unlock(&dma_list_mutex); |
| 669 | } |
| 670 | EXPORT_SYMBOL_GPL(dma_release_channel); |
| 671 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 672 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 673 | * dmaengine_get - register interest in dma_channels |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 674 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 675 | void dmaengine_get(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 676 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 677 | struct dma_device *device, *_d; |
| 678 | struct dma_chan *chan; |
| 679 | int err; |
| 680 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 681 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 682 | dmaengine_ref_count++; |
| 683 | |
| 684 | /* try to grab channels */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 685 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 686 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 687 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 688 | list_for_each_entry(chan, &device->channels, device_node) { |
| 689 | err = dma_chan_get(chan); |
| 690 | if (err == -ENODEV) { |
| 691 | /* module removed before we could use it */ |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 692 | list_del_rcu(&device->global_node); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 693 | break; |
| 694 | } else if (err) |
Fabio Estevam | 0eb5a35 | 2012-10-04 17:11:16 -0700 | [diff] [blame] | 695 | pr_debug("%s: failed to get %s: (%d)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 696 | __func__, dma_chan_name(chan), err); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 697 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 698 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 699 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 700 | /* if this is the first reference and there were channels |
| 701 | * waiting we need to rebalance to get those channels |
| 702 | * incorporated into the channel table |
| 703 | */ |
| 704 | if (dmaengine_ref_count == 1) |
| 705 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 706 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 707 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 708 | EXPORT_SYMBOL(dmaengine_get); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 709 | |
| 710 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 711 | * dmaengine_put - let dma drivers be removed when ref_count == 0 |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 712 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 713 | void dmaengine_put(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 714 | { |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 715 | struct dma_device *device; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 716 | struct dma_chan *chan; |
| 717 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 718 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 719 | dmaengine_ref_count--; |
| 720 | BUG_ON(dmaengine_ref_count < 0); |
| 721 | /* drop channel references */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 722 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 723 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 724 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 725 | list_for_each_entry(chan, &device->channels, device_node) |
| 726 | dma_chan_put(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 727 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 728 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 729 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 730 | EXPORT_SYMBOL(dmaengine_put); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 731 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 732 | static bool device_has_all_tx_types(struct dma_device *device) |
| 733 | { |
| 734 | /* A device that satisfies this test has channels that will never cause |
| 735 | * an async_tx channel switch event as all possible operation types can |
| 736 | * be handled. |
| 737 | */ |
| 738 | #ifdef CONFIG_ASYNC_TX_DMA |
| 739 | if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) |
| 740 | return false; |
| 741 | #endif |
| 742 | |
| 743 | #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE) |
| 744 | if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) |
| 745 | return false; |
| 746 | #endif |
| 747 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 748 | #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE) |
| 749 | if (!dma_has_cap(DMA_XOR, device->cap_mask)) |
| 750 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 751 | |
| 752 | #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 753 | if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) |
| 754 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 755 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 756 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 757 | |
| 758 | #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE) |
| 759 | if (!dma_has_cap(DMA_PQ, device->cap_mask)) |
| 760 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 761 | |
| 762 | #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 763 | if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) |
| 764 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 765 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 766 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 767 | |
| 768 | return true; |
| 769 | } |
| 770 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 771 | static int get_dma_id(struct dma_device *device) |
| 772 | { |
| 773 | int rc; |
| 774 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 775 | mutex_lock(&dma_list_mutex); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 776 | |
Tejun Heo | 69ee266 | 2013-02-27 17:04:03 -0800 | [diff] [blame] | 777 | rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL); |
| 778 | if (rc >= 0) |
| 779 | device->dev_id = rc; |
| 780 | |
| 781 | mutex_unlock(&dma_list_mutex); |
| 782 | return rc < 0 ? rc : 0; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 783 | } |
| 784 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 785 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 786 | * dma_async_device_register - registers DMA devices found |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 787 | * @device: &dma_device |
| 788 | */ |
| 789 | int dma_async_device_register(struct dma_device *device) |
| 790 | { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 791 | int chancnt = 0, rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 792 | struct dma_chan* chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 793 | atomic_t *idr_ref; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 794 | |
| 795 | if (!device) |
| 796 | return -ENODEV; |
| 797 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 798 | /* validate device routines */ |
| 799 | BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && |
| 800 | !device->device_prep_dma_memcpy); |
| 801 | BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && |
| 802 | !device->device_prep_dma_xor); |
Dan Williams | 099f53c | 2009-04-08 14:28:37 -0700 | [diff] [blame] | 803 | BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) && |
| 804 | !device->device_prep_dma_xor_val); |
Dan Williams | b2f46fd | 2009-07-14 12:20:36 -0700 | [diff] [blame] | 805 | BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) && |
| 806 | !device->device_prep_dma_pq); |
| 807 | BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) && |
| 808 | !device->device_prep_dma_pq_val); |
Zhang Wei | 9b941c6 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 809 | BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 810 | !device->device_prep_dma_interrupt); |
Ira Snyder | a86ee03 | 2010-09-30 11:46:44 +0000 | [diff] [blame] | 811 | BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && |
| 812 | !device->device_prep_dma_sg); |
Sascha Hauer | 782bc95 | 2010-09-30 13:56:32 +0000 | [diff] [blame] | 813 | BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && |
| 814 | !device->device_prep_dma_cyclic); |
Haavard Skinnemoen | dc0ee643 | 2008-07-08 11:59:35 -0700 | [diff] [blame] | 815 | BUG_ON(dma_has_cap(DMA_SLAVE, device->cap_mask) && |
Linus Walleij | c3635c7 | 2010-03-26 16:44:01 -0700 | [diff] [blame] | 816 | !device->device_control); |
Jassi Brar | b14dab7 | 2011-10-13 12:33:30 +0530 | [diff] [blame] | 817 | BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && |
| 818 | !device->device_prep_interleaved_dma); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 819 | |
| 820 | BUG_ON(!device->device_alloc_chan_resources); |
| 821 | BUG_ON(!device->device_free_chan_resources); |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 822 | BUG_ON(!device->device_tx_status); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 823 | BUG_ON(!device->device_issue_pending); |
| 824 | BUG_ON(!device->dev); |
| 825 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 826 | /* note: this only matters in the |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 827 | * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 828 | */ |
| 829 | if (device_has_all_tx_types(device)) |
| 830 | dma_cap_set(DMA_ASYNC_TX, device->cap_mask); |
| 831 | |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 832 | idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); |
| 833 | if (!idr_ref) |
| 834 | return -ENOMEM; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 835 | rc = get_dma_id(device); |
| 836 | if (rc != 0) { |
| 837 | kfree(idr_ref); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 838 | return rc; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 839 | } |
| 840 | |
| 841 | atomic_set(idr_ref, 0); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 842 | |
| 843 | /* represent channels in sysfs. Probably want devs too */ |
| 844 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 845 | rc = -ENOMEM; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 846 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 847 | if (chan->local == NULL) |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 848 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 849 | chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); |
| 850 | if (chan->dev == NULL) { |
| 851 | free_percpu(chan->local); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 852 | chan->local = NULL; |
| 853 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 854 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 855 | |
| 856 | chan->chan_id = chancnt++; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 857 | chan->dev->device.class = &dma_devclass; |
| 858 | chan->dev->device.parent = device->dev; |
| 859 | chan->dev->chan = chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 860 | chan->dev->idr_ref = idr_ref; |
| 861 | chan->dev->dev_id = device->dev_id; |
| 862 | atomic_inc(idr_ref); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 863 | dev_set_name(&chan->dev->device, "dma%dchan%d", |
Kay Sievers | 06190d8 | 2008-11-11 13:12:33 -0700 | [diff] [blame] | 864 | device->dev_id, chan->chan_id); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 865 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 866 | rc = device_register(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 867 | if (rc) { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 868 | free_percpu(chan->local); |
| 869 | chan->local = NULL; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 870 | kfree(chan->dev); |
| 871 | atomic_dec(idr_ref); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 872 | goto err_out; |
| 873 | } |
Dan Williams | 7cc5bf9 | 2008-07-08 11:58:21 -0700 | [diff] [blame] | 874 | chan->client_count = 0; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 875 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 876 | device->chancnt = chancnt; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 877 | |
| 878 | mutex_lock(&dma_list_mutex); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 879 | /* take references on public channels */ |
| 880 | if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 881 | list_for_each_entry(chan, &device->channels, device_node) { |
| 882 | /* if clients are already waiting for channels we need |
| 883 | * to take references on their behalf |
| 884 | */ |
| 885 | if (dma_chan_get(chan) == -ENODEV) { |
| 886 | /* note we can only get here for the first |
| 887 | * channel as the remaining channels are |
| 888 | * guaranteed to get a reference |
| 889 | */ |
| 890 | rc = -ENODEV; |
| 891 | mutex_unlock(&dma_list_mutex); |
| 892 | goto err_out; |
| 893 | } |
| 894 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 895 | list_add_tail_rcu(&device->global_node, &dma_device_list); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 896 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 897 | device->privatecnt++; /* Always private */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 898 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 899 | mutex_unlock(&dma_list_mutex); |
| 900 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 901 | return 0; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 902 | |
| 903 | err_out: |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 904 | /* if we never registered a channel just release the idr */ |
| 905 | if (atomic_read(idr_ref) == 0) { |
| 906 | mutex_lock(&dma_list_mutex); |
| 907 | idr_remove(&dma_idr, device->dev_id); |
| 908 | mutex_unlock(&dma_list_mutex); |
| 909 | kfree(idr_ref); |
| 910 | return rc; |
| 911 | } |
| 912 | |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 913 | list_for_each_entry(chan, &device->channels, device_node) { |
| 914 | if (chan->local == NULL) |
| 915 | continue; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 916 | mutex_lock(&dma_list_mutex); |
| 917 | chan->dev->chan = NULL; |
| 918 | mutex_unlock(&dma_list_mutex); |
| 919 | device_unregister(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 920 | free_percpu(chan->local); |
| 921 | } |
| 922 | return rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 923 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 924 | EXPORT_SYMBOL(dma_async_device_register); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 925 | |
| 926 | /** |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 927 | * dma_async_device_unregister - unregister a DMA device |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 928 | * @device: &dma_device |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 929 | * |
| 930 | * This routine is called by dma driver exit routines, dmaengine holds module |
| 931 | * references to prevent it being called while channels are in use. |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 932 | */ |
| 933 | void dma_async_device_unregister(struct dma_device *device) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 934 | { |
| 935 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 936 | |
| 937 | mutex_lock(&dma_list_mutex); |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 938 | list_del_rcu(&device->global_node); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 939 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 940 | mutex_unlock(&dma_list_mutex); |
| 941 | |
| 942 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 943 | WARN_ONCE(chan->client_count, |
| 944 | "%s called while %d clients hold a reference\n", |
| 945 | __func__, chan->client_count); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 946 | mutex_lock(&dma_list_mutex); |
| 947 | chan->dev->chan = NULL; |
| 948 | mutex_unlock(&dma_list_mutex); |
| 949 | device_unregister(&chan->dev->device); |
Anatolij Gustschin | adef477 | 2010-01-26 10:26:06 +0100 | [diff] [blame] | 950 | free_percpu(chan->local); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 951 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 952 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 953 | EXPORT_SYMBOL(dma_async_device_unregister); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 954 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 955 | struct dmaengine_unmap_pool { |
| 956 | struct kmem_cache *cache; |
| 957 | const char *name; |
| 958 | mempool_t *pool; |
| 959 | size_t size; |
| 960 | }; |
| 961 | |
| 962 | #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } |
| 963 | static struct dmaengine_unmap_pool unmap_pool[] = { |
| 964 | __UNMAP_POOL(2), |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 965 | #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 966 | __UNMAP_POOL(16), |
| 967 | __UNMAP_POOL(128), |
| 968 | __UNMAP_POOL(256), |
| 969 | #endif |
| 970 | }; |
| 971 | |
| 972 | static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 973 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 974 | int order = get_count_order(nr); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 975 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 976 | switch (order) { |
| 977 | case 0 ... 1: |
| 978 | return &unmap_pool[0]; |
| 979 | case 2 ... 4: |
| 980 | return &unmap_pool[1]; |
| 981 | case 5 ... 7: |
| 982 | return &unmap_pool[2]; |
| 983 | case 8: |
| 984 | return &unmap_pool[3]; |
| 985 | default: |
| 986 | BUG(); |
| 987 | return NULL; |
| 988 | } |
| 989 | } |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 990 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 991 | static void dmaengine_unmap(struct kref *kref) |
| 992 | { |
| 993 | struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); |
| 994 | struct device *dev = unmap->dev; |
| 995 | int cnt, i; |
| 996 | |
| 997 | cnt = unmap->to_cnt; |
| 998 | for (i = 0; i < cnt; i++) |
| 999 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1000 | DMA_TO_DEVICE); |
| 1001 | cnt += unmap->from_cnt; |
| 1002 | for (; i < cnt; i++) |
| 1003 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1004 | DMA_FROM_DEVICE); |
| 1005 | cnt += unmap->bidi_cnt; |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1006 | for (; i < cnt; i++) { |
| 1007 | if (unmap->addr[i] == 0) |
| 1008 | continue; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1009 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1010 | DMA_BIDIRECTIONAL); |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1011 | } |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1012 | cnt = unmap->map_cnt; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1013 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
| 1014 | } |
| 1015 | |
| 1016 | void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) |
| 1017 | { |
| 1018 | if (unmap) |
| 1019 | kref_put(&unmap->kref, dmaengine_unmap); |
| 1020 | } |
| 1021 | EXPORT_SYMBOL_GPL(dmaengine_unmap_put); |
| 1022 | |
| 1023 | static void dmaengine_destroy_unmap_pool(void) |
| 1024 | { |
| 1025 | int i; |
| 1026 | |
| 1027 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1028 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1029 | |
| 1030 | if (p->pool) |
| 1031 | mempool_destroy(p->pool); |
| 1032 | p->pool = NULL; |
| 1033 | if (p->cache) |
| 1034 | kmem_cache_destroy(p->cache); |
| 1035 | p->cache = NULL; |
| 1036 | } |
| 1037 | } |
| 1038 | |
| 1039 | static int __init dmaengine_init_unmap_pool(void) |
| 1040 | { |
| 1041 | int i; |
| 1042 | |
| 1043 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1044 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1045 | size_t size; |
| 1046 | |
| 1047 | size = sizeof(struct dmaengine_unmap_data) + |
| 1048 | sizeof(dma_addr_t) * p->size; |
| 1049 | |
| 1050 | p->cache = kmem_cache_create(p->name, size, 0, |
| 1051 | SLAB_HWCACHE_ALIGN, NULL); |
| 1052 | if (!p->cache) |
| 1053 | break; |
| 1054 | p->pool = mempool_create_slab_pool(1, p->cache); |
| 1055 | if (!p->pool) |
| 1056 | break; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1057 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1058 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1059 | if (i == ARRAY_SIZE(unmap_pool)) |
| 1060 | return 0; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1061 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1062 | dmaengine_destroy_unmap_pool(); |
| 1063 | return -ENOMEM; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1064 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1065 | |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1066 | struct dmaengine_unmap_data * |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1067 | dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1068 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1069 | struct dmaengine_unmap_data *unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1070 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1071 | unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); |
| 1072 | if (!unmap) |
| 1073 | return NULL; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1074 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1075 | memset(unmap, 0, sizeof(*unmap)); |
| 1076 | kref_init(&unmap->kref); |
| 1077 | unmap->dev = dev; |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1078 | unmap->map_cnt = nr; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1079 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1080 | return unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1081 | } |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1082 | EXPORT_SYMBOL(dmaengine_get_unmap_data); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1083 | |
| 1084 | /** |
| 1085 | * dma_async_memcpy_pg_to_pg - offloaded copy from page to page |
| 1086 | * @chan: DMA channel to offload copy to |
| 1087 | * @dest_pg: destination page |
| 1088 | * @dest_off: offset in page to copy to |
| 1089 | * @src_pg: source page |
| 1090 | * @src_off: offset in page to copy from |
| 1091 | * @len: length |
| 1092 | * |
| 1093 | * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus |
| 1094 | * address according to the DMA mapping API rules for streaming mappings. |
| 1095 | * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident |
| 1096 | * (kernel memory or locked user space pages). |
| 1097 | */ |
| 1098 | dma_cookie_t |
| 1099 | dma_async_memcpy_pg_to_pg(struct dma_chan *chan, struct page *dest_pg, |
| 1100 | unsigned int dest_off, struct page *src_pg, unsigned int src_off, |
| 1101 | size_t len) |
| 1102 | { |
| 1103 | struct dma_device *dev = chan->device; |
| 1104 | struct dma_async_tx_descriptor *tx; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1105 | struct dmaengine_unmap_data *unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1106 | dma_cookie_t cookie; |
Maciej Sosnowski | 4f005db | 2009-04-23 12:31:51 +0200 | [diff] [blame] | 1107 | unsigned long flags; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1108 | |
Dan Williams | 8194ee2 | 2013-12-13 00:57:03 -0800 | [diff] [blame] | 1109 | unmap = dmaengine_get_unmap_data(dev->dev, 2, GFP_NOWAIT); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1110 | if (!unmap) |
| 1111 | return -ENOMEM; |
| 1112 | |
| 1113 | unmap->to_cnt = 1; |
| 1114 | unmap->from_cnt = 1; |
| 1115 | unmap->addr[0] = dma_map_page(dev->dev, src_pg, src_off, len, |
| 1116 | DMA_TO_DEVICE); |
| 1117 | unmap->addr[1] = dma_map_page(dev->dev, dest_pg, dest_off, len, |
| 1118 | DMA_FROM_DEVICE); |
| 1119 | unmap->len = len; |
Maciej Sosnowski | 4f005db | 2009-04-23 12:31:51 +0200 | [diff] [blame] | 1120 | flags = DMA_CTRL_ACK; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1121 | tx = dev->device_prep_dma_memcpy(chan, unmap->addr[1], unmap->addr[0], |
| 1122 | len, flags); |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1123 | |
| 1124 | if (!tx) { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1125 | dmaengine_unmap_put(unmap); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1126 | return -ENOMEM; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1127 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1128 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1129 | dma_set_unmap(tx, unmap); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1130 | cookie = tx->tx_submit(tx); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1131 | dmaengine_unmap_put(unmap); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1132 | |
Christoph Lameter | e7dcaa4 | 2009-10-03 19:48:23 +0900 | [diff] [blame] | 1133 | preempt_disable(); |
| 1134 | __this_cpu_add(chan->local->bytes_transferred, len); |
| 1135 | __this_cpu_inc(chan->local->memcpy_count); |
| 1136 | preempt_enable(); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1137 | |
| 1138 | return cookie; |
| 1139 | } |
| 1140 | EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg); |
| 1141 | |
Dan Williams | 56ea27f | 2013-10-18 19:35:22 +0200 | [diff] [blame] | 1142 | /** |
| 1143 | * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses |
| 1144 | * @chan: DMA channel to offload copy to |
| 1145 | * @dest: destination address (virtual) |
| 1146 | * @src: source address (virtual) |
| 1147 | * @len: length |
| 1148 | * |
| 1149 | * Both @dest and @src must be mappable to a bus address according to the |
| 1150 | * DMA mapping API rules for streaming mappings. |
| 1151 | * Both @dest and @src must stay memory resident (kernel memory or locked |
| 1152 | * user space pages). |
| 1153 | */ |
| 1154 | dma_cookie_t |
| 1155 | dma_async_memcpy_buf_to_buf(struct dma_chan *chan, void *dest, |
| 1156 | void *src, size_t len) |
| 1157 | { |
| 1158 | return dma_async_memcpy_pg_to_pg(chan, virt_to_page(dest), |
| 1159 | (unsigned long) dest & ~PAGE_MASK, |
| 1160 | virt_to_page(src), |
| 1161 | (unsigned long) src & ~PAGE_MASK, len); |
| 1162 | } |
| 1163 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf); |
| 1164 | |
| 1165 | /** |
| 1166 | * dma_async_memcpy_buf_to_pg - offloaded copy from address to page |
| 1167 | * @chan: DMA channel to offload copy to |
| 1168 | * @page: destination page |
| 1169 | * @offset: offset in page to copy to |
| 1170 | * @kdata: source address (virtual) |
| 1171 | * @len: length |
| 1172 | * |
| 1173 | * Both @page/@offset and @kdata must be mappable to a bus address according |
| 1174 | * to the DMA mapping API rules for streaming mappings. |
| 1175 | * Both @page/@offset and @kdata must stay memory resident (kernel memory or |
| 1176 | * locked user space pages) |
| 1177 | */ |
| 1178 | dma_cookie_t |
| 1179 | dma_async_memcpy_buf_to_pg(struct dma_chan *chan, struct page *page, |
| 1180 | unsigned int offset, void *kdata, size_t len) |
| 1181 | { |
| 1182 | return dma_async_memcpy_pg_to_pg(chan, page, offset, |
| 1183 | virt_to_page(kdata), |
| 1184 | (unsigned long) kdata & ~PAGE_MASK, len); |
| 1185 | } |
| 1186 | EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg); |
| 1187 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1188 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, |
| 1189 | struct dma_chan *chan) |
| 1190 | { |
| 1191 | tx->chan = chan; |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 1192 | #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1193 | spin_lock_init(&tx->lock); |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1194 | #endif |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1195 | } |
| 1196 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); |
| 1197 | |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1198 | /* dma_wait_for_async_tx - spin wait for a transaction to complete |
| 1199 | * @tx: in-flight transaction to wait on |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1200 | */ |
| 1201 | enum dma_status |
| 1202 | dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 1203 | { |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1204 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1205 | |
| 1206 | if (!tx) |
Vinod Koul | adfedd9 | 2013-10-16 13:29:02 +0530 | [diff] [blame] | 1207 | return DMA_COMPLETE; |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1208 | |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1209 | while (tx->cookie == -EBUSY) { |
| 1210 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
| 1211 | pr_err("%s timeout waiting for descriptor submission\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 1212 | __func__); |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1213 | return DMA_ERROR; |
| 1214 | } |
| 1215 | cpu_relax(); |
| 1216 | } |
| 1217 | return dma_sync_wait(tx->chan, tx->cookie); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1218 | } |
| 1219 | EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); |
| 1220 | |
| 1221 | /* dma_run_dependencies - helper routine for dma drivers to process |
| 1222 | * (start) dependent operations on their target channel |
| 1223 | * @tx: transaction with dependencies |
| 1224 | */ |
| 1225 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx) |
| 1226 | { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1227 | struct dma_async_tx_descriptor *dep = txd_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1228 | struct dma_async_tx_descriptor *dep_next; |
| 1229 | struct dma_chan *chan; |
| 1230 | |
| 1231 | if (!dep) |
| 1232 | return; |
| 1233 | |
Yuri Tikhonov | dd59b85 | 2009-01-12 15:17:20 -0700 | [diff] [blame] | 1234 | /* we'll submit tx->next now, so clear the link */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1235 | txd_clear_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1236 | chan = dep->chan; |
| 1237 | |
| 1238 | /* keep submitting up until a channel switch is detected |
| 1239 | * in that case we will be called again as a result of |
| 1240 | * processing the interrupt from async_tx_channel_switch |
| 1241 | */ |
| 1242 | for (; dep; dep = dep_next) { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1243 | txd_lock(dep); |
| 1244 | txd_clear_parent(dep); |
| 1245 | dep_next = txd_next(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1246 | if (dep_next && dep_next->chan == chan) |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1247 | txd_clear_next(dep); /* ->next will be submitted */ |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1248 | else |
| 1249 | dep_next = NULL; /* submit current dep and terminate */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1250 | txd_unlock(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1251 | |
| 1252 | dep->tx_submit(dep); |
| 1253 | } |
| 1254 | |
| 1255 | chan->device->device_issue_pending(chan); |
| 1256 | } |
| 1257 | EXPORT_SYMBOL_GPL(dma_run_dependencies); |
| 1258 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1259 | static int __init dma_bus_init(void) |
| 1260 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1261 | int err = dmaengine_init_unmap_pool(); |
| 1262 | |
| 1263 | if (err) |
| 1264 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1265 | return class_register(&dma_devclass); |
| 1266 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 1267 | arch_initcall(dma_bus_init); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1268 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1269 | |