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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata-legacy.c - Legacy port PATA/SATA controller driver.
Alan Coxab771632008-10-27 15:09:10 +00003 * Copyright 2005/2006 Red Hat, all rights reserved.
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * An ATA driver for the legacy ATA ports.
20 *
21 * Data Sources:
22 * Opti 82C465/82C611 support: Data sheets at opti-inc.com
23 * HT6560 series:
24 * Promise 20230/20620:
25 * http://www.ryston.cz/petr/vlb/pdc20230b.html
26 * http://www.ryston.cz/petr/vlb/pdc20230c.html
27 * http://www.ryston.cz/petr/vlb/pdc20630.html
28 *
29 * Unsupported but docs exist:
30 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
Jeff Garzik669a5db2006-08-29 18:12:40 -040031 *
32 * This driver handles legacy (that is "ISA/VLB side") IDE ports found
33 * on PC class systems. There are three hybrid devices that are exceptions
34 * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
35 * the MPIIX where the tuning is PCI side but the IDE is "ISA side".
36 *
37 * Specific support is included for the ht6560a/ht6560b/opti82c611a/
Alan Coxb8325482008-01-19 15:47:23 +000038 * opti82c465mv/promise 20230c/20630/winbond83759A
Jeff Garzik669a5db2006-08-29 18:12:40 -040039 *
40 * Use the autospeed and pio_mask options with:
41 * Appian ADI/2 aka CLPD7220 or AIC25VL01.
42 * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with
43 * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759,
44 * Winbond W83759A, Promise PDC20230-B
45 *
46 * For now use autospeed and pio_mask as above with the W83759A. This may
47 * change.
48 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040049 */
50
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/pci.h>
54#include <linux/init.h>
55#include <linux/blkdev.h>
56#include <linux/delay.h>
57#include <scsi/scsi_host.h>
58#include <linux/ata.h>
59#include <linux/libata.h>
60#include <linux/platform_device.h>
61
62#define DRV_NAME "pata_legacy"
Alan Coxb8325482008-01-19 15:47:23 +000063#define DRV_VERSION "0.6.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040064
65#define NR_HOST 6
66
Alan Coxdefc9cd2008-01-10 14:33:10 -080067static int all;
68module_param(all, int, 0444);
69MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
Jeff Garzik669a5db2006-08-29 18:12:40 -040070
71struct legacy_data {
72 unsigned long timing;
73 u8 clock[2];
74 u8 last;
75 int fast;
76 struct platform_device *platform_dev;
77
78};
79
Alan Coxdefc9cd2008-01-10 14:33:10 -080080enum controller {
81 BIOS = 0,
82 SNOOP = 1,
83 PDC20230 = 2,
84 HT6560A = 3,
85 HT6560B = 4,
86 OPTI611A = 5,
87 OPTI46X = 6,
88 QDI6500 = 7,
89 QDI6580 = 8,
90 QDI6580DP = 9, /* Dual channel mode is different */
Alan Coxb8325482008-01-19 15:47:23 +000091 W83759A = 10,
Alan Coxdefc9cd2008-01-10 14:33:10 -080092
93 UNKNOWN = -1
94};
95
96
97struct legacy_probe {
98 unsigned char *name;
99 unsigned long port;
100 unsigned int irq;
101 unsigned int slot;
102 enum controller type;
103 unsigned long private;
104};
105
106struct legacy_controller {
107 const char *name;
108 struct ata_port_operations *ops;
109 unsigned int pio_mask;
110 unsigned int flags;
Alan Coxb8325482008-01-19 15:47:23 +0000111 int (*setup)(struct platform_device *, struct legacy_probe *probe,
112 struct legacy_data *data);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800113};
114
115static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
116
117static struct legacy_probe probe_list[NR_HOST];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400118static struct legacy_data legacy_data[NR_HOST];
119static struct ata_host *legacy_host[NR_HOST];
120static int nr_legacy_host;
121
122
Alan Coxdefc9cd2008-01-10 14:33:10 -0800123static int probe_all; /* Set to check all ISA port ranges */
124static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */
125static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */
126static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
127static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
128static int qdi; /* Set to probe QDI controllers */
Alan Coxb8325482008-01-19 15:47:23 +0000129static int winbond; /* Set to probe Winbond controllers,
Alan Cox83972482008-02-08 15:23:38 +0000130 give I/O port if non standard */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800131static int autospeed; /* Chip present which snoops speed changes */
132static int pio_mask = 0x1F; /* PIO range for autospeed devices */
Alan Coxf834e492007-02-07 13:46:00 -0800133static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400134
135/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800136 * legacy_probe_add - Add interface to probe list
137 * @port: Controller port
138 * @irq: IRQ number
139 * @type: Controller type
140 * @private: Controller specific info
141 *
142 * Add an entry into the probe list for ATA controllers. This is used
143 * to add the default ISA slots and then to build up the table
144 * further according to other ISA/VLB/Weird device scans
145 *
146 * An I/O port list is used to keep ordering stable and sane, as we
147 * don't have any good way to talk about ordering otherwise
148 */
149
150static int legacy_probe_add(unsigned long port, unsigned int irq,
151 enum controller type, unsigned long private)
152{
153 struct legacy_probe *lp = &probe_list[0];
154 int i;
155 struct legacy_probe *free = NULL;
156
157 for (i = 0; i < NR_HOST; i++) {
158 if (lp->port == 0 && free == NULL)
159 free = lp;
160 /* Matching port, or the correct slot for ordering */
161 if (lp->port == port || legacy_port[i] == port) {
162 free = lp;
163 break;
164 }
165 lp++;
166 }
167 if (free == NULL) {
168 printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
169 return -1;
170 }
171 /* Fill in the entry for later probing */
172 free->port = port;
173 free->irq = irq;
174 free->type = type;
175 free->private = private;
176 return 0;
177}
178
179
180/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400181 * legacy_set_mode - mode setting
Tejun Heo02607312007-08-06 18:36:23 +0900182 * @link: IDE link
Alanb229a7b2007-01-24 11:47:07 +0000183 * @unused: Device that failed when error is returned
Jeff Garzik669a5db2006-08-29 18:12:40 -0400184 *
185 * Use a non standard set_mode function. We don't want to be tuned.
186 *
187 * The BIOS configured everything. Our job is not to fiddle. Just use
188 * whatever PIO the hardware is using and leave it at that. When we
189 * get some kind of nice user driven API for control then we can
190 * expand on this as per hdparm in the base kernel.
191 */
192
Tejun Heo02607312007-08-06 18:36:23 +0900193static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400194{
Tejun Heof58229f2007-08-06 18:36:23 +0900195 struct ata_device *dev;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400196
Tejun Heo02607312007-08-06 18:36:23 +0900197 ata_link_for_each_dev(dev, link) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400198 if (ata_dev_enabled(dev)) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800199 ata_dev_printk(dev, KERN_INFO,
200 "configured for PIO\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400201 dev->pio_mode = XFER_PIO_0;
202 dev->xfer_mode = XFER_PIO_0;
203 dev->xfer_shift = ATA_SHIFT_PIO;
204 dev->flags |= ATA_DFLAG_PIO;
205 }
206 }
Alanb229a7b2007-01-24 11:47:07 +0000207 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400208}
209
210static struct scsi_host_template legacy_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900211 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400212};
213
Tejun Heo029cfd62008-03-25 12:22:49 +0900214static const struct ata_port_operations legacy_base_port_ops = {
215 .inherits = &ata_sff_port_ops,
216 .cable_detect = ata_cable_40wire,
217};
218
Jeff Garzik669a5db2006-08-29 18:12:40 -0400219/*
220 * These ops are used if the user indicates the hardware
221 * snoops the commands to decide on the mode and handles the
222 * mode selection "magically" itself. Several legacy controllers
223 * do this. The mode range can be set if it is not 0x1F by setting
224 * pio_mask as well.
225 */
226
227static struct ata_port_operations simple_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900228 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900229 .sff_data_xfer = ata_sff_data_xfer_noirq,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400230};
231
232static struct ata_port_operations legacy_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900233 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900234 .sff_data_xfer = ata_sff_data_xfer_noirq,
Tejun Heo029cfd62008-03-25 12:22:49 +0900235 .set_mode = legacy_set_mode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400236};
237
238/*
239 * Promise 20230C and 20620 support
240 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800241 * This controller supports PIO0 to PIO2. We set PIO timings
242 * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA
243 * support is weird being DMA to controller and PIO'd to the host
244 * and not supported.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400245 */
246
247static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
248{
249 int tries = 5;
250 int pio = adev->pio_mode - XFER_PIO_0;
251 u8 rt;
252 unsigned long flags;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400253
Jeff Garzik669a5db2006-08-29 18:12:40 -0400254 /* Safe as UP only. Force I/Os to occur together */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400255
Jeff Garzik669a5db2006-08-29 18:12:40 -0400256 local_irq_save(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400257
Jeff Garzik669a5db2006-08-29 18:12:40 -0400258 /* Unlock the control interface */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800259 do {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400260 inb(0x1F5);
261 outb(inb(0x1F2) | 0x80, 0x1F2);
262 inb(0x1F2);
263 inb(0x3F6);
264 inb(0x3F6);
265 inb(0x1F2);
266 inb(0x1F2);
267 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800268 while ((inb(0x1F2) & 0x80) && --tries);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400269
270 local_irq_restore(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400271
Jeff Garzik669a5db2006-08-29 18:12:40 -0400272 outb(inb(0x1F4) & 0x07, 0x1F4);
273
274 rt = inb(0x1F3);
275 rt &= 0x07 << (3 * adev->devno);
276 if (pio)
277 rt |= (1 + 3 * pio) << (3 * adev->devno);
278
279 udelay(100);
280 outb(inb(0x1F2) | 0x01, 0x1F2);
281 udelay(100);
282 inb(0x1F5);
283
284}
285
Tejun Heo55dba312007-12-05 16:43:07 +0900286static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800287 unsigned char *buf, unsigned int buflen, int rw)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400288{
Andrew Mortonc294f1b2008-01-15 15:42:37 -0800289 if (ata_id_has_dword_io(dev->id)) {
Tejun Heo55dba312007-12-05 16:43:07 +0900290 struct ata_port *ap = dev->link->ap;
291 int slop = buflen & 3;
292 unsigned long flags;
293
Jeff Garzik669a5db2006-08-29 18:12:40 -0400294 local_irq_save(flags);
295
296 /* Perform the 32bit I/O synchronization sequence */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900297 ioread8(ap->ioaddr.nsect_addr);
298 ioread8(ap->ioaddr.nsect_addr);
299 ioread8(ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400300
301 /* Now the data */
Tejun Heo55dba312007-12-05 16:43:07 +0900302 if (rw == READ)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900303 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Tejun Heo55dba312007-12-05 16:43:07 +0900304 else
305 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400306
307 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700308 __le32 pad;
Tejun Heo55dba312007-12-05 16:43:07 +0900309 if (rw == READ) {
Al Virob50e56d2008-01-12 14:16:14 +0000310 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Jeff Garzik669a5db2006-08-29 18:12:40 -0400311 memcpy(buf + buflen - slop, &pad, slop);
Tejun Heo55dba312007-12-05 16:43:07 +0900312 } else {
313 memcpy(&pad, buf + buflen - slop, slop);
314 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400315 }
Tejun Heo55dba312007-12-05 16:43:07 +0900316 buflen += 4 - slop;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400317 }
318 local_irq_restore(flags);
Tejun Heo55dba312007-12-05 16:43:07 +0900319 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900320 buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
Tejun Heo55dba312007-12-05 16:43:07 +0900321
322 return buflen;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400323}
324
325static struct ata_port_operations pdc20230_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900326 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400327 .set_piomode = pdc20230_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900328 .sff_data_xfer = pdc_data_xfer_vlb,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400329};
330
331/*
332 * Holtek 6560A support
333 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800334 * This controller supports PIO0 to PIO2 (no IORDY even though higher
335 * timings can be loaded).
Jeff Garzik669a5db2006-08-29 18:12:40 -0400336 */
337
338static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
339{
340 u8 active, recover;
341 struct ata_timing t;
342
343 /* Get the timing data in cycles. For now play safe at 50Mhz */
344 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
345
Harvey Harrison07633b52008-05-14 16:17:00 -0700346 active = clamp_val(t.active, 2, 15);
347 recover = clamp_val(t.recover, 4, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400348
349 inb(0x3E6);
350 inb(0x3E6);
351 inb(0x3E6);
352 inb(0x3E6);
353
Tejun Heo0d5ff562007-02-01 15:06:36 +0900354 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
355 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400356}
357
358static struct ata_port_operations ht6560a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900359 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400360 .set_piomode = ht6560a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400361};
362
363/*
364 * Holtek 6560B support
365 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800366 * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO
367 * setting unless we see an ATAPI device in which case we force it off.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400368 *
369 * FIXME: need to implement 2nd channel support.
370 */
371
372static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
373{
374 u8 active, recover;
375 struct ata_timing t;
376
377 /* Get the timing data in cycles. For now play safe at 50Mhz */
378 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
379
Harvey Harrison07633b52008-05-14 16:17:00 -0700380 active = clamp_val(t.active, 2, 15);
381 recover = clamp_val(t.recover, 2, 16);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400382 recover &= 0x15;
383
384 inb(0x3E6);
385 inb(0x3E6);
386 inb(0x3E6);
387 inb(0x3E6);
388
Tejun Heo0d5ff562007-02-01 15:06:36 +0900389 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400390
391 if (adev->class != ATA_DEV_ATA) {
392 u8 rconf = inb(0x3E6);
393 if (rconf & 0x24) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800394 rconf &= ~0x24;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400395 outb(rconf, 0x3E6);
396 }
397 }
Tejun Heo0d5ff562007-02-01 15:06:36 +0900398 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400399}
400
401static struct ata_port_operations ht6560b_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900402 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400403 .set_piomode = ht6560b_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400404};
405
406/*
407 * Opti core chipset helpers
408 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400409
Jeff Garzik669a5db2006-08-29 18:12:40 -0400410/**
411 * opti_syscfg - read OPTI chipset configuration
412 * @reg: Configuration register to read
413 *
414 * Returns the value of an OPTI system board configuration register.
415 */
416
417static u8 opti_syscfg(u8 reg)
418{
419 unsigned long flags;
420 u8 r;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400421
Jeff Garzik669a5db2006-08-29 18:12:40 -0400422 /* Uniprocessor chipset and must force cycles adjancent */
423 local_irq_save(flags);
424 outb(reg, 0x22);
425 r = inb(0x24);
426 local_irq_restore(flags);
427 return r;
428}
429
430/*
431 * Opti 82C611A
432 *
433 * This controller supports PIO0 to PIO3.
434 */
435
Alan Coxdefc9cd2008-01-10 14:33:10 -0800436static void opti82c611a_set_piomode(struct ata_port *ap,
437 struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400438{
439 u8 active, recover, setup;
440 struct ata_timing t;
441 struct ata_device *pair = ata_dev_pair(adev);
442 int clock;
443 int khz[4] = { 50000, 40000, 33000, 25000 };
444 u8 rc;
445
446 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900447 ioread16(ap->ioaddr.error_addr);
448 ioread16(ap->ioaddr.error_addr);
449 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400450
451 /* Read VLB clock strapping */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900452 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400453
454 /* Get the timing data in cycles */
455 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
456
457 /* Setup timing is shared */
458 if (pair) {
459 struct ata_timing tp;
460 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
461
462 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
463 }
464
Harvey Harrison07633b52008-05-14 16:17:00 -0700465 active = clamp_val(t.active, 2, 17) - 2;
466 recover = clamp_val(t.recover, 1, 16) - 1;
467 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400468
469 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900470 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400471 rc &= 0x7F;
472 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900473 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400474
475 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900476 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400477
478 /* Select the right bank for read timings, also
479 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900480 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400481 rc &= 0xC0;
482 rc |= adev->devno; /* Index select */
483 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900484 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400485
486 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900487 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400488
489 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900490 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400491 rc &= 0x73;
492 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900493 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400494
495 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900496 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400497}
498
499
500static struct ata_port_operations opti82c611a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900501 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400502 .set_piomode = opti82c611a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400503};
504
505/*
506 * Opti 82C465MV
507 *
508 * This controller supports PIO0 to PIO3. Unlike the 611A the MVB
509 * version is dual channel but doesn't have a lot of unique registers.
510 */
511
512static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
513{
514 u8 active, recover, setup;
515 struct ata_timing t;
516 struct ata_device *pair = ata_dev_pair(adev);
517 int clock;
518 int khz[4] = { 50000, 40000, 33000, 25000 };
519 u8 rc;
520 u8 sysclk;
521
522 /* Get the clock */
523 sysclk = opti_syscfg(0xAC) & 0xC0; /* BIOS set */
524
525 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900526 ioread16(ap->ioaddr.error_addr);
527 ioread16(ap->ioaddr.error_addr);
528 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400529
530 /* Read VLB clock strapping */
531 clock = 1000000000 / khz[sysclk];
532
533 /* Get the timing data in cycles */
534 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
535
536 /* Setup timing is shared */
537 if (pair) {
538 struct ata_timing tp;
539 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
540
541 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
542 }
543
Harvey Harrison07633b52008-05-14 16:17:00 -0700544 active = clamp_val(t.active, 2, 17) - 2;
545 recover = clamp_val(t.recover, 1, 16) - 1;
546 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400547
548 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900549 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400550 rc &= 0x7F;
551 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900552 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400553
554 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900555 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400556
557 /* Select the right bank for read timings, also
558 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900559 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400560 rc &= 0xC0;
561 rc |= adev->devno; /* Index select */
562 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900563 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400564
565 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900566 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400567
568 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900569 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400570 rc &= 0x73;
571 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900572 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400573
574 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900575 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400576
577 /* We need to know this for quad device on the MVB */
578 ap->host->private_data = ap;
579}
580
581/**
Tejun Heo9363c382008-04-07 22:47:16 +0900582 * opt82c465mv_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400583 * @qc: command pending
584 *
585 * Called when the libata layer is about to issue a command. We wrap
586 * this interface so that we can load the correct ATA timings. The
587 * MVB has a single set of timing registers and these are shared
588 * across channels. As there are two registers we really ought to
589 * track the last two used values as a sort of register window. For
590 * now we just reload on a channel switch. On the single channel
591 * setup this condition never fires so we do nothing extra.
592 *
593 * FIXME: dual channel needs ->serialize support
594 */
595
Tejun Heo9363c382008-04-07 22:47:16 +0900596static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400597{
598 struct ata_port *ap = qc->ap;
599 struct ata_device *adev = qc->dev;
600
601 /* If timings are set and for the wrong channel (2nd test is
602 due to a libata shortcoming and will eventually go I hope) */
603 if (ap->host->private_data != ap->host
604 && ap->host->private_data != NULL)
605 opti82c46x_set_piomode(ap, adev);
606
Tejun Heo9363c382008-04-07 22:47:16 +0900607 return ata_sff_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400608}
609
610static struct ata_port_operations opti82c46x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900611 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400612 .set_piomode = opti82c46x_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900613 .qc_issue = opti82c46x_qc_issue,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400614};
615
Alan Coxdefc9cd2008-01-10 14:33:10 -0800616static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
617{
618 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800619 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800620 int active, recovery;
621 u8 timing;
622
623 /* Get the timing data in cycles */
624 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
625
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800626 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700627 active = 8 - clamp_val(t.active, 1, 8);
628 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800629 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700630 active = 9 - clamp_val(t.active, 2, 9);
631 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800632 }
633 timing = (recovery << 4) | active | 0x08;
634
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800635 ld_qdi->clock[adev->devno] = timing;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800636
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800637 outb(timing, ld_qdi->timing);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800638}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400639
640/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800641 * qdi6580dp_set_piomode - PIO setup for dual channel
642 * @ap: Port
643 * @adev: Device
Jeff Garzik669a5db2006-08-29 18:12:40 -0400644 * @irq: interrupt line
645 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800646 * In dual channel mode the 6580 has one clock per channel and we have
Tejun Heo9363c382008-04-07 22:47:16 +0900647 * to software clockswitch in qc_issue.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400648 */
649
Alan Coxdefc9cd2008-01-10 14:33:10 -0800650static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400651{
Alan Coxdefc9cd2008-01-10 14:33:10 -0800652 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800653 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800654 int active, recovery;
655 u8 timing;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400656
Alan Coxdefc9cd2008-01-10 14:33:10 -0800657 /* Get the timing data in cycles */
658 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
Tejun Heo24dc5f32007-01-20 16:00:28 +0900659
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800660 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700661 active = 8 - clamp_val(t.active, 1, 8);
662 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800663 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700664 active = 9 - clamp_val(t.active, 2, 9);
665 recovery = 15 - clamp_val(t.recover, 0, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400666 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800667 timing = (recovery << 4) | active | 0x08;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400668
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800669 ld_qdi->clock[adev->devno] = timing;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400670
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800671 outb(timing, ld_qdi->timing + 2 * ap->port_no);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800672 /* Clear the FIFO */
673 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800674 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800675}
676
677/**
678 * qdi6580_set_piomode - PIO setup for single channel
679 * @ap: Port
680 * @adev: Device
681 *
682 * In single channel mode the 6580 has one clock per device and we can
683 * avoid the requirement to clock switch. We also have to load the timing
684 * into the right clock according to whether we are master or slave.
685 */
686
687static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
688{
689 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800690 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800691 int active, recovery;
692 u8 timing;
693
694 /* Get the timing data in cycles */
695 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
696
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800697 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700698 active = 8 - clamp_val(t.active, 1, 8);
699 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800700 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700701 active = 9 - clamp_val(t.active, 2, 9);
702 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800703 }
704 timing = (recovery << 4) | active | 0x08;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800705 ld_qdi->clock[adev->devno] = timing;
706 outb(timing, ld_qdi->timing + 2 * adev->devno);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800707 /* Clear the FIFO */
708 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800709 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800710}
711
712/**
Tejun Heo9363c382008-04-07 22:47:16 +0900713 * qdi_qc_issue - command issue
Alan Coxdefc9cd2008-01-10 14:33:10 -0800714 * @qc: command pending
715 *
716 * Called when the libata layer is about to issue a command. We wrap
717 * this interface so that we can load the correct ATA timings.
718 */
719
Tejun Heo9363c382008-04-07 22:47:16 +0900720static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800721{
722 struct ata_port *ap = qc->ap;
723 struct ata_device *adev = qc->dev;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800724 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800725
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800726 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800727 if (adev->pio_mode) {
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800728 ld_qdi->last = ld_qdi->clock[adev->devno];
729 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
Alan Coxdefc9cd2008-01-10 14:33:10 -0800730 2 * ap->port_no);
731 }
732 }
Tejun Heo9363c382008-04-07 22:47:16 +0900733 return ata_sff_qc_issue(qc);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800734}
735
Alan Coxb8325482008-01-19 15:47:23 +0000736static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800737 unsigned int buflen, int rw)
738{
739 struct ata_port *ap = adev->link->ap;
740 int slop = buflen & 3;
741
742 if (ata_id_has_dword_io(adev->id)) {
743 if (rw == WRITE)
744 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
745 else
746 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
747
748 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700749 __le32 pad;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800750 if (rw == WRITE) {
751 memcpy(&pad, buf + buflen - slop, slop);
Harvey Harrison6ad67402008-06-18 17:16:43 -0700752 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800753 } else {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700754 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Alan Coxdefc9cd2008-01-10 14:33:10 -0800755 memcpy(buf + buflen - slop, &pad, slop);
756 }
757 }
758 return (buflen + 3) & ~3;
759 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900760 return ata_sff_data_xfer(adev, buf, buflen, rw);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800761}
762
Alan Coxb8325482008-01-19 15:47:23 +0000763static int qdi_port(struct platform_device *dev,
764 struct legacy_probe *lp, struct legacy_data *ld)
765{
766 if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
767 return -EBUSY;
768 ld->timing = lp->private;
769 return 0;
770}
771
Alan Coxdefc9cd2008-01-10 14:33:10 -0800772static struct ata_port_operations qdi6500_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900773 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800774 .set_piomode = qdi6500_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900775 .qc_issue = qdi_qc_issue,
Tejun Heo5682ed32008-04-07 22:47:16 +0900776 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800777};
778
779static struct ata_port_operations qdi6580_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900780 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800781 .set_piomode = qdi6580_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900782 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800783};
784
785static struct ata_port_operations qdi6580dp_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900786 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800787 .set_piomode = qdi6580dp_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900788 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800789};
790
Alan Coxb8325482008-01-19 15:47:23 +0000791static DEFINE_SPINLOCK(winbond_lock);
792
793static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
794{
795 unsigned long flags;
796 spin_lock_irqsave(&winbond_lock, flags);
797 outb(reg, port + 0x01);
798 outb(val, port + 0x02);
799 spin_unlock_irqrestore(&winbond_lock, flags);
800}
801
802static u8 winbond_readcfg(unsigned long port, u8 reg)
803{
804 u8 val;
805
806 unsigned long flags;
807 spin_lock_irqsave(&winbond_lock, flags);
808 outb(reg, port + 0x01);
809 val = inb(port + 0x02);
810 spin_unlock_irqrestore(&winbond_lock, flags);
811
812 return val;
813}
814
815static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
816{
817 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800818 struct legacy_data *ld_winbond = ap->host->private_data;
Alan Coxb8325482008-01-19 15:47:23 +0000819 int active, recovery;
820 u8 reg;
821 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
822
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800823 reg = winbond_readcfg(ld_winbond->timing, 0x81);
Alan Coxb8325482008-01-19 15:47:23 +0000824
825 /* Get the timing data in cycles */
826 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
827 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
828 else
829 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
830
Harvey Harrison07633b52008-05-14 16:17:00 -0700831 active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
832 recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
Alan Coxb8325482008-01-19 15:47:23 +0000833 timing = (active << 4) | recovery;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800834 winbond_writecfg(ld_winbond->timing, timing, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000835
836 /* Load the setup timing */
837
838 reg = 0x35;
839 if (adev->class != ATA_DEV_ATA)
840 reg |= 0x08; /* FIFO off */
841 if (!ata_pio_need_iordy(adev))
842 reg |= 0x02; /* IORDY off */
Harvey Harrison07633b52008-05-14 16:17:00 -0700843 reg |= (clamp_val(t.setup, 0, 3) << 6);
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800844 winbond_writecfg(ld_winbond->timing, timing + 1, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000845}
846
847static int winbond_port(struct platform_device *dev,
848 struct legacy_probe *lp, struct legacy_data *ld)
849{
850 if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
851 return -EBUSY;
852 ld->timing = lp->private;
853 return 0;
854}
855
856static struct ata_port_operations winbond_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900857 .inherits = &legacy_base_port_ops,
Alan Coxb8325482008-01-19 15:47:23 +0000858 .set_piomode = winbond_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900859 .sff_data_xfer = vlb32_data_xfer,
Alan Coxb8325482008-01-19 15:47:23 +0000860};
861
Alan Coxdefc9cd2008-01-10 14:33:10 -0800862static struct legacy_controller controllers[] = {
863 {"BIOS", &legacy_port_ops, 0x1F,
864 ATA_FLAG_NO_IORDY, NULL },
865 {"Snooping", &simple_port_ops, 0x1F,
866 0 , NULL },
867 {"PDC20230", &pdc20230_port_ops, 0x7,
868 ATA_FLAG_NO_IORDY, NULL },
869 {"HT6560A", &ht6560a_port_ops, 0x07,
870 ATA_FLAG_NO_IORDY, NULL },
871 {"HT6560B", &ht6560b_port_ops, 0x1F,
872 ATA_FLAG_NO_IORDY, NULL },
873 {"OPTI82C611A", &opti82c611a_port_ops, 0x0F,
874 0 , NULL },
875 {"OPTI82C46X", &opti82c46x_port_ops, 0x0F,
876 0 , NULL },
877 {"QDI6500", &qdi6500_port_ops, 0x07,
Alan Coxb8325482008-01-19 15:47:23 +0000878 ATA_FLAG_NO_IORDY, qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800879 {"QDI6580", &qdi6580_port_ops, 0x1F,
Alan Coxb8325482008-01-19 15:47:23 +0000880 0 , qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800881 {"QDI6580DP", &qdi6580dp_port_ops, 0x1F,
Alan Coxb8325482008-01-19 15:47:23 +0000882 0 , qdi_port },
883 {"W83759A", &winbond_port_ops, 0x1F,
884 0 , winbond_port }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800885};
886
887/**
888 * probe_chip_type - Discover controller
889 * @probe: Probe entry to check
890 *
891 * Probe an ATA port and identify the type of controller. We don't
892 * check if the controller appears to be driveless at this point.
893 */
894
Alan Coxb8325482008-01-19 15:47:23 +0000895static __init int probe_chip_type(struct legacy_probe *probe)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800896{
897 int mask = 1 << probe->slot;
898
Alan Coxb8325482008-01-19 15:47:23 +0000899 if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
900 u8 reg = winbond_readcfg(winbond, 0x81);
901 reg |= 0x80; /* jumpered mode off */
902 winbond_writecfg(winbond, 0x81, reg);
903 reg = winbond_readcfg(winbond, 0x83);
904 reg |= 0xF0; /* local control */
905 winbond_writecfg(winbond, 0x83, reg);
906 reg = winbond_readcfg(winbond, 0x85);
907 reg |= 0xF0; /* programmable timing */
908 winbond_writecfg(winbond, 0x85, reg);
909
910 reg = winbond_readcfg(winbond, 0x81);
911
912 if (reg & mask)
913 return W83759A;
914 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800915 if (probe->port == 0x1F0) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400916 unsigned long flags;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400917 local_irq_save(flags);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400918 /* Probes */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400919 outb(inb(0x1F2) | 0x80, 0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800920 inb(0x1F5);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400921 inb(0x1F2);
922 inb(0x3F6);
923 inb(0x3F6);
924 inb(0x1F2);
925 inb(0x1F2);
926
927 if ((inb(0x1F2) & 0x80) == 0) {
928 /* PDC20230c or 20630 ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800929 printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller"
930 " detected.\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400931 udelay(100);
932 inb(0x1F5);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800933 local_irq_restore(flags);
934 return PDC20230;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400935 } else {
936 outb(0x55, 0x1F2);
937 inb(0x1F2);
938 inb(0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800939 if (inb(0x1F2) == 0x00)
940 printk(KERN_INFO "PDC20230-B VLB ATA "
941 "controller detected.\n");
942 local_irq_restore(flags);
943 return BIOS;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400944 }
945 local_irq_restore(flags);
946 }
947
Alan Coxdefc9cd2008-01-10 14:33:10 -0800948 if (ht6560a & mask)
949 return HT6560A;
950 if (ht6560b & mask)
951 return HT6560B;
952 if (opti82c611a & mask)
953 return OPTI611A;
954 if (opti82c46x & mask)
955 return OPTI46X;
956 if (autospeed & mask)
957 return SNOOP;
958 return BIOS;
959}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400960
Alan Coxdefc9cd2008-01-10 14:33:10 -0800961
962/**
963 * legacy_init_one - attach a legacy interface
964 * @pl: probe record
965 *
966 * Register an ISA bus IDE interface. Such interfaces are PIO and we
967 * assume do not support IRQ sharing.
968 */
969
970static __init int legacy_init_one(struct legacy_probe *probe)
971{
972 struct legacy_controller *controller = &controllers[probe->type];
973 int pio_modes = controller->pio_mask;
974 unsigned long io = probe->port;
975 u32 mask = (1 << probe->slot);
976 struct ata_port_operations *ops = controller->ops;
977 struct legacy_data *ld = &legacy_data[probe->slot];
978 struct ata_host *host = NULL;
979 struct ata_port *ap;
980 struct platform_device *pdev;
981 struct ata_device *dev;
982 void __iomem *io_addr, *ctrl_addr;
983 u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
984 int ret;
985
986 iordy |= controller->flags;
987
988 pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
989 if (IS_ERR(pdev))
990 return PTR_ERR(pdev);
991
992 ret = -EBUSY;
993 if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
994 devm_request_region(&pdev->dev, io + 0x0206, 1,
995 "pata_legacy") == NULL)
996 goto fail;
Alan Coxf834e492007-02-07 13:46:00 -0800997
Tejun Heo5d728822007-04-17 23:44:08 +0900998 ret = -ENOMEM;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800999 io_addr = devm_ioport_map(&pdev->dev, io, 8);
1000 ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
1001 if (!io_addr || !ctrl_addr)
1002 goto fail;
1003 if (controller->setup)
Alan Coxb8325482008-01-19 15:47:23 +00001004 if (controller->setup(pdev, probe, ld) < 0)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001005 goto fail;
Tejun Heo5d728822007-04-17 23:44:08 +09001006 host = ata_host_alloc(&pdev->dev, 1);
1007 if (!host)
1008 goto fail;
1009 ap = host->ports[0];
Jeff Garzik669a5db2006-08-29 18:12:40 -04001010
Tejun Heo5d728822007-04-17 23:44:08 +09001011 ap->ops = ops;
1012 ap->pio_mask = pio_modes;
1013 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
1014 ap->ioaddr.cmd_addr = io_addr;
1015 ap->ioaddr.altstatus_addr = ctrl_addr;
1016 ap->ioaddr.ctl_addr = ctrl_addr;
Tejun Heo9363c382008-04-07 22:47:16 +09001017 ata_sff_std_ports(&ap->ioaddr);
Alan Coxb8325482008-01-19 15:47:23 +00001018 ap->host->private_data = ld;
Tejun Heo5d728822007-04-17 23:44:08 +09001019
Alan Coxdefc9cd2008-01-10 14:33:10 -08001020 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
Tejun Heocbcdd872007-08-18 13:14:55 +09001021
Tejun Heo9363c382008-04-07 22:47:16 +09001022 ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
1023 &legacy_sht);
Tejun Heo5d728822007-04-17 23:44:08 +09001024 if (ret)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001025 goto fail;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001026 ld->platform_dev = pdev;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001027
Alan Coxdefc9cd2008-01-10 14:33:10 -08001028 /* Nothing found means we drop the port as its probably not there */
1029
1030 ret = -ENODEV;
1031 ata_link_for_each_dev(dev, &ap->link) {
1032 if (!ata_dev_absent(dev)) {
1033 legacy_host[probe->slot] = host;
1034 ld->platform_dev = pdev;
1035 return 0;
1036 }
1037 }
Jeff Garzik669a5db2006-08-29 18:12:40 -04001038fail:
1039 platform_device_unregister(pdev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001040 return ret;
1041}
1042
1043/**
1044 * legacy_check_special_cases - ATA special cases
1045 * @p: PCI device to check
1046 * @master: set this if we find an ATA master
1047 * @master: set this if we find an ATA secondary
1048 *
Alan Coxdefc9cd2008-01-10 14:33:10 -08001049 * A small number of vendors implemented early PCI ATA interfaces
1050 * on bridge logic without the ATA interface being PCI visible.
1051 * Where we have a matching PCI driver we must skip the relevant
1052 * device here. If we don't know about it then the legacy driver
1053 * is the right driver anyway.
Jeff Garzik669a5db2006-08-29 18:12:40 -04001054 */
1055
Alan Coxb8325482008-01-19 15:47:23 +00001056static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
Alan Coxdefc9cd2008-01-10 14:33:10 -08001057 int *secondary)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001058{
1059 /* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
1060 if (p->vendor == 0x1078 && p->device == 0x0000) {
1061 *primary = *secondary = 1;
1062 return;
1063 }
1064 /* Cyrix CS5520 pre SFF MWDMA ATA on the bridge */
1065 if (p->vendor == 0x1078 && p->device == 0x0002) {
1066 *primary = *secondary = 1;
1067 return;
1068 }
1069 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
1070 if (p->vendor == 0x8086 && p->device == 0x1234) {
1071 u16 r;
1072 pci_read_config_word(p, 0x6C, &r);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001073 if (r & 0x8000) {
1074 /* ATA port enabled */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001075 if (r & 0x4000)
1076 *secondary = 1;
1077 else
1078 *primary = 1;
1079 }
1080 return;
1081 }
1082}
1083
Alan Coxdefc9cd2008-01-10 14:33:10 -08001084static __init void probe_opti_vlb(void)
1085{
1086 /* If an OPTI 82C46X is present find out where the channels are */
1087 static const char *optis[4] = {
1088 "3/463MV", "5MV",
1089 "5MVA", "5MVB"
1090 };
1091 u8 chans = 1;
1092 u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;
1093
1094 opti82c46x = 3; /* Assume master and slave first */
1095 printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n",
1096 optis[ctrl]);
1097 if (ctrl == 3)
1098 chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;
1099 ctrl = opti_syscfg(0xAC);
1100 /* Check enabled and this port is the 465MV port. On the
1101 MVB we may have two channels */
1102 if (ctrl & 8) {
1103 if (chans == 2) {
1104 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1105 legacy_probe_add(0x170, 15, OPTI46X, 0);
1106 }
1107 if (ctrl & 4)
1108 legacy_probe_add(0x170, 15, OPTI46X, 0);
1109 else
1110 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1111 } else
1112 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1113}
1114
1115static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port)
1116{
1117 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
1118 /* Check card type */
1119 if ((r & 0xF0) == 0xC0) {
1120 /* QD6500: single channel */
Alan Coxb8325482008-01-19 15:47:23 +00001121 if (r & 8)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001122 /* Disabled ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -08001123 return;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001124 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1125 QDI6500, port);
1126 }
1127 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
1128 /* QD6580: dual channel */
1129 if (!request_region(port + 2 , 2, "pata_qdi")) {
1130 release_region(port, 2);
1131 return;
1132 }
1133 res = inb(port + 3);
1134 /* Single channel mode ? */
1135 if (res & 1)
1136 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1137 QDI6580, port);
1138 else { /* Dual channel mode */
1139 legacy_probe_add(0x1F0, 14, QDI6580DP, port);
1140 /* port + 0x02, r & 0x04 */
1141 legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
1142 }
Alan Coxb8325482008-01-19 15:47:23 +00001143 release_region(port + 2, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001144 }
1145}
1146
1147static __init void probe_qdi_vlb(void)
1148{
1149 unsigned long flags;
1150 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
1151 int i;
1152
1153 /*
1154 * Check each possible QD65xx base address
1155 */
1156
1157 for (i = 0; i < 2; i++) {
1158 unsigned long port = qd_port[i];
1159 u8 r, res;
1160
1161
1162 if (request_region(port, 2, "pata_qdi")) {
1163 /* Check for a card */
1164 local_irq_save(flags);
1165 /* I have no h/w that needs this delay but it
1166 is present in the historic code */
1167 r = inb(port);
1168 udelay(1);
1169 outb(0x19, port);
1170 udelay(1);
1171 res = inb(port);
1172 udelay(1);
1173 outb(r, port);
1174 udelay(1);
1175 local_irq_restore(flags);
1176
1177 /* Fail */
1178 if (res == 0x19) {
1179 release_region(port, 2);
1180 continue;
1181 }
1182 /* Passes the presence test */
1183 r = inb(port + 1);
1184 udelay(1);
1185 /* Check port agrees with port set */
Alan Coxb8325482008-01-19 15:47:23 +00001186 if ((r & 2) >> 1 == i)
1187 qdi65_identify_port(r, res, port);
1188 release_region(port, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001189 }
1190 }
1191}
Jeff Garzik669a5db2006-08-29 18:12:40 -04001192
1193/**
1194 * legacy_init - attach legacy interfaces
1195 *
1196 * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects.
1197 * Right now we do not scan the ide0 and ide1 address but should do so
1198 * for non PCI systems or systems with no PCI IDE legacy mode devices.
1199 * If you fix that note there are special cases to consider like VLB
1200 * drivers and CS5510/20.
1201 */
1202
1203static __init int legacy_init(void)
1204{
1205 int i;
1206 int ct = 0;
1207 int primary = 0;
1208 int secondary = 0;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001209 int pci_present = 0;
1210 struct legacy_probe *pl = &probe_list[0];
1211 int slot = 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001212
1213 struct pci_dev *p = NULL;
1214
1215 for_each_pci_dev(p) {
1216 int r;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001217 /* Check for any overlap of the system ATA mappings. Native
1218 mode controllers stuck on these addresses or some devices
1219 in 'raid' mode won't be found by the storage class test */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001220 for (r = 0; r < 6; r++) {
1221 if (pci_resource_start(p, r) == 0x1f0)
1222 primary = 1;
1223 if (pci_resource_start(p, r) == 0x170)
1224 secondary = 1;
1225 }
1226 /* Check for special cases */
1227 legacy_check_special_cases(p, &primary, &secondary);
1228
Alan Coxdefc9cd2008-01-10 14:33:10 -08001229 /* If PCI bus is present then don't probe for tertiary
1230 legacy ports */
1231 pci_present = 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001232 }
1233
Alan Coxb8325482008-01-19 15:47:23 +00001234 if (winbond == 1)
1235 winbond = 0x130; /* Default port, alt is 1B0 */
1236
Alan Coxdefc9cd2008-01-10 14:33:10 -08001237 if (primary == 0 || all)
1238 legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
1239 if (secondary == 0 || all)
1240 legacy_probe_add(0x170, 15, UNKNOWN, 0);
Jeff Garzik85cd7252006-08-31 00:03:49 -04001241
Alan Coxdefc9cd2008-01-10 14:33:10 -08001242 if (probe_all || !pci_present) {
1243 /* ISA/VLB extra ports */
1244 legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
1245 legacy_probe_add(0x168, 10, UNKNOWN, 0);
1246 legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
1247 legacy_probe_add(0x160, 12, UNKNOWN, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001248 }
1249
Alan Coxdefc9cd2008-01-10 14:33:10 -08001250 if (opti82c46x)
1251 probe_opti_vlb();
1252 if (qdi)
1253 probe_qdi_vlb();
1254
Alan Coxdefc9cd2008-01-10 14:33:10 -08001255 for (i = 0; i < NR_HOST; i++, pl++) {
1256 if (pl->port == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001257 continue;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001258 if (pl->type == UNKNOWN)
1259 pl->type = probe_chip_type(pl);
1260 pl->slot = slot++;
1261 if (legacy_init_one(pl) == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001262 ct++;
1263 }
1264 if (ct != 0)
1265 return 0;
1266 return -ENODEV;
1267}
1268
1269static __exit void legacy_exit(void)
1270{
1271 int i;
1272
1273 for (i = 0; i < nr_legacy_host; i++) {
1274 struct legacy_data *ld = &legacy_data[i];
Tejun Heo24dc5f32007-01-20 16:00:28 +09001275 ata_host_detach(legacy_host[i]);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001276 platform_device_unregister(ld->platform_dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001277 }
1278}
1279
1280MODULE_AUTHOR("Alan Cox");
1281MODULE_DESCRIPTION("low-level driver for legacy ATA");
1282MODULE_LICENSE("GPL");
1283MODULE_VERSION(DRV_VERSION);
1284
1285module_param(probe_all, int, 0);
1286module_param(autospeed, int, 0);
1287module_param(ht6560a, int, 0);
1288module_param(ht6560b, int, 0);
1289module_param(opti82c611a, int, 0);
1290module_param(opti82c46x, int, 0);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001291module_param(qdi, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001292module_param(pio_mask, int, 0);
Alan Coxf834e492007-02-07 13:46:00 -08001293module_param(iordy_mask, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001294
1295module_init(legacy_init);
1296module_exit(legacy_exit);