blob: 3b64c203bf99a77e14a6bbf3b9e8e3d9519cccb8 [file] [log] [blame]
Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Viresh Kumarbbcf0712014-09-09 19:58:03 +05307 * The OPP code in function set_target() is reused from
Shawn Guo95ceafd2012-09-06 07:09:11 +00008 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Thomas Petazzoni34e5a522014-10-19 11:30:28 +020021#include <linux/cpufreq-dt.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040022#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000023#include <linux/err.h>
24#include <linux/module.h>
25#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050026#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000027#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000028#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040030#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000031
Viresh Kumard2f31f12014-08-28 11:22:28 +053032struct private_data {
33 struct device *cpu_dev;
34 struct regulator *cpu_reg;
35 struct thermal_cooling_device *cdev;
36 unsigned int voltage_tolerance; /* in percentage */
37};
Shawn Guo95ceafd2012-09-06 07:09:11 +000038
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +020039static struct freq_attr *cpufreq_dt_attr[] = {
40 &cpufreq_freq_attr_scaling_available_freqs,
41 NULL, /* Extra space for boost-attr if required */
42 NULL,
43};
44
Viresh Kumarbbcf0712014-09-09 19:58:03 +053045static int set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000046{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050047 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053048 struct cpufreq_frequency_table *freq_table = policy->freq_table;
49 struct clk *cpu_clk = policy->clk;
50 struct private_data *priv = policy->driver_data;
51 struct device *cpu_dev = priv->cpu_dev;
52 struct regulator *cpu_reg = priv->cpu_reg;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000053 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053054 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010055 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000056 int ret;
57
Shawn Guo95ceafd2012-09-06 07:09:11 +000058 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080059 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000060 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000061
Viresh Kumard4019f02013-08-14 19:38:24 +053062 freq_exact = freq_Hz;
63 new_freq = freq_Hz / 1000;
64 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000065
Mark Brown4a511de2013-08-13 14:58:24 +020066 if (!IS_ERR(cpu_reg)) {
Stefan Wahren0a1e8792014-10-17 22:09:48 +000067 unsigned long opp_freq;
68
Nishanth Menon78e8eb82013-01-18 19:52:33 +000069 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050070 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000071 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000072 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053073 dev_err(cpu_dev, "failed to find OPP for %ld\n",
74 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053075 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000076 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050077 volt = dev_pm_opp_get_voltage(opp);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000078 opp_freq = dev_pm_opp_get_freq(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000079 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053080 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000081 volt_old = regulator_get_voltage(cpu_reg);
Stefan Wahren0a1e8792014-10-17 22:09:48 +000082 dev_dbg(cpu_dev, "Found OPP: %ld kHz, %ld uV\n",
83 opp_freq / 1000, volt);
Shawn Guo95ceafd2012-09-06 07:09:11 +000084 }
85
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053086 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
Stefan Wahren8197bb12014-10-17 22:09:49 +000087 old_freq / 1000, (volt_old > 0) ? volt_old / 1000 : -1,
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053088 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000089
90 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053091 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000092 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
93 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053094 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
95 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053096 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000097 }
98 }
99
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +0100100 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000101 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530102 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Stefan Wahren8197bb12014-10-17 22:09:49 +0000103 if (!IS_ERR(cpu_reg) && volt_old > 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000104 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +0530105 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000106 }
107
108 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +0530109 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +0000110 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
111 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530112 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
113 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530114 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000115 }
116 }
117
Viresh Kumarfd143b42013-04-01 12:57:44 +0000118 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000119}
120
Viresh Kumar95b61052014-08-28 11:22:30 +0530121static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530122 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000123{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530124 struct device *cpu_dev;
125 struct regulator *cpu_reg;
126 struct clk *cpu_clk;
127 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530128 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000129
Viresh Kumar95b61052014-08-28 11:22:30 +0530130 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100131 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530132 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100133 return -ENODEV;
134 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000135
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530136 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530137 if (!cpu)
138 reg = reg_cpu0;
139 else
140 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530141
142try_again:
143 cpu_reg = regulator_get_optional(cpu_dev, reg);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000144 if (IS_ERR(cpu_reg)) {
145 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530146 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000147 * not yet registered, we should try defering probe.
148 */
149 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530150 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
151 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530152 return -EPROBE_DEFER;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000153 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530154
155 /* Try with "cpu-supply" */
156 if (reg == reg_cpu0) {
157 reg = reg_cpu;
158 goto try_again;
159 }
160
Thomas Petazzonia00de1a2014-10-19 11:30:29 +0200161 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
162 cpu, PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000163 }
164
Lucas Stache3beb0a2014-05-16 12:20:42 +0200165 cpu_clk = clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000166 if (IS_ERR(cpu_clk)) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530167 /* put regulator */
168 if (!IS_ERR(cpu_reg))
169 regulator_put(cpu_reg);
170
Shawn Guo95ceafd2012-09-06 07:09:11 +0000171 ret = PTR_ERR(cpu_clk);
Viresh Kumar48a86242014-08-28 11:22:26 +0530172
173 /*
174 * If cpu's clk node is present, but clock is not yet
175 * registered, we should try defering probe.
176 */
177 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530178 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530179 else
Abhilash Kesavan71796212014-10-31 18:09:33 +0530180 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
181 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530182 } else {
183 *cdev = cpu_dev;
184 *creg = cpu_reg;
185 *cclk = cpu_clk;
186 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530187
Viresh Kumard2f31f12014-08-28 11:22:28 +0530188 return ret;
189}
190
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530191static int cpufreq_init(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530192{
193 struct cpufreq_frequency_table *freq_table;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530194 struct device_node *np;
195 struct private_data *priv;
196 struct device *cpu_dev;
197 struct regulator *cpu_reg;
198 struct clk *cpu_clk;
Lucas Stach045ee452014-10-24 15:05:55 +0200199 unsigned long min_uV = ~0, max_uV = 0;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530200 unsigned int transition_latency;
Viresh Kumar2e02d872015-07-29 16:23:10 +0530201 bool need_update = false;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530202 int ret;
203
Viresh Kumar95b61052014-08-28 11:22:30 +0530204 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530205 if (ret) {
Geert Uytterhoevenedd52b12014-10-23 11:52:54 +0200206 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530207 return ret;
208 }
209
210 np = of_node_get(cpu_dev->of_node);
211 if (!np) {
212 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
213 ret = -ENOENT;
214 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000215 }
216
Viresh Kumar2e02d872015-07-29 16:23:10 +0530217 /* Get OPP-sharing information from "operating-points-v2" bindings */
218 ret = of_get_cpus_sharing_opps(cpu_dev, policy->cpus);
219 if (ret) {
220 /*
221 * operating-points-v2 not supported, fallback to old method of
222 * finding shared-OPPs for backward compatibility.
223 */
224 if (ret == -ENOENT)
225 need_update = true;
226 else
227 goto out_node_put;
228 }
229
230 /*
231 * Initialize OPP tables for all policy->cpus. They will be shared by
232 * all CPUs which have marked their CPUs shared with OPP bindings.
233 *
234 * For platforms not using operating-points-v2 bindings, we do this
235 * before updating policy->cpus. Otherwise, we will end up creating
236 * duplicate OPPs for policy->cpus.
237 *
238 * OPPs might be populated at runtime, don't check for error here
239 */
240 of_cpumask_init_opp_table(policy->cpus);
241
Viresh Kumar7d5d0c82015-09-02 14:36:48 +0530242 /*
243 * But we need OPP table to function so if it is not there let's
244 * give platform code chance to provide it for us.
245 */
246 ret = dev_pm_opp_get_opp_count(cpu_dev);
247 if (ret <= 0) {
248 pr_debug("OPP table is not ready, deferring probe\n");
249 ret = -EPROBE_DEFER;
250 goto out_free_opp;
251 }
252
Viresh Kumar2e02d872015-07-29 16:23:10 +0530253 if (need_update) {
254 struct cpufreq_dt_platform_data *pd = cpufreq_get_driver_data();
255
256 if (!pd || !pd->independent_clocks)
257 cpumask_setall(policy->cpus);
258
259 /*
260 * OPP tables are initialized only for policy->cpu, do it for
261 * others as well.
262 */
Viresh Kumar8bc86282015-09-02 14:36:49 +0530263 ret = set_cpus_sharing_opps(cpu_dev, policy->cpus);
264 if (ret)
265 dev_err(cpu_dev, "%s: failed to mark OPPs as shared: %d\n",
266 __func__, ret);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530267
268 of_property_read_u32(np, "clock-latency", &transition_latency);
269 } else {
270 transition_latency = dev_pm_opp_get_max_clock_latency(cpu_dev);
271 }
Shawn Guo95ceafd2012-09-06 07:09:11 +0000272
Viresh Kumard2f31f12014-08-28 11:22:28 +0530273 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
274 if (!priv) {
275 ret = -ENOMEM;
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530276 goto out_free_opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530277 }
278
279 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000280
Viresh Kumar2e02d872015-07-29 16:23:10 +0530281 if (!transition_latency)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000282 transition_latency = CPUFREQ_ETERNAL;
283
Philipp Zabel43c638e2013-09-26 11:19:37 +0200284 if (!IS_ERR(cpu_reg)) {
Lucas Stach045ee452014-10-24 15:05:55 +0200285 unsigned long opp_freq = 0;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000286
287 /*
Lucas Stach045ee452014-10-24 15:05:55 +0200288 * Disable any OPPs where the connected regulator isn't able to
289 * provide the specified voltage and record minimum and maximum
290 * voltage levels.
Shawn Guo95ceafd2012-09-06 07:09:11 +0000291 */
Lucas Stach045ee452014-10-24 15:05:55 +0200292 while (1) {
293 struct dev_pm_opp *opp;
294 unsigned long opp_uV, tol_uV;
295
296 rcu_read_lock();
297 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
298 if (IS_ERR(opp)) {
299 rcu_read_unlock();
300 break;
301 }
302 opp_uV = dev_pm_opp_get_voltage(opp);
303 rcu_read_unlock();
304
305 tol_uV = opp_uV * priv->voltage_tolerance / 100;
Viresh Kumara2022002015-09-02 14:36:50 +0530306 if (regulator_is_supported_voltage(cpu_reg,
307 opp_uV - tol_uV,
Lucas Stach045ee452014-10-24 15:05:55 +0200308 opp_uV + tol_uV)) {
309 if (opp_uV < min_uV)
310 min_uV = opp_uV;
311 if (opp_uV > max_uV)
312 max_uV = opp_uV;
313 } else {
314 dev_pm_opp_disable(cpu_dev, opp_freq);
315 }
316
317 opp_freq++;
318 }
319
Shawn Guo95ceafd2012-09-06 07:09:11 +0000320 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
321 if (ret > 0)
322 transition_latency += ret * 1000;
323 }
324
Lucas Stach045ee452014-10-24 15:05:55 +0200325 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
326 if (ret) {
327 pr_err("failed to init cpufreq table: %d\n", ret);
328 goto out_free_priv;
329 }
330
Viresh Kumard2f31f12014-08-28 11:22:28 +0530331 priv->cpu_dev = cpu_dev;
332 priv->cpu_reg = cpu_reg;
333 policy->driver_data = priv;
334
335 policy->clk = cpu_clk;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200336 ret = cpufreq_table_validate_and_show(policy, freq_table);
337 if (ret) {
338 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
339 ret);
Viresh Kumar9a004422014-11-27 06:07:52 +0530340 goto out_free_cpufreq_table;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200341 }
342
Viresh Kumard15fa862015-07-29 16:23:11 +0530343 /* Support turbo/boost mode */
344 if (policy_has_boost_freq(policy)) {
345 /* This gets disabled by core on driver unregister */
346 ret = cpufreq_enable_boost_support();
347 if (ret)
348 goto out_free_cpufreq_table;
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200349 cpufreq_dt_attr[1] = &cpufreq_freq_attr_scaling_boost_freqs;
Viresh Kumard15fa862015-07-29 16:23:11 +0530350 }
351
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200352 policy->cpuinfo.transition_latency = transition_latency;
353
Lucas Stachf9739d22014-09-26 15:33:46 +0200354 of_node_put(np);
355
Shawn Guo95ceafd2012-09-06 07:09:11 +0000356 return 0;
357
Viresh Kumar9a004422014-11-27 06:07:52 +0530358out_free_cpufreq_table:
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500359 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Lucas Stach045ee452014-10-24 15:05:55 +0200360out_free_priv:
361 kfree(priv);
Viresh Kumar2f0f6092014-11-25 16:04:21 +0530362out_free_opp:
Viresh Kumar2e02d872015-07-29 16:23:10 +0530363 of_cpumask_free_opp_table(policy->cpus);
364out_node_put:
Shawn Guo95ceafd2012-09-06 07:09:11 +0000365 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530366out_put_reg_clk:
367 clk_put(cpu_clk);
368 if (!IS_ERR(cpu_reg))
369 regulator_put(cpu_reg);
370
371 return ret;
372}
373
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530374static int cpufreq_exit(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530375{
376 struct private_data *priv = policy->driver_data;
377
Markus Elfring17ad13b2015-02-03 19:21:21 +0100378 cpufreq_cooling_unregister(priv->cdev);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530379 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
Viresh Kumar2e02d872015-07-29 16:23:10 +0530380 of_cpumask_free_opp_table(policy->related_cpus);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530381 clk_put(policy->clk);
382 if (!IS_ERR(priv->cpu_reg))
383 regulator_put(priv->cpu_reg);
384 kfree(priv);
385
386 return 0;
387}
388
Viresh Kumar9a004422014-11-27 06:07:52 +0530389static void cpufreq_ready(struct cpufreq_policy *policy)
390{
391 struct private_data *priv = policy->driver_data;
392 struct device_node *np = of_node_get(priv->cpu_dev->of_node);
393
394 if (WARN_ON(!np))
395 return;
396
397 /*
398 * For now, just loading the cooling device;
399 * thermal DT code takes care of matching them.
400 */
401 if (of_find_property(np, "#cooling-cells", NULL)) {
402 priv->cdev = of_cpufreq_cooling_register(np,
403 policy->related_cpus);
404 if (IS_ERR(priv->cdev)) {
405 dev_err(priv->cpu_dev,
406 "running cpufreq without cooling device: %ld\n",
407 PTR_ERR(priv->cdev));
408
409 priv->cdev = NULL;
410 }
411 }
412
413 of_node_put(np);
414}
415
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530416static struct cpufreq_driver dt_cpufreq_driver = {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530417 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
418 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530419 .target_index = set_target,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530420 .get = cpufreq_generic_get,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530421 .init = cpufreq_init,
422 .exit = cpufreq_exit,
Viresh Kumar9a004422014-11-27 06:07:52 +0530423 .ready = cpufreq_ready,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530424 .name = "cpufreq-dt",
Bartlomiej Zolnierkiewicz21c36d32015-08-07 13:59:16 +0200425 .attr = cpufreq_dt_attr,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530426};
427
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530428static int dt_cpufreq_probe(struct platform_device *pdev)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530429{
430 struct device *cpu_dev;
431 struct regulator *cpu_reg;
432 struct clk *cpu_clk;
433 int ret;
434
435 /*
436 * All per-cluster (CPUs sharing clock/voltages) initialization is done
437 * from ->init(). In probe(), we just need to make sure that clk and
438 * regulators are available. Else defer probe and retry.
439 *
440 * FIXME: Is checking this only for CPU0 sufficient ?
441 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530442 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530443 if (ret)
444 return ret;
445
446 clk_put(cpu_clk);
447 if (!IS_ERR(cpu_reg))
448 regulator_put(cpu_reg);
449
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200450 dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
451
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530452 ret = cpufreq_register_driver(&dt_cpufreq_driver);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530453 if (ret)
454 dev_err(cpu_dev, "failed register driver: %d\n", ret);
455
Shawn Guo95ceafd2012-09-06 07:09:11 +0000456 return ret;
457}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000458
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530459static int dt_cpufreq_remove(struct platform_device *pdev)
Shawn Guo5553f9e2013-01-30 14:27:49 +0000460{
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530461 cpufreq_unregister_driver(&dt_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000462 return 0;
463}
464
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530465static struct platform_driver dt_cpufreq_platdrv = {
Shawn Guo5553f9e2013-01-30 14:27:49 +0000466 .driver = {
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530467 .name = "cpufreq-dt",
Shawn Guo5553f9e2013-01-30 14:27:49 +0000468 },
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530469 .probe = dt_cpufreq_probe,
470 .remove = dt_cpufreq_remove,
Shawn Guo5553f9e2013-01-30 14:27:49 +0000471};
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530472module_platform_driver(dt_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000473
Felipe Balbi07949bf2015-05-08 14:57:30 -0500474MODULE_ALIAS("platform:cpufreq-dt");
Viresh Kumar748c8762014-08-28 11:22:24 +0530475MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000476MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530477MODULE_DESCRIPTION("Generic cpufreq driver");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000478MODULE_LICENSE("GPL");