Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 1 | /* |
| 2 | * regmap based irq_chip |
| 3 | * |
| 4 | * Copyright 2011 Wolfson Microelectronics plc |
| 5 | * |
| 6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | #include <linux/export.h> |
Paul Gortmaker | 51990e8 | 2012-01-22 11:23:42 -0500 | [diff] [blame] | 14 | #include <linux/device.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 15 | #include <linux/regmap.h> |
| 16 | #include <linux/irq.h> |
| 17 | #include <linux/interrupt.h> |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 18 | #include <linux/irqdomain.h> |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 19 | #include <linux/pm_runtime.h> |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 20 | #include <linux/slab.h> |
| 21 | |
| 22 | #include "internal.h" |
| 23 | |
| 24 | struct regmap_irq_chip_data { |
| 25 | struct mutex lock; |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 26 | struct irq_chip irq_chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 27 | |
| 28 | struct regmap *map; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 29 | const struct regmap_irq_chip *chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 30 | |
| 31 | int irq_base; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 32 | struct irq_domain *domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 33 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 34 | int irq; |
| 35 | int wake_count; |
| 36 | |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 37 | void *status_reg_buf; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 38 | unsigned int *status_buf; |
| 39 | unsigned int *mask_buf; |
| 40 | unsigned int *mask_buf_def; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 41 | unsigned int *wake_buf; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 42 | |
| 43 | unsigned int irq_reg_stride; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 44 | }; |
| 45 | |
| 46 | static inline const |
| 47 | struct regmap_irq *irq_to_regmap_irq(struct regmap_irq_chip_data *data, |
| 48 | int irq) |
| 49 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 50 | return &data->chip->irqs[irq]; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 51 | } |
| 52 | |
| 53 | static void regmap_irq_lock(struct irq_data *data) |
| 54 | { |
| 55 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 56 | |
| 57 | mutex_lock(&d->lock); |
| 58 | } |
| 59 | |
| 60 | static void regmap_irq_sync_unlock(struct irq_data *data) |
| 61 | { |
| 62 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 63 | struct regmap *map = d->map; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 64 | int i, ret; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 65 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 66 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 67 | if (d->chip->runtime_pm) { |
| 68 | ret = pm_runtime_get_sync(map->dev); |
| 69 | if (ret < 0) |
| 70 | dev_err(map->dev, "IRQ sync failed to resume: %d\n", |
| 71 | ret); |
| 72 | } |
| 73 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 74 | /* |
| 75 | * If there's been a change in the mask write it back to the |
| 76 | * hardware. We rely on the use of the regmap core cache to |
| 77 | * suppress pointless writes. |
| 78 | */ |
| 79 | for (i = 0; i < d->chip->num_regs; i++) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 80 | reg = d->chip->mask_base + |
| 81 | (i * map->reg_stride * d->irq_reg_stride); |
Xiaofan Tian | 36ac914 | 2012-08-30 17:03:35 +0800 | [diff] [blame] | 82 | if (d->chip->mask_invert) |
| 83 | ret = regmap_update_bits(d->map, reg, |
| 84 | d->mask_buf_def[i], ~d->mask_buf[i]); |
| 85 | else |
| 86 | ret = regmap_update_bits(d->map, reg, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 87 | d->mask_buf_def[i], d->mask_buf[i]); |
| 88 | if (ret != 0) |
| 89 | dev_err(d->map->dev, "Failed to sync masks in %x\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 90 | reg); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 91 | } |
| 92 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 93 | if (d->chip->runtime_pm) |
| 94 | pm_runtime_put(map->dev); |
| 95 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 96 | /* If we've changed our wakeup count propagate it to the parent */ |
| 97 | if (d->wake_count < 0) |
| 98 | for (i = d->wake_count; i < 0; i++) |
| 99 | irq_set_irq_wake(d->irq, 0); |
| 100 | else if (d->wake_count > 0) |
| 101 | for (i = 0; i < d->wake_count; i++) |
| 102 | irq_set_irq_wake(d->irq, 1); |
| 103 | |
| 104 | d->wake_count = 0; |
| 105 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 106 | mutex_unlock(&d->lock); |
| 107 | } |
| 108 | |
| 109 | static void regmap_irq_enable(struct irq_data *data) |
| 110 | { |
| 111 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 112 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 113 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 114 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 115 | d->mask_buf[irq_data->reg_offset / map->reg_stride] &= ~irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | static void regmap_irq_disable(struct irq_data *data) |
| 119 | { |
| 120 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
Stephen Warren | 5680655 | 2012-04-10 23:37:22 -0600 | [diff] [blame] | 121 | struct regmap *map = d->map; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 122 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 123 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 124 | d->mask_buf[irq_data->reg_offset / map->reg_stride] |= irq_data->mask; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 125 | } |
| 126 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 127 | static int regmap_irq_set_wake(struct irq_data *data, unsigned int on) |
| 128 | { |
| 129 | struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data); |
| 130 | struct regmap *map = d->map; |
| 131 | const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); |
| 132 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 133 | if (on) { |
Laxman Dewangan | 55ac85e | 2012-12-19 19:42:28 +0530 | [diff] [blame] | 134 | if (d->wake_buf) |
| 135 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 136 | &= ~irq_data->mask; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 137 | d->wake_count++; |
| 138 | } else { |
Laxman Dewangan | 55ac85e | 2012-12-19 19:42:28 +0530 | [diff] [blame] | 139 | if (d->wake_buf) |
| 140 | d->wake_buf[irq_data->reg_offset / map->reg_stride] |
| 141 | |= irq_data->mask; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 142 | d->wake_count--; |
| 143 | } |
| 144 | |
| 145 | return 0; |
| 146 | } |
| 147 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 148 | static const struct irq_chip regmap_irq_chip = { |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 149 | .irq_bus_lock = regmap_irq_lock, |
| 150 | .irq_bus_sync_unlock = regmap_irq_sync_unlock, |
| 151 | .irq_disable = regmap_irq_disable, |
| 152 | .irq_enable = regmap_irq_enable, |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 153 | .irq_set_wake = regmap_irq_set_wake, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 154 | }; |
| 155 | |
| 156 | static irqreturn_t regmap_irq_thread(int irq, void *d) |
| 157 | { |
| 158 | struct regmap_irq_chip_data *data = d; |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 159 | const struct regmap_irq_chip *chip = data->chip; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 160 | struct regmap *map = data->map; |
| 161 | int ret, i; |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 162 | bool handled = false; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 163 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 164 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 165 | if (chip->runtime_pm) { |
| 166 | ret = pm_runtime_get_sync(map->dev); |
| 167 | if (ret < 0) { |
| 168 | dev_err(map->dev, "IRQ thread failed to resume: %d\n", |
| 169 | ret); |
| 170 | return IRQ_NONE; |
| 171 | } |
| 172 | } |
| 173 | |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 174 | /* |
| 175 | * Read in the statuses, using a single bulk read if possible |
| 176 | * in order to reduce the I/O overheads. |
| 177 | */ |
| 178 | if (!map->use_single_rw && map->reg_stride == 1 && |
| 179 | data->irq_reg_stride == 1) { |
| 180 | u8 *buf8 = data->status_reg_buf; |
| 181 | u16 *buf16 = data->status_reg_buf; |
| 182 | u32 *buf32 = data->status_reg_buf; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 183 | |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 184 | BUG_ON(!data->status_reg_buf); |
| 185 | |
| 186 | ret = regmap_bulk_read(map, chip->status_base, |
| 187 | data->status_reg_buf, |
| 188 | chip->num_regs); |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 189 | if (ret != 0) { |
| 190 | dev_err(map->dev, "Failed to read IRQ status: %d\n", |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 191 | ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 192 | return IRQ_NONE; |
| 193 | } |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 194 | |
| 195 | for (i = 0; i < data->chip->num_regs; i++) { |
| 196 | switch (map->format.val_bytes) { |
| 197 | case 1: |
| 198 | data->status_buf[i] = buf8[i]; |
| 199 | break; |
| 200 | case 2: |
| 201 | data->status_buf[i] = buf16[i]; |
| 202 | break; |
| 203 | case 4: |
| 204 | data->status_buf[i] = buf32[i]; |
| 205 | break; |
| 206 | default: |
| 207 | BUG(); |
| 208 | return IRQ_NONE; |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | } else { |
| 213 | for (i = 0; i < data->chip->num_regs; i++) { |
| 214 | ret = regmap_read(map, chip->status_base + |
| 215 | (i * map->reg_stride |
| 216 | * data->irq_reg_stride), |
| 217 | &data->status_buf[i]); |
| 218 | |
| 219 | if (ret != 0) { |
| 220 | dev_err(map->dev, |
| 221 | "Failed to read IRQ status: %d\n", |
| 222 | ret); |
| 223 | if (chip->runtime_pm) |
| 224 | pm_runtime_put(map->dev); |
| 225 | return IRQ_NONE; |
| 226 | } |
| 227 | } |
Mark Brown | bbae92c | 2013-01-03 13:58:33 +0000 | [diff] [blame] | 228 | } |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 229 | |
Mark Brown | bbae92c | 2013-01-03 13:58:33 +0000 | [diff] [blame] | 230 | /* |
| 231 | * Ignore masked IRQs and ack if we need to; we ack early so |
| 232 | * there is no race between handling and acknowleding the |
| 233 | * interrupt. We assume that typically few of the interrupts |
| 234 | * will fire simultaneously so don't worry about overhead from |
| 235 | * doing a write per register. |
| 236 | */ |
| 237 | for (i = 0; i < data->chip->num_regs; i++) { |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 238 | data->status_buf[i] &= ~data->mask_buf[i]; |
| 239 | |
| 240 | if (data->status_buf[i] && chip->ack_base) { |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 241 | reg = chip->ack_base + |
| 242 | (i * map->reg_stride * data->irq_reg_stride); |
| 243 | ret = regmap_write(map, reg, data->status_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 244 | if (ret != 0) |
| 245 | dev_err(map->dev, "Failed to ack 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 246 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 247 | } |
| 248 | } |
| 249 | |
| 250 | for (i = 0; i < chip->num_irqs; i++) { |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 251 | if (data->status_buf[chip->irqs[i].reg_offset / |
| 252 | map->reg_stride] & chip->irqs[i].mask) { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 253 | handle_nested_irq(irq_find_mapping(data->domain, i)); |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 254 | handled = true; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 255 | } |
| 256 | } |
| 257 | |
Mark Brown | 0c00c50 | 2012-07-24 15:41:19 +0100 | [diff] [blame] | 258 | if (chip->runtime_pm) |
| 259 | pm_runtime_put(map->dev); |
| 260 | |
Mark Brown | d23511f | 2011-11-28 18:50:39 +0000 | [diff] [blame] | 261 | if (handled) |
| 262 | return IRQ_HANDLED; |
| 263 | else |
| 264 | return IRQ_NONE; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 265 | } |
| 266 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 267 | static int regmap_irq_map(struct irq_domain *h, unsigned int virq, |
| 268 | irq_hw_number_t hw) |
| 269 | { |
| 270 | struct regmap_irq_chip_data *data = h->host_data; |
| 271 | |
| 272 | irq_set_chip_data(virq, data); |
Yunfan Zhang | 8138073 | 2012-09-08 03:53:25 -0700 | [diff] [blame] | 273 | irq_set_chip(virq, &data->irq_chip); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 274 | irq_set_nested_thread(virq, 1); |
| 275 | |
| 276 | /* ARM needs us to explicitly flag the IRQ as valid |
| 277 | * and will set them noprobe when we do so. */ |
| 278 | #ifdef CONFIG_ARM |
| 279 | set_irq_flags(virq, IRQF_VALID); |
| 280 | #else |
| 281 | irq_set_noprobe(virq); |
| 282 | #endif |
| 283 | |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | static struct irq_domain_ops regmap_domain_ops = { |
| 288 | .map = regmap_irq_map, |
| 289 | .xlate = irq_domain_xlate_twocell, |
| 290 | }; |
| 291 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 292 | /** |
| 293 | * regmap_add_irq_chip(): Use standard regmap IRQ controller handling |
| 294 | * |
| 295 | * map: The regmap for the device. |
| 296 | * irq: The IRQ the device uses to signal interrupts |
| 297 | * irq_flags: The IRQF_ flags to use for the primary interrupt. |
| 298 | * chip: Configuration for the interrupt controller. |
| 299 | * data: Runtime data structure for the controller, allocated on success |
| 300 | * |
| 301 | * Returns 0 on success or an errno on failure. |
| 302 | * |
| 303 | * In order for this to be efficient the chip really should use a |
| 304 | * register cache. The chip driver is responsible for restoring the |
| 305 | * register values used by the IRQ controller over suspend and resume. |
| 306 | */ |
| 307 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, |
Mark Brown | b026ddb | 2012-05-31 21:01:46 +0100 | [diff] [blame] | 308 | int irq_base, const struct regmap_irq_chip *chip, |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 309 | struct regmap_irq_chip_data **data) |
| 310 | { |
| 311 | struct regmap_irq_chip_data *d; |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 312 | int i; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 313 | int ret = -ENOMEM; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 314 | u32 reg; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 315 | |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 316 | for (i = 0; i < chip->num_irqs; i++) { |
| 317 | if (chip->irqs[i].reg_offset % map->reg_stride) |
| 318 | return -EINVAL; |
| 319 | if (chip->irqs[i].reg_offset / map->reg_stride >= |
| 320 | chip->num_regs) |
| 321 | return -EINVAL; |
| 322 | } |
| 323 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 324 | if (irq_base) { |
| 325 | irq_base = irq_alloc_descs(irq_base, 0, chip->num_irqs, 0); |
| 326 | if (irq_base < 0) { |
| 327 | dev_warn(map->dev, "Failed to allocate IRQs: %d\n", |
| 328 | irq_base); |
| 329 | return irq_base; |
| 330 | } |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 331 | } |
| 332 | |
| 333 | d = kzalloc(sizeof(*d), GFP_KERNEL); |
| 334 | if (!d) |
| 335 | return -ENOMEM; |
| 336 | |
Mark Brown | 2431d0a | 2012-05-13 11:18:34 +0100 | [diff] [blame] | 337 | *data = d; |
| 338 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 339 | d->status_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 340 | GFP_KERNEL); |
| 341 | if (!d->status_buf) |
| 342 | goto err_alloc; |
| 343 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 344 | d->mask_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 345 | GFP_KERNEL); |
| 346 | if (!d->mask_buf) |
| 347 | goto err_alloc; |
| 348 | |
| 349 | d->mask_buf_def = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 350 | GFP_KERNEL); |
| 351 | if (!d->mask_buf_def) |
| 352 | goto err_alloc; |
| 353 | |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 354 | if (chip->wake_base) { |
| 355 | d->wake_buf = kzalloc(sizeof(unsigned int) * chip->num_regs, |
| 356 | GFP_KERNEL); |
| 357 | if (!d->wake_buf) |
| 358 | goto err_alloc; |
| 359 | } |
| 360 | |
Stephen Warren | 7ac140e | 2012-08-01 11:40:47 -0600 | [diff] [blame] | 361 | d->irq_chip = regmap_irq_chip; |
Stephen Warren | ca14275 | 2012-08-01 11:40:48 -0600 | [diff] [blame] | 362 | d->irq_chip.name = chip->name; |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 363 | d->irq = irq; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 364 | d->map = map; |
| 365 | d->chip = chip; |
| 366 | d->irq_base = irq_base; |
Graeme Gregory | 022f926a | 2012-05-14 22:40:43 +0900 | [diff] [blame] | 367 | |
| 368 | if (chip->irq_reg_stride) |
| 369 | d->irq_reg_stride = chip->irq_reg_stride; |
| 370 | else |
| 371 | d->irq_reg_stride = 1; |
| 372 | |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 373 | if (!map->use_single_rw && map->reg_stride == 1 && |
| 374 | d->irq_reg_stride == 1) { |
| 375 | d->status_reg_buf = kmalloc(map->format.val_bytes * |
| 376 | chip->num_regs, GFP_KERNEL); |
| 377 | if (!d->status_reg_buf) |
| 378 | goto err_alloc; |
| 379 | } |
| 380 | |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 381 | mutex_init(&d->lock); |
| 382 | |
| 383 | for (i = 0; i < chip->num_irqs; i++) |
Stephen Warren | f01ee60 | 2012-04-09 13:40:24 -0600 | [diff] [blame] | 384 | d->mask_buf_def[chip->irqs[i].reg_offset / map->reg_stride] |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 385 | |= chip->irqs[i].mask; |
| 386 | |
| 387 | /* Mask all the interrupts by default */ |
| 388 | for (i = 0; i < chip->num_regs; i++) { |
| 389 | d->mask_buf[i] = d->mask_buf_def[i]; |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 390 | reg = chip->mask_base + |
| 391 | (i * map->reg_stride * d->irq_reg_stride); |
Xiaofan Tian | 36ac914 | 2012-08-30 17:03:35 +0800 | [diff] [blame] | 392 | if (chip->mask_invert) |
| 393 | ret = regmap_update_bits(map, reg, |
| 394 | d->mask_buf[i], ~d->mask_buf[i]); |
| 395 | else |
| 396 | ret = regmap_update_bits(map, reg, |
Mark Brown | 0eb46ad | 2012-08-01 20:29:14 +0100 | [diff] [blame] | 397 | d->mask_buf[i], d->mask_buf[i]); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 398 | if (ret != 0) { |
| 399 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
Stephen Warren | 1603262 | 2012-07-27 13:01:54 -0600 | [diff] [blame] | 400 | reg, ret); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 401 | goto err_alloc; |
| 402 | } |
| 403 | } |
| 404 | |
Stephen Warren | 40052ca | 2012-08-01 13:57:24 -0600 | [diff] [blame] | 405 | /* Wake is disabled by default */ |
| 406 | if (d->wake_buf) { |
| 407 | for (i = 0; i < chip->num_regs; i++) { |
| 408 | d->wake_buf[i] = d->mask_buf_def[i]; |
| 409 | reg = chip->wake_base + |
| 410 | (i * map->reg_stride * d->irq_reg_stride); |
| 411 | ret = regmap_update_bits(map, reg, d->wake_buf[i], |
| 412 | d->wake_buf[i]); |
| 413 | if (ret != 0) { |
| 414 | dev_err(map->dev, "Failed to set masks in 0x%x: %d\n", |
| 415 | reg, ret); |
| 416 | goto err_alloc; |
| 417 | } |
| 418 | } |
| 419 | } |
| 420 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 421 | if (irq_base) |
| 422 | d->domain = irq_domain_add_legacy(map->dev->of_node, |
| 423 | chip->num_irqs, irq_base, 0, |
| 424 | ®map_domain_ops, d); |
| 425 | else |
| 426 | d->domain = irq_domain_add_linear(map->dev->of_node, |
| 427 | chip->num_irqs, |
| 428 | ®map_domain_ops, d); |
| 429 | if (!d->domain) { |
| 430 | dev_err(map->dev, "Failed to create IRQ domain\n"); |
| 431 | ret = -ENOMEM; |
| 432 | goto err_alloc; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags, |
| 436 | chip->name, d); |
| 437 | if (ret != 0) { |
| 438 | dev_err(map->dev, "Failed to request IRQ %d: %d\n", irq, ret); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 439 | goto err_domain; |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 440 | } |
| 441 | |
| 442 | return 0; |
| 443 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 444 | err_domain: |
| 445 | /* Should really dispose of the domain but... */ |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 446 | err_alloc: |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 447 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 448 | kfree(d->mask_buf_def); |
| 449 | kfree(d->mask_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 450 | kfree(d->status_buf); |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 451 | kfree(d->status_reg_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 452 | kfree(d); |
| 453 | return ret; |
| 454 | } |
| 455 | EXPORT_SYMBOL_GPL(regmap_add_irq_chip); |
| 456 | |
| 457 | /** |
| 458 | * regmap_del_irq_chip(): Stop interrupt handling for a regmap IRQ chip |
| 459 | * |
| 460 | * @irq: Primary IRQ for the device |
| 461 | * @d: regmap_irq_chip_data allocated by regmap_add_irq_chip() |
| 462 | */ |
| 463 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d) |
| 464 | { |
| 465 | if (!d) |
| 466 | return; |
| 467 | |
| 468 | free_irq(irq, d); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 469 | /* We should unmap the domain but... */ |
Mark Brown | a43fd50 | 2012-06-05 14:34:03 +0100 | [diff] [blame] | 470 | kfree(d->wake_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 471 | kfree(d->mask_buf_def); |
| 472 | kfree(d->mask_buf); |
Mark Brown | a7440ea | 2013-01-03 14:27:15 +0000 | [diff] [blame^] | 473 | kfree(d->status_reg_buf); |
Mark Brown | f8beab2 | 2011-10-28 23:50:49 +0200 | [diff] [blame] | 474 | kfree(d->status_buf); |
| 475 | kfree(d); |
| 476 | } |
| 477 | EXPORT_SYMBOL_GPL(regmap_del_irq_chip); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 478 | |
| 479 | /** |
| 480 | * regmap_irq_chip_get_base(): Retrieve interrupt base for a regmap IRQ chip |
| 481 | * |
| 482 | * Useful for drivers to request their own IRQs. |
| 483 | * |
| 484 | * @data: regmap_irq controller to operate on. |
| 485 | */ |
| 486 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data) |
| 487 | { |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 488 | WARN_ON(!data->irq_base); |
Mark Brown | 209a600 | 2011-12-05 16:10:15 +0000 | [diff] [blame] | 489 | return data->irq_base; |
| 490 | } |
| 491 | EXPORT_SYMBOL_GPL(regmap_irq_chip_get_base); |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 492 | |
| 493 | /** |
| 494 | * regmap_irq_get_virq(): Map an interrupt on a chip to a virtual IRQ |
| 495 | * |
| 496 | * Useful for drivers to request their own IRQs. |
| 497 | * |
| 498 | * @data: regmap_irq controller to operate on. |
| 499 | * @irq: index of the interrupt requested in the chip IRQs |
| 500 | */ |
| 501 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq) |
| 502 | { |
Mark Brown | bfd6185d | 2012-06-05 14:29:36 +0100 | [diff] [blame] | 503 | /* Handle holes in the IRQ list */ |
| 504 | if (!data->chip->irqs[irq].mask) |
| 505 | return -EINVAL; |
| 506 | |
Mark Brown | 4af8be6 | 2012-05-13 10:59:56 +0100 | [diff] [blame] | 507 | return irq_create_mapping(data->domain, irq); |
| 508 | } |
| 509 | EXPORT_SYMBOL_GPL(regmap_irq_get_virq); |
Mark Brown | 90f790d | 2012-08-20 21:45:05 +0100 | [diff] [blame] | 510 | |
| 511 | /** |
| 512 | * regmap_irq_get_domain(): Retrieve the irq_domain for the chip |
| 513 | * |
| 514 | * Useful for drivers to request their own IRQs and for integration |
| 515 | * with subsystems. For ease of integration NULL is accepted as a |
| 516 | * domain, allowing devices to just call this even if no domain is |
| 517 | * allocated. |
| 518 | * |
| 519 | * @data: regmap_irq controller to operate on. |
| 520 | */ |
| 521 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data) |
| 522 | { |
| 523 | if (data) |
| 524 | return data->domain; |
| 525 | else |
| 526 | return NULL; |
| 527 | } |
| 528 | EXPORT_SYMBOL_GPL(regmap_irq_get_domain); |