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Nicolas Ferre467f1cf2012-01-26 11:59:20 +01001/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 };
31 cpus {
32 cpu@0 {
33 compatible = "arm,arm926ejs";
34 };
35 };
36
37 memory@20000000 {
38 reg = <0x20000000 0x10000000>;
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46
47 apb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>;
59 };
60
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080061 ramc0: ramc@ffffe800 {
62 compatible = "atmel,at91sam9g45-ddramc";
63 reg = <0xffffe800 0x200>;
64 };
65
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080066 pmc: pmc@fffffc00 {
67 compatible = "atmel,at91rm9200-pmc";
68 reg = <0xfffffc00 0x100>;
69 };
70
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080071 rstc@fffffe00 {
72 compatible = "atmel,at91sam9g45-rstc";
73 reg = <0xfffffe00 0x10>;
74 };
75
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010076 pit: timer@fffffe30 {
77 compatible = "atmel,at91sam9260-pit";
78 reg = <0xfffffe30 0xf>;
79 interrupts = <1 4>;
80 };
81
82 tcb0: timer@f8008000 {
83 compatible = "atmel,at91sam9x5-tcb";
84 reg = <0xf8008000 0x100>;
85 interrupts = <17 4>;
86 };
87
88 tcb1: timer@f800c000 {
89 compatible = "atmel,at91sam9x5-tcb";
90 reg = <0xf800c000 0x100>;
91 interrupts = <17 4>;
92 };
93
94 dma0: dma-controller@ffffec00 {
95 compatible = "atmel,at91sam9g45-dma";
96 reg = <0xffffec00 0x200>;
97 interrupts = <20 4>;
98 };
99
100 dma1: dma-controller@ffffee00 {
101 compatible = "atmel,at91sam9g45-dma";
102 reg = <0xffffee00 0x200>;
103 interrupts = <21 4>;
104 };
105
106 pioA: gpio@fffff400 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200107 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100108 reg = <0xfffff400 0x100>;
109 interrupts = <2 4>;
110 #gpio-cells = <2>;
111 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100112 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100113 };
114
115 pioB: gpio@fffff600 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200116 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100117 reg = <0xfffff600 0x100>;
118 interrupts = <2 4>;
119 #gpio-cells = <2>;
120 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100121 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100122 };
123
124 pioC: gpio@fffff800 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200125 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100126 reg = <0xfffff800 0x100>;
127 interrupts = <3 4>;
128 #gpio-cells = <2>;
129 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100130 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100131 };
132
133 pioD: gpio@fffffa00 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200134 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100135 reg = <0xfffffa00 0x100>;
136 interrupts = <3 4>;
137 #gpio-cells = <2>;
138 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100139 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100140 };
141
142 dbgu: serial@fffff200 {
143 compatible = "atmel,at91sam9260-usart";
144 reg = <0xfffff200 0x200>;
145 interrupts = <1 4>;
146 status = "disabled";
147 };
148
149 usart0: serial@f801c000 {
150 compatible = "atmel,at91sam9260-usart";
151 reg = <0xf801c000 0x200>;
152 interrupts = <5 4>;
153 atmel,use-dma-rx;
154 atmel,use-dma-tx;
155 status = "disabled";
156 };
157
158 usart1: serial@f8020000 {
159 compatible = "atmel,at91sam9260-usart";
160 reg = <0xf8020000 0x200>;
161 interrupts = <6 4>;
162 atmel,use-dma-rx;
163 atmel,use-dma-tx;
164 status = "disabled";
165 };
166
167 usart2: serial@f8024000 {
168 compatible = "atmel,at91sam9260-usart";
169 reg = <0xf8024000 0x200>;
170 interrupts = <7 4>;
171 atmel,use-dma-rx;
172 atmel,use-dma-tx;
173 status = "disabled";
174 };
175
176 macb0: ethernet@f802c000 {
177 compatible = "cdns,at32ap7000-macb", "cdns,macb";
178 reg = <0xf802c000 0x100>;
179 interrupts = <24 4>;
180 status = "disabled";
181 };
182
183 macb1: ethernet@f8030000 {
184 compatible = "cdns,at32ap7000-macb", "cdns,macb";
185 reg = <0xf8030000 0x100>;
186 interrupts = <27 4>;
187 status = "disabled";
188 };
189 };
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800190
191 nand0: nand@40000000 {
192 compatible = "atmel,at91rm9200-nand";
193 #address-cells = <1>;
194 #size-cells = <1>;
195 reg = <0x40000000 0x10000000
196 >;
197 atmel,nand-addr-offset = <21>;
198 atmel,nand-cmd-offset = <22>;
199 gpios = <&pioC 8 0
200 &pioC 14 0
201 0
202 >;
203 status = "disabled";
204 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100205 };
Jean-Christophe PLAGNIOL-VILLARD10f71c22012-02-23 22:50:32 +0800206
207 i2c@0 {
208 compatible = "i2c-gpio";
209 gpios = <&pioA 30 0 /* sda */
210 &pioA 31 0 /* scl */
211 >;
212 i2c-gpio,sda-open-drain;
213 i2c-gpio,scl-open-drain;
214 i2c-gpio,delay-us = <2>; /* ~100 kHz */
215 #address-cells = <1>;
216 #size-cells = <0>;
217 status = "disabled";
218 };
219
220 i2c@1 {
221 compatible = "i2c-gpio";
222 gpios = <&pioC 0 0 /* sda */
223 &pioC 1 0 /* scl */
224 >;
225 i2c-gpio,sda-open-drain;
226 i2c-gpio,scl-open-drain;
227 i2c-gpio,delay-us = <2>; /* ~100 kHz */
228 #address-cells = <1>;
229 #size-cells = <0>;
230 status = "disabled";
231 };
232
233 i2c@2 {
234 compatible = "i2c-gpio";
235 gpios = <&pioB 4 0 /* sda */
236 &pioB 5 0 /* scl */
237 >;
238 i2c-gpio,sda-open-drain;
239 i2c-gpio,scl-open-drain;
240 i2c-gpio,delay-us = <2>; /* ~100 kHz */
241 #address-cells = <1>;
242 #size-cells = <0>;
243 status = "disabled";
244 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100245};