blob: 0fdb91e36137970e12b60e15760318bbf3eeb5c3 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Ross Biro
7 * Copyright (C) Linus Torvalds
8 * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
9 * Copyright (C) 1996 David S. Miller
10 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
11 * Copyright (C) 1999 MIPS Technologies, Inc.
12 * Copyright (C) 2000 Ulf Carlsson
13 *
14 * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
15 * binaries.
16 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/compiler.h>
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +020018#include <linux/context_tracking.h>
Ralf Baechle7aeb7532012-08-02 14:44:11 +020019#include <linux/elf.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/mm.h>
23#include <linux/errno.h>
24#include <linux/ptrace.h>
Ralf Baechle7aeb7532012-08-02 14:44:11 +020025#include <linux/regset.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/user.h>
28#include <linux/security.h>
Ralf Baechlebc3d22c2012-07-17 19:43:58 +020029#include <linux/tracehook.h>
Ralf Baechle293c5bd2007-07-25 16:19:33 +010030#include <linux/audit.h>
31#include <linux/seccomp.h>
Ralf Baechle1d7bf992013-09-06 20:24:48 +020032#include <linux/ftrace.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
Ralf Baechlef8280c82005-05-19 12:08:04 +000034#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <asm/cpu.h>
Ralf Baechlee50c0a82005-05-31 11:49:19 +000036#include <asm/dsp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <asm/fpu.h>
38#include <asm/mipsregs.h>
Ralf Baechle101b3532005-10-06 17:39:32 +010039#include <asm/mipsmtregs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <asm/pgtable.h>
41#include <asm/page.h>
Ralf Baechlebec9b2b2012-09-26 20:16:47 +020042#include <asm/syscall.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <asm/uaccess.h>
44#include <asm/bootinfo.h>
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040045#include <asm/reg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
Ralf Baechle1d7bf992013-09-06 20:24:48 +020047#define CREATE_TRACE_POINTS
48#include <trace/events/syscalls.h>
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050/*
51 * Called by kernel/ptrace.c when detaching..
52 *
53 * Make sure single step bits etc are not set.
54 */
55void ptrace_disable(struct task_struct *child)
56{
David Daney0926bf92008-09-23 00:11:26 -070057 /* Don't load the watchpoint registers for the ex-child. */
58 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
Linus Torvalds1da177e2005-04-16 15:20:36 -070059}
60
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040061/*
Ralf Baechle70342282013-01-22 12:59:30 +010062 * Read a general register set. We always use the 64-bit format, even
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040063 * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
64 * Registers are sign extended to fill the available space.
65 */
Alex Smitha79ebea2014-07-23 14:40:13 +010066int ptrace_getregs(struct task_struct *child, struct user_pt_regs __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040067{
68 struct pt_regs *regs;
69 int i;
70
71 if (!access_ok(VERIFY_WRITE, data, 38 * 8))
72 return -EIO;
73
Al Viro40bc9c62006-01-12 01:06:07 -080074 regs = task_pt_regs(child);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040075
76 for (i = 0; i < 32; i++)
Alex Smitha79ebea2014-07-23 14:40:13 +010077 __put_user((long)regs->regs[i], (__s64 __user *)&data->regs[i]);
78 __put_user((long)regs->lo, (__s64 __user *)&data->lo);
79 __put_user((long)regs->hi, (__s64 __user *)&data->hi);
80 __put_user((long)regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
81 __put_user((long)regs->cp0_badvaddr, (__s64 __user *)&data->cp0_badvaddr);
82 __put_user((long)regs->cp0_status, (__s64 __user *)&data->cp0_status);
83 __put_user((long)regs->cp0_cause, (__s64 __user *)&data->cp0_cause);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040084
85 return 0;
86}
87
88/*
89 * Write a general register set. As for PTRACE_GETREGS, we always use
90 * the 64-bit format. On a 32-bit kernel only the lower order half
91 * (according to endianness) will be used.
92 */
Alex Smitha79ebea2014-07-23 14:40:13 +010093int ptrace_setregs(struct task_struct *child, struct user_pt_regs __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -040094{
95 struct pt_regs *regs;
96 int i;
97
98 if (!access_ok(VERIFY_READ, data, 38 * 8))
99 return -EIO;
100
Al Viro40bc9c62006-01-12 01:06:07 -0800101 regs = task_pt_regs(child);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400102
103 for (i = 0; i < 32; i++)
Alex Smitha79ebea2014-07-23 14:40:13 +0100104 __get_user(regs->regs[i], (__s64 __user *)&data->regs[i]);
105 __get_user(regs->lo, (__s64 __user *)&data->lo);
106 __get_user(regs->hi, (__s64 __user *)&data->hi);
107 __get_user(regs->cp0_epc, (__s64 __user *)&data->cp0_epc);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400108
109 /* badvaddr, status, and cause may not be written. */
110
111 return 0;
112}
113
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100114int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400115{
116 int i;
117
118 if (!access_ok(VERIFY_WRITE, data, 33 * 8))
119 return -EIO;
120
121 if (tsk_used_math(child)) {
Paul Burtonbbd426f2014-02-13 11:26:41 +0000122 union fpureg *fregs = get_fpu_regs(child);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400123 for (i = 0; i < 32; i++)
Paul Burtonbbd426f2014-02-13 11:26:41 +0000124 __put_user(get_fpr64(&fregs[i], 0),
125 i + (__u64 __user *)data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400126 } else {
127 for (i = 0; i < 32; i++)
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100128 __put_user((__u64) -1, i + (__u64 __user *) data);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400129 }
130
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100131 __put_user(child->thread.fpu.fcr31, data + 64);
Alex Smith656ff9b2014-07-23 14:40:06 +0100132 __put_user(boot_cpu_data.fpu_id, data + 65);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400133
134 return 0;
135}
136
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100137int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400138{
Paul Burtonbbd426f2014-02-13 11:26:41 +0000139 union fpureg *fregs;
140 u64 fpr_val;
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400141 int i;
142
143 if (!access_ok(VERIFY_READ, data, 33 * 8))
144 return -EIO;
145
146 fregs = get_fpu_regs(child);
147
Paul Burtonbbd426f2014-02-13 11:26:41 +0000148 for (i = 0; i < 32; i++) {
149 __get_user(fpr_val, i + (__u64 __user *)data);
150 set_fpr64(&fregs[i], 0, fpr_val);
151 }
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400152
Ralf Baechle49a89ef2007-10-11 23:46:15 +0100153 __get_user(child->thread.fpu.fcr31, data + 64);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400154
155 /* FIR may not be written. */
156
157 return 0;
158}
159
David Daney0926bf92008-09-23 00:11:26 -0700160int ptrace_get_watch_regs(struct task_struct *child,
161 struct pt_watch_regs __user *addr)
162{
163 enum pt_watch_style style;
164 int i;
165
Alex Smith57c7ea52014-05-01 12:51:19 +0100166 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
David Daney0926bf92008-09-23 00:11:26 -0700167 return -EIO;
168 if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
169 return -EIO;
170
171#ifdef CONFIG_32BIT
172 style = pt_watch_style_mips32;
173#define WATCH_STYLE mips32
174#else
175 style = pt_watch_style_mips64;
176#define WATCH_STYLE mips64
177#endif
178
179 __put_user(style, &addr->style);
Alex Smith57c7ea52014-05-01 12:51:19 +0100180 __put_user(boot_cpu_data.watch_reg_use_cnt,
David Daney0926bf92008-09-23 00:11:26 -0700181 &addr->WATCH_STYLE.num_valid);
Alex Smith57c7ea52014-05-01 12:51:19 +0100182 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
David Daney0926bf92008-09-23 00:11:26 -0700183 __put_user(child->thread.watch.mips3264.watchlo[i],
184 &addr->WATCH_STYLE.watchlo[i]);
185 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
186 &addr->WATCH_STYLE.watchhi[i]);
Alex Smith57c7ea52014-05-01 12:51:19 +0100187 __put_user(boot_cpu_data.watch_reg_masks[i],
David Daney0926bf92008-09-23 00:11:26 -0700188 &addr->WATCH_STYLE.watch_masks[i]);
189 }
190 for (; i < 8; i++) {
191 __put_user(0, &addr->WATCH_STYLE.watchlo[i]);
192 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
193 __put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
194 }
195
196 return 0;
197}
198
199int ptrace_set_watch_regs(struct task_struct *child,
200 struct pt_watch_regs __user *addr)
201{
202 int i;
203 int watch_active = 0;
204 unsigned long lt[NUM_WATCH_REGS];
205 u16 ht[NUM_WATCH_REGS];
206
Alex Smith57c7ea52014-05-01 12:51:19 +0100207 if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
David Daney0926bf92008-09-23 00:11:26 -0700208 return -EIO;
209 if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
210 return -EIO;
211 /* Check the values. */
Alex Smith57c7ea52014-05-01 12:51:19 +0100212 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
David Daney0926bf92008-09-23 00:11:26 -0700213 __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
214#ifdef CONFIG_32BIT
215 if (lt[i] & __UA_LIMIT)
216 return -EINVAL;
217#else
218 if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
219 if (lt[i] & 0xffffffff80000000UL)
220 return -EINVAL;
221 } else {
222 if (lt[i] & __UA_LIMIT)
223 return -EINVAL;
224 }
225#endif
226 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
227 if (ht[i] & ~0xff8)
228 return -EINVAL;
229 }
230 /* Install them. */
Alex Smith57c7ea52014-05-01 12:51:19 +0100231 for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
David Daney0926bf92008-09-23 00:11:26 -0700232 if (lt[i] & 7)
233 watch_active = 1;
234 child->thread.watch.mips3264.watchlo[i] = lt[i];
235 /* Set the G bit. */
236 child->thread.watch.mips3264.watchhi[i] = ht[i];
237 }
238
239 if (watch_active)
240 set_tsk_thread_flag(child, TIF_LOAD_WATCH);
241 else
242 clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
243
244 return 0;
245}
246
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200247/* regset get/set implementations */
248
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100249#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
250
251static int gpr32_get(struct task_struct *target,
252 const struct user_regset *regset,
253 unsigned int pos, unsigned int count,
254 void *kbuf, void __user *ubuf)
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200255{
256 struct pt_regs *regs = task_pt_regs(target);
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100257 u32 uregs[ELF_NGREG] = {};
258 unsigned i;
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200259
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100260 for (i = MIPS32_EF_R1; i <= MIPS32_EF_R31; i++) {
261 /* k0/k1 are copied as zero. */
262 if (i == MIPS32_EF_R26 || i == MIPS32_EF_R27)
263 continue;
264
265 uregs[i] = regs->regs[i - MIPS32_EF_R0];
266 }
267
268 uregs[MIPS32_EF_LO] = regs->lo;
269 uregs[MIPS32_EF_HI] = regs->hi;
270 uregs[MIPS32_EF_CP0_EPC] = regs->cp0_epc;
271 uregs[MIPS32_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
272 uregs[MIPS32_EF_CP0_STATUS] = regs->cp0_status;
273 uregs[MIPS32_EF_CP0_CAUSE] = regs->cp0_cause;
274
275 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
276 sizeof(uregs));
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200277}
278
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100279static int gpr32_set(struct task_struct *target,
280 const struct user_regset *regset,
281 unsigned int pos, unsigned int count,
282 const void *kbuf, const void __user *ubuf)
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200283{
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100284 struct pt_regs *regs = task_pt_regs(target);
285 u32 uregs[ELF_NGREG];
286 unsigned start, num_regs, i;
287 int err;
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200288
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100289 start = pos / sizeof(u32);
290 num_regs = count / sizeof(u32);
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200291
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100292 if (start + num_regs > ELF_NGREG)
293 return -EIO;
294
295 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
296 sizeof(uregs));
297 if (err)
298 return err;
299
300 for (i = start; i < num_regs; i++) {
301 /*
302 * Cast all values to signed here so that if this is a 64-bit
303 * kernel, the supplied 32-bit values will be sign extended.
304 */
305 switch (i) {
306 case MIPS32_EF_R1 ... MIPS32_EF_R25:
307 /* k0/k1 are ignored. */
308 case MIPS32_EF_R28 ... MIPS32_EF_R31:
309 regs->regs[i - MIPS32_EF_R0] = (s32)uregs[i];
310 break;
311 case MIPS32_EF_LO:
312 regs->lo = (s32)uregs[i];
313 break;
314 case MIPS32_EF_HI:
315 regs->hi = (s32)uregs[i];
316 break;
317 case MIPS32_EF_CP0_EPC:
318 regs->cp0_epc = (s32)uregs[i];
319 break;
320 }
321 }
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200322
323 return 0;
324}
325
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100326#endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
327
328#ifdef CONFIG_64BIT
329
330static int gpr64_get(struct task_struct *target,
331 const struct user_regset *regset,
332 unsigned int pos, unsigned int count,
333 void *kbuf, void __user *ubuf)
334{
335 struct pt_regs *regs = task_pt_regs(target);
336 u64 uregs[ELF_NGREG] = {};
337 unsigned i;
338
339 for (i = MIPS64_EF_R1; i <= MIPS64_EF_R31; i++) {
340 /* k0/k1 are copied as zero. */
341 if (i == MIPS64_EF_R26 || i == MIPS64_EF_R27)
342 continue;
343
344 uregs[i] = regs->regs[i - MIPS64_EF_R0];
345 }
346
347 uregs[MIPS64_EF_LO] = regs->lo;
348 uregs[MIPS64_EF_HI] = regs->hi;
349 uregs[MIPS64_EF_CP0_EPC] = regs->cp0_epc;
350 uregs[MIPS64_EF_CP0_BADVADDR] = regs->cp0_badvaddr;
351 uregs[MIPS64_EF_CP0_STATUS] = regs->cp0_status;
352 uregs[MIPS64_EF_CP0_CAUSE] = regs->cp0_cause;
353
354 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
355 sizeof(uregs));
356}
357
358static int gpr64_set(struct task_struct *target,
359 const struct user_regset *regset,
360 unsigned int pos, unsigned int count,
361 const void *kbuf, const void __user *ubuf)
362{
363 struct pt_regs *regs = task_pt_regs(target);
364 u64 uregs[ELF_NGREG];
365 unsigned start, num_regs, i;
366 int err;
367
368 start = pos / sizeof(u64);
369 num_regs = count / sizeof(u64);
370
371 if (start + num_regs > ELF_NGREG)
372 return -EIO;
373
374 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
375 sizeof(uregs));
376 if (err)
377 return err;
378
379 for (i = start; i < num_regs; i++) {
380 switch (i) {
381 case MIPS64_EF_R1 ... MIPS64_EF_R25:
382 /* k0/k1 are ignored. */
383 case MIPS64_EF_R28 ... MIPS64_EF_R31:
384 regs->regs[i - MIPS64_EF_R0] = uregs[i];
385 break;
386 case MIPS64_EF_LO:
387 regs->lo = uregs[i];
388 break;
389 case MIPS64_EF_HI:
390 regs->hi = uregs[i];
391 break;
392 case MIPS64_EF_CP0_EPC:
393 regs->cp0_epc = uregs[i];
394 break;
395 }
396 }
397
398 return 0;
399}
400
401#endif /* CONFIG_64BIT */
402
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200403static int fpr_get(struct task_struct *target,
404 const struct user_regset *regset,
405 unsigned int pos, unsigned int count,
406 void *kbuf, void __user *ubuf)
407{
Paul Burton72b22bb2014-01-27 15:23:07 +0000408 unsigned i;
409 int err;
410 u64 fpr_val;
411
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200412 /* XXX fcr31 */
Paul Burton72b22bb2014-01-27 15:23:07 +0000413
414 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
415 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
416 &target->thread.fpu,
417 0, sizeof(elf_fpregset_t));
418
419 for (i = 0; i < NUM_FPU_REGS; i++) {
420 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
421 err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
422 &fpr_val, i * sizeof(elf_fpreg_t),
423 (i + 1) * sizeof(elf_fpreg_t));
424 if (err)
425 return err;
426 }
427
428 return 0;
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200429}
430
431static int fpr_set(struct task_struct *target,
432 const struct user_regset *regset,
433 unsigned int pos, unsigned int count,
434 const void *kbuf, const void __user *ubuf)
435{
Paul Burton72b22bb2014-01-27 15:23:07 +0000436 unsigned i;
437 int err;
438 u64 fpr_val;
439
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200440 /* XXX fcr31 */
Paul Burton72b22bb2014-01-27 15:23:07 +0000441
442 if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
443 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
444 &target->thread.fpu,
445 0, sizeof(elf_fpregset_t));
446
447 for (i = 0; i < NUM_FPU_REGS; i++) {
448 err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
449 &fpr_val, i * sizeof(elf_fpreg_t),
450 (i + 1) * sizeof(elf_fpreg_t));
451 if (err)
452 return err;
453 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
454 }
455
456 return 0;
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200457}
458
459enum mips_regset {
460 REGSET_GPR,
461 REGSET_FPR,
462};
463
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100464#if defined(CONFIG_32BIT) || defined(CONFIG_MIPS32_O32)
465
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200466static const struct user_regset mips_regsets[] = {
467 [REGSET_GPR] = {
468 .core_note_type = NT_PRSTATUS,
469 .n = ELF_NGREG,
470 .size = sizeof(unsigned int),
471 .align = sizeof(unsigned int),
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100472 .get = gpr32_get,
473 .set = gpr32_set,
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200474 },
475 [REGSET_FPR] = {
476 .core_note_type = NT_PRFPREG,
477 .n = ELF_NFPREG,
478 .size = sizeof(elf_fpreg_t),
479 .align = sizeof(elf_fpreg_t),
480 .get = fpr_get,
481 .set = fpr_set,
482 },
483};
484
485static const struct user_regset_view user_mips_view = {
486 .name = "mips",
487 .e_machine = ELF_ARCH,
488 .ei_osabi = ELF_OSABI,
489 .regsets = mips_regsets,
490 .n = ARRAY_SIZE(mips_regsets),
491};
492
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100493#endif /* CONFIG_32BIT || CONFIG_MIPS32_O32 */
494
495#ifdef CONFIG_64BIT
496
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200497static const struct user_regset mips64_regsets[] = {
498 [REGSET_GPR] = {
499 .core_note_type = NT_PRSTATUS,
500 .n = ELF_NGREG,
501 .size = sizeof(unsigned long),
502 .align = sizeof(unsigned long),
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100503 .get = gpr64_get,
504 .set = gpr64_set,
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200505 },
506 [REGSET_FPR] = {
507 .core_note_type = NT_PRFPREG,
508 .n = ELF_NFPREG,
509 .size = sizeof(elf_fpreg_t),
510 .align = sizeof(elf_fpreg_t),
511 .get = fpr_get,
512 .set = fpr_set,
513 },
514};
515
516static const struct user_regset_view user_mips64_view = {
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100517 .name = "mips64",
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200518 .e_machine = ELF_ARCH,
519 .ei_osabi = ELF_OSABI,
520 .regsets = mips64_regsets,
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100521 .n = ARRAY_SIZE(mips64_regsets),
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200522};
523
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100524#endif /* CONFIG_64BIT */
525
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200526const struct user_regset_view *task_user_regset_view(struct task_struct *task)
527{
528#ifdef CONFIG_32BIT
529 return &user_mips_view;
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100530#else
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200531#ifdef CONFIG_MIPS32_O32
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100532 if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
533 return &user_mips_view;
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200534#endif
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200535 return &user_mips64_view;
Alex Smithc23b3d1a2014-07-23 14:40:09 +0100536#endif
Ralf Baechle7aeb7532012-08-02 14:44:11 +0200537}
538
Namhyung Kim9b05a692010-10-27 15:33:47 -0700539long arch_ptrace(struct task_struct *child, long request,
540 unsigned long addr, unsigned long data)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542 int ret;
Namhyung Kimfb671132010-10-27 15:33:58 -0700543 void __user *addrp = (void __user *) addr;
544 void __user *datavp = (void __user *) data;
545 unsigned long __user *datalp = (void __user *) data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547 switch (request) {
548 /* when I and D space are separate, these will need to be fixed. */
549 case PTRACE_PEEKTEXT: /* read word at location addr. */
Alexey Dobriyan76647322007-07-17 04:03:43 -0700550 case PTRACE_PEEKDATA:
551 ret = generic_ptrace_peekdata(child, addr, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553
554 /* Read the word at location addr in the USER area. */
555 case PTRACE_PEEKUSR: {
556 struct pt_regs *regs;
Paul Burtonbbd426f2014-02-13 11:26:41 +0000557 union fpureg *fregs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558 unsigned long tmp = 0;
559
Al Viro40bc9c62006-01-12 01:06:07 -0800560 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700561 ret = 0; /* Default return value. */
562
563 switch (addr) {
564 case 0 ... 31:
565 tmp = regs->regs[addr];
566 break;
567 case FPR_BASE ... FPR_BASE + 31:
Paul Burton597ce172013-11-22 13:12:07 +0000568 if (!tsk_used_math(child)) {
569 /* FP not yet used */
570 tmp = -1;
571 break;
572 }
573 fregs = get_fpu_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574
Ralf Baechle875d43e2005-09-03 15:56:16 -0700575#ifdef CONFIG_32BIT
Paul Burton597ce172013-11-22 13:12:07 +0000576 if (test_thread_flag(TIF_32BIT_FPREGS)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 /*
578 * The odd registers are actually the high
579 * order bits of the values stored in the even
580 * registers - unless we're using r2k_switch.S.
581 */
Paul Burtonbbd426f2014-02-13 11:26:41 +0000582 tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
583 addr & 1);
Paul Burton597ce172013-11-22 13:12:07 +0000584 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 }
Paul Burton597ce172013-11-22 13:12:07 +0000586#endif
Paul Burtonbbd426f2014-02-13 11:26:41 +0000587 tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588 break;
589 case PC:
590 tmp = regs->cp0_epc;
591 break;
592 case CAUSE:
593 tmp = regs->cp0_cause;
594 break;
595 case BADVADDR:
596 tmp = regs->cp0_badvaddr;
597 break;
598 case MMHI:
599 tmp = regs->hi;
600 break;
601 case MMLO:
602 tmp = regs->lo;
603 break;
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100604#ifdef CONFIG_CPU_HAS_SMARTMIPS
605 case ACX:
606 tmp = regs->acx;
607 break;
608#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900610 tmp = child->thread.fpu.fcr31;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700611 break;
Paul Burton33510472013-11-19 17:30:35 +0000612 case FPC_EIR:
613 /* implementation / version register */
Alex Smith656ff9b2014-07-23 14:40:06 +0100614 tmp = boot_cpu_data.fpu_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000616 case DSP_BASE ... DSP_BASE + 5: {
617 dspreg_t *dregs;
618
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000619 if (!cpu_has_dsp) {
620 tmp = 0;
621 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800622 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000623 }
Ralf Baechle6c355852005-12-05 13:47:25 +0000624 dregs = __get_dsp_regs(child);
625 tmp = (unsigned long) (dregs[addr - DSP_BASE]);
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000626 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000627 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000628 case DSP_CONTROL:
629 if (!cpu_has_dsp) {
630 tmp = 0;
631 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800632 goto out;
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000633 }
634 tmp = child->thread.dsp.dspcontrol;
635 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700636 default:
637 tmp = 0;
638 ret = -EIO;
Christoph Hellwig481bed42005-11-07 00:59:47 -0800639 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 }
Namhyung Kimfb671132010-10-27 15:33:58 -0700641 ret = put_user(tmp, datalp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642 break;
643 }
644
645 /* when I and D space are separate, this will have to be fixed. */
646 case PTRACE_POKETEXT: /* write the word at location addr. */
647 case PTRACE_POKEDATA:
Alexey Dobriyanf284ce72007-07-17 04:03:44 -0700648 ret = generic_ptrace_pokedata(child, addr, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700649 break;
650
651 case PTRACE_POKEUSR: {
652 struct pt_regs *regs;
653 ret = 0;
Al Viro40bc9c62006-01-12 01:06:07 -0800654 regs = task_pt_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655
656 switch (addr) {
657 case 0 ... 31:
658 regs->regs[addr] = data;
659 break;
660 case FPR_BASE ... FPR_BASE + 31: {
Paul Burtonbbd426f2014-02-13 11:26:41 +0000661 union fpureg *fregs = get_fpu_regs(child);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662
663 if (!tsk_used_math(child)) {
664 /* FP not yet used */
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900665 memset(&child->thread.fpu, ~0,
666 sizeof(child->thread.fpu));
667 child->thread.fpu.fcr31 = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700668 }
Ralf Baechle875d43e2005-09-03 15:56:16 -0700669#ifdef CONFIG_32BIT
Paul Burton597ce172013-11-22 13:12:07 +0000670 if (test_thread_flag(TIF_32BIT_FPREGS)) {
671 /*
672 * The odd registers are actually the high
673 * order bits of the values stored in the even
674 * registers - unless we're using r2k_switch.S.
675 */
Paul Burtonbbd426f2014-02-13 11:26:41 +0000676 set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
677 addr & 1, data);
Paul Burton597ce172013-11-22 13:12:07 +0000678 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700679 }
680#endif
Paul Burtonbbd426f2014-02-13 11:26:41 +0000681 set_fpr64(&fregs[addr - FPR_BASE], 0, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682 break;
683 }
684 case PC:
685 regs->cp0_epc = data;
686 break;
687 case MMHI:
688 regs->hi = data;
689 break;
690 case MMLO:
691 regs->lo = data;
692 break;
Franck Bui-Huu9693a852007-02-02 17:41:47 +0100693#ifdef CONFIG_CPU_HAS_SMARTMIPS
694 case ACX:
695 regs->acx = data;
696 break;
697#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700698 case FPC_CSR:
Atsushi Nemotoeae89072006-05-16 01:26:03 +0900699 child->thread.fpu.fcr31 = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000701 case DSP_BASE ... DSP_BASE + 5: {
702 dspreg_t *dregs;
703
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000704 if (!cpu_has_dsp) {
705 ret = -EIO;
706 break;
707 }
708
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000709 dregs = __get_dsp_regs(child);
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000710 dregs[addr - DSP_BASE] = data;
711 break;
Ralf Baechlec134a5e2005-06-30 09:42:00 +0000712 }
Ralf Baechlee50c0a82005-05-31 11:49:19 +0000713 case DSP_CONTROL:
714 if (!cpu_has_dsp) {
715 ret = -EIO;
716 break;
717 }
718 child->thread.dsp.dspcontrol = data;
719 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720 default:
721 /* The rest are not allowed. */
722 ret = -EIO;
723 break;
724 }
725 break;
726 }
727
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400728 case PTRACE_GETREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700729 ret = ptrace_getregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400730 break;
731
732 case PTRACE_SETREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700733 ret = ptrace_setregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400734 break;
735
736 case PTRACE_GETFPREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700737 ret = ptrace_getfpregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400738 break;
739
740 case PTRACE_SETFPREGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700741 ret = ptrace_setfpregs(child, datavp);
Daniel Jacobowitzea3d7102005-09-28 18:11:15 -0400742 break;
743
Ralf Baechle3c370262005-04-13 17:43:59 +0000744 case PTRACE_GET_THREAD_AREA:
Namhyung Kimfb671132010-10-27 15:33:58 -0700745 ret = put_user(task_thread_info(child)->tp_value, datalp);
Ralf Baechle3c370262005-04-13 17:43:59 +0000746 break;
747
David Daney0926bf92008-09-23 00:11:26 -0700748 case PTRACE_GET_WATCH_REGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700749 ret = ptrace_get_watch_regs(child, addrp);
David Daney0926bf92008-09-23 00:11:26 -0700750 break;
751
752 case PTRACE_SET_WATCH_REGS:
Namhyung Kimfb671132010-10-27 15:33:58 -0700753 ret = ptrace_set_watch_regs(child, addrp);
David Daney0926bf92008-09-23 00:11:26 -0700754 break;
755
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756 default:
757 ret = ptrace_request(child, request, addr, data);
758 break;
759 }
Christoph Hellwig481bed42005-11-07 00:59:47 -0800760 out:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700761 return ret;
762}
763
764/*
765 * Notification of system call entry/exit
766 * - triggered by current->work.syscall_trace
767 */
Markos Chandras4c21b8f2014-01-22 14:40:03 +0000768asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700769{
Ralf Baechle0dfa95a2012-09-26 21:30:47 +0200770 long ret = 0;
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200771 user_exit();
772
Markos Chandras1225eb82014-01-22 14:40:01 +0000773 if (secure_computing(syscall) == -1)
774 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775
Ralf Baechle0dfa95a2012-09-26 21:30:47 +0200776 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
777 tracehook_report_syscall_entry(regs))
778 ret = -1;
Ralf Baechle293c5bd2007-07-25 16:19:33 +0100779
Ralf Baechle1d7bf992013-09-06 20:24:48 +0200780 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
781 trace_sys_enter(regs, regs->regs[2]);
782
Eric Paris5e937a92014-03-11 12:48:43 -0400783 audit_syscall_entry(syscall_get_arch(),
Markos Chandras1225eb82014-01-22 14:40:01 +0000784 syscall,
Eric Parisb05d8442012-01-03 14:23:06 -0500785 regs->regs[4], regs->regs[5],
786 regs->regs[6], regs->regs[7]);
Markos Chandras1225eb82014-01-22 14:40:01 +0000787 return syscall;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700788}
Ralf Baechle8b659a32011-05-19 09:21:29 +0100789
790/*
791 * Notification of system call entry/exit
792 * - triggered by current->work.syscall_trace
793 */
794asmlinkage void syscall_trace_leave(struct pt_regs *regs)
795{
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200796 /*
797 * We may come here right after calling schedule_user()
798 * or do_notify_resume(), in which case we can be in RCU
799 * user mode.
800 */
801 user_exit();
802
Eric Parisd7e75282012-01-03 14:23:06 -0500803 audit_syscall_exit(regs);
Ralf Baechle8b659a32011-05-19 09:21:29 +0100804
Ralf Baechle1d7bf992013-09-06 20:24:48 +0200805 if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
806 trace_sys_exit(regs, regs->regs[2]);
807
Ralf Baechlebc3d22c2012-07-17 19:43:58 +0200808 if (test_thread_flag(TIF_SYSCALL_TRACE))
809 tracehook_report_syscall_exit(regs, 0);
Ralf Baechlec3fc5cd2013-05-29 01:07:19 +0200810
811 user_enter();
Ralf Baechle8b659a32011-05-19 09:21:29 +0100812}