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Amit S. Kale3d396eb2006-10-21 15:33:03 -04001/*
Dhananjay Phadke5d242f12009-02-25 15:57:56 +00002 * Copyright (C) 2003 - 2009 NetXen, Inc.
Amit S. Kale3d396eb2006-10-21 15:33:03 -04003 * All rights reserved.
Jeff Garzik47906542007-11-23 21:23:36 -05004 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -04005 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
Amit S. Kalecb8011a2006-11-29 09:00:10 -08009 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040010 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Amit S. Kalecb8011a2006-11-29 09:00:10 -080014 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040015 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
Jeff Garzik47906542007-11-23 21:23:36 -050019 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040020 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
Jeff Garzik47906542007-11-23 21:23:36 -050022 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040023 * Contact Information:
24 * info@netxen.com
Dhananjay Phadke5d242f12009-02-25 15:57:56 +000025 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
Amit S. Kale3d396eb2006-10-21 15:33:03 -040029 */
30
31#ifndef __NIC_PHAN_REG_H_
32#define __NIC_PHAN_REG_H_
33
Jeff Garzik47906542007-11-23 21:23:36 -050034/*
Amit S. Kale3d396eb2006-10-21 15:33:03 -040035 * CRB Registers or queue message done only at initialization time.
36 */
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080037#define NIC_CRB_BASE NETXEN_CAM_RAM(0x200)
38#define NETXEN_NIC_REG(X) (NIC_CRB_BASE+(X))
Dhananjay Phadkef6d21f42009-04-07 22:50:46 +000039#define NIC_CRB_BASE_2 NETXEN_CAM_RAM(0x700)
40#define NETXEN_NIC_REG_2(X) (NIC_CRB_BASE_2+(X))
Amit S. Kale3d396eb2006-10-21 15:33:03 -040041
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080042#define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00)
43#define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04)
44#define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08)
45#define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000046#define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080047#define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
Dhananjay Phadkee4c93c82008-07-21 19:44:02 -070048#define NX_CDRP_CRB_OFFSET NETXEN_NIC_REG(0x18)
49#define NX_ARG1_CRB_OFFSET NETXEN_NIC_REG(0x1c)
50#define NX_ARG2_CRB_OFFSET NETXEN_NIC_REG(0x20)
51#define NX_ARG3_CRB_OFFSET NETXEN_NIC_REG(0x24)
52#define NX_SIGN_CRB_OFFSET NETXEN_NIC_REG(0x28)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000053#define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080054#define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24)
55#define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28)
56#define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x2c)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000057#define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x30)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080058#define CRB_MMAP_ADDR_3 NETXEN_NIC_REG(0x34)
59#define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x38)
60#define CRB_HOST_DUMMY_BUF_ADDR_HI NETXEN_NIC_REG(0x3c)
61#define CRB_HOST_DUMMY_BUF_ADDR_LO NETXEN_NIC_REG(0x40)
62#define CRB_MMAP_ADDR_0 NETXEN_NIC_REG(0x44)
63#define CRB_MMAP_ADDR_1 NETXEN_NIC_REG(0x48)
64#define CRB_MMAP_ADDR_2 NETXEN_NIC_REG(0x4c)
65#define CRB_CMDPEG_STATE NETXEN_NIC_REG(0x50)
66#define CRB_MMAP_SIZE_0 NETXEN_NIC_REG(0x54)
67#define CRB_MMAP_SIZE_1 NETXEN_NIC_REG(0x58)
68#define CRB_MMAP_SIZE_2 NETXEN_NIC_REG(0x5c)
69#define CRB_MMAP_SIZE_3 NETXEN_NIC_REG(0x60)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000070#define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x64)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080071#define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x68)
72#define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x6c)
73#define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x70)
74#define CRB_RX_PKT_TIMER NETXEN_NIC_REG(0x74)
75#define CRB_TX_PKT_TIMER NETXEN_NIC_REG(0x78)
76#define CRB_RX_PKT_CNT NETXEN_NIC_REG(0x7c)
77#define CRB_RX_TMR_CNT NETXEN_NIC_REG(0x80)
78#define CRB_RX_LRO_TIMER NETXEN_NIC_REG(0x84)
79#define CRB_RX_LRO_MID_TIMER NETXEN_NIC_REG(0x88)
80#define CRB_DMA_MAX_RCV_BUFS NETXEN_NIC_REG(0x8c)
81#define CRB_MAX_DMA_ENTRIES NETXEN_NIC_REG(0x90)
Dhananjay Phadkec9fc8912008-07-21 19:44:07 -070082#define CRB_XG_STATE NETXEN_NIC_REG(0x94) /* XG Link status */
83#define CRB_XG_STATE_P3 NETXEN_NIC_REG(0x98) /* XG PF Link status */
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080084#define CRB_AGENT_TX_SIZE NETXEN_NIC_REG(0x9c)
85#define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xa0)
86#define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xa4)
87#define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xa8)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000088#define CRB_TX_STATE NETXEN_NIC_REG(0xac)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080089#define CRB_TX_COUNT NETXEN_NIC_REG(0xb0)
90#define CRB_RX_STATE NETXEN_NIC_REG(0xb4)
91#define CRB_RX_PERF_DEBUG_1 NETXEN_NIC_REG(0xb8)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000092#define CRB_RX_LRO_CONTROL NETXEN_NIC_REG(0xbc)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080093#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +000094#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080095#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
Dhananjay Phadke1f434f62009-03-02 16:02:16 +000096#define CRB_DMA_SHIFT NETXEN_NIC_REG(0xcc)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -080097#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
98#define CRB_CTX_RESET NETXEN_NIC_REG(0xd8)
99#define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc)
100#define CRB_HOST_STS_CONS NETXEN_NIC_REG(0xe0)
101#define CRB_PEG_CMD_PROD NETXEN_NIC_REG(0xe4)
Dhananjay Phadke24a7a452008-08-01 03:14:55 -0700102#define CRB_PF_LINK_SPEED_1 NETXEN_NIC_REG(0xe8)
103#define CRB_PF_LINK_SPEED_2 NETXEN_NIC_REG(0xec)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -0800104#define CRB_HOST_BUFFER_CONS NETXEN_NIC_REG(0xf0)
105#define CRB_JUMBO_BUFFER_PROD NETXEN_NIC_REG(0xf4)
106#define CRB_JUMBO_BUFFER_CONS NETXEN_NIC_REG(0xf8)
Dhananjay Phadkee4c93c82008-07-21 19:44:02 -0700107#define CRB_HOST_DUMMY_BUF NETXEN_NIC_REG(0xfc)
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400108
Dhananjay Phadke7830b222008-07-21 19:44:00 -0700109#define CRB_RCVPEG_STATE NETXEN_NIC_REG(0x13c)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -0800110#define CRB_CMD_PRODUCER_OFFSET_1 NETXEN_NIC_REG(0x1ac)
111#define CRB_CMD_CONSUMER_OFFSET_1 NETXEN_NIC_REG(0x1b0)
Mithlesh Thukral3176ff32007-04-20 07:52:37 -0700112#define CRB_CMD_PRODUCER_OFFSET_2 NETXEN_NIC_REG(0x1b8)
113#define CRB_CMD_CONSUMER_OFFSET_2 NETXEN_NIC_REG(0x1bc)
Mithlesh Thukral3176ff32007-04-20 07:52:37 -0700114#define CRB_CMD_PRODUCER_OFFSET_3 NETXEN_NIC_REG(0x1d0)
115#define CRB_CMD_CONSUMER_OFFSET_3 NETXEN_NIC_REG(0x1d4)
Amit S. Kaleed25ffa2006-12-04 09:23:25 -0800116#define CRB_TEMP_STATE NETXEN_NIC_REG(0x1b4)
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400117
Mithlesh Thukral6c80b182007-04-20 07:55:26 -0700118#define CRB_V2P_0 NETXEN_NIC_REG(0x290)
119#define CRB_V2P_1 NETXEN_NIC_REG(0x294)
120#define CRB_V2P_2 NETXEN_NIC_REG(0x298)
121#define CRB_V2P_3 NETXEN_NIC_REG(0x29c)
122#define CRB_V2P(port) (CRB_V2P_0+((port)*4))
Dhananjay Phadkee98e3352009-04-07 22:50:38 +0000123#define CRB_DRIVER_VERSION NETXEN_NIC_REG(0x2a0)
dhananjay.phadke@gmail.com2d1a3bb2007-07-02 00:26:00 +0530124#define CRB_SW_INT_MASK_0 NETXEN_NIC_REG(0x1d8)
125#define CRB_SW_INT_MASK_1 NETXEN_NIC_REG(0x1e0)
126#define CRB_SW_INT_MASK_2 NETXEN_NIC_REG(0x1e4)
127#define CRB_SW_INT_MASK_3 NETXEN_NIC_REG(0x1e8)
128
Dhananjay Phadke5103c9f2009-04-28 15:29:09 +0000129#define CRB_FW_CAPABILITIES_1 NETXEN_CAM_RAM(0x128)
Dhananjay Phadke9dc28ef2008-08-08 00:08:39 -0700130#define CRB_MAC_BLOCK_START NETXEN_CAM_RAM(0x1c0)
131
dhananjay.phadke@gmail.com2d1a3bb2007-07-02 00:26:00 +0530132/*
133 * capabilities register, can be used to selectively enable/disable features
134 * for backward compability
135 */
136#define CRB_NIC_CAPABILITIES_HOST NETXEN_NIC_REG(0x1a8)
137#define CRB_NIC_CAPABILITIES_FW NETXEN_NIC_REG(0x1dc)
Dhananjay Phadke443be792008-03-17 19:59:48 -0700138#define CRB_NIC_MSI_MODE_HOST NETXEN_NIC_REG(0x270)
Dhananjay Phadkee98e3352009-04-07 22:50:38 +0000139#define CRB_NIC_MSI_MODE_FW NETXEN_NIC_REG(0x274)
dhananjay.phadke@gmail.com2d1a3bb2007-07-02 00:26:00 +0530140
141#define INTR_SCHEME_PERPORT 0x1
Dhananjay Phadke443be792008-03-17 19:59:48 -0700142#define MSI_MODE_MULTIFUNC 0x1
Mithlesh Thukral6c80b182007-04-20 07:55:26 -0700143
Linsys Contractor Mithlesh Thukral0c25cfe2007-02-28 05:14:07 -0800144/* used for ethtool tests */
145#define CRB_SCRATCHPAD_TEST NETXEN_NIC_REG(0x280)
146
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400147/*
148 * CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
149 * which can be read by the Phantom host to get producer/consumer indexes from
150 * Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
151 * registers will be used for the addresses of the ring's shared memory
152 * on the Phantom.
153 */
154
Amit S. Kaleed25ffa2006-12-04 09:23:25 -0800155#define nx_get_temp_val(x) ((x) >> 16)
156#define nx_get_temp_state(x) ((x) & 0xffff)
157#define nx_encode_temp(val, state) (((val) << 16) | (state))
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400158
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400159/*
Amit S. Kaleed25ffa2006-12-04 09:23:25 -0800160 * CRB registers used by the receive peg logic.
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400161 */
162
163struct netxen_recv_crb {
Dhananjay Phadke7830b222008-07-21 19:44:00 -0700164 u32 crb_rcv_producer[NUM_RCV_DESC_RINGS];
Dhananjay Phadkef6d21f42009-04-07 22:50:46 +0000165 u32 crb_sts_consumer[NUM_STS_DESC_RINGS];
166 u32 sw_int_mask[NUM_STS_DESC_RINGS];
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400167};
168
Amit S. Kalecb8011a2006-11-29 09:00:10 -0800169/*
170 * Temperature control.
171 */
172enum {
173 NX_TEMP_NORMAL = 0x1, /* Normal operating range */
174 NX_TEMP_WARN, /* Sound alert, temperature getting high */
175 NX_TEMP_PANIC /* Fatal error, hardware has shut down. */
176};
177
Amit S. Kale3d396eb2006-10-21 15:33:03 -0400178#endif /* __NIC_PHAN_REG_H_ */