Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called COPYING. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This code implements the DMA subsystem. It provides a HW-neutral interface |
| 24 | * for other kernel code to use asynchronous memory copy capabilities, |
| 25 | * if present, and allows different HW DMA drivers to register as providing |
| 26 | * this capability. |
| 27 | * |
| 28 | * Due to the fact we are accelerating what is already a relatively fast |
| 29 | * operation, the code goes to great lengths to avoid additional overhead, |
| 30 | * such as locking. |
| 31 | * |
| 32 | * LOCKING: |
| 33 | * |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 34 | * The subsystem keeps a global list of dma_device structs it is protected by a |
| 35 | * mutex, dma_list_mutex. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 36 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 37 | * A subsystem can get access to a channel by calling dmaengine_get() followed |
| 38 | * by dma_find_channel(), or if it has need for an exclusive channel it can call |
| 39 | * dma_request_channel(). Once a channel is allocated a reference is taken |
| 40 | * against its corresponding driver to disable removal. |
| 41 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 42 | * Each device has a channels list, which runs unlocked but is never modified |
| 43 | * once the device is registered, it's just setup by the driver. |
| 44 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 45 | * See Documentation/dmaengine.txt for more details |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 46 | */ |
| 47 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 48 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 49 | |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 50 | #include <linux/dma-mapping.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 51 | #include <linux/init.h> |
| 52 | #include <linux/module.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 53 | #include <linux/mm.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 54 | #include <linux/device.h> |
| 55 | #include <linux/dmaengine.h> |
| 56 | #include <linux/hardirq.h> |
| 57 | #include <linux/spinlock.h> |
| 58 | #include <linux/percpu.h> |
| 59 | #include <linux/rcupdate.h> |
| 60 | #include <linux/mutex.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 61 | #include <linux/jiffies.h> |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 62 | #include <linux/rculist.h> |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 63 | #include <linux/idr.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 64 | #include <linux/slab.h> |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 65 | #include <linux/acpi.h> |
| 66 | #include <linux/acpi_dma.h> |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 67 | #include <linux/of_dma.h> |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 68 | #include <linux/mempool.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 69 | |
| 70 | static DEFINE_MUTEX(dma_list_mutex); |
Axel Lin | 21ef4b8 | 2011-07-20 11:32:28 +0800 | [diff] [blame] | 71 | static DEFINE_IDR(dma_idr); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 72 | static LIST_HEAD(dma_device_list); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 73 | static long dmaengine_ref_count; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 74 | |
| 75 | /* --- sysfs implementation --- */ |
| 76 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 77 | /** |
| 78 | * dev_to_dma_chan - convert a device pointer to the its sysfs container object |
| 79 | * @dev - device node |
| 80 | * |
| 81 | * Must be called under dma_list_mutex |
| 82 | */ |
| 83 | static struct dma_chan *dev_to_dma_chan(struct device *dev) |
| 84 | { |
| 85 | struct dma_chan_dev *chan_dev; |
| 86 | |
| 87 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
| 88 | return chan_dev->chan; |
| 89 | } |
| 90 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 91 | static ssize_t memcpy_count_show(struct device *dev, |
| 92 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 93 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 94 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 95 | unsigned long count = 0; |
| 96 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 97 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 98 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 99 | mutex_lock(&dma_list_mutex); |
| 100 | chan = dev_to_dma_chan(dev); |
| 101 | if (chan) { |
| 102 | for_each_possible_cpu(i) |
| 103 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
| 104 | err = sprintf(buf, "%lu\n", count); |
| 105 | } else |
| 106 | err = -ENODEV; |
| 107 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 108 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 109 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 110 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 111 | static DEVICE_ATTR_RO(memcpy_count); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 112 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 113 | static ssize_t bytes_transferred_show(struct device *dev, |
| 114 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 115 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 116 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 117 | unsigned long count = 0; |
| 118 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 119 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 120 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 121 | mutex_lock(&dma_list_mutex); |
| 122 | chan = dev_to_dma_chan(dev); |
| 123 | if (chan) { |
| 124 | for_each_possible_cpu(i) |
| 125 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
| 126 | err = sprintf(buf, "%lu\n", count); |
| 127 | } else |
| 128 | err = -ENODEV; |
| 129 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 130 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 131 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 132 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 133 | static DEVICE_ATTR_RO(bytes_transferred); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 134 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 135 | static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, |
| 136 | char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 137 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 138 | struct dma_chan *chan; |
| 139 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 140 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 141 | mutex_lock(&dma_list_mutex); |
| 142 | chan = dev_to_dma_chan(dev); |
| 143 | if (chan) |
| 144 | err = sprintf(buf, "%d\n", chan->client_count); |
| 145 | else |
| 146 | err = -ENODEV; |
| 147 | mutex_unlock(&dma_list_mutex); |
| 148 | |
| 149 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 150 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 151 | static DEVICE_ATTR_RO(in_use); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 152 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 153 | static struct attribute *dma_dev_attrs[] = { |
| 154 | &dev_attr_memcpy_count.attr, |
| 155 | &dev_attr_bytes_transferred.attr, |
| 156 | &dev_attr_in_use.attr, |
| 157 | NULL, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 158 | }; |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 159 | ATTRIBUTE_GROUPS(dma_dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 160 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 161 | static void chan_dev_release(struct device *dev) |
| 162 | { |
| 163 | struct dma_chan_dev *chan_dev; |
| 164 | |
| 165 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 166 | if (atomic_dec_and_test(chan_dev->idr_ref)) { |
| 167 | mutex_lock(&dma_list_mutex); |
| 168 | idr_remove(&dma_idr, chan_dev->dev_id); |
| 169 | mutex_unlock(&dma_list_mutex); |
| 170 | kfree(chan_dev->idr_ref); |
| 171 | } |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 172 | kfree(chan_dev); |
| 173 | } |
| 174 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 175 | static struct class dma_devclass = { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 176 | .name = "dma", |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 177 | .dev_groups = dma_dev_groups, |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 178 | .dev_release = chan_dev_release, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 179 | }; |
| 180 | |
| 181 | /* --- client and device registration --- */ |
| 182 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 183 | #define dma_device_satisfies_mask(device, mask) \ |
| 184 | __dma_device_satisfies_mask((device), &(mask)) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 185 | static int |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 186 | __dma_device_satisfies_mask(struct dma_device *device, |
| 187 | const dma_cap_mask_t *want) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 188 | { |
| 189 | dma_cap_mask_t has; |
| 190 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 191 | bitmap_and(has.bits, want->bits, device->cap_mask.bits, |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 192 | DMA_TX_TYPE_END); |
| 193 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); |
| 194 | } |
| 195 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 196 | static struct module *dma_chan_to_owner(struct dma_chan *chan) |
| 197 | { |
| 198 | return chan->device->dev->driver->owner; |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * balance_ref_count - catch up the channel reference count |
| 203 | * @chan - channel to balance ->client_count versus dmaengine_ref_count |
| 204 | * |
| 205 | * balance_ref_count must be called under dma_list_mutex |
| 206 | */ |
| 207 | static void balance_ref_count(struct dma_chan *chan) |
| 208 | { |
| 209 | struct module *owner = dma_chan_to_owner(chan); |
| 210 | |
| 211 | while (chan->client_count < dmaengine_ref_count) { |
| 212 | __module_get(owner); |
| 213 | chan->client_count++; |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | /** |
| 218 | * dma_chan_get - try to grab a dma channel's parent driver module |
| 219 | * @chan - channel to grab |
| 220 | * |
| 221 | * Must be called under dma_list_mutex |
| 222 | */ |
| 223 | static int dma_chan_get(struct dma_chan *chan) |
| 224 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 225 | struct module *owner = dma_chan_to_owner(chan); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 226 | int ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 227 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 228 | /* The channel is already in use, update client count */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 229 | if (chan->client_count) { |
| 230 | __module_get(owner); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 231 | goto out; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 232 | } |
| 233 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 234 | if (!try_module_get(owner)) |
| 235 | return -ENODEV; |
| 236 | |
| 237 | /* allocate upon first client reference */ |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 238 | if (chan->device->device_alloc_chan_resources) { |
| 239 | ret = chan->device->device_alloc_chan_resources(chan); |
| 240 | if (ret < 0) |
| 241 | goto err_out; |
| 242 | } |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 243 | |
| 244 | if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) |
| 245 | balance_ref_count(chan); |
| 246 | |
| 247 | out: |
| 248 | chan->client_count++; |
| 249 | return 0; |
| 250 | |
| 251 | err_out: |
| 252 | module_put(owner); |
| 253 | return ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | /** |
| 257 | * dma_chan_put - drop a reference to a dma channel's parent driver module |
| 258 | * @chan - channel to release |
| 259 | * |
| 260 | * Must be called under dma_list_mutex |
| 261 | */ |
| 262 | static void dma_chan_put(struct dma_chan *chan) |
| 263 | { |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 264 | /* This channel is not in use, bail out */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 265 | if (!chan->client_count) |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 266 | return; |
| 267 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 268 | chan->client_count--; |
| 269 | module_put(dma_chan_to_owner(chan)); |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 270 | |
| 271 | /* This channel is not in use anymore, free it */ |
| 272 | if (!chan->client_count && chan->device->device_free_chan_resources) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 273 | chan->device->device_free_chan_resources(chan); |
| 274 | } |
| 275 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 276 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
| 277 | { |
| 278 | enum dma_status status; |
| 279 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
| 280 | |
| 281 | dma_async_issue_pending(chan); |
| 282 | do { |
| 283 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 284 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 285 | pr_err("%s: timeout!\n", __func__); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 286 | return DMA_ERROR; |
| 287 | } |
Bartlomiej Zolnierkiewicz | 2cbe7fe | 2012-11-08 10:02:07 +0000 | [diff] [blame] | 288 | if (status != DMA_IN_PROGRESS) |
| 289 | break; |
| 290 | cpu_relax(); |
| 291 | } while (1); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 292 | |
| 293 | return status; |
| 294 | } |
| 295 | EXPORT_SYMBOL(dma_sync_wait); |
| 296 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 297 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 298 | * dma_cap_mask_all - enable iteration over all operation types |
| 299 | */ |
| 300 | static dma_cap_mask_t dma_cap_mask_all; |
| 301 | |
| 302 | /** |
| 303 | * dma_chan_tbl_ent - tracks channel allocations per core/operation |
| 304 | * @chan - associated channel for this entry |
| 305 | */ |
| 306 | struct dma_chan_tbl_ent { |
| 307 | struct dma_chan *chan; |
| 308 | }; |
| 309 | |
| 310 | /** |
| 311 | * channel_table - percpu lookup table for memory-to-memory offload providers |
| 312 | */ |
Tejun Heo | a29d8b8 | 2010-02-02 14:39:15 +0900 | [diff] [blame] | 313 | static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 314 | |
| 315 | static int __init dma_channel_table_init(void) |
| 316 | { |
| 317 | enum dma_transaction_type cap; |
| 318 | int err = 0; |
| 319 | |
| 320 | bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); |
| 321 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 322 | /* 'interrupt', 'private', and 'slave' are channel capabilities, |
| 323 | * but are not associated with an operation so they do not need |
| 324 | * an entry in the channel_table |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 325 | */ |
| 326 | clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 327 | clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 328 | clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); |
| 329 | |
| 330 | for_each_dma_cap_mask(cap, dma_cap_mask_all) { |
| 331 | channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); |
| 332 | if (!channel_table[cap]) { |
| 333 | err = -ENOMEM; |
| 334 | break; |
| 335 | } |
| 336 | } |
| 337 | |
| 338 | if (err) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 339 | pr_err("initialization failure\n"); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 340 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
Markus Elfring | a9507ca | 2014-12-01 06:06:57 +0100 | [diff] [blame] | 341 | free_percpu(channel_table[cap]); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 342 | } |
| 343 | |
| 344 | return err; |
| 345 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 346 | arch_initcall(dma_channel_table_init); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 347 | |
| 348 | /** |
| 349 | * dma_find_channel - find a channel to carry out the operation |
| 350 | * @tx_type: transaction type |
| 351 | */ |
| 352 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) |
| 353 | { |
Christoph Lameter | e7dcaa4 | 2009-10-03 19:48:23 +0900 | [diff] [blame] | 354 | return this_cpu_read(channel_table[tx_type]->chan); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 355 | } |
| 356 | EXPORT_SYMBOL(dma_find_channel); |
| 357 | |
Dave Jiang | a2bd114 | 2012-04-04 16:10:46 -0700 | [diff] [blame] | 358 | /* |
| 359 | * net_dma_find_channel - find a channel for net_dma |
| 360 | * net_dma has alignment requirements |
| 361 | */ |
| 362 | struct dma_chan *net_dma_find_channel(void) |
| 363 | { |
| 364 | struct dma_chan *chan = dma_find_channel(DMA_MEMCPY); |
| 365 | if (chan && !is_dma_copy_aligned(chan->device, 1, 1, 1)) |
| 366 | return NULL; |
| 367 | |
| 368 | return chan; |
| 369 | } |
| 370 | EXPORT_SYMBOL(net_dma_find_channel); |
| 371 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 372 | /** |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 373 | * dma_issue_pending_all - flush all pending operations across all channels |
| 374 | */ |
| 375 | void dma_issue_pending_all(void) |
| 376 | { |
| 377 | struct dma_device *device; |
| 378 | struct dma_chan *chan; |
| 379 | |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 380 | rcu_read_lock(); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 381 | list_for_each_entry_rcu(device, &dma_device_list, global_node) { |
| 382 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 383 | continue; |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 384 | list_for_each_entry(chan, &device->channels, device_node) |
| 385 | if (chan->client_count) |
| 386 | device->device_issue_pending(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 387 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 388 | rcu_read_unlock(); |
| 389 | } |
| 390 | EXPORT_SYMBOL(dma_issue_pending_all); |
| 391 | |
| 392 | /** |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 393 | * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 394 | */ |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 395 | static bool dma_chan_is_local(struct dma_chan *chan, int cpu) |
| 396 | { |
| 397 | int node = dev_to_node(chan->device->dev); |
| 398 | return node == -1 || cpumask_test_cpu(cpu, cpumask_of_node(node)); |
| 399 | } |
| 400 | |
| 401 | /** |
| 402 | * min_chan - returns the channel with min count and in the same numa-node as the cpu |
| 403 | * @cap: capability to match |
| 404 | * @cpu: cpu index which the channel should be close to |
| 405 | * |
| 406 | * If some channels are close to the given cpu, the one with the lowest |
| 407 | * reference count is returned. Otherwise, cpu is ignored and only the |
| 408 | * reference count is taken into account. |
| 409 | * Must be called under dma_list_mutex. |
| 410 | */ |
| 411 | static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 412 | { |
| 413 | struct dma_device *device; |
| 414 | struct dma_chan *chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 415 | struct dma_chan *min = NULL; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 416 | struct dma_chan *localmin = NULL; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 417 | |
| 418 | list_for_each_entry(device, &dma_device_list, global_node) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 419 | if (!dma_has_cap(cap, device->cap_mask) || |
| 420 | dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 421 | continue; |
| 422 | list_for_each_entry(chan, &device->channels, device_node) { |
| 423 | if (!chan->client_count) |
| 424 | continue; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 425 | if (!min || chan->table_count < min->table_count) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 426 | min = chan; |
| 427 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 428 | if (dma_chan_is_local(chan, cpu)) |
| 429 | if (!localmin || |
| 430 | chan->table_count < localmin->table_count) |
| 431 | localmin = chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 432 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 433 | } |
| 434 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 435 | chan = localmin ? localmin : min; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 436 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 437 | if (chan) |
| 438 | chan->table_count++; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 439 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 440 | return chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 441 | } |
| 442 | |
| 443 | /** |
| 444 | * dma_channel_rebalance - redistribute the available channels |
| 445 | * |
| 446 | * Optimize for cpu isolation (each cpu gets a dedicated channel for an |
| 447 | * operation type) in the SMP case, and operation isolation (avoid |
| 448 | * multi-tasking channels) in the non-SMP case. Must be called under |
| 449 | * dma_list_mutex. |
| 450 | */ |
| 451 | static void dma_channel_rebalance(void) |
| 452 | { |
| 453 | struct dma_chan *chan; |
| 454 | struct dma_device *device; |
| 455 | int cpu; |
| 456 | int cap; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 457 | |
| 458 | /* undo the last distribution */ |
| 459 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 460 | for_each_possible_cpu(cpu) |
| 461 | per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; |
| 462 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 463 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 464 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 465 | continue; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 466 | list_for_each_entry(chan, &device->channels, device_node) |
| 467 | chan->table_count = 0; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 468 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 469 | |
| 470 | /* don't populate the channel_table if no clients are available */ |
| 471 | if (!dmaengine_ref_count) |
| 472 | return; |
| 473 | |
| 474 | /* redistribute available channels */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 475 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 476 | for_each_online_cpu(cpu) { |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 477 | chan = min_chan(cap, cpu); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 478 | per_cpu_ptr(channel_table[cap], cpu)->chan = chan; |
| 479 | } |
| 480 | } |
| 481 | |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 482 | int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) |
| 483 | { |
| 484 | struct dma_device *device; |
| 485 | |
| 486 | if (!chan || !caps) |
| 487 | return -EINVAL; |
| 488 | |
| 489 | device = chan->device; |
| 490 | |
| 491 | /* check if the channel supports slave transactions */ |
| 492 | if (!test_bit(DMA_SLAVE, device->cap_mask.bits)) |
| 493 | return -ENXIO; |
| 494 | |
| 495 | /* |
| 496 | * Check whether it reports it uses the generic slave |
| 497 | * capabilities, if not, that means it doesn't support any |
| 498 | * kind of slave capabilities reporting. |
| 499 | */ |
| 500 | if (!device->directions) |
| 501 | return -ENXIO; |
| 502 | |
| 503 | caps->src_addr_widths = device->src_addr_widths; |
| 504 | caps->dst_addr_widths = device->dst_addr_widths; |
| 505 | caps->directions = device->directions; |
| 506 | caps->residue_granularity = device->residue_granularity; |
| 507 | |
| 508 | caps->cmd_pause = !!device->device_pause; |
| 509 | caps->cmd_terminate = !!device->device_terminate_all; |
| 510 | |
| 511 | return 0; |
| 512 | } |
| 513 | EXPORT_SYMBOL_GPL(dma_get_slave_caps); |
| 514 | |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 515 | static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, |
| 516 | struct dma_device *dev, |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 517 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 518 | { |
| 519 | struct dma_chan *chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 520 | |
| 521 | if (!__dma_device_satisfies_mask(dev, mask)) { |
| 522 | pr_debug("%s: wrong capabilities\n", __func__); |
| 523 | return NULL; |
| 524 | } |
| 525 | /* devices with multiple channels need special handling as we need to |
| 526 | * ensure that all channels are either private or public. |
| 527 | */ |
| 528 | if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) |
| 529 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 530 | /* some channels are already publicly allocated */ |
| 531 | if (chan->client_count) |
| 532 | return NULL; |
| 533 | } |
| 534 | |
| 535 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 536 | if (chan->client_count) { |
| 537 | pr_debug("%s: %s busy\n", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 538 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 539 | continue; |
| 540 | } |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 541 | if (fn && !fn(chan, fn_param)) { |
| 542 | pr_debug("%s: %s filter said false\n", |
| 543 | __func__, dma_chan_name(chan)); |
| 544 | continue; |
| 545 | } |
| 546 | return chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 547 | } |
| 548 | |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 549 | return NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 550 | } |
| 551 | |
| 552 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 553 | * dma_request_slave_channel - try to get specific channel exclusively |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 554 | * @chan: target channel |
| 555 | */ |
| 556 | struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) |
| 557 | { |
| 558 | int err = -EBUSY; |
| 559 | |
| 560 | /* lock against __dma_request_channel */ |
| 561 | mutex_lock(&dma_list_mutex); |
| 562 | |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 563 | if (chan->client_count == 0) { |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 564 | err = dma_chan_get(chan); |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 565 | if (err) |
| 566 | pr_debug("%s: failed to get %s: (%d)\n", |
| 567 | __func__, dma_chan_name(chan), err); |
| 568 | } else |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 569 | chan = NULL; |
| 570 | |
| 571 | mutex_unlock(&dma_list_mutex); |
| 572 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 573 | |
| 574 | return chan; |
| 575 | } |
| 576 | EXPORT_SYMBOL_GPL(dma_get_slave_channel); |
| 577 | |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 578 | struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) |
| 579 | { |
| 580 | dma_cap_mask_t mask; |
| 581 | struct dma_chan *chan; |
| 582 | int err; |
| 583 | |
| 584 | dma_cap_zero(mask); |
| 585 | dma_cap_set(DMA_SLAVE, mask); |
| 586 | |
| 587 | /* lock against __dma_request_channel */ |
| 588 | mutex_lock(&dma_list_mutex); |
| 589 | |
| 590 | chan = private_candidate(&mask, device, NULL, NULL); |
| 591 | if (chan) { |
| 592 | err = dma_chan_get(chan); |
| 593 | if (err) { |
| 594 | pr_debug("%s: failed to get %s: (%d)\n", |
| 595 | __func__, dma_chan_name(chan), err); |
| 596 | chan = NULL; |
| 597 | } |
| 598 | } |
| 599 | |
| 600 | mutex_unlock(&dma_list_mutex); |
| 601 | |
| 602 | return chan; |
| 603 | } |
| 604 | EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); |
| 605 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 606 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 607 | * __dma_request_channel - try to allocate an exclusive channel |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 608 | * @mask: capabilities that the channel must satisfy |
| 609 | * @fn: optional callback to disposition available channels |
| 610 | * @fn_param: opaque parameter to pass to dma_filter_fn |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 611 | * |
| 612 | * Returns pointer to appropriate DMA channel on success or NULL. |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 613 | */ |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 614 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
| 615 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 616 | { |
| 617 | struct dma_device *device, *_d; |
| 618 | struct dma_chan *chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 619 | int err; |
| 620 | |
| 621 | /* Find a channel */ |
| 622 | mutex_lock(&dma_list_mutex); |
| 623 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 624 | chan = private_candidate(mask, device, fn, fn_param); |
| 625 | if (chan) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 626 | /* Found a suitable channel, try to grab, prep, and |
| 627 | * return it. We first set DMA_PRIVATE to disable |
| 628 | * balance_ref_count as this channel will not be |
| 629 | * published in the general-purpose allocator |
| 630 | */ |
| 631 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 632 | device->privatecnt++; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 633 | err = dma_chan_get(chan); |
| 634 | |
| 635 | if (err == -ENODEV) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 636 | pr_debug("%s: %s module removed\n", |
| 637 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 638 | list_del_rcu(&device->global_node); |
| 639 | } else if (err) |
Fabio Estevam | d8b5348 | 2012-02-21 12:51:59 -0200 | [diff] [blame] | 640 | pr_debug("%s: failed to get %s: (%d)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 641 | __func__, dma_chan_name(chan), err); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 642 | else |
| 643 | break; |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 644 | if (--device->privatecnt == 0) |
| 645 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 646 | chan = NULL; |
| 647 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 648 | } |
| 649 | mutex_unlock(&dma_list_mutex); |
| 650 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 651 | pr_debug("%s: %s (%s)\n", |
| 652 | __func__, |
| 653 | chan ? "success" : "fail", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 654 | chan ? dma_chan_name(chan) : NULL); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 655 | |
| 656 | return chan; |
| 657 | } |
| 658 | EXPORT_SYMBOL_GPL(__dma_request_channel); |
| 659 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 660 | /** |
| 661 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 662 | * @dev: pointer to client device structure |
| 663 | * @name: slave channel name |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 664 | * |
| 665 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 666 | */ |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 667 | struct dma_chan *dma_request_slave_channel_reason(struct device *dev, |
| 668 | const char *name) |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 669 | { |
| 670 | /* If device-tree is present get slave info from here */ |
| 671 | if (dev->of_node) |
| 672 | return of_dma_request_slave_channel(dev->of_node, name); |
| 673 | |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 674 | /* If device was enumerated by ACPI get slave info from here */ |
Andy Shevchenko | 0f6a928 | 2014-02-06 13:25:40 +0200 | [diff] [blame] | 675 | if (ACPI_HANDLE(dev)) |
| 676 | return acpi_dma_request_slave_chan_by_name(dev, name); |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 677 | |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 678 | return ERR_PTR(-ENODEV); |
| 679 | } |
| 680 | EXPORT_SYMBOL_GPL(dma_request_slave_channel_reason); |
| 681 | |
| 682 | /** |
| 683 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 684 | * @dev: pointer to client device structure |
| 685 | * @name: slave channel name |
| 686 | * |
| 687 | * Returns pointer to appropriate DMA channel on success or NULL. |
| 688 | */ |
| 689 | struct dma_chan *dma_request_slave_channel(struct device *dev, |
| 690 | const char *name) |
| 691 | { |
| 692 | struct dma_chan *ch = dma_request_slave_channel_reason(dev, name); |
| 693 | if (IS_ERR(ch)) |
| 694 | return NULL; |
| 695 | return ch; |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 696 | } |
| 697 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); |
| 698 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 699 | void dma_release_channel(struct dma_chan *chan) |
| 700 | { |
| 701 | mutex_lock(&dma_list_mutex); |
| 702 | WARN_ONCE(chan->client_count != 1, |
| 703 | "chan reference count %d != 1\n", chan->client_count); |
| 704 | dma_chan_put(chan); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 705 | /* drop PRIVATE cap enabled by __dma_request_channel() */ |
| 706 | if (--chan->device->privatecnt == 0) |
| 707 | dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 708 | mutex_unlock(&dma_list_mutex); |
| 709 | } |
| 710 | EXPORT_SYMBOL_GPL(dma_release_channel); |
| 711 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 712 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 713 | * dmaengine_get - register interest in dma_channels |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 714 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 715 | void dmaengine_get(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 716 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 717 | struct dma_device *device, *_d; |
| 718 | struct dma_chan *chan; |
| 719 | int err; |
| 720 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 721 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 722 | dmaengine_ref_count++; |
| 723 | |
| 724 | /* try to grab channels */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 725 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 726 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 727 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 728 | list_for_each_entry(chan, &device->channels, device_node) { |
| 729 | err = dma_chan_get(chan); |
| 730 | if (err == -ENODEV) { |
| 731 | /* module removed before we could use it */ |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 732 | list_del_rcu(&device->global_node); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 733 | break; |
| 734 | } else if (err) |
Fabio Estevam | 0eb5a35 | 2012-10-04 17:11:16 -0700 | [diff] [blame] | 735 | pr_debug("%s: failed to get %s: (%d)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 736 | __func__, dma_chan_name(chan), err); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 737 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 738 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 739 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 740 | /* if this is the first reference and there were channels |
| 741 | * waiting we need to rebalance to get those channels |
| 742 | * incorporated into the channel table |
| 743 | */ |
| 744 | if (dmaengine_ref_count == 1) |
| 745 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 746 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 747 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 748 | EXPORT_SYMBOL(dmaengine_get); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 749 | |
| 750 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 751 | * dmaengine_put - let dma drivers be removed when ref_count == 0 |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 752 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 753 | void dmaengine_put(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 754 | { |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 755 | struct dma_device *device; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 756 | struct dma_chan *chan; |
| 757 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 758 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 759 | dmaengine_ref_count--; |
| 760 | BUG_ON(dmaengine_ref_count < 0); |
| 761 | /* drop channel references */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 762 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 763 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 764 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 765 | list_for_each_entry(chan, &device->channels, device_node) |
| 766 | dma_chan_put(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 767 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 768 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 769 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 770 | EXPORT_SYMBOL(dmaengine_put); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 771 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 772 | static bool device_has_all_tx_types(struct dma_device *device) |
| 773 | { |
| 774 | /* A device that satisfies this test has channels that will never cause |
| 775 | * an async_tx channel switch event as all possible operation types can |
| 776 | * be handled. |
| 777 | */ |
| 778 | #ifdef CONFIG_ASYNC_TX_DMA |
| 779 | if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) |
| 780 | return false; |
| 781 | #endif |
| 782 | |
| 783 | #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE) |
| 784 | if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) |
| 785 | return false; |
| 786 | #endif |
| 787 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 788 | #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE) |
| 789 | if (!dma_has_cap(DMA_XOR, device->cap_mask)) |
| 790 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 791 | |
| 792 | #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 793 | if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) |
| 794 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 795 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 796 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 797 | |
| 798 | #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE) |
| 799 | if (!dma_has_cap(DMA_PQ, device->cap_mask)) |
| 800 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 801 | |
| 802 | #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 803 | if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) |
| 804 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 805 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 806 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 807 | |
| 808 | return true; |
| 809 | } |
| 810 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 811 | static int get_dma_id(struct dma_device *device) |
| 812 | { |
| 813 | int rc; |
| 814 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 815 | mutex_lock(&dma_list_mutex); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 816 | |
Tejun Heo | 69ee266 | 2013-02-27 17:04:03 -0800 | [diff] [blame] | 817 | rc = idr_alloc(&dma_idr, NULL, 0, 0, GFP_KERNEL); |
| 818 | if (rc >= 0) |
| 819 | device->dev_id = rc; |
| 820 | |
| 821 | mutex_unlock(&dma_list_mutex); |
| 822 | return rc < 0 ? rc : 0; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 823 | } |
| 824 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 825 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 826 | * dma_async_device_register - registers DMA devices found |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 827 | * @device: &dma_device |
| 828 | */ |
| 829 | int dma_async_device_register(struct dma_device *device) |
| 830 | { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 831 | int chancnt = 0, rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 832 | struct dma_chan* chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 833 | atomic_t *idr_ref; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 834 | |
| 835 | if (!device) |
| 836 | return -ENODEV; |
| 837 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 838 | /* validate device routines */ |
| 839 | BUG_ON(dma_has_cap(DMA_MEMCPY, device->cap_mask) && |
| 840 | !device->device_prep_dma_memcpy); |
| 841 | BUG_ON(dma_has_cap(DMA_XOR, device->cap_mask) && |
| 842 | !device->device_prep_dma_xor); |
Dan Williams | 099f53c | 2009-04-08 14:28:37 -0700 | [diff] [blame] | 843 | BUG_ON(dma_has_cap(DMA_XOR_VAL, device->cap_mask) && |
| 844 | !device->device_prep_dma_xor_val); |
Dan Williams | b2f46fd | 2009-07-14 12:20:36 -0700 | [diff] [blame] | 845 | BUG_ON(dma_has_cap(DMA_PQ, device->cap_mask) && |
| 846 | !device->device_prep_dma_pq); |
| 847 | BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) && |
| 848 | !device->device_prep_dma_pq_val); |
Zhang Wei | 9b941c6 | 2008-03-13 17:45:28 -0700 | [diff] [blame] | 849 | BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 850 | !device->device_prep_dma_interrupt); |
Ira Snyder | a86ee03 | 2010-09-30 11:46:44 +0000 | [diff] [blame] | 851 | BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && |
| 852 | !device->device_prep_dma_sg); |
Sascha Hauer | 782bc95 | 2010-09-30 13:56:32 +0000 | [diff] [blame] | 853 | BUG_ON(dma_has_cap(DMA_CYCLIC, device->cap_mask) && |
| 854 | !device->device_prep_dma_cyclic); |
Jassi Brar | b14dab7 | 2011-10-13 12:33:30 +0530 | [diff] [blame] | 855 | BUG_ON(dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && |
| 856 | !device->device_prep_interleaved_dma); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 857 | |
Linus Walleij | 0793448 | 2010-03-26 16:50:49 -0700 | [diff] [blame] | 858 | BUG_ON(!device->device_tx_status); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 859 | BUG_ON(!device->device_issue_pending); |
| 860 | BUG_ON(!device->dev); |
| 861 | |
Maxime Ripard | ecc19d1 | 2014-11-17 14:42:53 +0100 | [diff] [blame] | 862 | WARN(dma_has_cap(DMA_SLAVE, device->cap_mask) && !device->directions, |
| 863 | "this driver doesn't support generic slave capabilities reporting\n"); |
| 864 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 865 | /* note: this only matters in the |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 866 | * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 867 | */ |
| 868 | if (device_has_all_tx_types(device)) |
| 869 | dma_cap_set(DMA_ASYNC_TX, device->cap_mask); |
| 870 | |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 871 | idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); |
| 872 | if (!idr_ref) |
| 873 | return -ENOMEM; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 874 | rc = get_dma_id(device); |
| 875 | if (rc != 0) { |
| 876 | kfree(idr_ref); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 877 | return rc; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 878 | } |
| 879 | |
| 880 | atomic_set(idr_ref, 0); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 881 | |
| 882 | /* represent channels in sysfs. Probably want devs too */ |
| 883 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 884 | rc = -ENOMEM; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 885 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 886 | if (chan->local == NULL) |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 887 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 888 | chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); |
| 889 | if (chan->dev == NULL) { |
| 890 | free_percpu(chan->local); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 891 | chan->local = NULL; |
| 892 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 893 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 894 | |
| 895 | chan->chan_id = chancnt++; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 896 | chan->dev->device.class = &dma_devclass; |
| 897 | chan->dev->device.parent = device->dev; |
| 898 | chan->dev->chan = chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 899 | chan->dev->idr_ref = idr_ref; |
| 900 | chan->dev->dev_id = device->dev_id; |
| 901 | atomic_inc(idr_ref); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 902 | dev_set_name(&chan->dev->device, "dma%dchan%d", |
Kay Sievers | 06190d8 | 2008-11-11 13:12:33 -0700 | [diff] [blame] | 903 | device->dev_id, chan->chan_id); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 904 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 905 | rc = device_register(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 906 | if (rc) { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 907 | free_percpu(chan->local); |
| 908 | chan->local = NULL; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 909 | kfree(chan->dev); |
| 910 | atomic_dec(idr_ref); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 911 | goto err_out; |
| 912 | } |
Dan Williams | 7cc5bf9 | 2008-07-08 11:58:21 -0700 | [diff] [blame] | 913 | chan->client_count = 0; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 914 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 915 | device->chancnt = chancnt; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 916 | |
| 917 | mutex_lock(&dma_list_mutex); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 918 | /* take references on public channels */ |
| 919 | if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 920 | list_for_each_entry(chan, &device->channels, device_node) { |
| 921 | /* if clients are already waiting for channels we need |
| 922 | * to take references on their behalf |
| 923 | */ |
| 924 | if (dma_chan_get(chan) == -ENODEV) { |
| 925 | /* note we can only get here for the first |
| 926 | * channel as the remaining channels are |
| 927 | * guaranteed to get a reference |
| 928 | */ |
| 929 | rc = -ENODEV; |
| 930 | mutex_unlock(&dma_list_mutex); |
| 931 | goto err_out; |
| 932 | } |
| 933 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 934 | list_add_tail_rcu(&device->global_node, &dma_device_list); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 935 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 936 | device->privatecnt++; /* Always private */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 937 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 938 | mutex_unlock(&dma_list_mutex); |
| 939 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 940 | return 0; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 941 | |
| 942 | err_out: |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 943 | /* if we never registered a channel just release the idr */ |
| 944 | if (atomic_read(idr_ref) == 0) { |
| 945 | mutex_lock(&dma_list_mutex); |
| 946 | idr_remove(&dma_idr, device->dev_id); |
| 947 | mutex_unlock(&dma_list_mutex); |
| 948 | kfree(idr_ref); |
| 949 | return rc; |
| 950 | } |
| 951 | |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 952 | list_for_each_entry(chan, &device->channels, device_node) { |
| 953 | if (chan->local == NULL) |
| 954 | continue; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 955 | mutex_lock(&dma_list_mutex); |
| 956 | chan->dev->chan = NULL; |
| 957 | mutex_unlock(&dma_list_mutex); |
| 958 | device_unregister(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 959 | free_percpu(chan->local); |
| 960 | } |
| 961 | return rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 962 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 963 | EXPORT_SYMBOL(dma_async_device_register); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 964 | |
| 965 | /** |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 966 | * dma_async_device_unregister - unregister a DMA device |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 967 | * @device: &dma_device |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 968 | * |
| 969 | * This routine is called by dma driver exit routines, dmaengine holds module |
| 970 | * references to prevent it being called while channels are in use. |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 971 | */ |
| 972 | void dma_async_device_unregister(struct dma_device *device) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 973 | { |
| 974 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 975 | |
| 976 | mutex_lock(&dma_list_mutex); |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 977 | list_del_rcu(&device->global_node); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 978 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 979 | mutex_unlock(&dma_list_mutex); |
| 980 | |
| 981 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 982 | WARN_ONCE(chan->client_count, |
| 983 | "%s called while %d clients hold a reference\n", |
| 984 | __func__, chan->client_count); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 985 | mutex_lock(&dma_list_mutex); |
| 986 | chan->dev->chan = NULL; |
| 987 | mutex_unlock(&dma_list_mutex); |
| 988 | device_unregister(&chan->dev->device); |
Anatolij Gustschin | adef477 | 2010-01-26 10:26:06 +0100 | [diff] [blame] | 989 | free_percpu(chan->local); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 990 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 991 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 992 | EXPORT_SYMBOL(dma_async_device_unregister); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 993 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 994 | struct dmaengine_unmap_pool { |
| 995 | struct kmem_cache *cache; |
| 996 | const char *name; |
| 997 | mempool_t *pool; |
| 998 | size_t size; |
| 999 | }; |
| 1000 | |
| 1001 | #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } |
| 1002 | static struct dmaengine_unmap_pool unmap_pool[] = { |
| 1003 | __UNMAP_POOL(2), |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 1004 | #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1005 | __UNMAP_POOL(16), |
| 1006 | __UNMAP_POOL(128), |
| 1007 | __UNMAP_POOL(256), |
| 1008 | #endif |
| 1009 | }; |
| 1010 | |
| 1011 | static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1012 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1013 | int order = get_count_order(nr); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1014 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1015 | switch (order) { |
| 1016 | case 0 ... 1: |
| 1017 | return &unmap_pool[0]; |
| 1018 | case 2 ... 4: |
| 1019 | return &unmap_pool[1]; |
| 1020 | case 5 ... 7: |
| 1021 | return &unmap_pool[2]; |
| 1022 | case 8: |
| 1023 | return &unmap_pool[3]; |
| 1024 | default: |
| 1025 | BUG(); |
| 1026 | return NULL; |
| 1027 | } |
| 1028 | } |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1029 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1030 | static void dmaengine_unmap(struct kref *kref) |
| 1031 | { |
| 1032 | struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); |
| 1033 | struct device *dev = unmap->dev; |
| 1034 | int cnt, i; |
| 1035 | |
| 1036 | cnt = unmap->to_cnt; |
| 1037 | for (i = 0; i < cnt; i++) |
| 1038 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1039 | DMA_TO_DEVICE); |
| 1040 | cnt += unmap->from_cnt; |
| 1041 | for (; i < cnt; i++) |
| 1042 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1043 | DMA_FROM_DEVICE); |
| 1044 | cnt += unmap->bidi_cnt; |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1045 | for (; i < cnt; i++) { |
| 1046 | if (unmap->addr[i] == 0) |
| 1047 | continue; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1048 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1049 | DMA_BIDIRECTIONAL); |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1050 | } |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1051 | cnt = unmap->map_cnt; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1052 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
| 1053 | } |
| 1054 | |
| 1055 | void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) |
| 1056 | { |
| 1057 | if (unmap) |
| 1058 | kref_put(&unmap->kref, dmaengine_unmap); |
| 1059 | } |
| 1060 | EXPORT_SYMBOL_GPL(dmaengine_unmap_put); |
| 1061 | |
| 1062 | static void dmaengine_destroy_unmap_pool(void) |
| 1063 | { |
| 1064 | int i; |
| 1065 | |
| 1066 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1067 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1068 | |
| 1069 | if (p->pool) |
| 1070 | mempool_destroy(p->pool); |
| 1071 | p->pool = NULL; |
| 1072 | if (p->cache) |
| 1073 | kmem_cache_destroy(p->cache); |
| 1074 | p->cache = NULL; |
| 1075 | } |
| 1076 | } |
| 1077 | |
| 1078 | static int __init dmaengine_init_unmap_pool(void) |
| 1079 | { |
| 1080 | int i; |
| 1081 | |
| 1082 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1083 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1084 | size_t size; |
| 1085 | |
| 1086 | size = sizeof(struct dmaengine_unmap_data) + |
| 1087 | sizeof(dma_addr_t) * p->size; |
| 1088 | |
| 1089 | p->cache = kmem_cache_create(p->name, size, 0, |
| 1090 | SLAB_HWCACHE_ALIGN, NULL); |
| 1091 | if (!p->cache) |
| 1092 | break; |
| 1093 | p->pool = mempool_create_slab_pool(1, p->cache); |
| 1094 | if (!p->pool) |
| 1095 | break; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1096 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1097 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1098 | if (i == ARRAY_SIZE(unmap_pool)) |
| 1099 | return 0; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1100 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1101 | dmaengine_destroy_unmap_pool(); |
| 1102 | return -ENOMEM; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1103 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1104 | |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1105 | struct dmaengine_unmap_data * |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1106 | dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1107 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1108 | struct dmaengine_unmap_data *unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1109 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1110 | unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); |
| 1111 | if (!unmap) |
| 1112 | return NULL; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1113 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1114 | memset(unmap, 0, sizeof(*unmap)); |
| 1115 | kref_init(&unmap->kref); |
| 1116 | unmap->dev = dev; |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1117 | unmap->map_cnt = nr; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1118 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1119 | return unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1120 | } |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1121 | EXPORT_SYMBOL(dmaengine_get_unmap_data); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1122 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1123 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, |
| 1124 | struct dma_chan *chan) |
| 1125 | { |
| 1126 | tx->chan = chan; |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 1127 | #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1128 | spin_lock_init(&tx->lock); |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1129 | #endif |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1130 | } |
| 1131 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); |
| 1132 | |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1133 | /* dma_wait_for_async_tx - spin wait for a transaction to complete |
| 1134 | * @tx: in-flight transaction to wait on |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1135 | */ |
| 1136 | enum dma_status |
| 1137 | dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 1138 | { |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1139 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1140 | |
| 1141 | if (!tx) |
Vinod Koul | adfedd9 | 2013-10-16 13:29:02 +0530 | [diff] [blame] | 1142 | return DMA_COMPLETE; |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1143 | |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1144 | while (tx->cookie == -EBUSY) { |
| 1145 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
| 1146 | pr_err("%s timeout waiting for descriptor submission\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 1147 | __func__); |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1148 | return DMA_ERROR; |
| 1149 | } |
| 1150 | cpu_relax(); |
| 1151 | } |
| 1152 | return dma_sync_wait(tx->chan, tx->cookie); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1153 | } |
| 1154 | EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); |
| 1155 | |
| 1156 | /* dma_run_dependencies - helper routine for dma drivers to process |
| 1157 | * (start) dependent operations on their target channel |
| 1158 | * @tx: transaction with dependencies |
| 1159 | */ |
| 1160 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx) |
| 1161 | { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1162 | struct dma_async_tx_descriptor *dep = txd_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1163 | struct dma_async_tx_descriptor *dep_next; |
| 1164 | struct dma_chan *chan; |
| 1165 | |
| 1166 | if (!dep) |
| 1167 | return; |
| 1168 | |
Yuri Tikhonov | dd59b85 | 2009-01-12 15:17:20 -0700 | [diff] [blame] | 1169 | /* we'll submit tx->next now, so clear the link */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1170 | txd_clear_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1171 | chan = dep->chan; |
| 1172 | |
| 1173 | /* keep submitting up until a channel switch is detected |
| 1174 | * in that case we will be called again as a result of |
| 1175 | * processing the interrupt from async_tx_channel_switch |
| 1176 | */ |
| 1177 | for (; dep; dep = dep_next) { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1178 | txd_lock(dep); |
| 1179 | txd_clear_parent(dep); |
| 1180 | dep_next = txd_next(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1181 | if (dep_next && dep_next->chan == chan) |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1182 | txd_clear_next(dep); /* ->next will be submitted */ |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1183 | else |
| 1184 | dep_next = NULL; /* submit current dep and terminate */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1185 | txd_unlock(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1186 | |
| 1187 | dep->tx_submit(dep); |
| 1188 | } |
| 1189 | |
| 1190 | chan->device->device_issue_pending(chan); |
| 1191 | } |
| 1192 | EXPORT_SYMBOL_GPL(dma_run_dependencies); |
| 1193 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1194 | static int __init dma_bus_init(void) |
| 1195 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1196 | int err = dmaengine_init_unmap_pool(); |
| 1197 | |
| 1198 | if (err) |
| 1199 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1200 | return class_register(&dma_devclass); |
| 1201 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 1202 | arch_initcall(dma_bus_init); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1203 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1204 | |