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Ramax Lo4ab989712008-07-07 18:12:36 +01001/* linux/arch/arm/mach-s3c2440/mach-at2440evb.c
2 *
3 * Copyright (c) 2008 Ramax Lo <ramaxlo@gmail.com>
4 * Based on mach-anubis.c by Ben Dooks <ben@simtec.co.uk>
5 * and modifications by SBZ <sbz@spgui.org> and
6 * Weibing <http://weibing.blogbus.com>
7 *
Justin P. Mattock50a23e62010-10-16 10:36:23 -07008 * For product information, visit http://www.arm.com/
Ramax Lo4ab989712008-07-07 18:12:36 +01009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/types.h>
17#include <linux/interrupt.h>
18#include <linux/list.h>
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/serial_core.h>
Ramax Lo66493c22008-07-07 18:12:37 +010023#include <linux/dm9000.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010024#include <linux/platform_device.h>
25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
Russell Kinga09e64f2008-08-05 16:14:15 +010030#include <mach/hardware.h>
Ben Dooks1d19fdb2008-11-10 10:59:29 +000031#include <mach/fb.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010032#include <asm/irq.h>
33#include <asm/mach-types.h>
34
Ben Dooksa2b7ba92008-10-07 22:26:09 +010035#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010036#include <mach/regs-gpio.h>
37#include <mach/regs-mem.h>
38#include <mach/regs-lcd.h>
Ben Dooks7926b5a2008-10-30 10:14:35 +000039#include <plat/nand.h>
Ben Dooks3e1b7762008-10-31 16:14:40 +000040#include <plat/iic.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010041
42#include <linux/mtd/mtd.h>
43#include <linux/mtd/nand.h>
44#include <linux/mtd/nand_ecc.h>
45#include <linux/mtd/partitions.h>
46
Ben Dooksd5120ae2008-10-07 23:09:51 +010047#include <plat/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010048#include <plat/devs.h>
49#include <plat/cpu.h>
Ramax Loe2d54062009-01-07 03:28:31 +010050#include <plat/mci.h>
Ramax Lo4ab989712008-07-07 18:12:36 +010051
52static struct map_desc at2440evb_iodesc[] __initdata = {
53 /* Nothing here */
54};
55
56#define UCON S3C2410_UCON_DEFAULT
57#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
58#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
59
Ramax Lo4ab989712008-07-07 18:12:36 +010060static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
61 [0] = {
62 .hwport = 0,
63 .flags = 0,
64 .ucon = UCON,
65 .ulcon = ULCON,
66 .ufcon = UFCON,
Thomas Abrahamafba7f92011-10-24 11:47:51 +020067 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
Ramax Lo4ab989712008-07-07 18:12:36 +010068 },
69 [1] = {
70 .hwport = 1,
71 .flags = 0,
72 .ucon = UCON,
73 .ulcon = ULCON,
74 .ufcon = UFCON,
Thomas Abrahamafba7f92011-10-24 11:47:51 +020075 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
Ramax Lo4ab989712008-07-07 18:12:36 +010076 },
77};
78
79/* NAND Flash on AT2440EVB board */
80
Ben Dooks2a3a1802009-09-28 13:59:49 +030081static struct mtd_partition __initdata at2440evb_default_nand_part[] = {
Ramax Lo4ab989712008-07-07 18:12:36 +010082 [0] = {
83 .name = "Boot Agent",
84 .size = SZ_256K,
85 .offset = 0,
86 },
87 [1] = {
88 .name = "Kernel",
89 .size = SZ_2M,
90 .offset = SZ_256K,
91 },
92 [2] = {
93 .name = "Root",
94 .offset = SZ_256K + SZ_2M,
95 .size = MTDPART_SIZ_FULL,
96 },
97};
98
Ben Dooks2a3a1802009-09-28 13:59:49 +030099static struct s3c2410_nand_set __initdata at2440evb_nand_sets[] = {
Ramax Lo4ab989712008-07-07 18:12:36 +0100100 [0] = {
101 .name = "nand",
102 .nr_chips = 1,
103 .nr_partitions = ARRAY_SIZE(at2440evb_default_nand_part),
104 .partitions = at2440evb_default_nand_part,
105 },
106};
107
Ben Dooks2a3a1802009-09-28 13:59:49 +0300108static struct s3c2410_platform_nand __initdata at2440evb_nand_info = {
Ramax Lo4ab989712008-07-07 18:12:36 +0100109 .tacls = 25,
110 .twrph0 = 55,
111 .twrph1 = 40,
112 .nr_sets = ARRAY_SIZE(at2440evb_nand_sets),
113 .sets = at2440evb_nand_sets,
114};
115
Ramax Lo66493c22008-07-07 18:12:37 +0100116/* DM9000AEP 10/100 ethernet controller */
117
118static struct resource at2440evb_dm9k_resource[] = {
119 [0] = {
120 .start = S3C2410_CS3,
121 .end = S3C2410_CS3 + 3,
122 .flags = IORESOURCE_MEM
123 },
124 [1] = {
125 .start = S3C2410_CS3 + 4,
126 .end = S3C2410_CS3 + 7,
127 .flags = IORESOURCE_MEM
128 },
129 [2] = {
130 .start = IRQ_EINT7,
131 .end = IRQ_EINT7,
132 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
133 }
134};
135
136static struct dm9000_plat_data at2440evb_dm9k_pdata = {
137 .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
138};
139
140static struct platform_device at2440evb_device_eth = {
141 .name = "dm9000",
142 .id = -1,
143 .num_resources = ARRAY_SIZE(at2440evb_dm9k_resource),
144 .resource = at2440evb_dm9k_resource,
145 .dev = {
146 .platform_data = &at2440evb_dm9k_pdata,
147 },
148};
149
Ben Dooks22c810a2010-01-18 16:24:22 +0900150static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = {
Ben Dooks070276d2009-05-17 22:32:23 +0100151 .gpio_detect = S3C2410_GPG(10),
Ben Dooks4a045cb2008-11-10 10:59:28 +0000152};
153
Ben Dooks1d19fdb2008-11-10 10:59:29 +0000154/* 7" LCD panel */
155
156static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = {
157
158 .lcdcon5 = S3C2410_LCDCON5_FRM565 |
159 S3C2410_LCDCON5_INVVLINE |
160 S3C2410_LCDCON5_INVVFRAME |
161 S3C2410_LCDCON5_PWREN |
162 S3C2410_LCDCON5_HWSWP,
163
164 .type = S3C2410_LCDCON1_TFT,
165
166 .width = 800,
167 .height = 480,
168
169 .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */
170 .xres = 800,
171 .yres = 480,
172 .bpp = 16,
173 .left_margin = 88,
174 .right_margin = 40,
175 .hsync_len = 128,
176 .upper_margin = 32,
177 .lower_margin = 11,
178 .vsync_len = 2,
179};
180
181static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = {
182 .displays = &at2440evb_lcd_cfg,
183 .num_displays = 1,
184 .default_display = 0,
185};
186
Ramax Lo4ab989712008-07-07 18:12:36 +0100187static struct platform_device *at2440evb_devices[] __initdata = {
Ben Dooksb8132482009-11-23 00:13:39 +0000188 &s3c_device_ohci,
Ramax Lo4ab989712008-07-07 18:12:36 +0100189 &s3c_device_wdt,
190 &s3c_device_adc,
Ben Dooks3e1b7762008-10-31 16:14:40 +0000191 &s3c_device_i2c0,
Ramax Lo4ab989712008-07-07 18:12:36 +0100192 &s3c_device_rtc,
193 &s3c_device_nand,
Ben Dooks4a045cb2008-11-10 10:59:28 +0000194 &s3c_device_sdi,
Ben Dooks1d19fdb2008-11-10 10:59:29 +0000195 &s3c_device_lcd,
Ramax Lo66493c22008-07-07 18:12:37 +0100196 &at2440evb_device_eth,
Ramax Lo4ab989712008-07-07 18:12:36 +0100197};
198
199static void __init at2440evb_map_io(void)
200{
Ramax Lo4ab989712008-07-07 18:12:36 +0100201 s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc));
202 s3c24xx_init_clocks(16934400);
203 s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs));
204}
205
206static void __init at2440evb_init(void)
207{
Ben Dooks1d19fdb2008-11-10 10:59:29 +0000208 s3c24xx_fb_set_platdata(&at2440evb_fb_info);
Ben Dooks22c810a2010-01-18 16:24:22 +0900209 s3c24xx_mci_set_platdata(&at2440evb_mci_pdata);
Ben Dooks2a3a1802009-09-28 13:59:49 +0300210 s3c_nand_set_platdata(&at2440evb_nand_info);
Ben Dooks3e1b7762008-10-31 16:14:40 +0000211 s3c_i2c0_set_platdata(NULL);
Ben Dooks56c035c2008-12-18 16:17:37 +0000212
Ramax Lo4ab989712008-07-07 18:12:36 +0100213 platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices));
214}
215
216
217MACHINE_START(AT2440EVB, "AT2440EVB")
Nicolas Pitre69d50712011-07-05 22:38:17 -0400218 .atag_offset = 0x100,
Ramax Lo4ab989712008-07-07 18:12:36 +0100219 .map_io = at2440evb_map_io,
220 .init_machine = at2440evb_init,
221 .init_irq = s3c24xx_init_irq,
222 .timer = &s3c24xx_timer,
223MACHINE_END