blob: 6b304eb39bd22c96b64c6a99629ef4195db721b5 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Code to handle x86 style IRQs plus some generic interrupt stuff.
7 *
8 * Copyright (C) 1992 Linus Torvalds
9 * Copyright (C) 1994 - 2000 Ralf Baechle
10 */
11#include <linux/delay.h>
12#include <linux/init.h>
13#include <linux/ioport.h>
14#include <linux/interrupt.h>
Ralf Baechle0509cfd2015-07-08 14:46:08 +020015#include <linux/irqchip.h>
Andrew Bresticker079a4602014-09-18 14:47:11 -070016#include <linux/irqdomain.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/kernel.h>
Paul Burton5f93ef52015-05-22 16:51:03 +010018#include <linux/of_irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/spinlock.h>
Rafael J. Wysocki84652e82011-07-16 00:59:54 +020020#include <linux/syscore_ops.h>
David Howellsca4d3e672010-10-07 14:08:54 +010021#include <linux/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070022
23#include <asm/i8259.h>
24#include <asm/io.h>
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026/*
27 * This is the 'legacy' 8259A Programmable Interrupt Controller,
28 * present in the majority of PC/AT boxes.
29 * plus some generic x86 specific things if generic specifics makes
30 * any sense at all.
31 * this file should become arch/i386/kernel/irq.c when the old irq.c
32 * moves to arch independent land
33 */
34
Atsushi Nemotoa0be2f72007-02-20 20:08:45 +090035static int i8259A_auto_eoi = -1;
Ralf Baechle89650872010-02-27 12:53:38 +010036DEFINE_RAW_SPINLOCK(i8259A_lock);
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000037static void disable_8259A_irq(struct irq_data *d);
38static void enable_8259A_irq(struct irq_data *d);
39static void mask_and_ack_8259A(struct irq_data *d);
Yoichi Yuasad80c1c02007-09-13 11:04:04 +090040static void init_8259A(int auto_eoi);
Linus Torvalds1da177e2005-04-16 15:20:36 -070041
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090042static struct irq_chip i8259A_chip = {
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000043 .name = "XT-PIC",
44 .irq_mask = disable_8259A_irq,
45 .irq_disable = disable_8259A_irq,
46 .irq_unmask = enable_8259A_irq,
47 .irq_mask_ack = mask_and_ack_8259A,
Linus Torvalds1da177e2005-04-16 15:20:36 -070048};
49
50/*
51 * 8259A PIC functions to handle ISA devices:
52 */
53
54/*
55 * This contains the irq mask for both 8259A irq controllers,
56 */
57static unsigned int cached_irq_mask = 0xffff;
58
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090059#define cached_master_mask (cached_irq_mask)
60#define cached_slave_mask (cached_irq_mask >> 8)
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000062static void disable_8259A_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070063{
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000064 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070065 unsigned long flags;
66
Atsushi Nemoto2fa79372007-01-14 23:41:42 +090067 mask = 1 << irq;
Ralf Baechle89650872010-02-27 12:53:38 +010068 raw_spin_lock_irqsave(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070069 cached_irq_mask |= mask;
70 if (irq & 8)
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090071 outb(cached_slave_mask, PIC_SLAVE_IMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 else
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090073 outb(cached_master_mask, PIC_MASTER_IMR);
Ralf Baechle89650872010-02-27 12:53:38 +010074 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070075}
76
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000077static void enable_8259A_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070078{
Thomas Gleixner7c8d9482011-03-23 21:08:57 +000079 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -070080 unsigned long flags;
81
Atsushi Nemoto2fa79372007-01-14 23:41:42 +090082 mask = ~(1 << irq);
Ralf Baechle89650872010-02-27 12:53:38 +010083 raw_spin_lock_irqsave(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070084 cached_irq_mask &= mask;
85 if (irq & 8)
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090086 outb(cached_slave_mask, PIC_SLAVE_IMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 else
Atsushi Nemoto2cafe972006-12-07 02:04:17 +090088 outb(cached_master_mask, PIC_MASTER_IMR);
Ralf Baechle89650872010-02-27 12:53:38 +010089 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070090}
91
92int i8259A_irq_pending(unsigned int irq)
93{
Atsushi Nemoto2fa79372007-01-14 23:41:42 +090094 unsigned int mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 unsigned long flags;
96 int ret;
97
Atsushi Nemoto2fa79372007-01-14 23:41:42 +090098 irq -= I8259A_IRQ_BASE;
99 mask = 1 << irq;
Ralf Baechle89650872010-02-27 12:53:38 +0100100 raw_spin_lock_irqsave(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 if (irq < 8)
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900102 ret = inb(PIC_MASTER_CMD) & mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 else
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900104 ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
Ralf Baechle89650872010-02-27 12:53:38 +0100105 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700106
107 return ret;
108}
109
110void make_8259A_irq(unsigned int irq)
111{
112 disable_irq_nosync(irq);
Thomas Gleixnere4ec7982011-03-27 15:19:28 +0200113 irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 enable_irq(irq);
115}
116
117/*
118 * This function assumes to be called rarely. Switching between
119 * 8259A registers is slow.
120 * This has to be protected by the irq controller spinlock
121 * before being called.
122 */
123static inline int i8259A_irq_real(unsigned int irq)
124{
125 int value;
126 int irqmask = 1 << irq;
127
128 if (irq < 8) {
Ralf Baechle21a151d2007-10-11 23:46:15 +0100129 outb(0x0B, PIC_MASTER_CMD); /* ISR register */
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900130 value = inb(PIC_MASTER_CMD) & irqmask;
Ralf Baechle21a151d2007-10-11 23:46:15 +0100131 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132 return value;
133 }
Ralf Baechle21a151d2007-10-11 23:46:15 +0100134 outb(0x0B, PIC_SLAVE_CMD); /* ISR register */
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900135 value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
Ralf Baechle21a151d2007-10-11 23:46:15 +0100136 outb(0x0A, PIC_SLAVE_CMD); /* back to the IRR register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137 return value;
138}
139
140/*
141 * Careful! The 8259A is a fragile beast, it pretty
142 * much _has_ to be done exactly like this (mask it
143 * first, _then_ send the EOI, and the order of EOI
144 * to the two 8259s is important!
145 */
Thomas Gleixner7c8d9482011-03-23 21:08:57 +0000146static void mask_and_ack_8259A(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147{
Thomas Gleixner7c8d9482011-03-23 21:08:57 +0000148 unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 unsigned long flags;
150
Atsushi Nemoto2fa79372007-01-14 23:41:42 +0900151 irqmask = 1 << irq;
Ralf Baechle89650872010-02-27 12:53:38 +0100152 raw_spin_lock_irqsave(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 /*
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900154 * Lightweight spurious IRQ detection. We do not want
155 * to overdo spurious IRQ handling - it's usually a sign
156 * of hardware problems, so we only do the checks we can
157 * do without slowing down good hardware unnecessarily.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 *
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900159 * Note that IRQ7 and IRQ15 (the two spurious IRQs
160 * usually resulting from the 8259A-1|2 PICs) occur
161 * even if the IRQ is masked in the 8259A. Thus we
162 * can check spurious 8259A IRQs without doing the
163 * quite slow i8259A_irq_real() call for every IRQ.
164 * This does not cover 100% of spurious interrupts,
165 * but should be enough to warn the user that there
166 * is something bad going on ...
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 */
168 if (cached_irq_mask & irqmask)
169 goto spurious_8259A_irq;
170 cached_irq_mask |= irqmask;
171
172handle_real_irq:
173 if (irq & 8) {
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900174 inb(PIC_SLAVE_IMR); /* DUMMY - (do we need this?) */
175 outb(cached_slave_mask, PIC_SLAVE_IMR);
Ralf Baechle21a151d2007-10-11 23:46:15 +0100176 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
177 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 } else {
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900179 inb(PIC_MASTER_IMR); /* DUMMY - (do we need this?) */
180 outb(cached_master_mask, PIC_MASTER_IMR);
Ralf Baechle70342282013-01-22 12:59:30 +0100181 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 }
Ralf Baechle89650872010-02-27 12:53:38 +0100183 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 return;
185
186spurious_8259A_irq:
187 /*
188 * this is the slow path - should happen rarely.
189 */
190 if (i8259A_irq_real(irq))
191 /*
192 * oops, the IRQ _is_ in service according to the
193 * 8259A - not spurious, go handle it.
194 */
195 goto handle_real_irq;
196
197 {
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900198 static int spurious_irq_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199 /*
200 * At this point we can be sure the IRQ is spurious,
201 * lets ACK and report it. [once per IRQ]
202 */
203 if (!(spurious_irq_mask & irqmask)) {
204 printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
205 spurious_irq_mask |= irqmask;
206 }
207 atomic_inc(&irq_err_count);
208 /*
209 * Theoretically we do not have to handle this IRQ,
210 * but in Linux this does not cause problems and is
211 * simpler for us.
212 */
213 goto handle_real_irq;
214 }
215}
216
Rafael J. Wysocki84652e82011-07-16 00:59:54 +0200217static void i8259A_resume(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218{
Atsushi Nemotoa0be2f72007-02-20 20:08:45 +0900219 if (i8259A_auto_eoi >= 0)
220 init_8259A(i8259A_auto_eoi);
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900221}
222
Rafael J. Wysocki84652e82011-07-16 00:59:54 +0200223static void i8259A_shutdown(void)
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900224{
225 /* Put the i8259A into a quiescent state that
226 * the kernel initialization code can get it
227 * out of.
228 */
Atsushi Nemotoa0be2f72007-02-20 20:08:45 +0900229 if (i8259A_auto_eoi >= 0) {
230 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
Hillf Dantonfe0b0302011-08-04 22:46:41 +0800231 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
Atsushi Nemotoa0be2f72007-02-20 20:08:45 +0900232 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233}
234
Rafael J. Wysocki84652e82011-07-16 00:59:54 +0200235static struct syscore_ops i8259_syscore_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 .resume = i8259A_resume,
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900237 .shutdown = i8259A_shutdown,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238};
239
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240static int __init i8259A_init_sysfs(void)
241{
Rafael J. Wysocki84652e82011-07-16 00:59:54 +0200242 register_syscore_ops(&i8259_syscore_ops);
243 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700244}
245
246device_initcall(i8259A_init_sysfs);
247
Yoichi Yuasad80c1c02007-09-13 11:04:04 +0900248static void init_8259A(int auto_eoi)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249{
250 unsigned long flags;
251
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900252 i8259A_auto_eoi = auto_eoi;
253
Ralf Baechle89650872010-02-27 12:53:38 +0100254 raw_spin_lock_irqsave(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900256 outb(0xff, PIC_MASTER_IMR); /* mask all of 8259A-1 */
257 outb(0xff, PIC_SLAVE_IMR); /* mask all of 8259A-2 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700258
259 /*
260 * outb_p - this has to work on a wide range of PC hardware.
261 */
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900262 outb_p(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */
263 outb_p(I8259A_IRQ_BASE + 0, PIC_MASTER_IMR); /* ICW2: 8259A-1 IR0 mapped to I8259A_IRQ_BASE + 0x00 */
264 outb_p(1U << PIC_CASCADE_IR, PIC_MASTER_IMR); /* 8259A-1 (the master) has a slave on IR2 */
265 if (auto_eoi) /* master does Auto EOI */
266 outb_p(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
267 else /* master expects normal EOI */
268 outb_p(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900270 outb_p(0x11, PIC_SLAVE_CMD); /* ICW1: select 8259A-2 init */
271 outb_p(I8259A_IRQ_BASE + 8, PIC_SLAVE_IMR); /* ICW2: 8259A-2 IR0 mapped to I8259A_IRQ_BASE + 0x08 */
272 outb_p(PIC_CASCADE_IR, PIC_SLAVE_IMR); /* 8259A-2 is a slave on master's IR2 */
273 outb_p(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700274 if (auto_eoi)
275 /*
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900276 * In AEOI mode we just have to mask the interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277 * when acking.
278 */
Thomas Gleixner7c8d9482011-03-23 21:08:57 +0000279 i8259A_chip.irq_mask_ack = disable_8259A_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700280 else
Thomas Gleixner7c8d9482011-03-23 21:08:57 +0000281 i8259A_chip.irq_mask_ack = mask_and_ack_8259A;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282
283 udelay(100); /* wait for 8259A to initialize */
284
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900285 outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
286 outb(cached_slave_mask, PIC_SLAVE_IMR); /* restore slave IRQ mask */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
Ralf Baechle89650872010-02-27 12:53:38 +0100288 raw_spin_unlock_irqrestore(&i8259A_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289}
290
291/*
292 * IRQ2 is cascade interrupt to second interrupt controller
293 */
294static struct irqaction irq2 = {
Thomas Gleixner4e451712007-08-28 09:03:01 +0000295 .handler = no_action,
Thomas Gleixner4e451712007-08-28 09:03:01 +0000296 .name = "cascade",
Liming Wang5c22cd42011-08-26 07:00:04 +0800297 .flags = IRQF_NO_THREAD,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298};
299
300static struct resource pic1_io_resource = {
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900301 .name = "pic1",
302 .start = PIC_MASTER_CMD,
303 .end = PIC_MASTER_IMR,
304 .flags = IORESOURCE_BUSY
Linus Torvalds1da177e2005-04-16 15:20:36 -0700305};
306
307static struct resource pic2_io_resource = {
Atsushi Nemoto2cafe972006-12-07 02:04:17 +0900308 .name = "pic2",
309 .start = PIC_SLAVE_CMD,
310 .end = PIC_SLAVE_IMR,
311 .flags = IORESOURCE_BUSY
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312};
313
Andrew Bresticker079a4602014-09-18 14:47:11 -0700314static int i8259A_irq_domain_map(struct irq_domain *d, unsigned int virq,
315 irq_hw_number_t hw)
316{
317 irq_set_chip_and_handler(virq, &i8259A_chip, handle_level_irq);
318 irq_set_probe(virq);
319 return 0;
320}
321
322static struct irq_domain_ops i8259A_ops = {
323 .map = i8259A_irq_domain_map,
324 .xlate = irq_domain_xlate_onecell,
325};
326
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327/*
328 * On systems with i8259-style interrupt controllers we assume for
Ralf Baechle28a78792005-08-16 15:46:05 +0000329 * driver compatibility reasons interrupts 0 - 15 to be the i8259
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330 * interrupts even if the hardware uses a different interrupt numbering.
331 */
Paul Burton5f93ef52015-05-22 16:51:03 +0100332struct irq_domain * __init __init_i8259_irqs(struct device_node *node)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333{
Andrew Bresticker079a4602014-09-18 14:47:11 -0700334 struct irq_domain *domain;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335
Thomas Bogendoerfer639702b2007-04-08 13:28:44 +0200336 insert_resource(&ioport_resource, &pic1_io_resource);
337 insert_resource(&ioport_resource, &pic2_io_resource);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
339 init_8259A(0);
340
Paul Burton5f93ef52015-05-22 16:51:03 +0100341 domain = irq_domain_add_legacy(node, 16, I8259A_IRQ_BASE, 0,
Andrew Bresticker079a4602014-09-18 14:47:11 -0700342 &i8259A_ops, NULL);
343 if (!domain)
344 panic("Failed to add i8259 IRQ domain");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345
Atsushi Nemoto2fa79372007-01-14 23:41:42 +0900346 setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2);
Paul Burton5f93ef52015-05-22 16:51:03 +0100347 return domain;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348}
Paul Burton5f93ef52015-05-22 16:51:03 +0100349
350void __init init_i8259_irqs(void)
351{
352 __init_i8259_irqs(NULL);
353}
354
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +0200355static void i8259_irq_dispatch(struct irq_desc *desc)
Paul Burton5f93ef52015-05-22 16:51:03 +0100356{
Thomas Gleixner4ba37502015-07-31 21:59:10 +0200357 struct irq_domain *domain = irq_desc_get_handler_data(desc);
Paul Burton5f93ef52015-05-22 16:51:03 +0100358 int hwirq = i8259_irq();
Thomas Gleixner4ba37502015-07-31 21:59:10 +0200359 unsigned int irq;
Paul Burton5f93ef52015-05-22 16:51:03 +0100360
361 if (hwirq < 0)
362 return;
363
364 irq = irq_linear_revmap(domain, hwirq);
365 generic_handle_irq(irq);
366}
367
368int __init i8259_of_init(struct device_node *node, struct device_node *parent)
369{
370 struct irq_domain *domain;
371 unsigned int parent_irq;
372
373 parent_irq = irq_of_parse_and_map(node, 0);
374 if (!parent_irq) {
375 pr_err("Failed to map i8259 parent IRQ\n");
376 return -ENODEV;
377 }
378
379 domain = __init_i8259_irqs(node);
Axel Lina51e80d2015-10-01 22:26:44 +0800380 irq_set_chained_handler_and_data(parent_irq, i8259_irq_dispatch,
381 domain);
Paul Burton5f93ef52015-05-22 16:51:03 +0100382 return 0;
383}
384IRQCHIP_DECLARE(i8259, "intel,i8259", i8259_of_init);