blob: 552e8d1a33715778f7368b20c4ee7bc7f352da1d [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
Michal Kazior6c5151a2014-02-27 18:50:04 +0200229 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200230 skb_queue_purge(&htt->rx_in_ord_compl_q);
Michal Kazior426e10e2016-03-06 16:14:43 +0200231 skb_queue_purge(&htt->tx_fetch_ind_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232
Michal Kaziorc5450702015-01-24 12:14:48 +0200233 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300234
235 dma_free_coherent(htt->ar->dev,
236 (htt->rx_ring.size *
237 sizeof(htt->rx_ring.paddrs_ring)),
238 htt->rx_ring.paddrs_ring,
239 htt->rx_ring.base_paddr);
240
241 dma_free_coherent(htt->ar->dev,
242 sizeof(*htt->rx_ring.alloc_idx.vaddr),
243 htt->rx_ring.alloc_idx.vaddr,
244 htt->rx_ring.alloc_idx.paddr);
245
246 kfree(htt->rx_ring.netbufs_ring);
247}
248
249static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
250{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252 int idx;
253 struct sk_buff *msdu;
254
Michal Kazior45967082014-02-27 18:50:05 +0200255 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
Michal Kazior8d60ee82014-02-27 18:50:05 +0200257 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200258 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200259 return NULL;
260 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300261
262 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
263 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300264 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200265 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266
267 idx++;
268 idx &= htt->rx_ring.size_mask;
269 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
270 htt->rx_ring.fill_cnt--;
271
Michal Kazior4de02802014-10-23 17:04:23 +0300272 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200273 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300274 msdu->len + skb_tailroom(msdu),
275 DMA_FROM_DEVICE);
276 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
277 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300278
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 return msdu;
280}
281
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100282/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
284 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200285 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200287 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200289 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300290 struct htt_rx_desc *rx_desc;
291
Michal Kazior45967082014-02-27 18:50:05 +0200292 lockdep_assert_held(&htt->rx_ring.lock);
293
Michal Kazior9aa505d2014-11-18 09:24:47 +0200294 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300295 int last_msdu, msdu_len_invalid, msdu_chained;
296
Michal Kazior9aa505d2014-11-18 09:24:47 +0200297 msdu = ath10k_htt_rx_netbuf_pop(htt);
298 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200299 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200300 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200301 }
302
303 __skb_queue_tail(amsdu, msdu);
304
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 rx_desc = (struct htt_rx_desc *)msdu->data;
306
307 /* FIXME: we must report msdu payload since this is what caller
308 * expects now */
309 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
310 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311
312 /*
313 * Sanity check - confirm the HW is finished filling in the
314 * rx data.
315 * If the HW and SW are working correctly, then it's guaranteed
316 * that the HW's MAC DMA is done before this point in the SW.
317 * To prevent the case that we handle a stale Rx descriptor,
318 * just assert for now until we have a way to recover.
319 */
320 if (!(__le32_to_cpu(rx_desc->attention.flags)
321 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 }
325
326 /*
327 * Copy the FW rx descriptor for this MSDU from the rx
328 * indication message into the MSDU's netbuf. HL uses the
329 * same rx indication message definition as LL, and simply
330 * appends new info (fields from the HW rx desc, and the
331 * MSDU payload itself). So, the offset into the rx
332 * indication message only has to account for the standard
333 * offset of the per-MSDU FW rx desc info within the
334 * message, and how many bytes of the per-MSDU FW rx desc
335 * info have already been consumed. (And the endianness of
336 * the host, since for a big-endian host, the rx ind
337 * message contents, including the per-MSDU rx desc bytes,
338 * were byteswapped during upload.)
339 */
340 if (*fw_desc_len > 0) {
341 rx_desc->fw_desc.info0 = **fw_desc;
342 /*
343 * The target is expected to only provide the basic
344 * per-MSDU rx descriptors. Just to be sure, verify
345 * that the target has not attached extension data
346 * (e.g. LRO flow ID).
347 */
348
349 /* or more, if there's extension data */
350 (*fw_desc)++;
351 (*fw_desc_len)--;
352 } else {
353 /*
354 * When an oversized AMSDU happened, FW will lost
355 * some of MSDU status - in this case, the FW
356 * descriptors provided will be less than the
357 * actual MSDUs inside this MPDU. Mark the FW
358 * descriptors so that it will still deliver to
359 * upper stack, if no CRC error for this MPDU.
360 *
361 * FIX THIS - the FW descriptors are actually for
362 * MSDUs in the end of this A-MSDU instead of the
363 * beginning.
364 */
365 rx_desc->fw_desc.info0 = 0;
366 }
367
368 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
369 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
370 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700371 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300372 RX_MSDU_START_INFO0_MSDU_LENGTH);
373 msdu_chained = rx_desc->frag_info.ring2_more_count;
374
375 if (msdu_len_invalid)
376 msdu_len = 0;
377
378 skb_trim(msdu, 0);
379 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
380 msdu_len -= msdu->len;
381
Michal Kazior9aa505d2014-11-18 09:24:47 +0200382 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200384 msdu = ath10k_htt_rx_netbuf_pop(htt);
385 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200386 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200387 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300388 }
389
Michal Kazior9aa505d2014-11-18 09:24:47 +0200390 __skb_queue_tail(amsdu, msdu);
391 skb_trim(msdu, 0);
392 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
393 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300394 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300395 }
396
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700397 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
Kalle Valo5e3dd152013-06-12 20:52:10 +0300398 RX_MSDU_END_INFO0_LAST_MSDU;
399
Michal Kaziorb04e2042014-10-23 17:04:27 +0300400 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300401 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200402
403 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300404 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406
Michal Kazior9aa505d2014-11-18 09:24:47 +0200407 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100408 msdu_chaining = -1;
409
Kalle Valo5e3dd152013-06-12 20:52:10 +0300410 /*
411 * Don't refill the ring yet.
412 *
413 * First, the elements popped here are still in use - it is not
414 * safe to overwrite them until the matching call to
415 * mpdu_desc_list_next. Second, for efficiency it is preferable to
416 * refill the rx ring with 1 PPDU's worth of rx buffers (something
417 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
418 * (something like 3 buffers). Consequently, we'll rely on the txrx
419 * SW to tell us when it is done pulling all the PPDU's rx buffers
420 * out of the rx ring, and then refill it just once.
421 */
422
423 return msdu_chaining;
424}
425
Michal Kazior6e712d42013-09-24 10:18:36 +0200426static void ath10k_htt_rx_replenish_task(unsigned long ptr)
427{
428 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300429
Michal Kazior6e712d42013-09-24 10:18:36 +0200430 ath10k_htt_rx_msdu_buff_replenish(htt);
431}
432
Michal Kaziorc5450702015-01-24 12:14:48 +0200433static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
434 u32 paddr)
435{
436 struct ath10k *ar = htt->ar;
437 struct ath10k_skb_rxcb *rxcb;
438 struct sk_buff *msdu;
439
440 lockdep_assert_held(&htt->rx_ring.lock);
441
442 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
443 if (!msdu)
444 return NULL;
445
446 rxcb = ATH10K_SKB_RXCB(msdu);
447 hash_del(&rxcb->hlist);
448 htt->rx_ring.fill_cnt--;
449
450 dma_unmap_single(htt->ar->dev, rxcb->paddr,
451 msdu->len + skb_tailroom(msdu),
452 DMA_FROM_DEVICE);
453 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
454 msdu->data, msdu->len + skb_tailroom(msdu));
455
456 return msdu;
457}
458
459static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
460 struct htt_rx_in_ord_ind *ev,
461 struct sk_buff_head *list)
462{
463 struct ath10k *ar = htt->ar;
464 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
465 struct htt_rx_desc *rxd;
466 struct sk_buff *msdu;
467 int msdu_count;
468 bool is_offload;
469 u32 paddr;
470
471 lockdep_assert_held(&htt->rx_ring.lock);
472
473 msdu_count = __le16_to_cpu(ev->msdu_count);
474 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
475
476 while (msdu_count--) {
477 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
478
479 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
480 if (!msdu) {
481 __skb_queue_purge(list);
482 return -ENOENT;
483 }
484
485 __skb_queue_tail(list, msdu);
486
487 if (!is_offload) {
488 rxd = (void *)msdu->data;
489
490 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
491
492 skb_put(msdu, sizeof(*rxd));
493 skb_pull(msdu, sizeof(*rxd));
494 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
495
496 if (!(__le32_to_cpu(rxd->attention.flags) &
497 RX_ATTENTION_FLAGS_MSDU_DONE)) {
498 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
499 return -EIO;
500 }
501 }
502
503 msdu_desc++;
504 }
505
506 return 0;
507}
508
Michal Kazior95bf21f2014-05-16 17:15:39 +0300509int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200511 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512 dma_addr_t paddr;
513 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300514 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
516
Michal Kazior51fc7d72014-10-23 17:04:24 +0300517 htt->rx_confused = false;
518
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100519 /* XXX: The fill level could be changed during runtime in response to
520 * the host processing latency. Is this really worth it?
521 */
522 htt->rx_ring.size = HTT_RX_RING_SIZE;
523 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
524 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200527 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return -EINVAL;
529 }
530
Kalle Valo5e3dd152013-06-12 20:52:10 +0300531 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300532 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300533 GFP_KERNEL);
534 if (!htt->rx_ring.netbufs_ring)
535 goto err_netbuf;
536
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300537 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
538
Felix Fietkaud6cb23b52015-11-24 11:36:52 +0100539 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300540 if (!vaddr)
541 goto err_dma_ring;
542
543 htt->rx_ring.paddrs_ring = vaddr;
544 htt->rx_ring.base_paddr = paddr;
545
546 vaddr = dma_alloc_coherent(htt->ar->dev,
547 sizeof(*htt->rx_ring.alloc_idx.vaddr),
Felix Fietkaud6cb23b52015-11-24 11:36:52 +0100548 &paddr, GFP_KERNEL);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300549 if (!vaddr)
550 goto err_dma_idx;
551
552 htt->rx_ring.alloc_idx.vaddr = vaddr;
553 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200554 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300555 *htt->rx_ring.alloc_idx.vaddr = 0;
556
557 /* Initialize the Rx refill retry timer */
558 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
559
560 spin_lock_init(&htt->rx_ring.lock);
561
562 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200563 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
564 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300565
Michal Kazior6e712d42013-09-24 10:18:36 +0200566 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
567 (unsigned long)htt);
568
Michal Kazior6c5151a2014-02-27 18:50:04 +0200569 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200570 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior426e10e2016-03-06 16:14:43 +0200571 skb_queue_head_init(&htt->tx_fetch_ind_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200572
573 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
574 (unsigned long)htt);
575
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 htt->rx_ring.size, htt->rx_ring.fill_level);
578 return 0;
579
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580err_dma_idx:
581 dma_free_coherent(htt->ar->dev,
582 (htt->rx_ring.size *
583 sizeof(htt->rx_ring.paddrs_ring)),
584 htt->rx_ring.paddrs_ring,
585 htt->rx_ring.base_paddr);
586err_dma_ring:
587 kfree(htt->rx_ring.netbufs_ring);
588err_netbuf:
589 return -ENOMEM;
590}
591
Michal Kazior7aa7a722014-08-25 12:09:38 +0200592static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
593 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596 case HTT_RX_MPDU_ENCRYPT_NONE:
597 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300598 case HTT_RX_MPDU_ENCRYPT_WEP40:
599 case HTT_RX_MPDU_ENCRYPT_WEP104:
600 return IEEE80211_WEP_IV_LEN;
601 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
602 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
603 return IEEE80211_TKIP_IV_LEN;
604 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
605 return IEEE80211_CCMP_HDR_LEN;
606 case HTT_RX_MPDU_ENCRYPT_WEP128:
607 case HTT_RX_MPDU_ENCRYPT_WAPI:
608 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300609 }
610
Michal Kazior890d3b22014-10-23 17:04:22 +0300611 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return 0;
613}
614
Michal Kazior890d3b22014-10-23 17:04:22 +0300615#define MICHAEL_MIC_LEN 8
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
618 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619{
620 switch (type) {
621 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300622 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300623 case HTT_RX_MPDU_ENCRYPT_WEP40:
624 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300626 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
627 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300628 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_CCMP_MIC_LEN;
631 case HTT_RX_MPDU_ENCRYPT_WEP128:
632 case HTT_RX_MPDU_ENCRYPT_WAPI:
633 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634 }
635
Michal Kazior890d3b22014-10-23 17:04:22 +0300636 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300637 return 0;
638}
639
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300640struct amsdu_subframe_hdr {
641 u8 dst[ETH_ALEN];
642 u8 src[ETH_ALEN];
643 __be16 len;
644} __packed;
645
Michal Kazior6986fdd2015-08-27 14:47:33 +0200646#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
647
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100648static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200649 struct ieee80211_rx_status *status,
650 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100651{
Michal Kazior5528e032015-03-30 09:51:56 +0300652 struct ieee80211_supported_band *sband;
653 u8 cck, rate, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100654 u8 preamble = 0;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200655 u8 group_id;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200656 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100657
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200658 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
659 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
660 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
661
662 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100663
664 switch (preamble) {
665 case HTT_RX_LEGACY:
Michal Kazior5528e032015-03-30 09:51:56 +0300666 /* To get legacy rate index band is required. Since band can't
667 * be undefined check if freq is non-zero.
668 */
669 if (!status->freq)
670 return;
671
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200672 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
673 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Michal Kazior5528e032015-03-30 09:51:56 +0300674 rate &= ~RX_PPDU_START_RATE_FLAG;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100675
Michal Kazior5528e032015-03-30 09:51:56 +0300676 sband = &ar->mac.sbands[status->band];
Yanbo Li4b7f3532015-11-12 10:36:10 -0800677 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100678 break;
679 case HTT_RX_HT:
680 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200681 /* HT-SIG - Table 20-11 in info2 and info3 */
682 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100683 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200684 bw = (info2 >> 7) & 1;
685 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100686
687 status->rate_idx = mcs;
688 status->flag |= RX_FLAG_HT;
689 if (sgi)
690 status->flag |= RX_FLAG_SHORT_GI;
691 if (bw)
692 status->flag |= RX_FLAG_40MHZ;
693 break;
694 case HTT_RX_VHT:
695 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200696 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100697 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200698 bw = info2 & 3;
699 sgi = info3 & 1;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200700 group_id = (info2 >> 4) & 0x3F;
701
702 if (GROUP_ID_IS_SU_MIMO(group_id)) {
703 mcs = (info3 >> 4) & 0x0F;
704 nss = ((info2 >> 10) & 0x07) + 1;
705 } else {
706 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
707 * so it's impossible to decode MCS. Also since
708 * firmware consumes Group Id Management frames host
709 * has no knowledge regarding group/user position
710 * mapping so it's impossible to pick the correct Nsts
711 * from VHT-SIG-A1.
712 *
713 * Bandwidth and SGI are valid so report the rateinfo
714 * on best-effort basis.
715 */
716 mcs = 0;
717 nss = 1;
718 }
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100719
Manikanta Pubbisetty6ccea102015-09-02 17:05:27 +0300720 if (mcs > 0x09) {
721 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
722 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
723 __le32_to_cpu(rxd->attention.flags),
724 __le32_to_cpu(rxd->mpdu_start.info0),
725 __le32_to_cpu(rxd->mpdu_start.info1),
726 __le32_to_cpu(rxd->msdu_start.common.info0),
727 __le32_to_cpu(rxd->msdu_start.common.info1),
728 rxd->ppdu_start.info0,
729 __le32_to_cpu(rxd->ppdu_start.info1),
730 __le32_to_cpu(rxd->ppdu_start.info2),
731 __le32_to_cpu(rxd->ppdu_start.info3),
732 __le32_to_cpu(rxd->ppdu_start.info4));
733
734 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
735 __le32_to_cpu(rxd->msdu_end.common.info0),
736 __le32_to_cpu(rxd->mpdu_end.info0));
737
738 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
739 "rx desc msdu payload: ",
740 rxd->msdu_payload, 50);
741 }
742
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100743 status->rate_idx = mcs;
744 status->vht_nss = nss;
745
746 if (sgi)
747 status->flag |= RX_FLAG_SHORT_GI;
748
749 switch (bw) {
750 /* 20MHZ */
751 case 0:
752 break;
753 /* 40MHZ */
754 case 1:
755 status->flag |= RX_FLAG_40MHZ;
756 break;
757 /* 80MHZ */
758 case 2:
759 status->vht_flag |= RX_VHT_FLAG_80MHZ;
760 }
761
762 status->flag |= RX_FLAG_VHT;
763 break;
764 default:
765 break;
766 }
767}
768
Michal Kazior500ff9f2015-03-31 10:26:21 +0000769static struct ieee80211_channel *
770ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
771{
772 struct ath10k_peer *peer;
773 struct ath10k_vif *arvif;
774 struct cfg80211_chan_def def;
775 u16 peer_id;
776
777 lockdep_assert_held(&ar->data_lock);
778
779 if (!rxd)
780 return NULL;
781
782 if (rxd->attention.flags &
783 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
784 return NULL;
785
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700786 if (!(rxd->msdu_end.common.info0 &
Michal Kazior500ff9f2015-03-31 10:26:21 +0000787 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
788 return NULL;
789
790 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
791 RX_MPDU_START_INFO0_PEER_IDX);
792
793 peer = ath10k_peer_find_by_id(ar, peer_id);
794 if (!peer)
795 return NULL;
796
797 arvif = ath10k_get_arvif(ar, peer->vdev_id);
798 if (WARN_ON_ONCE(!arvif))
799 return NULL;
800
801 if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
802 return NULL;
803
804 return def.chan;
805}
806
807static struct ieee80211_channel *
808ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
809{
810 struct ath10k_vif *arvif;
811 struct cfg80211_chan_def def;
812
813 lockdep_assert_held(&ar->data_lock);
814
815 list_for_each_entry(arvif, &ar->arvifs, list) {
816 if (arvif->vdev_id == vdev_id &&
817 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
818 return def.chan;
819 }
820
821 return NULL;
822}
823
824static void
825ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
826 struct ieee80211_chanctx_conf *conf,
827 void *data)
828{
829 struct cfg80211_chan_def *def = data;
830
831 *def = conf->def;
832}
833
834static struct ieee80211_channel *
835ath10k_htt_rx_h_any_channel(struct ath10k *ar)
836{
837 struct cfg80211_chan_def def = {};
838
839 ieee80211_iter_chan_contexts_atomic(ar->hw,
840 ath10k_htt_rx_h_any_chan_iter,
841 &def);
842
843 return def.chan;
844}
845
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100846static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000847 struct ieee80211_rx_status *status,
848 struct htt_rx_desc *rxd,
849 u32 vdev_id)
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100850{
851 struct ieee80211_channel *ch;
852
853 spin_lock_bh(&ar->data_lock);
854 ch = ar->scan_channel;
855 if (!ch)
856 ch = ar->rx_channel;
Michal Kazior500ff9f2015-03-31 10:26:21 +0000857 if (!ch)
858 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
859 if (!ch)
860 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
861 if (!ch)
862 ch = ath10k_htt_rx_h_any_channel(ar);
Rajkumar Manoharan2ce9b252016-03-08 22:57:23 +0530863 if (!ch)
864 ch = ar->tgt_oper_chan;
Janusz Dziedzic36653f02014-03-24 21:23:18 +0100865 spin_unlock_bh(&ar->data_lock);
866
867 if (!ch)
868 return false;
869
870 status->band = ch->band;
871 status->freq = ch->center_freq;
872
873 return true;
874}
875
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200876static void ath10k_htt_rx_h_signal(struct ath10k *ar,
877 struct ieee80211_rx_status *status,
878 struct htt_rx_desc *rxd)
879{
880 /* FIXME: Get real NF */
881 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
882 rxd->ppdu_start.rssi_comb;
883 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
884}
885
886static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
887 struct ieee80211_rx_status *status,
888 struct htt_rx_desc *rxd)
889{
890 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
891 * means all prior MSDUs in a PPDU are reported to mac80211 without the
892 * TSF. Is it worth holding frames until end of PPDU is known?
893 *
894 * FIXME: Can we get/compute 64bit TSF?
895 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200896 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200897 status->flag |= RX_FLAG_MACTIME_END;
898}
899
900static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
901 struct sk_buff_head *amsdu,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000902 struct ieee80211_rx_status *status,
903 u32 vdev_id)
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200904{
905 struct sk_buff *first;
906 struct htt_rx_desc *rxd;
907 bool is_first_ppdu;
908 bool is_last_ppdu;
909
910 if (skb_queue_empty(amsdu))
911 return;
912
913 first = skb_peek(amsdu);
914 rxd = (void *)first->data - sizeof(*rxd);
915
916 is_first_ppdu = !!(rxd->attention.flags &
917 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
918 is_last_ppdu = !!(rxd->attention.flags &
919 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
920
921 if (is_first_ppdu) {
922 /* New PPDU starts so clear out the old per-PPDU status. */
923 status->freq = 0;
924 status->rate_idx = 0;
925 status->vht_nss = 0;
926 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
927 status->flag &= ~(RX_FLAG_HT |
928 RX_FLAG_VHT |
929 RX_FLAG_SHORT_GI |
930 RX_FLAG_40MHZ |
931 RX_FLAG_MACTIME_END);
932 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
933
934 ath10k_htt_rx_h_signal(ar, status, rxd);
Michal Kazior500ff9f2015-03-31 10:26:21 +0000935 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200936 ath10k_htt_rx_h_rates(ar, status, rxd);
937 }
938
939 if (is_last_ppdu)
940 ath10k_htt_rx_h_mactime(ar, status, rxd);
941}
942
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300943static const char * const tid_to_ac[] = {
944 "BE",
945 "BK",
946 "BK",
947 "BE",
948 "VI",
949 "VI",
950 "VO",
951 "VO",
952};
953
954static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
955{
956 u8 *qc;
957 int tid;
958
959 if (!ieee80211_is_data_qos(hdr->frame_control))
960 return "";
961
962 qc = ieee80211_get_qos_ctl(hdr);
963 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
964 if (tid < 8)
965 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
966 else
967 snprintf(out, size, "tid %d", tid);
968
969 return out;
970}
971
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100972static void ath10k_process_rx(struct ath10k *ar,
973 struct ieee80211_rx_status *rx_status,
974 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100975{
976 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300977 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
978 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100979
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100980 status = IEEE80211_SKB_RXCB(skb);
981 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100982
Michal Kazior7aa7a722014-08-25 12:09:38 +0200983 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300984 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100985 skb,
986 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300987 ieee80211_get_SA(hdr),
988 ath10k_get_tid(hdr, tid, sizeof(tid)),
989 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
990 "mcast" : "ucast",
991 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100992 status->flag == 0 ? "legacy" : "",
993 status->flag & RX_FLAG_HT ? "ht" : "",
994 status->flag & RX_FLAG_VHT ? "vht" : "",
995 status->flag & RX_FLAG_40MHZ ? "40" : "",
996 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
997 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
998 status->rate_idx,
999 status->vht_nss,
1000 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001001 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001002 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +03001003 !!(status->flag & RX_FLAG_MMIC_ERROR),
1004 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +02001005 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001006 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +05301007 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1008 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001009
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001010 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001011}
1012
Michal Kazior48f4ca32015-05-19 14:09:34 +02001013static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1014 struct ieee80211_hdr *hdr)
Michal Kaziord960c362014-02-25 09:29:57 +02001015{
Michal Kazior48f4ca32015-05-19 14:09:34 +02001016 int len = ieee80211_hdrlen(hdr->frame_control);
1017
1018 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1019 ar->fw_features))
1020 len = round_up(len, 4);
1021
1022 return len;
Michal Kaziord960c362014-02-25 09:29:57 +02001023}
1024
Michal Kazior581c25f2014-11-18 09:24:48 +02001025static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1026 struct sk_buff *msdu,
1027 struct ieee80211_rx_status *status,
1028 enum htt_rx_mpdu_encrypt_type enctype,
1029 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001030{
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001031 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001032 struct htt_rx_desc *rxd;
1033 size_t hdr_len;
1034 size_t crypto_len;
1035 bool is_first;
1036 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037
Michal Kazior581c25f2014-11-18 09:24:48 +02001038 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001039 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001040 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001041 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001042 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +02001043
Michal Kazior581c25f2014-11-18 09:24:48 +02001044 /* Delivered decapped frame:
1045 * [802.11 header]
1046 * [crypto param] <-- can be trimmed if !fcs_err &&
1047 * !decrypt_err && !peer_idx_invalid
1048 * [amsdu header] <-- only if A-MSDU
1049 * [rfc1042/llc]
1050 * [payload]
1051 * [FCS] <-- at end, needs to be trimmed
1052 */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001053
Michal Kazior581c25f2014-11-18 09:24:48 +02001054 /* This probably shouldn't happen but warn just in case */
1055 if (unlikely(WARN_ON_ONCE(!is_first)))
1056 return;
1057
1058 /* This probably shouldn't happen but warn just in case */
1059 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1060 return;
1061
1062 skb_trim(msdu, msdu->len - FCS_LEN);
1063
1064 /* In most cases this will be true for sniffed frames. It makes sense
David Liuccec9032015-07-24 20:25:32 +03001065 * to deliver them as-is without stripping the crypto param. This is
1066 * necessary for software based decryption.
Michal Kazior581c25f2014-11-18 09:24:48 +02001067 *
1068 * If there's no error then the frame is decrypted. At least that is
1069 * the case for frames that come in via fragmented rx indication.
1070 */
1071 if (!is_decrypted)
1072 return;
1073
1074 /* The payload is decrypted so strip crypto params. Start from tail
1075 * since hdr is used to compute some stuff.
1076 */
1077
1078 hdr = (void *)msdu->data;
1079
1080 /* Tail */
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001081 if (status->flag & RX_FLAG_IV_STRIPPED)
1082 skb_trim(msdu, msdu->len -
1083 ath10k_htt_rx_crypto_tail_len(ar, enctype));
Michal Kazior581c25f2014-11-18 09:24:48 +02001084
1085 /* MMIC */
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001086 if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
1087 !ieee80211_has_morefrags(hdr->frame_control) &&
Michal Kazior581c25f2014-11-18 09:24:48 +02001088 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1089 skb_trim(msdu, msdu->len - 8);
1090
1091 /* Head */
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001092 if (status->flag & RX_FLAG_IV_STRIPPED) {
1093 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1094 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001095
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001096 memmove((void *)msdu->data + crypto_len,
1097 (void *)msdu->data, hdr_len);
1098 skb_pull(msdu, crypto_len);
1099 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001100}
1101
Michal Kazior581c25f2014-11-18 09:24:48 +02001102static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1103 struct sk_buff *msdu,
1104 struct ieee80211_rx_status *status,
1105 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001106{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001107 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001108 size_t hdr_len;
1109 u8 da[ETH_ALEN];
1110 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001111
Michal Kazior581c25f2014-11-18 09:24:48 +02001112 /* Delivered decapped frame:
1113 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1114 * [rfc1042/llc]
1115 *
1116 * Note: The nwifi header doesn't have QoS Control and is
1117 * (always?) a 3addr frame.
1118 *
1119 * Note2: There's no A-MSDU subframe header. Even if it's part
1120 * of an A-MSDU.
1121 */
1122
1123 /* pull decapped header and copy SA & DA */
Yanbo Lib8d55fc2015-11-16 22:22:02 +02001124 if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
1125 ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
1126 /* The QCA99X0 4 address mode pad 2 bytes at the
1127 * beginning of MSDU
1128 */
1129 hdr = (struct ieee80211_hdr *)(msdu->data + 2);
1130 /* The skb length need be extended 2 as the 2 bytes at the tail
1131 * be excluded due to the padding
1132 */
1133 skb_put(msdu, 2);
1134 } else {
1135 hdr = (struct ieee80211_hdr *)(msdu->data);
1136 }
1137
Michal Kazior48f4ca32015-05-19 14:09:34 +02001138 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
Michal Kazior581c25f2014-11-18 09:24:48 +02001139 ether_addr_copy(da, ieee80211_get_DA(hdr));
1140 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1141 skb_pull(msdu, hdr_len);
1142
1143 /* push original 802.11 header */
1144 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001145 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001146 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001147
Michal Kazior581c25f2014-11-18 09:24:48 +02001148 /* original 802.11 header has a different DA and in
1149 * case of 4addr it may also have different SA
1150 */
1151 hdr = (struct ieee80211_hdr *)msdu->data;
1152 ether_addr_copy(ieee80211_get_DA(hdr), da);
1153 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1154}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001155
Michal Kazior581c25f2014-11-18 09:24:48 +02001156static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1157 struct sk_buff *msdu,
1158 enum htt_rx_mpdu_encrypt_type enctype)
1159{
1160 struct ieee80211_hdr *hdr;
1161 struct htt_rx_desc *rxd;
1162 size_t hdr_len, crypto_len;
1163 void *rfc1042;
1164 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001165
Michal Kazior581c25f2014-11-18 09:24:48 +02001166 rxd = (void *)msdu->data - sizeof(*rxd);
1167 hdr = (void *)rxd->rx_hdr_status;
1168
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001169 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001170 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001171 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001172 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1173 is_amsdu = !(is_first && is_last);
1174
1175 rfc1042 = hdr;
1176
1177 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001178 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001179 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001180
Michal Kazior581c25f2014-11-18 09:24:48 +02001181 rfc1042 += round_up(hdr_len, 4) +
1182 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001183 }
1184
Michal Kazior581c25f2014-11-18 09:24:48 +02001185 if (is_amsdu)
1186 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001187
Michal Kazior581c25f2014-11-18 09:24:48 +02001188 return rfc1042;
1189}
1190
1191static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1192 struct sk_buff *msdu,
1193 struct ieee80211_rx_status *status,
1194 const u8 first_hdr[64],
1195 enum htt_rx_mpdu_encrypt_type enctype)
1196{
1197 struct ieee80211_hdr *hdr;
1198 struct ethhdr *eth;
1199 size_t hdr_len;
1200 void *rfc1042;
1201 u8 da[ETH_ALEN];
1202 u8 sa[ETH_ALEN];
1203
1204 /* Delivered decapped frame:
1205 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1206 * [payload]
1207 */
1208
1209 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1210 if (WARN_ON_ONCE(!rfc1042))
1211 return;
1212
1213 /* pull decapped header and copy SA & DA */
1214 eth = (struct ethhdr *)msdu->data;
1215 ether_addr_copy(da, eth->h_dest);
1216 ether_addr_copy(sa, eth->h_source);
1217 skb_pull(msdu, sizeof(struct ethhdr));
1218
1219 /* push rfc1042/llc/snap */
1220 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1221 sizeof(struct rfc1042_hdr));
1222
1223 /* push original 802.11 header */
1224 hdr = (struct ieee80211_hdr *)first_hdr;
1225 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1226 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1227
1228 /* original 802.11 header has a different DA and in
1229 * case of 4addr it may also have different SA
1230 */
1231 hdr = (struct ieee80211_hdr *)msdu->data;
1232 ether_addr_copy(ieee80211_get_DA(hdr), da);
1233 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1234}
1235
1236static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1237 struct sk_buff *msdu,
1238 struct ieee80211_rx_status *status,
1239 const u8 first_hdr[64])
1240{
1241 struct ieee80211_hdr *hdr;
1242 size_t hdr_len;
1243
1244 /* Delivered decapped frame:
1245 * [amsdu header] <-- replaced with 802.11 hdr
1246 * [rfc1042/llc]
1247 * [payload]
1248 */
1249
1250 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1251
1252 hdr = (struct ieee80211_hdr *)first_hdr;
1253 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1254 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1255}
1256
1257static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1258 struct sk_buff *msdu,
1259 struct ieee80211_rx_status *status,
1260 u8 first_hdr[64],
1261 enum htt_rx_mpdu_encrypt_type enctype,
1262 bool is_decrypted)
1263{
1264 struct htt_rx_desc *rxd;
1265 enum rx_msdu_decap_format decap;
Michal Kazior581c25f2014-11-18 09:24:48 +02001266
1267 /* First msdu's decapped header:
1268 * [802.11 header] <-- padded to 4 bytes long
1269 * [crypto param] <-- padded to 4 bytes long
1270 * [amsdu header] <-- only if A-MSDU
1271 * [rfc1042/llc]
1272 *
1273 * Other (2nd, 3rd, ..) msdu's decapped header:
1274 * [amsdu header] <-- only if A-MSDU
1275 * [rfc1042/llc]
1276 */
1277
1278 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001279 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001280 RX_MSDU_START_INFO1_DECAP_FORMAT);
1281
1282 switch (decap) {
1283 case RX_MSDU_DECAP_RAW:
1284 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1285 is_decrypted);
1286 break;
1287 case RX_MSDU_DECAP_NATIVE_WIFI:
1288 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1289 break;
1290 case RX_MSDU_DECAP_ETHERNET2_DIX:
1291 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1292 break;
1293 case RX_MSDU_DECAP_8023_SNAP_LLC:
1294 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1295 break;
1296 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001297}
1298
Michal Kazior605f81a2013-07-31 10:47:56 +02001299static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1300{
1301 struct htt_rx_desc *rxd;
1302 u32 flags, info;
1303 bool is_ip4, is_ip6;
1304 bool is_tcp, is_udp;
1305 bool ip_csum_ok, tcpudp_csum_ok;
1306
1307 rxd = (void *)skb->data - sizeof(*rxd);
1308 flags = __le32_to_cpu(rxd->attention.flags);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001309 info = __le32_to_cpu(rxd->msdu_start.common.info1);
Michal Kazior605f81a2013-07-31 10:47:56 +02001310
1311 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1312 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1313 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1314 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1315 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1316 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1317
1318 if (!is_ip4 && !is_ip6)
1319 return CHECKSUM_NONE;
1320 if (!is_tcp && !is_udp)
1321 return CHECKSUM_NONE;
1322 if (!ip_csum_ok)
1323 return CHECKSUM_NONE;
1324 if (!tcpudp_csum_ok)
1325 return CHECKSUM_NONE;
1326
1327 return CHECKSUM_UNNECESSARY;
1328}
1329
Michal Kazior581c25f2014-11-18 09:24:48 +02001330static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1331{
1332 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1333}
1334
1335static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1336 struct sk_buff_head *amsdu,
1337 struct ieee80211_rx_status *status)
1338{
1339 struct sk_buff *first;
1340 struct sk_buff *last;
1341 struct sk_buff *msdu;
1342 struct htt_rx_desc *rxd;
1343 struct ieee80211_hdr *hdr;
1344 enum htt_rx_mpdu_encrypt_type enctype;
1345 u8 first_hdr[64];
1346 u8 *qos;
1347 size_t hdr_len;
1348 bool has_fcs_err;
1349 bool has_crypto_err;
1350 bool has_tkip_err;
1351 bool has_peer_idx_invalid;
1352 bool is_decrypted;
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001353 bool is_mgmt;
Michal Kazior581c25f2014-11-18 09:24:48 +02001354 u32 attention;
1355
1356 if (skb_queue_empty(amsdu))
1357 return;
1358
1359 first = skb_peek(amsdu);
1360 rxd = (void *)first->data - sizeof(*rxd);
1361
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001362 is_mgmt = !!(rxd->attention.flags &
1363 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1364
Michal Kazior581c25f2014-11-18 09:24:48 +02001365 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1366 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1367
1368 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1369 * decapped header. It'll be used for undecapping of each MSDU.
1370 */
1371 hdr = (void *)rxd->rx_hdr_status;
1372 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1373 memcpy(first_hdr, hdr, hdr_len);
1374
1375 /* Each A-MSDU subframe will use the original header as the base and be
1376 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1377 */
1378 hdr = (void *)first_hdr;
1379 qos = ieee80211_get_qos_ctl(hdr);
1380 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1381
1382 /* Some attention flags are valid only in the last MSDU. */
1383 last = skb_peek_tail(amsdu);
1384 rxd = (void *)last->data - sizeof(*rxd);
1385 attention = __le32_to_cpu(rxd->attention.flags);
1386
1387 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1388 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1389 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1390 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1391
1392 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1393 * e.g. due to fcs error, missing peer or invalid key data it will
1394 * report the frame as raw.
1395 */
1396 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1397 !has_fcs_err &&
1398 !has_crypto_err &&
1399 !has_peer_idx_invalid);
1400
1401 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1402 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1403 RX_FLAG_MMIC_ERROR |
1404 RX_FLAG_DECRYPTED |
1405 RX_FLAG_IV_STRIPPED |
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001406 RX_FLAG_ONLY_MONITOR |
Michal Kazior581c25f2014-11-18 09:24:48 +02001407 RX_FLAG_MMIC_STRIPPED);
1408
1409 if (has_fcs_err)
1410 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1411
1412 if (has_tkip_err)
1413 status->flag |= RX_FLAG_MMIC_ERROR;
1414
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001415 /* Firmware reports all necessary management frames via WMI already.
1416 * They are not reported to monitor interfaces at all so pass the ones
1417 * coming via HTT to monitor interfaces instead. This simplifies
1418 * matters a lot.
1419 */
1420 if (is_mgmt)
1421 status->flag |= RX_FLAG_ONLY_MONITOR;
1422
1423 if (is_decrypted) {
1424 status->flag |= RX_FLAG_DECRYPTED;
1425
1426 if (likely(!is_mgmt))
1427 status->flag |= RX_FLAG_IV_STRIPPED |
1428 RX_FLAG_MMIC_STRIPPED;
1429}
Michal Kazior581c25f2014-11-18 09:24:48 +02001430
1431 skb_queue_walk(amsdu, msdu) {
1432 ath10k_htt_rx_h_csum_offload(msdu);
1433 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1434 is_decrypted);
1435
1436 /* Undecapping involves copying the original 802.11 header back
1437 * to sk_buff. If frame is protected and hardware has decrypted
1438 * it then remove the protected bit.
1439 */
1440 if (!is_decrypted)
1441 continue;
Grzegorz Bajorski60549ca2015-11-30 13:56:59 +01001442 if (is_mgmt)
1443 continue;
Michal Kazior581c25f2014-11-18 09:24:48 +02001444
1445 hdr = (void *)msdu->data;
1446 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1447 }
1448}
1449
1450static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1451 struct sk_buff_head *amsdu,
1452 struct ieee80211_rx_status *status)
1453{
1454 struct sk_buff *msdu;
1455
1456 while ((msdu = __skb_dequeue(amsdu))) {
1457 /* Setup per-MSDU flags */
1458 if (skb_queue_empty(amsdu))
1459 status->flag &= ~RX_FLAG_AMSDU_MORE;
1460 else
1461 status->flag |= RX_FLAG_AMSDU_MORE;
1462
1463 ath10k_process_rx(ar, status, msdu);
1464 }
1465}
1466
Michal Kazior9aa505d2014-11-18 09:24:47 +02001467static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001468{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001469 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001470 int space;
1471 int total_len = 0;
1472
1473 /* TODO: Might could optimize this by using
1474 * skb_try_coalesce or similar method to
1475 * decrease copying, or maybe get mac80211 to
1476 * provide a way to just receive a list of
1477 * skb?
1478 */
1479
Michal Kazior9aa505d2014-11-18 09:24:47 +02001480 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001481
1482 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001483 skb_queue_walk(amsdu, skb)
1484 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001485
Michal Kazior9aa505d2014-11-18 09:24:47 +02001486 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001487 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001488 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001489 /* TODO: bump some rx-oom error stat */
1490 /* put it back together so we can free the
1491 * whole list at once.
1492 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001493 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001494 return -1;
1495 }
1496
1497 /* Walk list again, copying contents into
1498 * msdu_head
1499 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001500 while ((skb = __skb_dequeue(amsdu))) {
1501 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1502 skb->len);
1503 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001504 }
1505
Michal Kazior9aa505d2014-11-18 09:24:47 +02001506 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001507 return 0;
1508}
1509
Michal Kazior581c25f2014-11-18 09:24:48 +02001510static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1511 struct sk_buff_head *amsdu,
1512 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001513{
Michal Kazior581c25f2014-11-18 09:24:48 +02001514 struct sk_buff *first;
1515 struct htt_rx_desc *rxd;
1516 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001517
Michal Kazior581c25f2014-11-18 09:24:48 +02001518 first = skb_peek(amsdu);
1519 rxd = (void *)first->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001520 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001521 RX_MSDU_START_INFO1_DECAP_FORMAT);
1522
1523 if (!chained)
1524 return;
1525
1526 /* FIXME: Current unchaining logic can only handle simple case of raw
1527 * msdu chaining. If decapping is other than raw the chaining may be
1528 * more complex and this isn't handled by the current code. Don't even
1529 * try re-constructing such frames - it'll be pretty much garbage.
1530 */
1531 if (decap != RX_MSDU_DECAP_RAW ||
1532 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1533 __skb_queue_purge(amsdu);
1534 return;
1535 }
1536
1537 ath10k_unchain_msdu(amsdu);
1538}
1539
1540static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1541 struct sk_buff_head *amsdu,
1542 struct ieee80211_rx_status *rx_status)
1543{
Michal Kazior581c25f2014-11-18 09:24:48 +02001544 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1545 * invalid/dangerous frames.
1546 */
1547
1548 if (!rx_status->freq) {
1549 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001550 return false;
1551 }
1552
Michal Kazior581c25f2014-11-18 09:24:48 +02001553 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1554 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001555 return false;
1556 }
1557
1558 return true;
1559}
1560
Michal Kazior581c25f2014-11-18 09:24:48 +02001561static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1562 struct sk_buff_head *amsdu,
1563 struct ieee80211_rx_status *rx_status)
1564{
1565 if (skb_queue_empty(amsdu))
1566 return;
1567
1568 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1569 return;
1570
1571 __skb_queue_purge(amsdu);
1572}
1573
Kalle Valo5e3dd152013-06-12 20:52:10 +03001574static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1575 struct htt_rx_indication *rx)
1576{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001577 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001578 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001579 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001580 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001581 int num_mpdu_ranges;
1582 int fw_desc_len;
1583 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001584 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001585
Michal Kazior45967082014-02-27 18:50:05 +02001586 lockdep_assert_held(&htt->rx_ring.lock);
1587
Michal Kaziore0bd7512014-11-18 09:24:48 +02001588 if (htt->rx_confused)
1589 return;
1590
Kalle Valo5e3dd152013-06-12 20:52:10 +03001591 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1592 fw_desc = (u8 *)&rx->fw_desc;
1593
1594 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1595 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1596 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1597
Michal Kazior7aa7a722014-08-25 12:09:38 +02001598 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001599 rx, sizeof(*rx) +
1600 (sizeof(struct htt_rx_indication_mpdu_range) *
1601 num_mpdu_ranges));
1602
Michal Kaziord5406902014-11-18 09:24:47 +02001603 for (i = 0; i < num_mpdu_ranges; i++)
1604 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001605
Michal Kaziord5406902014-11-18 09:24:47 +02001606 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001607 __skb_queue_head_init(&amsdu);
1608 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001609 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001610 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001611 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001612 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001613 /* FIXME: It's probably a good idea to reboot the
1614 * device instead of leaving it inoperable.
1615 */
1616 htt->rx_confused = true;
1617 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001618 }
Michal Kaziord5406902014-11-18 09:24:47 +02001619
Michal Kazior500ff9f2015-03-31 10:26:21 +00001620 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001621 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1622 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1623 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1624 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001625 }
1626
Michal Kazior6e712d42013-09-24 10:18:36 +02001627 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001628}
1629
1630static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001631 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001632{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001633 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001634 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001635 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001636 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001637 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001638 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001639
1640 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1641 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1642
Michal Kazior9aa505d2014-11-18 09:24:47 +02001643 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001644
1645 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001646 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001647 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001648 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001649
Michal Kazior686687c2014-10-23 17:04:24 +03001650 tasklet_schedule(&htt->rx_replenish_task);
1651
Michal Kazior7aa7a722014-08-25 12:09:38 +02001652 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001653
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001654 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001655 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001656 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001657 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001658 return;
1659 }
1660
Michal Kazior9aa505d2014-11-18 09:24:47 +02001661 if (skb_queue_len(&amsdu) != 1) {
1662 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1663 __skb_queue_purge(&amsdu);
1664 return;
1665 }
1666
Michal Kazior500ff9f2015-03-31 10:26:21 +00001667 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001668 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1669 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1670 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001671
Kalle Valo5e3dd152013-06-12 20:52:10 +03001672 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001673 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001674 "expecting more fragmented rx in one indication %d\n",
1675 fw_desc_len);
1676 }
1677}
1678
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301679static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
Michal Kazior6c5151a2014-02-27 18:50:04 +02001680 struct sk_buff *skb)
1681{
1682 struct ath10k_htt *htt = &ar->htt;
1683 struct htt_resp *resp = (struct htt_resp *)skb->data;
1684 struct htt_tx_done tx_done = {};
1685 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1686 __le16 msdu_id;
1687 int i;
1688
1689 switch (status) {
1690 case HTT_DATA_TX_STATUS_NO_ACK:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301691 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001692 break;
1693 case HTT_DATA_TX_STATUS_OK:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301694 tx_done.status = HTT_TX_COMPL_STATE_ACK;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001695 break;
1696 case HTT_DATA_TX_STATUS_DISCARD:
1697 case HTT_DATA_TX_STATUS_POSTPONE:
1698 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301699 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001700 break;
1701 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001702 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301703 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001704 break;
1705 }
1706
Michal Kazior7aa7a722014-08-25 12:09:38 +02001707 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001708 resp->data_tx_completion.num_msdus);
1709
1710 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1711 msdu_id = resp->data_tx_completion.msdus[i];
1712 tx_done.msdu_id = __le16_to_cpu(msdu_id);
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05301713
1714 /* kfifo_put: In practice firmware shouldn't fire off per-CE
1715 * interrupt and main interrupt (MSI/-X range case) for the same
1716 * HTC service so it should be safe to use kfifo_put w/o lock.
1717 *
1718 * From kfifo_put() documentation:
1719 * Note that with only one concurrent reader and one concurrent
1720 * writer, you don't need extra locking to use these macro.
1721 */
1722 if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
1723 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
1724 tx_done.msdu_id, tx_done.status);
1725 ath10k_txrx_tx_unref(htt, &tx_done);
1726 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001727 }
1728}
1729
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001730static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1731{
1732 struct htt_rx_addba *ev = &resp->rx_addba;
1733 struct ath10k_peer *peer;
1734 struct ath10k_vif *arvif;
1735 u16 info0, tid, peer_id;
1736
1737 info0 = __le16_to_cpu(ev->info0);
1738 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1739 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1740
Michal Kazior7aa7a722014-08-25 12:09:38 +02001741 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001742 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1743 tid, peer_id, ev->window_size);
1744
1745 spin_lock_bh(&ar->data_lock);
1746 peer = ath10k_peer_find_by_id(ar, peer_id);
1747 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001748 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001749 peer_id);
1750 spin_unlock_bh(&ar->data_lock);
1751 return;
1752 }
1753
1754 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1755 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001756 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001757 peer->vdev_id);
1758 spin_unlock_bh(&ar->data_lock);
1759 return;
1760 }
1761
Michal Kazior7aa7a722014-08-25 12:09:38 +02001762 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001763 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1764 peer->addr, tid, ev->window_size);
1765
1766 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1767 spin_unlock_bh(&ar->data_lock);
1768}
1769
1770static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1771{
1772 struct htt_rx_delba *ev = &resp->rx_delba;
1773 struct ath10k_peer *peer;
1774 struct ath10k_vif *arvif;
1775 u16 info0, tid, peer_id;
1776
1777 info0 = __le16_to_cpu(ev->info0);
1778 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1779 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1780
Michal Kazior7aa7a722014-08-25 12:09:38 +02001781 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001782 "htt rx delba tid %hu peer_id %hu\n",
1783 tid, peer_id);
1784
1785 spin_lock_bh(&ar->data_lock);
1786 peer = ath10k_peer_find_by_id(ar, peer_id);
1787 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001788 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001789 peer_id);
1790 spin_unlock_bh(&ar->data_lock);
1791 return;
1792 }
1793
1794 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1795 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001796 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001797 peer->vdev_id);
1798 spin_unlock_bh(&ar->data_lock);
1799 return;
1800 }
1801
Michal Kazior7aa7a722014-08-25 12:09:38 +02001802 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001803 "htt rx stop rx ba session sta %pM tid %hu\n",
1804 peer->addr, tid);
1805
1806 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1807 spin_unlock_bh(&ar->data_lock);
1808}
1809
Michal Kaziorc5450702015-01-24 12:14:48 +02001810static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1811 struct sk_buff_head *amsdu)
1812{
1813 struct sk_buff *msdu;
1814 struct htt_rx_desc *rxd;
1815
1816 if (skb_queue_empty(list))
1817 return -ENOBUFS;
1818
1819 if (WARN_ON(!skb_queue_empty(amsdu)))
1820 return -EINVAL;
1821
1822 while ((msdu = __skb_dequeue(list))) {
1823 __skb_queue_tail(amsdu, msdu);
1824
1825 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001826 if (rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001827 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1828 break;
1829 }
1830
1831 msdu = skb_peek_tail(amsdu);
1832 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001833 if (!(rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001834 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1835 skb_queue_splice_init(amsdu, list);
1836 return -EAGAIN;
1837 }
1838
1839 return 0;
1840}
1841
1842static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1843 struct sk_buff *skb)
1844{
1845 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1846
1847 if (!ieee80211_has_protected(hdr->frame_control))
1848 return;
1849
1850 /* Offloaded frames are already decrypted but firmware insists they are
1851 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1852 * will drop the frame.
1853 */
1854
1855 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1856 status->flag |= RX_FLAG_DECRYPTED |
1857 RX_FLAG_IV_STRIPPED |
1858 RX_FLAG_MMIC_STRIPPED;
1859}
1860
1861static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1862 struct sk_buff_head *list)
1863{
1864 struct ath10k_htt *htt = &ar->htt;
1865 struct ieee80211_rx_status *status = &htt->rx_status;
1866 struct htt_rx_offload_msdu *rx;
1867 struct sk_buff *msdu;
1868 size_t offset;
1869
1870 while ((msdu = __skb_dequeue(list))) {
1871 /* Offloaded frames don't have Rx descriptor. Instead they have
1872 * a short meta information header.
1873 */
1874
1875 rx = (void *)msdu->data;
1876
1877 skb_put(msdu, sizeof(*rx));
1878 skb_pull(msdu, sizeof(*rx));
1879
1880 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1881 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1882 dev_kfree_skb_any(msdu);
1883 continue;
1884 }
1885
1886 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1887
1888 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1889 * actual payload is unaligned. Align the frame. Otherwise
1890 * mac80211 complains. This shouldn't reduce performance much
1891 * because these offloaded frames are rare.
1892 */
1893 offset = 4 - ((unsigned long)msdu->data & 3);
1894 skb_put(msdu, offset);
1895 memmove(msdu->data + offset, msdu->data, msdu->len);
1896 skb_pull(msdu, offset);
1897
1898 /* FIXME: The frame is NWifi. Re-construct QoS Control
1899 * if possible later.
1900 */
1901
1902 memset(status, 0, sizeof(*status));
1903 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1904
1905 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
Michal Kazior500ff9f2015-03-31 10:26:21 +00001906 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001907 ath10k_process_rx(ar, status, msdu);
1908 }
1909}
1910
1911static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1912{
1913 struct ath10k_htt *htt = &ar->htt;
1914 struct htt_resp *resp = (void *)skb->data;
1915 struct ieee80211_rx_status *status = &htt->rx_status;
1916 struct sk_buff_head list;
1917 struct sk_buff_head amsdu;
1918 u16 peer_id;
1919 u16 msdu_count;
1920 u8 vdev_id;
1921 u8 tid;
1922 bool offload;
1923 bool frag;
1924 int ret;
1925
1926 lockdep_assert_held(&htt->rx_ring.lock);
1927
1928 if (htt->rx_confused)
1929 return;
1930
1931 skb_pull(skb, sizeof(resp->hdr));
1932 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1933
1934 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1935 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1936 vdev_id = resp->rx_in_ord_ind.vdev_id;
1937 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1938 offload = !!(resp->rx_in_ord_ind.info &
1939 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1940 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1941
1942 ath10k_dbg(ar, ATH10K_DBG_HTT,
1943 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1944 vdev_id, peer_id, tid, offload, frag, msdu_count);
1945
1946 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1947 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1948 return;
1949 }
1950
1951 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1952 * extracted and processed.
1953 */
1954 __skb_queue_head_init(&list);
1955 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1956 if (ret < 0) {
1957 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1958 htt->rx_confused = true;
1959 return;
1960 }
1961
1962 /* Offloaded frames are very different and need to be handled
1963 * separately.
1964 */
1965 if (offload)
1966 ath10k_htt_rx_h_rx_offload(ar, &list);
1967
1968 while (!skb_queue_empty(&list)) {
1969 __skb_queue_head_init(&amsdu);
1970 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1971 switch (ret) {
1972 case 0:
1973 /* Note: The in-order indication may report interleaved
1974 * frames from different PPDUs meaning reported rx rate
1975 * to mac80211 isn't accurate/reliable. It's still
1976 * better to report something than nothing though. This
1977 * should still give an idea about rx rate to the user.
1978 */
Michal Kazior500ff9f2015-03-31 10:26:21 +00001979 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001980 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1981 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1982 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1983 break;
1984 case -EAGAIN:
1985 /* fall through */
1986 default:
1987 /* Should not happen. */
1988 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1989 htt->rx_confused = true;
1990 __skb_queue_purge(&list);
1991 return;
1992 }
1993 }
1994
1995 tasklet_schedule(&htt->rx_replenish_task);
1996}
1997
Michal Kazior839ae632016-03-06 16:14:32 +02001998static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
1999 const __le32 *resp_ids,
2000 int num_resp_ids)
2001{
2002 int i;
2003 u32 resp_id;
2004
2005 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
2006 num_resp_ids);
2007
2008 for (i = 0; i < num_resp_ids; i++) {
2009 resp_id = le32_to_cpu(resp_ids[i]);
2010
2011 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
2012 resp_id);
2013
2014 /* TODO: free resp_id */
2015 }
2016}
2017
2018static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
2019{
Michal Kazior426e10e2016-03-06 16:14:43 +02002020 struct ieee80211_hw *hw = ar->hw;
2021 struct ieee80211_txq *txq;
Michal Kazior839ae632016-03-06 16:14:32 +02002022 struct htt_resp *resp = (struct htt_resp *)skb->data;
2023 struct htt_tx_fetch_record *record;
2024 size_t len;
2025 size_t max_num_bytes;
2026 size_t max_num_msdus;
Michal Kazior426e10e2016-03-06 16:14:43 +02002027 size_t num_bytes;
2028 size_t num_msdus;
Michal Kazior839ae632016-03-06 16:14:32 +02002029 const __le32 *resp_ids;
2030 u16 num_records;
2031 u16 num_resp_ids;
2032 u16 peer_id;
2033 u8 tid;
Michal Kazior426e10e2016-03-06 16:14:43 +02002034 int ret;
Michal Kazior839ae632016-03-06 16:14:32 +02002035 int i;
2036
2037 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
2038
2039 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
2040 if (unlikely(skb->len < len)) {
2041 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
2042 return;
2043 }
2044
2045 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
2046 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
2047
2048 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
2049 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
2050
2051 if (unlikely(skb->len < len)) {
2052 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
2053 return;
2054 }
2055
2056 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
2057 num_records, num_resp_ids,
2058 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
2059
Michal Kazior426e10e2016-03-06 16:14:43 +02002060 if (!ar->htt.tx_q_state.enabled) {
2061 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
2062 return;
2063 }
2064
2065 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
2066 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
2067 return;
2068 }
2069
2070 rcu_read_lock();
Michal Kazior839ae632016-03-06 16:14:32 +02002071
2072 for (i = 0; i < num_records; i++) {
2073 record = &resp->tx_fetch_ind.records[i];
2074 peer_id = MS(le16_to_cpu(record->info),
2075 HTT_TX_FETCH_RECORD_INFO_PEER_ID);
2076 tid = MS(le16_to_cpu(record->info),
2077 HTT_TX_FETCH_RECORD_INFO_TID);
2078 max_num_msdus = le16_to_cpu(record->num_msdus);
2079 max_num_bytes = le32_to_cpu(record->num_bytes);
2080
2081 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
2082 i, peer_id, tid, max_num_msdus, max_num_bytes);
2083
2084 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2085 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2086 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2087 peer_id, tid);
2088 continue;
2089 }
2090
Michal Kazior426e10e2016-03-06 16:14:43 +02002091 spin_lock_bh(&ar->data_lock);
2092 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2093 spin_unlock_bh(&ar->data_lock);
2094
2095 /* It is okay to release the lock and use txq because RCU read
2096 * lock is held.
2097 */
2098
2099 if (unlikely(!txq)) {
2100 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2101 peer_id, tid);
2102 continue;
2103 }
2104
2105 num_msdus = 0;
2106 num_bytes = 0;
2107
2108 while (num_msdus < max_num_msdus &&
2109 num_bytes < max_num_bytes) {
2110 ret = ath10k_mac_tx_push_txq(hw, txq);
2111 if (ret < 0)
2112 break;
2113
2114 num_msdus++;
2115 num_bytes += ret;
2116 }
2117
2118 record->num_msdus = cpu_to_le16(num_msdus);
2119 record->num_bytes = cpu_to_le32(num_bytes);
2120
2121 ath10k_htt_tx_txq_recalc(hw, txq);
Michal Kazior839ae632016-03-06 16:14:32 +02002122 }
2123
Michal Kazior426e10e2016-03-06 16:14:43 +02002124 rcu_read_unlock();
2125
Michal Kazior839ae632016-03-06 16:14:32 +02002126 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
2127 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
2128
Michal Kazior426e10e2016-03-06 16:14:43 +02002129 ret = ath10k_htt_tx_fetch_resp(ar,
2130 resp->tx_fetch_ind.token,
2131 resp->tx_fetch_ind.fetch_seq_num,
2132 resp->tx_fetch_ind.records,
2133 num_records);
2134 if (unlikely(ret)) {
2135 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
2136 le32_to_cpu(resp->tx_fetch_ind.token), ret);
2137 /* FIXME: request fw restart */
2138 }
2139
2140 ath10k_htt_tx_txq_sync(ar);
Michal Kazior839ae632016-03-06 16:14:32 +02002141}
2142
2143static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
2144 struct sk_buff *skb)
2145{
2146 const struct htt_resp *resp = (void *)skb->data;
2147 size_t len;
2148 int num_resp_ids;
2149
2150 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
2151
2152 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
2153 if (unlikely(skb->len < len)) {
2154 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
2155 return;
2156 }
2157
2158 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
2159 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
2160
2161 if (unlikely(skb->len < len)) {
2162 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
2163 return;
2164 }
2165
2166 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
2167 resp->tx_fetch_confirm.resp_ids,
2168 num_resp_ids);
2169}
2170
2171static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
2172 struct sk_buff *skb)
2173{
2174 const struct htt_resp *resp = (void *)skb->data;
2175 const struct htt_tx_mode_switch_record *record;
Michal Kazior426e10e2016-03-06 16:14:43 +02002176 struct ieee80211_txq *txq;
2177 struct ath10k_txq *artxq;
Michal Kazior839ae632016-03-06 16:14:32 +02002178 size_t len;
2179 size_t num_records;
2180 enum htt_tx_mode_switch_mode mode;
2181 bool enable;
2182 u16 info0;
2183 u16 info1;
2184 u16 threshold;
2185 u16 peer_id;
2186 u8 tid;
2187 int i;
2188
2189 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
2190
2191 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
2192 if (unlikely(skb->len < len)) {
2193 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
2194 return;
2195 }
2196
2197 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
2198 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
2199
2200 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
2201 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2202 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
2203 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
2204
2205 ath10k_dbg(ar, ATH10K_DBG_HTT,
2206 "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
2207 info0, info1, enable, num_records, mode, threshold);
2208
2209 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
2210
2211 if (unlikely(skb->len < len)) {
2212 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
2213 return;
2214 }
2215
2216 switch (mode) {
2217 case HTT_TX_MODE_SWITCH_PUSH:
2218 case HTT_TX_MODE_SWITCH_PUSH_PULL:
2219 break;
2220 default:
2221 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
2222 mode);
2223 return;
2224 }
2225
2226 if (!enable)
2227 return;
2228
Michal Kazior426e10e2016-03-06 16:14:43 +02002229 ar->htt.tx_q_state.enabled = enable;
2230 ar->htt.tx_q_state.mode = mode;
2231 ar->htt.tx_q_state.num_push_allowed = threshold;
2232
2233 rcu_read_lock();
Michal Kazior839ae632016-03-06 16:14:32 +02002234
2235 for (i = 0; i < num_records; i++) {
2236 record = &resp->tx_mode_switch_ind.records[i];
2237 info0 = le16_to_cpu(record->info0);
2238 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
2239 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
2240
2241 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
2242 unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
2243 ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
2244 peer_id, tid);
2245 continue;
2246 }
2247
Michal Kazior426e10e2016-03-06 16:14:43 +02002248 spin_lock_bh(&ar->data_lock);
2249 txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
2250 spin_unlock_bh(&ar->data_lock);
2251
2252 /* It is okay to release the lock and use txq because RCU read
2253 * lock is held.
2254 */
2255
2256 if (unlikely(!txq)) {
2257 ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
2258 peer_id, tid);
2259 continue;
2260 }
2261
2262 spin_lock_bh(&ar->htt.tx_lock);
2263 artxq = (void *)txq->drv_priv;
2264 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
2265 spin_unlock_bh(&ar->htt.tx_lock);
Michal Kazior839ae632016-03-06 16:14:32 +02002266 }
2267
Michal Kazior426e10e2016-03-06 16:14:43 +02002268 rcu_read_unlock();
2269
2270 ath10k_mac_tx_push_pending(ar);
Michal Kazior839ae632016-03-06 16:14:32 +02002271}
2272
Rajkumar Manoharan2ce9b252016-03-08 22:57:23 +05302273static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
2274{
2275 enum ieee80211_band band;
2276
2277 switch (phy_mode) {
2278 case MODE_11A:
2279 case MODE_11NA_HT20:
2280 case MODE_11NA_HT40:
2281 case MODE_11AC_VHT20:
2282 case MODE_11AC_VHT40:
2283 case MODE_11AC_VHT80:
2284 band = IEEE80211_BAND_5GHZ;
2285 break;
2286 case MODE_11G:
2287 case MODE_11B:
2288 case MODE_11GONLY:
2289 case MODE_11NG_HT20:
2290 case MODE_11NG_HT40:
2291 case MODE_11AC_VHT20_2G:
2292 case MODE_11AC_VHT40_2G:
2293 case MODE_11AC_VHT80_2G:
2294 default:
2295 band = IEEE80211_BAND_2GHZ;
2296 }
2297
2298 return band;
2299}
2300
Kalle Valo5e3dd152013-06-12 20:52:10 +03002301void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
2302{
Michal Kazioredb82362013-07-05 16:15:14 +03002303 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002304 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002305 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002306
2307 /* confirm alignment */
2308 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02002309 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03002310
Michal Kazior7aa7a722014-08-25 12:09:38 +02002311 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002312 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002313
2314 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
2315 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
2316 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
2317 dev_kfree_skb_any(skb);
2318 return;
2319 }
2320 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
2321
2322 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03002323 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
2324 htt->target_version_major = resp->ver_resp.major;
2325 htt->target_version_minor = resp->ver_resp.minor;
2326 complete(&htt->target_version_received);
2327 break;
2328 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002329 case HTT_T2H_MSG_TYPE_RX_IND:
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302330 skb_queue_tail(&htt->rx_compl_q, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002331 tasklet_schedule(&htt->txrx_compl_task);
2332 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002333 case HTT_T2H_MSG_TYPE_PEER_MAP: {
2334 struct htt_peer_map_event ev = {
2335 .vdev_id = resp->peer_map.vdev_id,
2336 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
2337 };
2338 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
2339 ath10k_peer_map_event(htt, &ev);
2340 break;
2341 }
2342 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
2343 struct htt_peer_unmap_event ev = {
2344 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
2345 };
2346 ath10k_peer_unmap_event(htt, &ev);
2347 break;
2348 }
2349 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
2350 struct htt_tx_done tx_done = {};
2351 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
2352
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302353 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002354
2355 switch (status) {
2356 case HTT_MGMT_TX_STATUS_OK:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302357 tx_done.status = HTT_TX_COMPL_STATE_ACK;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002358 break;
2359 case HTT_MGMT_TX_STATUS_RETRY:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302360 tx_done.status = HTT_TX_COMPL_STATE_NOACK;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002361 break;
2362 case HTT_MGMT_TX_STATUS_DROP:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302363 tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002364 break;
2365 }
2366
Rajkumar Manoharancac08552016-03-09 20:25:46 +05302367 status = ath10k_txrx_tx_unref(htt, &tx_done);
2368 if (!status) {
2369 spin_lock_bh(&htt->tx_lock);
2370 ath10k_htt_tx_mgmt_dec_pending(htt);
2371 spin_unlock_bh(&htt->tx_lock);
2372 }
Michal Kazior29946872016-03-06 16:14:34 +02002373 ath10k_mac_tx_push_pending(ar);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002374 break;
2375 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002376 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302377 ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002378 tasklet_schedule(&htt->txrx_compl_task);
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302379 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002380 case HTT_T2H_MSG_TYPE_SEC_IND: {
2381 struct ath10k *ar = htt->ar;
2382 struct htt_security_indication *ev = &resp->security_indication;
2383
Michal Kazior7aa7a722014-08-25 12:09:38 +02002384 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03002385 "sec ind peer_id %d unicast %d type %d\n",
2386 __le16_to_cpu(ev->peer_id),
2387 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2388 MS(ev->flags, HTT_SECURITY_TYPE));
2389 complete(&ar->install_key_done);
2390 break;
2391 }
2392 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02002393 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002394 skb->data, skb->len);
2395 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
2396 break;
2397 }
2398 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002399 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002400 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03002401 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03002402 break;
2403 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03002404 /* Firmware can return tx frames if it's unable to fully
2405 * process them and suspects host may be able to fix it. ath10k
2406 * sends all tx frames as already inspected so this shouldn't
2407 * happen unless fw has a bug.
2408 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02002409 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03002410 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002411 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002412 ath10k_htt_rx_addba(ar, resp);
2413 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002414 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002415 ath10k_htt_rx_delba(ar, resp);
2416 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03002417 case HTT_T2H_MSG_TYPE_PKTLOG: {
2418 struct ath10k_pktlog_hdr *hdr =
2419 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2420
2421 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2422 sizeof(*hdr) +
2423 __le16_to_cpu(hdr->size));
2424 break;
2425 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002426 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2427 /* Ignore this event because mac80211 takes care of Rx
2428 * aggregation reordering.
2429 */
2430 break;
2431 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002432 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302433 skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
Michal Kaziorc5450702015-01-24 12:14:48 +02002434 tasklet_schedule(&htt->txrx_compl_task);
2435 return;
2436 }
2437 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002438 break;
Rajkumar Manoharan2ce9b252016-03-08 22:57:23 +05302439 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
2440 u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
2441 u32 freq = __le32_to_cpu(resp->chan_change.freq);
2442
2443 ar->tgt_oper_chan =
2444 __ieee80211_get_channel(ar->hw->wiphy, freq);
2445 ath10k_dbg(ar, ATH10K_DBG_HTT,
2446 "htt chan change freq %u phymode %s\n",
2447 freq, ath10k_wmi_phymode_str(phymode));
Michal Kaziorc5450702015-01-24 12:14:48 +02002448 break;
Rajkumar Manoharan2ce9b252016-03-08 22:57:23 +05302449 }
David Liuccec9032015-07-24 20:25:32 +03002450 case HTT_T2H_MSG_TYPE_AGGR_CONF:
2451 break;
Rajkumar Manoharanb2fdbcc2016-03-22 17:22:12 +05302452 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
2453 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
2454
2455 if (!tx_fetch_ind) {
2456 ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
2457 break;
2458 }
2459 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
Michal Kazior426e10e2016-03-06 16:14:43 +02002460 tasklet_schedule(&htt->txrx_compl_task);
Rajkumar Manoharanb2fdbcc2016-03-22 17:22:12 +05302461 break;
2462 }
Michal Kaziordf94e702016-01-21 14:13:23 +01002463 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
Michal Kazior839ae632016-03-06 16:14:32 +02002464 ath10k_htt_rx_tx_fetch_confirm(ar, skb);
2465 break;
Michal Kaziordf94e702016-01-21 14:13:23 +01002466 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
Michal Kazior839ae632016-03-06 16:14:32 +02002467 ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
Michal Kazior9b158732016-01-21 14:13:27 +01002468 break;
2469 case HTT_T2H_MSG_TYPE_EN_STATS:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002470 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002471 ath10k_warn(ar, "htt event (%d) not handled\n",
2472 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002473 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002474 skb->data, skb->len);
2475 break;
2476 };
2477
2478 /* Free the indication buffer */
2479 dev_kfree_skb_any(skb);
2480}
Rajkumar Manoharan3f0f7ed2015-10-12 18:27:03 +05302481EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002482
Vivek Natarajanafb0bf72015-10-30 14:57:58 +05302483void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
2484 struct sk_buff *skb)
2485{
Ashok Raj Nagarajan53a5c9b2016-02-05 21:12:48 +05302486 trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
Vivek Natarajanafb0bf72015-10-30 14:57:58 +05302487 dev_kfree_skb_any(skb);
2488}
2489EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
2490
Michal Kazior6c5151a2014-02-27 18:50:04 +02002491static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2492{
2493 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002494 struct ath10k *ar = htt->ar;
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302495 struct htt_tx_done tx_done = {};
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302496 struct sk_buff_head rx_q;
2497 struct sk_buff_head rx_ind_q;
Michal Kazior426e10e2016-03-06 16:14:43 +02002498 struct sk_buff_head tx_ind_q;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002499 struct htt_resp *resp;
2500 struct sk_buff *skb;
Michal Kaziord742c962016-01-13 14:52:52 +01002501 unsigned long flags;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002502
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302503 __skb_queue_head_init(&rx_q);
2504 __skb_queue_head_init(&rx_ind_q);
Michal Kazior426e10e2016-03-06 16:14:43 +02002505 __skb_queue_head_init(&tx_ind_q);
Michal Kaziord742c962016-01-13 14:52:52 +01002506
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302507 spin_lock_irqsave(&htt->rx_compl_q.lock, flags);
2508 skb_queue_splice_init(&htt->rx_compl_q, &rx_q);
2509 spin_unlock_irqrestore(&htt->rx_compl_q.lock, flags);
2510
2511 spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
2512 skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
2513 spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
2514
Michal Kazior426e10e2016-03-06 16:14:43 +02002515 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
2516 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
2517 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
2518
Rajkumar Manoharan59465fe2016-03-22 17:22:11 +05302519 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
2520 * From kfifo_get() documentation:
2521 * Note that with only one concurrent reader and one concurrent writer,
2522 * you don't need extra locking to use these macro.
2523 */
2524 while (kfifo_get(&htt->txdone_fifo, &tx_done))
2525 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002526
Michal Kazior426e10e2016-03-06 16:14:43 +02002527 while ((skb = __skb_dequeue(&tx_ind_q))) {
2528 ath10k_htt_rx_tx_fetch_ind(ar, skb);
2529 dev_kfree_skb_any(skb);
2530 }
2531
Michal Kazior29946872016-03-06 16:14:34 +02002532 ath10k_mac_tx_push_pending(ar);
2533
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302534 while ((skb = __skb_dequeue(&rx_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002535 resp = (struct htt_resp *)skb->data;
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302536 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002537 ath10k_htt_rx_handler(htt, &resp->rx_ind);
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302538 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002539 dev_kfree_skb_any(skb);
2540 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002541
Rajkumar Manoharanda6416c2016-02-12 11:40:59 +05302542 while ((skb = __skb_dequeue(&rx_ind_q))) {
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302543 spin_lock_bh(&htt->rx_ring.lock);
Michal Kaziorc5450702015-01-24 12:14:48 +02002544 ath10k_htt_rx_in_ord_ind(ar, skb);
Rajkumar Manoharane7827e52016-02-12 11:40:58 +05302545 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kaziorc5450702015-01-24 12:14:48 +02002546 dev_kfree_skb_any(skb);
2547 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002548}