blob: 3d4406b1665814b64b31d06e9d29eba20f9b459d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* 8139cp.c: A Linux PCI Ethernet driver for the RealTek 8139C+ chips. */
2/*
3 Copyright 2001-2004 Jeff Garzik <jgarzik@pobox.com>
4
5 Copyright (C) 2001, 2002 David S. Miller (davem@redhat.com) [tg3.c]
6 Copyright (C) 2000, 2001 David S. Miller (davem@redhat.com) [sungem.c]
7 Copyright 2001 Manfred Spraul [natsemi.c]
8 Copyright 1999-2001 by Donald Becker. [natsemi.c]
9 Written 1997-2001 by Donald Becker. [8139too.c]
10 Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. [acenic.c]
11
12 This software may be used and distributed according to the terms of
13 the GNU General Public License (GPL), incorporated herein by reference.
14 Drivers based on or derived from this code fall under the GPL and must
15 retain the authorship, copyright and license notice. This file is not
16 a complete program and may only be used when the entire operating
17 system is licensed under the GPL.
18
19 See the file COPYING in this distribution for more information.
20
21 Contributors:
Jeff Garzikf3b197a2006-05-26 21:39:03 -040022
Linus Torvalds1da177e2005-04-16 15:20:36 -070023 Wake-on-LAN support - Felipe Damasio <felipewd@terra.com.br>
24 PCI suspend/resume - Felipe Damasio <felipewd@terra.com.br>
25 LinkChg interrupt - Felipe Damasio <felipewd@terra.com.br>
Jeff Garzikf3b197a2006-05-26 21:39:03 -040026
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 TODO:
28 * Test Tx checksumming thoroughly
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30 Low priority TODO:
31 * Complete reset on PciErr
32 * Consider Rx interrupt mitigation using TimerIntr
33 * Investigate using skb->priority with h/w VLAN priority
34 * Investigate using High Priority Tx Queue with skb->priority
35 * Adjust Rx FIFO threshold and Max Rx DMA burst on Rx FIFO error
36 * Adjust Tx FIFO threshold and Max Tx DMA burst on Tx FIFO error
37 * Implement Tx software interrupt mitigation via
38 Tx descriptor bit
39 * The real minimum of CP_MIN_MTU is 4 bytes. However,
40 for this to be supported, one must(?) turn on packet padding.
41 * Support external MII transceivers (patch available)
42
43 NOTES:
44 * TX checksumming is considered experimental. It is off by
45 default, use ethtool to turn it on.
46
47 */
48
Joe Perchesb4f18b32010-02-17 15:01:48 +000049#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
50
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#define DRV_NAME "8139cp"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040052#define DRV_VERSION "1.3"
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#define DRV_RELDATE "Mar 22, 2004"
54
55
Linus Torvalds1da177e2005-04-16 15:20:36 -070056#include <linux/module.h>
Stephen Hemmingere21ba282005-05-12 19:33:26 -040057#include <linux/moduleparam.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070058#include <linux/kernel.h>
59#include <linux/compiler.h>
60#include <linux/netdevice.h>
61#include <linux/etherdevice.h>
62#include <linux/init.h>
63#include <linux/pci.h>
Tobias Klauser8662d062005-05-12 22:19:39 -040064#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070065#include <linux/delay.h>
66#include <linux/ethtool.h>
67#include <linux/mii.h>
68#include <linux/if_vlan.h>
69#include <linux/crc32.h>
70#include <linux/in.h>
71#include <linux/ip.h>
72#include <linux/tcp.h>
73#include <linux/udp.h>
74#include <linux/cache.h>
75#include <asm/io.h>
76#include <asm/irq.h>
77#include <asm/uaccess.h>
78
79/* VLAN tagging feature enable/disable */
80#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
81#define CP_VLAN_TAG_USED 1
82#define CP_VLAN_TX_TAG(tx_desc,vlan_tag_value) \
Al Virocf983012007-08-22 21:18:56 -040083 do { (tx_desc)->opts2 = cpu_to_le32(vlan_tag_value); } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#else
85#define CP_VLAN_TAG_USED 0
86#define CP_VLAN_TX_TAG(tx_desc,vlan_tag_value) \
87 do { (tx_desc)->opts2 = 0; } while (0)
88#endif
89
90/* These identify the driver base version and may not be removed. */
91static char version[] =
Alan Jenkins9cc40852009-09-22 04:05:39 +000092DRV_NAME ": 10/100 PCI Ethernet driver v" DRV_VERSION " (" DRV_RELDATE ")\n";
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
94MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>");
95MODULE_DESCRIPTION("RealTek RTL-8139C+ series 10/100 PCI Ethernet driver");
a78d8922005-05-12 19:35:42 -040096MODULE_VERSION(DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -070097MODULE_LICENSE("GPL");
98
99static int debug = -1;
Stephen Hemmingere21ba282005-05-12 19:33:26 -0400100module_param(debug, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101MODULE_PARM_DESC (debug, "8139cp: bitmapped message enable number");
102
103/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
104 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
105static int multicast_filter_limit = 32;
Stephen Hemmingere21ba282005-05-12 19:33:26 -0400106module_param(multicast_filter_limit, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107MODULE_PARM_DESC (multicast_filter_limit, "8139cp: maximum number of filtered multicast addresses");
108
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109#define CP_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
110 NETIF_MSG_PROBE | \
111 NETIF_MSG_LINK)
112#define CP_NUM_STATS 14 /* struct cp_dma_stats, plus one */
113#define CP_STATS_SIZE 64 /* size in bytes of DMA stats block */
114#define CP_REGS_SIZE (0xff + 1)
115#define CP_REGS_VER 1 /* version 1 */
116#define CP_RX_RING_SIZE 64
117#define CP_TX_RING_SIZE 64
118#define CP_RING_BYTES \
119 ((sizeof(struct cp_desc) * CP_RX_RING_SIZE) + \
120 (sizeof(struct cp_desc) * CP_TX_RING_SIZE) + \
121 CP_STATS_SIZE)
122#define NEXT_TX(N) (((N) + 1) & (CP_TX_RING_SIZE - 1))
123#define NEXT_RX(N) (((N) + 1) & (CP_RX_RING_SIZE - 1))
124#define TX_BUFFS_AVAIL(CP) \
125 (((CP)->tx_tail <= (CP)->tx_head) ? \
126 (CP)->tx_tail + (CP_TX_RING_SIZE - 1) - (CP)->tx_head : \
127 (CP)->tx_tail - (CP)->tx_head - 1)
128
129#define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700130#define CP_INTERNAL_PHY 32
131
132/* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
133#define RX_FIFO_THRESH 5 /* Rx buffer level before first PCI xfer. */
134#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 */
135#define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
136#define TX_EARLY_THRESH 256 /* Early Tx threshold, in bytes */
137
138/* Time in jiffies before concluding the transmitter is hung. */
139#define TX_TIMEOUT (6*HZ)
140
141/* hardware minimum and maximum for a single frame's data payload */
142#define CP_MIN_MTU 60 /* TODO: allow lower, but pad */
143#define CP_MAX_MTU 4096
144
145enum {
146 /* NIC register offsets */
147 MAC0 = 0x00, /* Ethernet hardware address. */
148 MAR0 = 0x08, /* Multicast filter. */
149 StatsAddr = 0x10, /* 64-bit start addr of 64-byte DMA stats blk */
150 TxRingAddr = 0x20, /* 64-bit start addr of Tx ring */
151 HiTxRingAddr = 0x28, /* 64-bit start addr of high priority Tx ring */
152 Cmd = 0x37, /* Command register */
153 IntrMask = 0x3C, /* Interrupt mask */
154 IntrStatus = 0x3E, /* Interrupt status */
155 TxConfig = 0x40, /* Tx configuration */
156 ChipVersion = 0x43, /* 8-bit chip version, inside TxConfig */
157 RxConfig = 0x44, /* Rx configuration */
158 RxMissed = 0x4C, /* 24 bits valid, write clears */
159 Cfg9346 = 0x50, /* EEPROM select/control; Cfg reg [un]lock */
160 Config1 = 0x52, /* Config1 */
161 Config3 = 0x59, /* Config3 */
162 Config4 = 0x5A, /* Config4 */
163 MultiIntr = 0x5C, /* Multiple interrupt select */
164 BasicModeCtrl = 0x62, /* MII BMCR */
165 BasicModeStatus = 0x64, /* MII BMSR */
166 NWayAdvert = 0x66, /* MII ADVERTISE */
167 NWayLPAR = 0x68, /* MII LPA */
168 NWayExpansion = 0x6A, /* MII Expansion */
169 Config5 = 0xD8, /* Config5 */
170 TxPoll = 0xD9, /* Tell chip to check Tx descriptors for work */
171 RxMaxSize = 0xDA, /* Max size of an Rx packet (8169 only) */
172 CpCmd = 0xE0, /* C+ Command register (C+ mode only) */
173 IntrMitigate = 0xE2, /* rx/tx interrupt mitigation control */
174 RxRingAddr = 0xE4, /* 64-bit start addr of Rx ring */
175 TxThresh = 0xEC, /* Early Tx threshold */
176 OldRxBufAddr = 0x30, /* DMA address of Rx ring buffer (C mode) */
177 OldTSD0 = 0x10, /* DMA address of first Tx desc (C mode) */
178
179 /* Tx and Rx status descriptors */
180 DescOwn = (1 << 31), /* Descriptor is owned by NIC */
181 RingEnd = (1 << 30), /* End of descriptor ring */
182 FirstFrag = (1 << 29), /* First segment of a packet */
183 LastFrag = (1 << 28), /* Final segment of a packet */
Jeff Garzikfcec3452005-05-12 19:28:49 -0400184 LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */
185 MSSShift = 16, /* MSS value position */
186 MSSMask = 0xfff, /* MSS value: 11 bits */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 TxError = (1 << 23), /* Tx error summary */
188 RxError = (1 << 20), /* Rx error summary */
189 IPCS = (1 << 18), /* Calculate IP checksum */
190 UDPCS = (1 << 17), /* Calculate UDP/IP checksum */
191 TCPCS = (1 << 16), /* Calculate TCP/IP checksum */
192 TxVlanTag = (1 << 17), /* Add VLAN tag */
193 RxVlanTagged = (1 << 16), /* Rx VLAN tag available */
194 IPFail = (1 << 15), /* IP checksum failed */
195 UDPFail = (1 << 14), /* UDP/IP checksum failed */
196 TCPFail = (1 << 13), /* TCP/IP checksum failed */
197 NormalTxPoll = (1 << 6), /* One or more normal Tx packets to send */
198 PID1 = (1 << 17), /* 2 protocol id bits: 0==non-IP, */
199 PID0 = (1 << 16), /* 1==UDP/IP, 2==TCP/IP, 3==IP */
200 RxProtoTCP = 1,
201 RxProtoUDP = 2,
202 RxProtoIP = 3,
203 TxFIFOUnder = (1 << 25), /* Tx FIFO underrun */
204 TxOWC = (1 << 22), /* Tx Out-of-window collision */
205 TxLinkFail = (1 << 21), /* Link failed during Tx of packet */
206 TxMaxCol = (1 << 20), /* Tx aborted due to excessive collisions */
207 TxColCntShift = 16, /* Shift, to get 4-bit Tx collision cnt */
208 TxColCntMask = 0x01 | 0x02 | 0x04 | 0x08, /* 4-bit collision count */
209 RxErrFrame = (1 << 27), /* Rx frame alignment error */
210 RxMcast = (1 << 26), /* Rx multicast packet rcv'd */
211 RxErrCRC = (1 << 18), /* Rx CRC error */
212 RxErrRunt = (1 << 19), /* Rx error, packet < 64 bytes */
213 RxErrLong = (1 << 21), /* Rx error, packet > 4096 bytes */
214 RxErrFIFO = (1 << 22), /* Rx error, FIFO overflowed, pkt bad */
215
216 /* StatsAddr register */
217 DumpStats = (1 << 3), /* Begin stats dump */
218
219 /* RxConfig register */
220 RxCfgFIFOShift = 13, /* Shift, to get Rx FIFO thresh value */
221 RxCfgDMAShift = 8, /* Shift, to get Rx Max DMA value */
222 AcceptErr = 0x20, /* Accept packets with CRC errors */
223 AcceptRunt = 0x10, /* Accept runt (<64 bytes) packets */
224 AcceptBroadcast = 0x08, /* Accept broadcast packets */
225 AcceptMulticast = 0x04, /* Accept multicast packets */
226 AcceptMyPhys = 0x02, /* Accept pkts with our MAC as dest */
227 AcceptAllPhys = 0x01, /* Accept all pkts w/ physical dest */
228
229 /* IntrMask / IntrStatus registers */
230 PciErr = (1 << 15), /* System error on the PCI bus */
231 TimerIntr = (1 << 14), /* Asserted when TCTR reaches TimerInt value */
232 LenChg = (1 << 13), /* Cable length change */
233 SWInt = (1 << 8), /* Software-requested interrupt */
234 TxEmpty = (1 << 7), /* No Tx descriptors available */
235 RxFIFOOvr = (1 << 6), /* Rx FIFO Overflow */
236 LinkChg = (1 << 5), /* Packet underrun, or link change */
237 RxEmpty = (1 << 4), /* No Rx descriptors available */
238 TxErr = (1 << 3), /* Tx error */
239 TxOK = (1 << 2), /* Tx packet sent */
240 RxErr = (1 << 1), /* Rx error */
241 RxOK = (1 << 0), /* Rx packet received */
242 IntrResvd = (1 << 10), /* reserved, according to RealTek engineers,
243 but hardware likes to raise it */
244
245 IntrAll = PciErr | TimerIntr | LenChg | SWInt | TxEmpty |
246 RxFIFOOvr | LinkChg | RxEmpty | TxErr | TxOK |
247 RxErr | RxOK | IntrResvd,
248
249 /* C mode command register */
250 CmdReset = (1 << 4), /* Enable to reset; self-clearing */
251 RxOn = (1 << 3), /* Rx mode enable */
252 TxOn = (1 << 2), /* Tx mode enable */
253
254 /* C+ mode command register */
255 RxVlanOn = (1 << 6), /* Rx VLAN de-tagging enable */
256 RxChkSum = (1 << 5), /* Rx checksum offload enable */
257 PCIDAC = (1 << 4), /* PCI Dual Address Cycle (64-bit PCI) */
258 PCIMulRW = (1 << 3), /* Enable PCI read/write multiple */
259 CpRxOn = (1 << 1), /* Rx mode enable */
260 CpTxOn = (1 << 0), /* Tx mode enable */
261
262 /* Cfg9436 EEPROM control register */
263 Cfg9346_Lock = 0x00, /* Lock ConfigX/MII register access */
264 Cfg9346_Unlock = 0xC0, /* Unlock ConfigX/MII register access */
265
266 /* TxConfig register */
267 IFG = (1 << 25) | (1 << 24), /* standard IEEE interframe gap */
268 TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */
269
270 /* Early Tx Threshold register */
271 TxThreshMask = 0x3f, /* Mask bits 5-0 */
272 TxThreshMax = 2048, /* Max early Tx threshold */
273
274 /* Config1 register */
275 DriverLoaded = (1 << 5), /* Software marker, driver is loaded */
276 LWACT = (1 << 4), /* LWAKE active mode */
277 PMEnable = (1 << 0), /* Enable various PM features of chip */
278
279 /* Config3 register */
280 PARMEnable = (1 << 6), /* Enable auto-loading of PHY parms */
281 MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */
282 LinkUp = (1 << 4), /* Wake up when the cable connection is re-established */
283
284 /* Config4 register */
285 LWPTN = (1 << 1), /* LWAKE Pattern */
286 LWPME = (1 << 4), /* LANWAKE vs PMEB */
287
288 /* Config5 register */
289 BWF = (1 << 6), /* Accept Broadcast wakeup frame */
290 MWF = (1 << 5), /* Accept Multicast wakeup frame */
291 UWF = (1 << 4), /* Accept Unicast wakeup frame */
292 LANWake = (1 << 1), /* Enable LANWake signal */
293 PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */
294
295 cp_norx_intr_mask = PciErr | LinkChg | TxOK | TxErr | TxEmpty,
296 cp_rx_intr_mask = RxOK | RxErr | RxEmpty | RxFIFOOvr,
297 cp_intr_mask = cp_rx_intr_mask | cp_norx_intr_mask,
298};
299
300static const unsigned int cp_rx_config =
301 (RX_FIFO_THRESH << RxCfgFIFOShift) |
302 (RX_DMA_BURST << RxCfgDMAShift);
303
304struct cp_desc {
Al Viro03233b92007-08-23 02:31:17 +0100305 __le32 opts1;
Al Virocf983012007-08-22 21:18:56 -0400306 __le32 opts2;
Al Viro03233b92007-08-23 02:31:17 +0100307 __le64 addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308};
309
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310struct cp_dma_stats {
Al Viro03233b92007-08-23 02:31:17 +0100311 __le64 tx_ok;
312 __le64 rx_ok;
313 __le64 tx_err;
314 __le32 rx_err;
315 __le16 rx_fifo;
316 __le16 frame_align;
317 __le32 tx_ok_1col;
318 __le32 tx_ok_mcol;
319 __le64 rx_ok_phys;
320 __le64 rx_ok_bcast;
321 __le32 rx_ok_mcast;
322 __le16 tx_abort;
323 __le16 tx_underrun;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324} __attribute__((packed));
325
326struct cp_extra_stats {
327 unsigned long rx_frags;
328};
329
330struct cp_private {
331 void __iomem *regs;
332 struct net_device *dev;
333 spinlock_t lock;
334 u32 msg_enable;
335
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700336 struct napi_struct napi;
337
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338 struct pci_dev *pdev;
339 u32 rx_config;
340 u16 cpcmd;
341
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 struct cp_extra_stats cp_stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343
Francois Romieud03d3762006-01-29 01:31:36 +0100344 unsigned rx_head ____cacheline_aligned;
345 unsigned rx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346 struct cp_desc *rx_ring;
Francois Romieu0ba894d2006-08-14 19:55:07 +0200347 struct sk_buff *rx_skb[CP_RX_RING_SIZE];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349 unsigned tx_head ____cacheline_aligned;
350 unsigned tx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351 struct cp_desc *tx_ring;
Francois Romieu48907e32006-09-10 23:33:44 +0200352 struct sk_buff *tx_skb[CP_TX_RING_SIZE];
Francois Romieud03d3762006-01-29 01:31:36 +0100353
354 unsigned rx_buf_sz;
355 unsigned wol_enabled : 1; /* Is Wake-on-LAN enabled? */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356
357#if CP_VLAN_TAG_USED
358 struct vlan_group *vlgrp;
359#endif
Francois Romieud03d3762006-01-29 01:31:36 +0100360 dma_addr_t ring_dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361
362 struct mii_if_info mii_if;
363};
364
365#define cpr8(reg) readb(cp->regs + (reg))
366#define cpr16(reg) readw(cp->regs + (reg))
367#define cpr32(reg) readl(cp->regs + (reg))
368#define cpw8(reg,val) writeb((val), cp->regs + (reg))
369#define cpw16(reg,val) writew((val), cp->regs + (reg))
370#define cpw32(reg,val) writel((val), cp->regs + (reg))
371#define cpw8_f(reg,val) do { \
372 writeb((val), cp->regs + (reg)); \
373 readb(cp->regs + (reg)); \
374 } while (0)
375#define cpw16_f(reg,val) do { \
376 writew((val), cp->regs + (reg)); \
377 readw(cp->regs + (reg)); \
378 } while (0)
379#define cpw32_f(reg,val) do { \
380 writel((val), cp->regs + (reg)); \
381 readl(cp->regs + (reg)); \
382 } while (0)
383
384
385static void __cp_set_rx_mode (struct net_device *dev);
386static void cp_tx (struct cp_private *cp);
387static void cp_clean_rings (struct cp_private *cp);
Steffen Klassert7502cd12005-05-12 19:34:31 -0400388#ifdef CONFIG_NET_POLL_CONTROLLER
389static void cp_poll_controller(struct net_device *dev);
390#endif
Philip Craig722fdb32006-06-21 11:33:27 +1000391static int cp_get_eeprom_len(struct net_device *dev);
392static int cp_get_eeprom(struct net_device *dev,
393 struct ethtool_eeprom *eeprom, u8 *data);
394static int cp_set_eeprom(struct net_device *dev,
395 struct ethtool_eeprom *eeprom, u8 *data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396
Alexey Dobriyana3aa1882010-01-07 11:58:11 +0000397static DEFINE_PCI_DEVICE_TABLE(cp_pci_tbl) = {
Francois Romieucccb20d2006-08-16 13:07:18 +0200398 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139), },
399 { PCI_DEVICE(PCI_VENDOR_ID_TTTECH, PCI_DEVICE_ID_TTTECH_MC322), },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 { },
401};
402MODULE_DEVICE_TABLE(pci, cp_pci_tbl);
403
404static struct {
405 const char str[ETH_GSTRING_LEN];
406} ethtool_stats_keys[] = {
407 { "tx_ok" },
408 { "rx_ok" },
409 { "tx_err" },
410 { "rx_err" },
411 { "rx_fifo" },
412 { "frame_align" },
413 { "tx_ok_1col" },
414 { "tx_ok_mcol" },
415 { "rx_ok_phys" },
416 { "rx_ok_bcast" },
417 { "rx_ok_mcast" },
418 { "tx_abort" },
419 { "tx_underrun" },
420 { "rx_frags" },
421};
422
423
424#if CP_VLAN_TAG_USED
425static void cp_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
426{
427 struct cp_private *cp = netdev_priv(dev);
428 unsigned long flags;
429
430 spin_lock_irqsave(&cp->lock, flags);
431 cp->vlgrp = grp;
Stephen Hemminger7b332242007-06-01 09:43:59 -0700432 if (grp)
433 cp->cpcmd |= RxVlanOn;
434 else
435 cp->cpcmd &= ~RxVlanOn;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437 cpw16(CpCmd, cp->cpcmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438 spin_unlock_irqrestore(&cp->lock, flags);
439}
440#endif /* CP_VLAN_TAG_USED */
441
442static inline void cp_set_rxbufsize (struct cp_private *cp)
443{
444 unsigned int mtu = cp->dev->mtu;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 if (mtu > ETH_DATA_LEN)
447 /* MTU + ethernet header + FCS + optional VLAN tag */
448 cp->rx_buf_sz = mtu + ETH_HLEN + 8;
449 else
450 cp->rx_buf_sz = PKT_BUF_SZ;
451}
452
453static inline void cp_rx_skb (struct cp_private *cp, struct sk_buff *skb,
454 struct cp_desc *desc)
455{
456 skb->protocol = eth_type_trans (skb, cp->dev);
457
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300458 cp->dev->stats.rx_packets++;
459 cp->dev->stats.rx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460
461#if CP_VLAN_TAG_USED
Al Virocf983012007-08-22 21:18:56 -0400462 if (cp->vlgrp && (desc->opts2 & cpu_to_le32(RxVlanTagged))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 vlan_hwaccel_receive_skb(skb, cp->vlgrp,
Al Virocf983012007-08-22 21:18:56 -0400464 swab16(le32_to_cpu(desc->opts2) & 0xffff));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465 } else
466#endif
467 netif_receive_skb(skb);
468}
469
470static void cp_rx_err_acct (struct cp_private *cp, unsigned rx_tail,
471 u32 status, u32 len)
472{
Joe Perchesb4f18b32010-02-17 15:01:48 +0000473 netif_dbg(cp, rx_err, cp->dev, "rx err, slot %d status 0x%x len %d\n",
474 rx_tail, status, len);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300475 cp->dev->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700476 if (status & RxErrFrame)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300477 cp->dev->stats.rx_frame_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478 if (status & RxErrCRC)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300479 cp->dev->stats.rx_crc_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480 if ((status & RxErrRunt) || (status & RxErrLong))
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300481 cp->dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700482 if ((status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag))
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300483 cp->dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 if (status & RxErrFIFO)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300485 cp->dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700486}
487
488static inline unsigned int cp_rx_csum_ok (u32 status)
489{
490 unsigned int protocol = (status >> 16) & 0x3;
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400491
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492 if (likely((protocol == RxProtoTCP) && (!(status & TCPFail))))
493 return 1;
494 else if ((protocol == RxProtoUDP) && (!(status & UDPFail)))
495 return 1;
496 else if ((protocol == RxProtoIP) && (!(status & IPFail)))
497 return 1;
498 return 0;
499}
500
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700501static int cp_rx_poll(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700503 struct cp_private *cp = container_of(napi, struct cp_private, napi);
504 struct net_device *dev = cp->dev;
505 unsigned int rx_tail = cp->rx_tail;
506 int rx;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507
508rx_status_loop:
509 rx = 0;
510 cpw16(IntrStatus, cp_rx_intr_mask);
511
512 while (1) {
513 u32 status, len;
514 dma_addr_t mapping;
515 struct sk_buff *skb, *new_skb;
516 struct cp_desc *desc;
Francois Romieu839d1622009-08-12 22:18:14 -0700517 const unsigned buflen = cp->rx_buf_sz;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518
Francois Romieu0ba894d2006-08-14 19:55:07 +0200519 skb = cp->rx_skb[rx_tail];
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +0200520 BUG_ON(!skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
522 desc = &cp->rx_ring[rx_tail];
523 status = le32_to_cpu(desc->opts1);
524 if (status & DescOwn)
525 break;
526
527 len = (status & 0x1fff) - 4;
Francois Romieu3598b572006-01-29 01:31:13 +0100528 mapping = le64_to_cpu(desc->addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529
530 if ((status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag)) {
531 /* we don't support incoming fragmented frames.
532 * instead, we attempt to ensure that the
533 * pre-allocated RX skbs are properly sized such
534 * that RX fragments are never encountered
535 */
536 cp_rx_err_acct(cp, rx_tail, status, len);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300537 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538 cp->cp_stats.rx_frags++;
539 goto rx_next;
540 }
541
542 if (status & (RxError | RxErrFIFO)) {
543 cp_rx_err_acct(cp, rx_tail, status, len);
544 goto rx_next;
545 }
546
Joe Perchesb4f18b32010-02-17 15:01:48 +0000547 netif_dbg(cp, rx_status, dev, "rx slot %d status 0x%x len %d\n",
548 rx_tail, status, len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549
Eric Dumazet89d71a62009-10-13 05:34:20 +0000550 new_skb = netdev_alloc_skb_ip_align(dev, buflen);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 if (!new_skb) {
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300552 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 goto rx_next;
554 }
555
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400556 dma_unmap_single(&cp->pdev->dev, mapping,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700557 buflen, PCI_DMA_FROMDEVICE);
558
559 /* Handle checksum offloading for incoming packets. */
560 if (cp_rx_csum_ok(status))
561 skb->ip_summed = CHECKSUM_UNNECESSARY;
562 else
563 skb->ip_summed = CHECKSUM_NONE;
564
565 skb_put(skb, len);
566
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400567 mapping = dma_map_single(&cp->pdev->dev, new_skb->data, buflen,
Francois Romieu3598b572006-01-29 01:31:13 +0100568 PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d2006-08-14 19:55:07 +0200569 cp->rx_skb[rx_tail] = new_skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570
571 cp_rx_skb(cp, skb, desc);
572 rx++;
573
574rx_next:
575 cp->rx_ring[rx_tail].opts2 = 0;
576 cp->rx_ring[rx_tail].addr = cpu_to_le64(mapping);
577 if (rx_tail == (CP_RX_RING_SIZE - 1))
578 desc->opts1 = cpu_to_le32(DescOwn | RingEnd |
579 cp->rx_buf_sz);
580 else
581 desc->opts1 = cpu_to_le32(DescOwn | cp->rx_buf_sz);
582 rx_tail = NEXT_RX(rx_tail);
583
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700584 if (rx >= budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585 break;
586 }
587
588 cp->rx_tail = rx_tail;
589
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590 /* if we did not reach work limit, then we're done with
591 * this round of polling
592 */
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700593 if (rx < budget) {
Francois Romieud15e9c42006-12-17 23:03:15 +0100594 unsigned long flags;
595
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596 if (cpr16(IntrStatus) & cp_rx_intr_mask)
597 goto rx_status_loop;
598
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700599 spin_lock_irqsave(&cp->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600 cpw16_f(IntrMask, cp_intr_mask);
Ben Hutchings288379f2009-01-19 16:43:59 -0800601 __napi_complete(napi);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700602 spin_unlock_irqrestore(&cp->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603 }
604
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700605 return rx;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606}
607
David Howells7d12e782006-10-05 14:55:46 +0100608static irqreturn_t cp_interrupt (int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609{
610 struct net_device *dev = dev_instance;
611 struct cp_private *cp;
612 u16 status;
613
614 if (unlikely(dev == NULL))
615 return IRQ_NONE;
616 cp = netdev_priv(dev);
617
618 status = cpr16(IntrStatus);
619 if (!status || (status == 0xFFFF))
620 return IRQ_NONE;
621
Joe Perchesb4f18b32010-02-17 15:01:48 +0000622 netif_dbg(cp, intr, dev, "intr, status %04x cmd %02x cpcmd %04x\n",
623 status, cpr8(Cmd), cpr16(CpCmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624
625 cpw16(IntrStatus, status & ~cp_rx_intr_mask);
626
627 spin_lock(&cp->lock);
628
629 /* close possible race's with dev_close */
630 if (unlikely(!netif_running(dev))) {
631 cpw16(IntrMask, 0);
632 spin_unlock(&cp->lock);
633 return IRQ_HANDLED;
634 }
635
636 if (status & (RxOK | RxErr | RxEmpty | RxFIFOOvr))
Ben Hutchings288379f2009-01-19 16:43:59 -0800637 if (napi_schedule_prep(&cp->napi)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700638 cpw16_f(IntrMask, cp_norx_intr_mask);
Ben Hutchings288379f2009-01-19 16:43:59 -0800639 __napi_schedule(&cp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 }
641
642 if (status & (TxOK | TxErr | TxEmpty | SWInt))
643 cp_tx(cp);
644 if (status & LinkChg)
Richard Knutsson2501f842007-05-19 22:26:40 +0200645 mii_check_media(&cp->mii_if, netif_msg_link(cp), false);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700646
647 spin_unlock(&cp->lock);
648
649 if (status & PciErr) {
650 u16 pci_status;
651
652 pci_read_config_word(cp->pdev, PCI_STATUS, &pci_status);
653 pci_write_config_word(cp->pdev, PCI_STATUS, pci_status);
Joe Perchesb4f18b32010-02-17 15:01:48 +0000654 netdev_err(dev, "PCI bus error, status=%04x, PCI status=%04x\n",
655 status, pci_status);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656
657 /* TODO: reset hardware */
658 }
659
660 return IRQ_HANDLED;
661}
662
Steffen Klassert7502cd12005-05-12 19:34:31 -0400663#ifdef CONFIG_NET_POLL_CONTROLLER
664/*
665 * Polling receive - used by netconsole and other diagnostic tools
666 * to allow network i/o with interrupts disabled.
667 */
668static void cp_poll_controller(struct net_device *dev)
669{
670 disable_irq(dev->irq);
David Howells7d12e782006-10-05 14:55:46 +0100671 cp_interrupt(dev->irq, dev);
Steffen Klassert7502cd12005-05-12 19:34:31 -0400672 enable_irq(dev->irq);
673}
674#endif
675
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676static void cp_tx (struct cp_private *cp)
677{
678 unsigned tx_head = cp->tx_head;
679 unsigned tx_tail = cp->tx_tail;
680
681 while (tx_tail != tx_head) {
Francois Romieu3598b572006-01-29 01:31:13 +0100682 struct cp_desc *txd = cp->tx_ring + tx_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700683 struct sk_buff *skb;
684 u32 status;
685
686 rmb();
Francois Romieu3598b572006-01-29 01:31:13 +0100687 status = le32_to_cpu(txd->opts1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700688 if (status & DescOwn)
689 break;
690
Francois Romieu48907e32006-09-10 23:33:44 +0200691 skb = cp->tx_skb[tx_tail];
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +0200692 BUG_ON(!skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400694 dma_unmap_single(&cp->pdev->dev, le64_to_cpu(txd->addr),
Francois Romieu48907e32006-09-10 23:33:44 +0200695 le32_to_cpu(txd->opts1) & 0xffff,
696 PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700697
698 if (status & LastFrag) {
699 if (status & (TxError | TxFIFOUnder)) {
Joe Perchesb4f18b32010-02-17 15:01:48 +0000700 netif_dbg(cp, tx_err, cp->dev,
701 "tx err, status 0x%x\n", status);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300702 cp->dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 if (status & TxOWC)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300704 cp->dev->stats.tx_window_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700705 if (status & TxMaxCol)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300706 cp->dev->stats.tx_aborted_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700707 if (status & TxLinkFail)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300708 cp->dev->stats.tx_carrier_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700709 if (status & TxFIFOUnder)
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300710 cp->dev->stats.tx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700711 } else {
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300712 cp->dev->stats.collisions +=
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 ((status >> TxColCntShift) & TxColCntMask);
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300714 cp->dev->stats.tx_packets++;
715 cp->dev->stats.tx_bytes += skb->len;
Joe Perchesb4f18b32010-02-17 15:01:48 +0000716 netif_dbg(cp, tx_done, cp->dev,
717 "tx done, slot %d\n", tx_tail);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700718 }
719 dev_kfree_skb_irq(skb);
720 }
721
Francois Romieu48907e32006-09-10 23:33:44 +0200722 cp->tx_skb[tx_tail] = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723
724 tx_tail = NEXT_TX(tx_tail);
725 }
726
727 cp->tx_tail = tx_tail;
728
729 if (TX_BUFFS_AVAIL(cp) > (MAX_SKB_FRAGS + 1))
730 netif_wake_queue(cp->dev);
731}
732
Stephen Hemminger613573252009-08-31 19:50:58 +0000733static netdev_tx_t cp_start_xmit (struct sk_buff *skb,
734 struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735{
736 struct cp_private *cp = netdev_priv(dev);
737 unsigned entry;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400738 u32 eor, flags;
Chris Lalancette553af562007-01-16 16:41:44 -0500739 unsigned long intr_flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740#if CP_VLAN_TAG_USED
741 u32 vlan_tag = 0;
742#endif
Jeff Garzikfcec3452005-05-12 19:28:49 -0400743 int mss = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700744
Chris Lalancette553af562007-01-16 16:41:44 -0500745 spin_lock_irqsave(&cp->lock, intr_flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700746
747 /* This is a hard error, log it. */
748 if (TX_BUFFS_AVAIL(cp) <= (skb_shinfo(skb)->nr_frags + 1)) {
749 netif_stop_queue(dev);
Chris Lalancette553af562007-01-16 16:41:44 -0500750 spin_unlock_irqrestore(&cp->lock, intr_flags);
Joe Perchesb4f18b32010-02-17 15:01:48 +0000751 netdev_err(dev, "BUG! Tx Ring full when queue awake!\n");
Patrick McHardy5b548142009-06-12 06:22:29 +0000752 return NETDEV_TX_BUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 }
754
755#if CP_VLAN_TAG_USED
756 if (cp->vlgrp && vlan_tx_tag_present(skb))
Al Virocf983012007-08-22 21:18:56 -0400757 vlan_tag = TxVlanTag | swab16(vlan_tx_tag_get(skb));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700758#endif
759
760 entry = cp->tx_head;
761 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400762 if (dev->features & NETIF_F_TSO)
Herbert Xu79671682006-06-22 02:40:14 -0700763 mss = skb_shinfo(skb)->gso_size;
Jeff Garzikfcec3452005-05-12 19:28:49 -0400764
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765 if (skb_shinfo(skb)->nr_frags == 0) {
766 struct cp_desc *txd = &cp->tx_ring[entry];
767 u32 len;
768 dma_addr_t mapping;
769
770 len = skb->len;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400771 mapping = dma_map_single(&cp->pdev->dev, skb->data, len, PCI_DMA_TODEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700772 CP_VLAN_TX_TAG(txd, vlan_tag);
773 txd->addr = cpu_to_le64(mapping);
774 wmb();
775
Jeff Garzikfcec3452005-05-12 19:28:49 -0400776 flags = eor | len | DescOwn | FirstFrag | LastFrag;
777
778 if (mss)
779 flags |= LargeSend | ((mss & MSSMask) << MSSShift);
Patrick McHardy84fa7932006-08-29 16:44:56 -0700780 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -0700781 const struct iphdr *ip = ip_hdr(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782 if (ip->protocol == IPPROTO_TCP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400783 flags |= IPCS | TCPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784 else if (ip->protocol == IPPROTO_UDP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400785 flags |= IPCS | UDPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700786 else
Francois Romieu57344182005-05-12 19:31:31 -0400787 WARN_ON(1); /* we need a WARN() */
Jeff Garzikfcec3452005-05-12 19:28:49 -0400788 }
789
790 txd->opts1 = cpu_to_le32(flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791 wmb();
792
Francois Romieu48907e32006-09-10 23:33:44 +0200793 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794 entry = NEXT_TX(entry);
795 } else {
796 struct cp_desc *txd;
797 u32 first_len, first_eor;
798 dma_addr_t first_mapping;
799 int frag, first_entry = entry;
Arnaldo Carvalho de Meloeddc9ec2007-04-20 22:47:35 -0700800 const struct iphdr *ip = ip_hdr(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801
802 /* We must give this initial chunk to the device last.
803 * Otherwise we could race with the device.
804 */
805 first_eor = eor;
806 first_len = skb_headlen(skb);
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400807 first_mapping = dma_map_single(&cp->pdev->dev, skb->data,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700808 first_len, PCI_DMA_TODEVICE);
Francois Romieu48907e32006-09-10 23:33:44 +0200809 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700810 entry = NEXT_TX(entry);
811
812 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
813 skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
814 u32 len;
815 u32 ctrl;
816 dma_addr_t mapping;
817
818 len = this_frag->size;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -0400819 mapping = dma_map_single(&cp->pdev->dev,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700820 ((void *) page_address(this_frag->page) +
821 this_frag->page_offset),
822 len, PCI_DMA_TODEVICE);
823 eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0;
824
Jeff Garzikfcec3452005-05-12 19:28:49 -0400825 ctrl = eor | len | DescOwn;
826
827 if (mss)
828 ctrl |= LargeSend |
829 ((mss & MSSMask) << MSSShift);
Patrick McHardy84fa7932006-08-29 16:44:56 -0700830 else if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 if (ip->protocol == IPPROTO_TCP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400832 ctrl |= IPCS | TCPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 else if (ip->protocol == IPPROTO_UDP)
Jeff Garzikfcec3452005-05-12 19:28:49 -0400834 ctrl |= IPCS | UDPCS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835 else
836 BUG();
Jeff Garzikfcec3452005-05-12 19:28:49 -0400837 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838
839 if (frag == skb_shinfo(skb)->nr_frags - 1)
840 ctrl |= LastFrag;
841
842 txd = &cp->tx_ring[entry];
843 CP_VLAN_TX_TAG(txd, vlan_tag);
844 txd->addr = cpu_to_le64(mapping);
845 wmb();
846
847 txd->opts1 = cpu_to_le32(ctrl);
848 wmb();
849
Francois Romieu48907e32006-09-10 23:33:44 +0200850 cp->tx_skb[entry] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700851 entry = NEXT_TX(entry);
852 }
853
854 txd = &cp->tx_ring[first_entry];
855 CP_VLAN_TX_TAG(txd, vlan_tag);
856 txd->addr = cpu_to_le64(first_mapping);
857 wmb();
858
Patrick McHardy84fa7932006-08-29 16:44:56 -0700859 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700860 if (ip->protocol == IPPROTO_TCP)
861 txd->opts1 = cpu_to_le32(first_eor | first_len |
862 FirstFrag | DescOwn |
863 IPCS | TCPCS);
864 else if (ip->protocol == IPPROTO_UDP)
865 txd->opts1 = cpu_to_le32(first_eor | first_len |
866 FirstFrag | DescOwn |
867 IPCS | UDPCS);
868 else
869 BUG();
870 } else
871 txd->opts1 = cpu_to_le32(first_eor | first_len |
872 FirstFrag | DescOwn);
873 wmb();
874 }
875 cp->tx_head = entry;
Joe Perchesb4f18b32010-02-17 15:01:48 +0000876 netif_dbg(cp, tx_queued, cp->dev, "tx queued, slot %d, skblen %d\n",
877 entry, skb->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878 if (TX_BUFFS_AVAIL(cp) <= (MAX_SKB_FRAGS + 1))
879 netif_stop_queue(dev);
880
Chris Lalancette553af562007-01-16 16:41:44 -0500881 spin_unlock_irqrestore(&cp->lock, intr_flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882
883 cpw8(TxPoll, NormalTxPoll);
884 dev->trans_start = jiffies;
885
Patrick McHardy6ed10652009-06-23 06:03:08 +0000886 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700887}
888
889/* Set or clear the multicast filter for this adaptor.
890 This routine is not state sensitive and need not be SMP locked. */
891
892static void __cp_set_rx_mode (struct net_device *dev)
893{
894 struct cp_private *cp = netdev_priv(dev);
895 u32 mc_filter[2]; /* Multicast hash filter */
Jiri Pirkoa56ed412010-02-05 02:47:28 +0000896 int rx_mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897 u32 tmp;
898
899 /* Note: do not reorder, GCC is clever about common statements. */
900 if (dev->flags & IFF_PROMISC) {
901 /* Unconditionally log net taps. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902 rx_mode =
903 AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
904 AcceptAllPhys;
905 mc_filter[1] = mc_filter[0] = 0xffffffff;
Jiri Pirkoa56ed412010-02-05 02:47:28 +0000906 } else if ((netdev_mc_count(dev) > multicast_filter_limit) ||
Joe Perches8e95a202009-12-03 07:58:21 +0000907 (dev->flags & IFF_ALLMULTI)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908 /* Too many to filter perfectly -- accept all multicasts. */
909 rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
910 mc_filter[1] = mc_filter[0] = 0xffffffff;
911 } else {
912 struct dev_mc_list *mclist;
913 rx_mode = AcceptBroadcast | AcceptMyPhys;
914 mc_filter[1] = mc_filter[0] = 0;
Jiri Pirkoa56ed412010-02-05 02:47:28 +0000915 netdev_for_each_mc_addr(mclist, dev) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
917
918 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
919 rx_mode |= AcceptMulticast;
920 }
921 }
922
923 /* We can safely update without stopping the chip. */
924 tmp = cp_rx_config | rx_mode;
925 if (cp->rx_config != tmp) {
926 cpw32_f (RxConfig, tmp);
927 cp->rx_config = tmp;
928 }
929 cpw32_f (MAR0 + 0, mc_filter[0]);
930 cpw32_f (MAR0 + 4, mc_filter[1]);
931}
932
933static void cp_set_rx_mode (struct net_device *dev)
934{
935 unsigned long flags;
936 struct cp_private *cp = netdev_priv(dev);
937
938 spin_lock_irqsave (&cp->lock, flags);
939 __cp_set_rx_mode(dev);
940 spin_unlock_irqrestore (&cp->lock, flags);
941}
942
943static void __cp_get_stats(struct cp_private *cp)
944{
945 /* only lower 24 bits valid; write any value to clear */
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300946 cp->dev->stats.rx_missed_errors += (cpr32 (RxMissed) & 0xffffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 cpw32 (RxMissed, 0);
948}
949
950static struct net_device_stats *cp_get_stats(struct net_device *dev)
951{
952 struct cp_private *cp = netdev_priv(dev);
953 unsigned long flags;
954
955 /* The chip only need report frame silently dropped. */
956 spin_lock_irqsave(&cp->lock, flags);
957 if (netif_running(dev) && netif_device_present(dev))
958 __cp_get_stats(cp);
959 spin_unlock_irqrestore(&cp->lock, flags);
960
Paulius Zaleckas237225f2008-05-05 16:05:17 +0300961 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962}
963
964static void cp_stop_hw (struct cp_private *cp)
965{
966 cpw16(IntrStatus, ~(cpr16(IntrStatus)));
967 cpw16_f(IntrMask, 0);
968 cpw8(Cmd, 0);
969 cpw16_f(CpCmd, 0);
970 cpw16_f(IntrStatus, ~(cpr16(IntrStatus)));
971
972 cp->rx_tail = 0;
973 cp->tx_head = cp->tx_tail = 0;
974}
975
976static void cp_reset_hw (struct cp_private *cp)
977{
978 unsigned work = 1000;
979
980 cpw8(Cmd, CmdReset);
981
982 while (work--) {
983 if (!(cpr8(Cmd) & CmdReset))
984 return;
985
Nishanth Aravamudan3173c892005-09-11 02:09:55 -0700986 schedule_timeout_uninterruptible(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987 }
988
Joe Perchesb4f18b32010-02-17 15:01:48 +0000989 netdev_err(cp->dev, "hardware reset timeout\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990}
991
992static inline void cp_start_hw (struct cp_private *cp)
993{
994 cpw16(CpCmd, cp->cpcmd);
995 cpw8(Cmd, RxOn | TxOn);
996}
997
998static void cp_init_hw (struct cp_private *cp)
999{
1000 struct net_device *dev = cp->dev;
1001 dma_addr_t ring_dma;
1002
1003 cp_reset_hw(cp);
1004
1005 cpw8_f (Cfg9346, Cfg9346_Unlock);
1006
1007 /* Restore our idea of the MAC address. */
Al Viro03233b92007-08-23 02:31:17 +01001008 cpw32_f (MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
1009 cpw32_f (MAC0 + 4, le32_to_cpu (*(__le32 *) (dev->dev_addr + 4)));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001010
1011 cp_start_hw(cp);
1012 cpw8(TxThresh, 0x06); /* XXX convert magic num to a constant */
1013
1014 __cp_set_rx_mode(dev);
1015 cpw32_f (TxConfig, IFG | (TX_DMA_BURST << TxDMAShift));
1016
1017 cpw8(Config1, cpr8(Config1) | DriverLoaded | PMEnable);
1018 /* Disable Wake-on-LAN. Can be turned on with ETHTOOL_SWOL */
1019 cpw8(Config3, PARMEnable);
1020 cp->wol_enabled = 0;
1021
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001022 cpw8(Config5, cpr8(Config5) & PMEStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001023
1024 cpw32_f(HiTxRingAddr, 0);
1025 cpw32_f(HiTxRingAddr + 4, 0);
1026
1027 ring_dma = cp->ring_dma;
1028 cpw32_f(RxRingAddr, ring_dma & 0xffffffff);
1029 cpw32_f(RxRingAddr + 4, (ring_dma >> 16) >> 16);
1030
1031 ring_dma += sizeof(struct cp_desc) * CP_RX_RING_SIZE;
1032 cpw32_f(TxRingAddr, ring_dma & 0xffffffff);
1033 cpw32_f(TxRingAddr + 4, (ring_dma >> 16) >> 16);
1034
1035 cpw16(MultiIntr, 0);
1036
1037 cpw16_f(IntrMask, cp_intr_mask);
1038
1039 cpw8_f(Cfg9346, Cfg9346_Lock);
1040}
1041
Kevin Loa52be1cbc2008-08-27 11:35:15 +08001042static int cp_refill_rx(struct cp_private *cp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001043{
Kevin Loa52be1cbc2008-08-27 11:35:15 +08001044 struct net_device *dev = cp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001045 unsigned i;
1046
1047 for (i = 0; i < CP_RX_RING_SIZE; i++) {
1048 struct sk_buff *skb;
Francois Romieu3598b572006-01-29 01:31:13 +01001049 dma_addr_t mapping;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001050
Eric Dumazet89d71a62009-10-13 05:34:20 +00001051 skb = netdev_alloc_skb_ip_align(dev, cp->rx_buf_sz);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 if (!skb)
1053 goto err_out;
1054
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001055 mapping = dma_map_single(&cp->pdev->dev, skb->data,
1056 cp->rx_buf_sz, PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d2006-08-14 19:55:07 +02001057 cp->rx_skb[i] = skb;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001058
1059 cp->rx_ring[i].opts2 = 0;
Francois Romieu3598b572006-01-29 01:31:13 +01001060 cp->rx_ring[i].addr = cpu_to_le64(mapping);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061 if (i == (CP_RX_RING_SIZE - 1))
1062 cp->rx_ring[i].opts1 =
1063 cpu_to_le32(DescOwn | RingEnd | cp->rx_buf_sz);
1064 else
1065 cp->rx_ring[i].opts1 =
1066 cpu_to_le32(DescOwn | cp->rx_buf_sz);
1067 }
1068
1069 return 0;
1070
1071err_out:
1072 cp_clean_rings(cp);
1073 return -ENOMEM;
1074}
1075
Francois Romieu576cfa92006-02-27 23:15:06 +01001076static void cp_init_rings_index (struct cp_private *cp)
1077{
1078 cp->rx_tail = 0;
1079 cp->tx_head = cp->tx_tail = 0;
1080}
1081
Linus Torvalds1da177e2005-04-16 15:20:36 -07001082static int cp_init_rings (struct cp_private *cp)
1083{
1084 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1085 cp->tx_ring[CP_TX_RING_SIZE - 1].opts1 = cpu_to_le32(RingEnd);
1086
Francois Romieu576cfa92006-02-27 23:15:06 +01001087 cp_init_rings_index(cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001088
1089 return cp_refill_rx (cp);
1090}
1091
1092static int cp_alloc_rings (struct cp_private *cp)
1093{
1094 void *mem;
1095
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001096 mem = dma_alloc_coherent(&cp->pdev->dev, CP_RING_BYTES,
1097 &cp->ring_dma, GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001098 if (!mem)
1099 return -ENOMEM;
1100
1101 cp->rx_ring = mem;
1102 cp->tx_ring = &cp->rx_ring[CP_RX_RING_SIZE];
1103
Linus Torvalds1da177e2005-04-16 15:20:36 -07001104 return cp_init_rings(cp);
1105}
1106
1107static void cp_clean_rings (struct cp_private *cp)
1108{
Francois Romieu3598b572006-01-29 01:31:13 +01001109 struct cp_desc *desc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001110 unsigned i;
1111
Linus Torvalds1da177e2005-04-16 15:20:36 -07001112 for (i = 0; i < CP_RX_RING_SIZE; i++) {
Francois Romieu0ba894d2006-08-14 19:55:07 +02001113 if (cp->rx_skb[i]) {
Francois Romieu3598b572006-01-29 01:31:13 +01001114 desc = cp->rx_ring + i;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001115 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001116 cp->rx_buf_sz, PCI_DMA_FROMDEVICE);
Francois Romieu0ba894d2006-08-14 19:55:07 +02001117 dev_kfree_skb(cp->rx_skb[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001118 }
1119 }
1120
1121 for (i = 0; i < CP_TX_RING_SIZE; i++) {
Francois Romieu48907e32006-09-10 23:33:44 +02001122 if (cp->tx_skb[i]) {
1123 struct sk_buff *skb = cp->tx_skb[i];
Francois Romieu57344182005-05-12 19:31:31 -04001124
Francois Romieu3598b572006-01-29 01:31:13 +01001125 desc = cp->tx_ring + i;
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001126 dma_unmap_single(&cp->pdev->dev,le64_to_cpu(desc->addr),
Francois Romieu48907e32006-09-10 23:33:44 +02001127 le32_to_cpu(desc->opts1) & 0xffff,
1128 PCI_DMA_TODEVICE);
Francois Romieu3598b572006-01-29 01:31:13 +01001129 if (le32_to_cpu(desc->opts1) & LastFrag)
Francois Romieu57344182005-05-12 19:31:31 -04001130 dev_kfree_skb(skb);
Paulius Zaleckas237225f2008-05-05 16:05:17 +03001131 cp->dev->stats.tx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132 }
1133 }
1134
Francois Romieu57344182005-05-12 19:31:31 -04001135 memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE);
1136 memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE);
1137
Francois Romieu0ba894d2006-08-14 19:55:07 +02001138 memset(cp->rx_skb, 0, sizeof(struct sk_buff *) * CP_RX_RING_SIZE);
Francois Romieu48907e32006-09-10 23:33:44 +02001139 memset(cp->tx_skb, 0, sizeof(struct sk_buff *) * CP_TX_RING_SIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140}
1141
1142static void cp_free_rings (struct cp_private *cp)
1143{
1144 cp_clean_rings(cp);
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001145 dma_free_coherent(&cp->pdev->dev, CP_RING_BYTES, cp->rx_ring,
1146 cp->ring_dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001147 cp->rx_ring = NULL;
1148 cp->tx_ring = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001149}
1150
1151static int cp_open (struct net_device *dev)
1152{
1153 struct cp_private *cp = netdev_priv(dev);
1154 int rc;
1155
Joe Perchesb4f18b32010-02-17 15:01:48 +00001156 netif_dbg(cp, ifup, dev, "enabling interface\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001157
1158 rc = cp_alloc_rings(cp);
1159 if (rc)
1160 return rc;
1161
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001162 napi_enable(&cp->napi);
1163
Linus Torvalds1da177e2005-04-16 15:20:36 -07001164 cp_init_hw(cp);
1165
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001166 rc = request_irq(dev->irq, cp_interrupt, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 if (rc)
1168 goto err_out_hw;
1169
1170 netif_carrier_off(dev);
Richard Knutsson2501f842007-05-19 22:26:40 +02001171 mii_check_media(&cp->mii_if, netif_msg_link(cp), true);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172 netif_start_queue(dev);
1173
1174 return 0;
1175
1176err_out_hw:
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001177 napi_disable(&cp->napi);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178 cp_stop_hw(cp);
1179 cp_free_rings(cp);
1180 return rc;
1181}
1182
1183static int cp_close (struct net_device *dev)
1184{
1185 struct cp_private *cp = netdev_priv(dev);
1186 unsigned long flags;
1187
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001188 napi_disable(&cp->napi);
1189
Joe Perchesb4f18b32010-02-17 15:01:48 +00001190 netif_dbg(cp, ifdown, dev, "disabling interface\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001191
1192 spin_lock_irqsave(&cp->lock, flags);
1193
1194 netif_stop_queue(dev);
1195 netif_carrier_off(dev);
1196
1197 cp_stop_hw(cp);
1198
1199 spin_unlock_irqrestore(&cp->lock, flags);
1200
Linus Torvalds1da177e2005-04-16 15:20:36 -07001201 free_irq(dev->irq, dev);
1202
1203 cp_free_rings(cp);
1204 return 0;
1205}
1206
Francois Romieu9030c0d2007-07-13 23:05:35 +02001207static void cp_tx_timeout(struct net_device *dev)
1208{
1209 struct cp_private *cp = netdev_priv(dev);
1210 unsigned long flags;
1211 int rc;
1212
Joe Perchesb4f18b32010-02-17 15:01:48 +00001213 netdev_warn(dev, "Transmit timeout, status %2x %4x %4x %4x\n",
1214 cpr8(Cmd), cpr16(CpCmd),
1215 cpr16(IntrStatus), cpr16(IntrMask));
Francois Romieu9030c0d2007-07-13 23:05:35 +02001216
1217 spin_lock_irqsave(&cp->lock, flags);
1218
1219 cp_stop_hw(cp);
1220 cp_clean_rings(cp);
1221 rc = cp_init_rings(cp);
1222 cp_start_hw(cp);
1223
1224 netif_wake_queue(dev);
1225
1226 spin_unlock_irqrestore(&cp->lock, flags);
1227
1228 return;
1229}
1230
Linus Torvalds1da177e2005-04-16 15:20:36 -07001231#ifdef BROKEN
1232static int cp_change_mtu(struct net_device *dev, int new_mtu)
1233{
1234 struct cp_private *cp = netdev_priv(dev);
1235 int rc;
1236 unsigned long flags;
1237
1238 /* check for invalid MTU, according to hardware limits */
1239 if (new_mtu < CP_MIN_MTU || new_mtu > CP_MAX_MTU)
1240 return -EINVAL;
1241
1242 /* if network interface not up, no need for complexity */
1243 if (!netif_running(dev)) {
1244 dev->mtu = new_mtu;
1245 cp_set_rxbufsize(cp); /* set new rx buf size */
1246 return 0;
1247 }
1248
1249 spin_lock_irqsave(&cp->lock, flags);
1250
1251 cp_stop_hw(cp); /* stop h/w and free rings */
1252 cp_clean_rings(cp);
1253
1254 dev->mtu = new_mtu;
1255 cp_set_rxbufsize(cp); /* set new rx buf size */
1256
1257 rc = cp_init_rings(cp); /* realloc and restart h/w */
1258 cp_start_hw(cp);
1259
1260 spin_unlock_irqrestore(&cp->lock, flags);
1261
1262 return rc;
1263}
1264#endif /* BROKEN */
1265
Arjan van de Venf71e1302006-03-03 21:33:57 -05001266static const char mii_2_8139_map[8] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001267 BasicModeCtrl,
1268 BasicModeStatus,
1269 0,
1270 0,
1271 NWayAdvert,
1272 NWayLPAR,
1273 NWayExpansion,
1274 0
1275};
1276
1277static int mdio_read(struct net_device *dev, int phy_id, int location)
1278{
1279 struct cp_private *cp = netdev_priv(dev);
1280
1281 return location < 8 && mii_2_8139_map[location] ?
1282 readw(cp->regs + mii_2_8139_map[location]) : 0;
1283}
1284
1285
1286static void mdio_write(struct net_device *dev, int phy_id, int location,
1287 int value)
1288{
1289 struct cp_private *cp = netdev_priv(dev);
1290
1291 if (location == 0) {
1292 cpw8(Cfg9346, Cfg9346_Unlock);
1293 cpw16(BasicModeCtrl, value);
1294 cpw8(Cfg9346, Cfg9346_Lock);
1295 } else if (location < 8 && mii_2_8139_map[location])
1296 cpw16(mii_2_8139_map[location], value);
1297}
1298
1299/* Set the ethtool Wake-on-LAN settings */
1300static int netdev_set_wol (struct cp_private *cp,
1301 const struct ethtool_wolinfo *wol)
1302{
1303 u8 options;
1304
1305 options = cpr8 (Config3) & ~(LinkUp | MagicPacket);
1306 /* If WOL is being disabled, no need for complexity */
1307 if (wol->wolopts) {
1308 if (wol->wolopts & WAKE_PHY) options |= LinkUp;
1309 if (wol->wolopts & WAKE_MAGIC) options |= MagicPacket;
1310 }
1311
1312 cpw8 (Cfg9346, Cfg9346_Unlock);
1313 cpw8 (Config3, options);
1314 cpw8 (Cfg9346, Cfg9346_Lock);
1315
1316 options = 0; /* Paranoia setting */
1317 options = cpr8 (Config5) & ~(UWF | MWF | BWF);
1318 /* If WOL is being disabled, no need for complexity */
1319 if (wol->wolopts) {
1320 if (wol->wolopts & WAKE_UCAST) options |= UWF;
1321 if (wol->wolopts & WAKE_BCAST) options |= BWF;
1322 if (wol->wolopts & WAKE_MCAST) options |= MWF;
1323 }
1324
1325 cpw8 (Config5, options);
1326
1327 cp->wol_enabled = (wol->wolopts) ? 1 : 0;
1328
1329 return 0;
1330}
1331
1332/* Get the ethtool Wake-on-LAN settings */
1333static void netdev_get_wol (struct cp_private *cp,
1334 struct ethtool_wolinfo *wol)
1335{
1336 u8 options;
1337
1338 wol->wolopts = 0; /* Start from scratch */
1339 wol->supported = WAKE_PHY | WAKE_BCAST | WAKE_MAGIC |
1340 WAKE_MCAST | WAKE_UCAST;
1341 /* We don't need to go on if WOL is disabled */
1342 if (!cp->wol_enabled) return;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001343
Linus Torvalds1da177e2005-04-16 15:20:36 -07001344 options = cpr8 (Config3);
1345 if (options & LinkUp) wol->wolopts |= WAKE_PHY;
1346 if (options & MagicPacket) wol->wolopts |= WAKE_MAGIC;
1347
1348 options = 0; /* Paranoia setting */
1349 options = cpr8 (Config5);
1350 if (options & UWF) wol->wolopts |= WAKE_UCAST;
1351 if (options & BWF) wol->wolopts |= WAKE_BCAST;
1352 if (options & MWF) wol->wolopts |= WAKE_MCAST;
1353}
1354
1355static void cp_get_drvinfo (struct net_device *dev, struct ethtool_drvinfo *info)
1356{
1357 struct cp_private *cp = netdev_priv(dev);
1358
1359 strcpy (info->driver, DRV_NAME);
1360 strcpy (info->version, DRV_VERSION);
1361 strcpy (info->bus_info, pci_name(cp->pdev));
1362}
1363
1364static int cp_get_regs_len(struct net_device *dev)
1365{
1366 return CP_REGS_SIZE;
1367}
1368
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001369static int cp_get_sset_count (struct net_device *dev, int sset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001370{
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001371 switch (sset) {
1372 case ETH_SS_STATS:
1373 return CP_NUM_STATS;
1374 default:
1375 return -EOPNOTSUPP;
1376 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001377}
1378
1379static int cp_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1380{
1381 struct cp_private *cp = netdev_priv(dev);
1382 int rc;
1383 unsigned long flags;
1384
1385 spin_lock_irqsave(&cp->lock, flags);
1386 rc = mii_ethtool_gset(&cp->mii_if, cmd);
1387 spin_unlock_irqrestore(&cp->lock, flags);
1388
1389 return rc;
1390}
1391
1392static int cp_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1393{
1394 struct cp_private *cp = netdev_priv(dev);
1395 int rc;
1396 unsigned long flags;
1397
1398 spin_lock_irqsave(&cp->lock, flags);
1399 rc = mii_ethtool_sset(&cp->mii_if, cmd);
1400 spin_unlock_irqrestore(&cp->lock, flags);
1401
1402 return rc;
1403}
1404
1405static int cp_nway_reset(struct net_device *dev)
1406{
1407 struct cp_private *cp = netdev_priv(dev);
1408 return mii_nway_restart(&cp->mii_if);
1409}
1410
1411static u32 cp_get_msglevel(struct net_device *dev)
1412{
1413 struct cp_private *cp = netdev_priv(dev);
1414 return cp->msg_enable;
1415}
1416
1417static void cp_set_msglevel(struct net_device *dev, u32 value)
1418{
1419 struct cp_private *cp = netdev_priv(dev);
1420 cp->msg_enable = value;
1421}
1422
1423static u32 cp_get_rx_csum(struct net_device *dev)
1424{
1425 struct cp_private *cp = netdev_priv(dev);
1426 return (cpr16(CpCmd) & RxChkSum) ? 1 : 0;
1427}
1428
1429static int cp_set_rx_csum(struct net_device *dev, u32 data)
1430{
1431 struct cp_private *cp = netdev_priv(dev);
1432 u16 cmd = cp->cpcmd, newcmd;
1433
1434 newcmd = cmd;
1435
1436 if (data)
1437 newcmd |= RxChkSum;
1438 else
1439 newcmd &= ~RxChkSum;
1440
1441 if (newcmd != cmd) {
1442 unsigned long flags;
1443
1444 spin_lock_irqsave(&cp->lock, flags);
1445 cp->cpcmd = newcmd;
1446 cpw16_f(CpCmd, newcmd);
1447 spin_unlock_irqrestore(&cp->lock, flags);
1448 }
1449
1450 return 0;
1451}
1452
1453static void cp_get_regs(struct net_device *dev, struct ethtool_regs *regs,
1454 void *p)
1455{
1456 struct cp_private *cp = netdev_priv(dev);
1457 unsigned long flags;
1458
1459 if (regs->len < CP_REGS_SIZE)
1460 return /* -EINVAL */;
1461
1462 regs->version = CP_REGS_VER;
1463
1464 spin_lock_irqsave(&cp->lock, flags);
1465 memcpy_fromio(p, cp->regs, CP_REGS_SIZE);
1466 spin_unlock_irqrestore(&cp->lock, flags);
1467}
1468
1469static void cp_get_wol (struct net_device *dev, struct ethtool_wolinfo *wol)
1470{
1471 struct cp_private *cp = netdev_priv(dev);
1472 unsigned long flags;
1473
1474 spin_lock_irqsave (&cp->lock, flags);
1475 netdev_get_wol (cp, wol);
1476 spin_unlock_irqrestore (&cp->lock, flags);
1477}
1478
1479static int cp_set_wol (struct net_device *dev, struct ethtool_wolinfo *wol)
1480{
1481 struct cp_private *cp = netdev_priv(dev);
1482 unsigned long flags;
1483 int rc;
1484
1485 spin_lock_irqsave (&cp->lock, flags);
1486 rc = netdev_set_wol (cp, wol);
1487 spin_unlock_irqrestore (&cp->lock, flags);
1488
1489 return rc;
1490}
1491
1492static void cp_get_strings (struct net_device *dev, u32 stringset, u8 *buf)
1493{
1494 switch (stringset) {
1495 case ETH_SS_STATS:
1496 memcpy(buf, &ethtool_stats_keys, sizeof(ethtool_stats_keys));
1497 break;
1498 default:
1499 BUG();
1500 break;
1501 }
1502}
1503
1504static void cp_get_ethtool_stats (struct net_device *dev,
1505 struct ethtool_stats *estats, u64 *tmp_stats)
1506{
1507 struct cp_private *cp = netdev_priv(dev);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001508 struct cp_dma_stats *nic_stats;
1509 dma_addr_t dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001510 int i;
1511
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001512 nic_stats = dma_alloc_coherent(&cp->pdev->dev, sizeof(*nic_stats),
1513 &dma, GFP_KERNEL);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001514 if (!nic_stats)
1515 return;
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001516
Linus Torvalds1da177e2005-04-16 15:20:36 -07001517 /* begin NIC statistics dump */
Stephen Hemminger8b512922005-09-14 09:45:44 -07001518 cpw32(StatsAddr + 4, (u64)dma >> 32);
Yang Hongyang284901a2009-04-06 19:01:15 -07001519 cpw32(StatsAddr, ((u64)dma & DMA_BIT_MASK(32)) | DumpStats);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001520 cpr32(StatsAddr);
1521
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001522 for (i = 0; i < 1000; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001523 if ((cpr32(StatsAddr) & DumpStats) == 0)
1524 break;
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001525 udelay(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001526 }
Stephen Hemminger97f568d2005-06-26 18:02:44 -04001527 cpw32(StatsAddr, 0);
1528 cpw32(StatsAddr + 4, 0);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001529 cpr32(StatsAddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001530
1531 i = 0;
Stephen Hemminger8b512922005-09-14 09:45:44 -07001532 tmp_stats[i++] = le64_to_cpu(nic_stats->tx_ok);
1533 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok);
1534 tmp_stats[i++] = le64_to_cpu(nic_stats->tx_err);
1535 tmp_stats[i++] = le32_to_cpu(nic_stats->rx_err);
1536 tmp_stats[i++] = le16_to_cpu(nic_stats->rx_fifo);
1537 tmp_stats[i++] = le16_to_cpu(nic_stats->frame_align);
1538 tmp_stats[i++] = le32_to_cpu(nic_stats->tx_ok_1col);
1539 tmp_stats[i++] = le32_to_cpu(nic_stats->tx_ok_mcol);
1540 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok_phys);
1541 tmp_stats[i++] = le64_to_cpu(nic_stats->rx_ok_bcast);
1542 tmp_stats[i++] = le32_to_cpu(nic_stats->rx_ok_mcast);
1543 tmp_stats[i++] = le16_to_cpu(nic_stats->tx_abort);
1544 tmp_stats[i++] = le16_to_cpu(nic_stats->tx_underrun);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001545 tmp_stats[i++] = cp->cp_stats.rx_frags;
Eric Sesterhenn5d9428d2006-04-02 13:52:48 +02001546 BUG_ON(i != CP_NUM_STATS);
Stephen Hemminger8b512922005-09-14 09:45:44 -07001547
Jeff Garzik6cc92cd2007-08-08 02:16:04 -04001548 dma_free_coherent(&cp->pdev->dev, sizeof(*nic_stats), nic_stats, dma);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001549}
1550
Jeff Garzik7282d492006-09-13 14:30:00 -04001551static const struct ethtool_ops cp_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001552 .get_drvinfo = cp_get_drvinfo,
1553 .get_regs_len = cp_get_regs_len,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07001554 .get_sset_count = cp_get_sset_count,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001555 .get_settings = cp_get_settings,
1556 .set_settings = cp_set_settings,
1557 .nway_reset = cp_nway_reset,
1558 .get_link = ethtool_op_get_link,
1559 .get_msglevel = cp_get_msglevel,
1560 .set_msglevel = cp_set_msglevel,
1561 .get_rx_csum = cp_get_rx_csum,
1562 .set_rx_csum = cp_set_rx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001563 .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001564 .set_sg = ethtool_op_set_sg,
Jeff Garzikfcec3452005-05-12 19:28:49 -04001565 .set_tso = ethtool_op_set_tso,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001566 .get_regs = cp_get_regs,
1567 .get_wol = cp_get_wol,
1568 .set_wol = cp_set_wol,
1569 .get_strings = cp_get_strings,
1570 .get_ethtool_stats = cp_get_ethtool_stats,
Philip Craig722fdb32006-06-21 11:33:27 +10001571 .get_eeprom_len = cp_get_eeprom_len,
1572 .get_eeprom = cp_get_eeprom,
1573 .set_eeprom = cp_set_eeprom,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001574};
1575
1576static int cp_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1577{
1578 struct cp_private *cp = netdev_priv(dev);
1579 int rc;
1580 unsigned long flags;
1581
1582 if (!netif_running(dev))
1583 return -EINVAL;
1584
1585 spin_lock_irqsave(&cp->lock, flags);
1586 rc = generic_mii_ioctl(&cp->mii_if, if_mii(rq), cmd, NULL);
1587 spin_unlock_irqrestore(&cp->lock, flags);
1588 return rc;
1589}
1590
Jiri Pirkoc048aaf2009-03-13 11:47:48 -07001591static int cp_set_mac_address(struct net_device *dev, void *p)
1592{
1593 struct cp_private *cp = netdev_priv(dev);
1594 struct sockaddr *addr = p;
1595
1596 if (!is_valid_ether_addr(addr->sa_data))
1597 return -EADDRNOTAVAIL;
1598
1599 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1600
1601 spin_lock_irq(&cp->lock);
1602
1603 cpw8_f(Cfg9346, Cfg9346_Unlock);
1604 cpw32_f(MAC0 + 0, le32_to_cpu (*(__le32 *) (dev->dev_addr + 0)));
1605 cpw32_f(MAC0 + 4, le32_to_cpu (*(__le32 *) (dev->dev_addr + 4)));
1606 cpw8_f(Cfg9346, Cfg9346_Lock);
1607
1608 spin_unlock_irq(&cp->lock);
1609
1610 return 0;
1611}
1612
Linus Torvalds1da177e2005-04-16 15:20:36 -07001613/* Serial EEPROM section. */
1614
1615/* EEPROM_Ctrl bits. */
1616#define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1617#define EE_CS 0x08 /* EEPROM chip select. */
1618#define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1619#define EE_WRITE_0 0x00
1620#define EE_WRITE_1 0x02
1621#define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1622#define EE_ENB (0x80 | EE_CS)
1623
1624/* Delay between EEPROM clock transitions.
1625 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1626 */
1627
1628#define eeprom_delay() readl(ee_addr)
1629
1630/* The EEPROM commands include the alway-set leading bit. */
Philip Craig722fdb32006-06-21 11:33:27 +10001631#define EE_EXTEND_CMD (4)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001632#define EE_WRITE_CMD (5)
1633#define EE_READ_CMD (6)
1634#define EE_ERASE_CMD (7)
1635
Philip Craig722fdb32006-06-21 11:33:27 +10001636#define EE_EWDS_ADDR (0)
1637#define EE_WRAL_ADDR (1)
1638#define EE_ERAL_ADDR (2)
1639#define EE_EWEN_ADDR (3)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001640
Philip Craig722fdb32006-06-21 11:33:27 +10001641#define CP_EEPROM_MAGIC PCI_DEVICE_ID_REALTEK_8139
1642
1643static void eeprom_cmd_start(void __iomem *ee_addr)
1644{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001645 writeb (EE_ENB & ~EE_CS, ee_addr);
1646 writeb (EE_ENB, ee_addr);
1647 eeprom_delay ();
Philip Craig722fdb32006-06-21 11:33:27 +10001648}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001649
Philip Craig722fdb32006-06-21 11:33:27 +10001650static void eeprom_cmd(void __iomem *ee_addr, int cmd, int cmd_len)
1651{
1652 int i;
1653
1654 /* Shift the command bits out. */
1655 for (i = cmd_len - 1; i >= 0; i--) {
1656 int dataval = (cmd & (1 << i)) ? EE_DATA_WRITE : 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001657 writeb (EE_ENB | dataval, ee_addr);
1658 eeprom_delay ();
1659 writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
1660 eeprom_delay ();
1661 }
1662 writeb (EE_ENB, ee_addr);
1663 eeprom_delay ();
Philip Craig722fdb32006-06-21 11:33:27 +10001664}
1665
1666static void eeprom_cmd_end(void __iomem *ee_addr)
1667{
1668 writeb (~EE_CS, ee_addr);
1669 eeprom_delay ();
1670}
1671
1672static void eeprom_extend_cmd(void __iomem *ee_addr, int extend_cmd,
1673 int addr_len)
1674{
1675 int cmd = (EE_EXTEND_CMD << addr_len) | (extend_cmd << (addr_len - 2));
1676
1677 eeprom_cmd_start(ee_addr);
1678 eeprom_cmd(ee_addr, cmd, 3 + addr_len);
1679 eeprom_cmd_end(ee_addr);
1680}
1681
1682static u16 read_eeprom (void __iomem *ioaddr, int location, int addr_len)
1683{
1684 int i;
1685 u16 retval = 0;
1686 void __iomem *ee_addr = ioaddr + Cfg9346;
1687 int read_cmd = location | (EE_READ_CMD << addr_len);
1688
1689 eeprom_cmd_start(ee_addr);
1690 eeprom_cmd(ee_addr, read_cmd, 3 + addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001691
1692 for (i = 16; i > 0; i--) {
1693 writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
1694 eeprom_delay ();
1695 retval =
1696 (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 :
1697 0);
1698 writeb (EE_ENB, ee_addr);
1699 eeprom_delay ();
1700 }
1701
Philip Craig722fdb32006-06-21 11:33:27 +10001702 eeprom_cmd_end(ee_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001703
1704 return retval;
1705}
1706
Philip Craig722fdb32006-06-21 11:33:27 +10001707static void write_eeprom(void __iomem *ioaddr, int location, u16 val,
1708 int addr_len)
1709{
1710 int i;
1711 void __iomem *ee_addr = ioaddr + Cfg9346;
1712 int write_cmd = location | (EE_WRITE_CMD << addr_len);
1713
1714 eeprom_extend_cmd(ee_addr, EE_EWEN_ADDR, addr_len);
1715
1716 eeprom_cmd_start(ee_addr);
1717 eeprom_cmd(ee_addr, write_cmd, 3 + addr_len);
1718 eeprom_cmd(ee_addr, val, 16);
1719 eeprom_cmd_end(ee_addr);
1720
1721 eeprom_cmd_start(ee_addr);
1722 for (i = 0; i < 20000; i++)
1723 if (readb(ee_addr) & EE_DATA_READ)
1724 break;
1725 eeprom_cmd_end(ee_addr);
1726
1727 eeprom_extend_cmd(ee_addr, EE_EWDS_ADDR, addr_len);
1728}
1729
1730static int cp_get_eeprom_len(struct net_device *dev)
1731{
1732 struct cp_private *cp = netdev_priv(dev);
1733 int size;
1734
1735 spin_lock_irq(&cp->lock);
1736 size = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 256 : 128;
1737 spin_unlock_irq(&cp->lock);
1738
1739 return size;
1740}
1741
1742static int cp_get_eeprom(struct net_device *dev,
1743 struct ethtool_eeprom *eeprom, u8 *data)
1744{
1745 struct cp_private *cp = netdev_priv(dev);
1746 unsigned int addr_len;
1747 u16 val;
1748 u32 offset = eeprom->offset >> 1;
1749 u32 len = eeprom->len;
1750 u32 i = 0;
1751
1752 eeprom->magic = CP_EEPROM_MAGIC;
1753
1754 spin_lock_irq(&cp->lock);
1755
1756 addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
1757
1758 if (eeprom->offset & 1) {
1759 val = read_eeprom(cp->regs, offset, addr_len);
1760 data[i++] = (u8)(val >> 8);
1761 offset++;
1762 }
1763
1764 while (i < len - 1) {
1765 val = read_eeprom(cp->regs, offset, addr_len);
1766 data[i++] = (u8)val;
1767 data[i++] = (u8)(val >> 8);
1768 offset++;
1769 }
1770
1771 if (i < len) {
1772 val = read_eeprom(cp->regs, offset, addr_len);
1773 data[i] = (u8)val;
1774 }
1775
1776 spin_unlock_irq(&cp->lock);
1777 return 0;
1778}
1779
1780static int cp_set_eeprom(struct net_device *dev,
1781 struct ethtool_eeprom *eeprom, u8 *data)
1782{
1783 struct cp_private *cp = netdev_priv(dev);
1784 unsigned int addr_len;
1785 u16 val;
1786 u32 offset = eeprom->offset >> 1;
1787 u32 len = eeprom->len;
1788 u32 i = 0;
1789
1790 if (eeprom->magic != CP_EEPROM_MAGIC)
1791 return -EINVAL;
1792
1793 spin_lock_irq(&cp->lock);
1794
1795 addr_len = read_eeprom(cp->regs, 0, 8) == 0x8129 ? 8 : 6;
1796
1797 if (eeprom->offset & 1) {
1798 val = read_eeprom(cp->regs, offset, addr_len) & 0xff;
1799 val |= (u16)data[i++] << 8;
1800 write_eeprom(cp->regs, offset, val, addr_len);
1801 offset++;
1802 }
1803
1804 while (i < len - 1) {
1805 val = (u16)data[i++];
1806 val |= (u16)data[i++] << 8;
1807 write_eeprom(cp->regs, offset, val, addr_len);
1808 offset++;
1809 }
1810
1811 if (i < len) {
1812 val = read_eeprom(cp->regs, offset, addr_len) & 0xff00;
1813 val |= (u16)data[i];
1814 write_eeprom(cp->regs, offset, val, addr_len);
1815 }
1816
1817 spin_unlock_irq(&cp->lock);
1818 return 0;
1819}
1820
Linus Torvalds1da177e2005-04-16 15:20:36 -07001821/* Put the board into D3cold state and wait for WakeUp signal */
1822static void cp_set_d3_state (struct cp_private *cp)
1823{
1824 pci_enable_wake (cp->pdev, 0, 1); /* Enable PME# generation */
1825 pci_set_power_state (cp->pdev, PCI_D3hot);
1826}
1827
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001828static const struct net_device_ops cp_netdev_ops = {
1829 .ndo_open = cp_open,
1830 .ndo_stop = cp_close,
1831 .ndo_validate_addr = eth_validate_addr,
Jiri Pirkoc048aaf2009-03-13 11:47:48 -07001832 .ndo_set_mac_address = cp_set_mac_address,
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001833 .ndo_set_multicast_list = cp_set_rx_mode,
1834 .ndo_get_stats = cp_get_stats,
1835 .ndo_do_ioctl = cp_ioctl,
Stephen Hemminger00829822008-11-20 20:14:53 -08001836 .ndo_start_xmit = cp_start_xmit,
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001837 .ndo_tx_timeout = cp_tx_timeout,
1838#if CP_VLAN_TAG_USED
1839 .ndo_vlan_rx_register = cp_vlan_rx_register,
1840#endif
1841#ifdef BROKEN
1842 .ndo_change_mtu = cp_change_mtu,
1843#endif
Stephen Hemmingerfe96aaa2009-01-09 11:13:14 +00001844
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001845#ifdef CONFIG_NET_POLL_CONTROLLER
1846 .ndo_poll_controller = cp_poll_controller,
1847#endif
1848};
1849
Linus Torvalds1da177e2005-04-16 15:20:36 -07001850static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1851{
1852 struct net_device *dev;
1853 struct cp_private *cp;
1854 int rc;
1855 void __iomem *regs;
Greg Kroah-Hartman2427ddd2006-06-12 17:07:52 -07001856 resource_size_t pciaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001857 unsigned int addr_len, i, pci_using_dac;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001858
1859#ifndef MODULE
1860 static int version_printed;
1861 if (version_printed++ == 0)
Alexander Beregalovb93d5842009-05-26 12:35:27 +00001862 pr_info("%s", version);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001863#endif
1864
Linus Torvalds1da177e2005-04-16 15:20:36 -07001865 if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
Auke Kok44c10132007-06-08 15:46:36 -07001866 pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pdev->revision < 0x20) {
Stephen Hemmingerde4549c2008-10-21 18:04:27 -07001867 dev_info(&pdev->dev,
Joe Perchesb4f18b32010-02-17 15:01:48 +00001868 "This (id %04x:%04x rev %02x) is not an 8139C+ compatible chip, use 8139too\n",
1869 pdev->vendor, pdev->device, pdev->revision);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001870 return -ENODEV;
1871 }
1872
1873 dev = alloc_etherdev(sizeof(struct cp_private));
1874 if (!dev)
1875 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001876 SET_NETDEV_DEV(dev, &pdev->dev);
1877
1878 cp = netdev_priv(dev);
1879 cp->pdev = pdev;
1880 cp->dev = dev;
1881 cp->msg_enable = (debug < 0 ? CP_DEF_MSG_ENABLE : debug);
1882 spin_lock_init (&cp->lock);
1883 cp->mii_if.dev = dev;
1884 cp->mii_if.mdio_read = mdio_read;
1885 cp->mii_if.mdio_write = mdio_write;
1886 cp->mii_if.phy_id = CP_INTERNAL_PHY;
1887 cp->mii_if.phy_id_mask = 0x1f;
1888 cp->mii_if.reg_num_mask = 0x1f;
1889 cp_set_rxbufsize(cp);
1890
1891 rc = pci_enable_device(pdev);
1892 if (rc)
1893 goto err_out_free;
1894
1895 rc = pci_set_mwi(pdev);
1896 if (rc)
1897 goto err_out_disable;
1898
1899 rc = pci_request_regions(pdev, DRV_NAME);
1900 if (rc)
1901 goto err_out_mwi;
1902
1903 pciaddr = pci_resource_start(pdev, 1);
1904 if (!pciaddr) {
1905 rc = -EIO;
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001906 dev_err(&pdev->dev, "no MMIO resource\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001907 goto err_out_res;
1908 }
1909 if (pci_resource_len(pdev, 1) < CP_REGS_SIZE) {
1910 rc = -EIO;
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001911 dev_err(&pdev->dev, "MMIO resource (%llx) too small\n",
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001912 (unsigned long long)pci_resource_len(pdev, 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001913 goto err_out_res;
1914 }
1915
1916 /* Configure DMA attributes. */
1917 if ((sizeof(dma_addr_t) > 4) &&
Yang Hongyang6a355282009-04-06 19:01:13 -07001918 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1919 !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001920 pci_using_dac = 1;
1921 } else {
1922 pci_using_dac = 0;
1923
Yang Hongyang284901a2009-04-06 19:01:15 -07001924 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001925 if (rc) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001926 dev_err(&pdev->dev,
Joe Perchesb4f18b32010-02-17 15:01:48 +00001927 "No usable DMA configuration, aborting\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001928 goto err_out_res;
1929 }
Yang Hongyang284901a2009-04-06 19:01:15 -07001930 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001931 if (rc) {
Jeff Garzik9b91cf92006-06-27 11:39:50 -04001932 dev_err(&pdev->dev,
Joe Perchesb4f18b32010-02-17 15:01:48 +00001933 "No usable consistent DMA configuration, aborting\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001934 goto err_out_res;
1935 }
1936 }
1937
1938 cp->cpcmd = (pci_using_dac ? PCIDAC : 0) |
1939 PCIMulRW | RxChkSum | CpRxOn | CpTxOn;
1940
1941 regs = ioremap(pciaddr, CP_REGS_SIZE);
1942 if (!regs) {
1943 rc = -EIO;
Andrew Morton4626dd42006-07-06 23:58:26 -07001944 dev_err(&pdev->dev, "Cannot map PCI MMIO (%Lx@%Lx)\n",
Joe Perchesb4f18b32010-02-17 15:01:48 +00001945 (unsigned long long)pci_resource_len(pdev, 1),
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001946 (unsigned long long)pciaddr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001947 goto err_out_res;
1948 }
1949 dev->base_addr = (unsigned long) regs;
1950 cp->regs = regs;
1951
1952 cp_stop_hw(cp);
1953
1954 /* read MAC address from EEPROM */
1955 addr_len = read_eeprom (regs, 0, 8) == 0x8129 ? 8 : 6;
1956 for (i = 0; i < 3; i++)
Al Viro03233b92007-08-23 02:31:17 +01001957 ((__le16 *) (dev->dev_addr))[i] =
1958 cpu_to_le16(read_eeprom (regs, i + 7, addr_len));
John W. Linvillebb0ce602005-09-12 10:48:54 -04001959 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001960
Stephen Hemminger48dfcde2008-11-19 22:09:07 -08001961 dev->netdev_ops = &cp_netdev_ops;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001962 netif_napi_add(dev, &cp->napi, cp_rx_poll, 16);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001963 dev->ethtool_ops = &cp_ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001964 dev->watchdog_timeo = TX_TIMEOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001965
1966#if CP_VLAN_TAG_USED
1967 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001968#endif
1969
1970 if (pci_using_dac)
1971 dev->features |= NETIF_F_HIGHDMA;
1972
Jeff Garzikfcec3452005-05-12 19:28:49 -04001973#if 0 /* disabled by default until verified */
1974 dev->features |= NETIF_F_TSO;
1975#endif
1976
Linus Torvalds1da177e2005-04-16 15:20:36 -07001977 dev->irq = pdev->irq;
1978
1979 rc = register_netdev(dev);
1980 if (rc)
1981 goto err_out_iomap;
1982
Joe Perchesb4f18b32010-02-17 15:01:48 +00001983 netdev_info(dev, "RTL-8139C+ at 0x%lx, %pM, IRQ %d\n",
1984 dev->base_addr, dev->dev_addr, dev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001985
1986 pci_set_drvdata(pdev, dev);
1987
1988 /* enable busmastering and memory-write-invalidate */
1989 pci_set_master(pdev);
1990
Jeff Garzik2e8a5382006-06-27 10:47:51 -04001991 if (cp->wol_enabled)
1992 cp_set_d3_state (cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001993
1994 return 0;
1995
1996err_out_iomap:
1997 iounmap(regs);
1998err_out_res:
1999 pci_release_regions(pdev);
2000err_out_mwi:
2001 pci_clear_mwi(pdev);
2002err_out_disable:
2003 pci_disable_device(pdev);
2004err_out_free:
2005 free_netdev(dev);
2006 return rc;
2007}
2008
2009static void cp_remove_one (struct pci_dev *pdev)
2010{
2011 struct net_device *dev = pci_get_drvdata(pdev);
2012 struct cp_private *cp = netdev_priv(dev);
2013
Linus Torvalds1da177e2005-04-16 15:20:36 -07002014 unregister_netdev(dev);
2015 iounmap(cp->regs);
Jeff Garzik2e8a5382006-06-27 10:47:51 -04002016 if (cp->wol_enabled)
2017 pci_set_power_state (pdev, PCI_D0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002018 pci_release_regions(pdev);
2019 pci_clear_mwi(pdev);
2020 pci_disable_device(pdev);
2021 pci_set_drvdata(pdev, NULL);
2022 free_netdev(dev);
2023}
2024
2025#ifdef CONFIG_PM
Pavel Machek05adc3b2005-04-16 15:25:25 -07002026static int cp_suspend (struct pci_dev *pdev, pm_message_t state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002027{
François Romieu7668a492006-08-15 20:10:57 +02002028 struct net_device *dev = pci_get_drvdata(pdev);
2029 struct cp_private *cp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002030 unsigned long flags;
2031
François Romieu7668a492006-08-15 20:10:57 +02002032 if (!netif_running(dev))
2033 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002034
2035 netif_device_detach (dev);
2036 netif_stop_queue (dev);
2037
2038 spin_lock_irqsave (&cp->lock, flags);
2039
2040 /* Disable Rx and Tx */
2041 cpw16 (IntrMask, 0);
2042 cpw8 (Cmd, cpr8 (Cmd) & (~RxOn | ~TxOn));
2043
2044 spin_unlock_irqrestore (&cp->lock, flags);
2045
Francois Romieu576cfa92006-02-27 23:15:06 +01002046 pci_save_state(pdev);
2047 pci_enable_wake(pdev, pci_choose_state(pdev, state), cp->wol_enabled);
2048 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002049
2050 return 0;
2051}
2052
2053static int cp_resume (struct pci_dev *pdev)
2054{
Francois Romieu576cfa92006-02-27 23:15:06 +01002055 struct net_device *dev = pci_get_drvdata (pdev);
2056 struct cp_private *cp = netdev_priv(dev);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002057 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002058
Francois Romieu576cfa92006-02-27 23:15:06 +01002059 if (!netif_running(dev))
2060 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002061
2062 netif_device_attach (dev);
Francois Romieu576cfa92006-02-27 23:15:06 +01002063
2064 pci_set_power_state(pdev, PCI_D0);
2065 pci_restore_state(pdev);
2066 pci_enable_wake(pdev, PCI_D0, 0);
2067
2068 /* FIXME: sh*t may happen if the Rx ring buffer is depleted */
2069 cp_init_rings_index (cp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002070 cp_init_hw (cp);
2071 netif_start_queue (dev);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002072
2073 spin_lock_irqsave (&cp->lock, flags);
2074
Richard Knutsson2501f842007-05-19 22:26:40 +02002075 mii_check_media(&cp->mii_if, netif_msg_link(cp), false);
Pierre Ossmana4cf0762005-07-04 00:22:53 +02002076
2077 spin_unlock_irqrestore (&cp->lock, flags);
Jeff Garzikf3b197a2006-05-26 21:39:03 -04002078
Linus Torvalds1da177e2005-04-16 15:20:36 -07002079 return 0;
2080}
2081#endif /* CONFIG_PM */
2082
2083static struct pci_driver cp_driver = {
2084 .name = DRV_NAME,
2085 .id_table = cp_pci_tbl,
2086 .probe = cp_init_one,
2087 .remove = cp_remove_one,
2088#ifdef CONFIG_PM
2089 .resume = cp_resume,
2090 .suspend = cp_suspend,
2091#endif
2092};
2093
2094static int __init cp_init (void)
2095{
2096#ifdef MODULE
Alexander Beregalovb93d5842009-05-26 12:35:27 +00002097 pr_info("%s", version);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002098#endif
Jeff Garzik29917622006-08-19 17:48:59 -04002099 return pci_register_driver(&cp_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002100}
2101
2102static void __exit cp_exit (void)
2103{
2104 pci_unregister_driver (&cp_driver);
2105}
2106
2107module_init(cp_init);
2108module_exit(cp_exit);