Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
| 10 | * http://www.linux-mtd.infradead.org/tech/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
| 27 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * This program is free software; you can redistribute it and/or modify |
| 29 | * it under the terms of the GNU General Public License version 2 as |
| 30 | * published by the Free Software Foundation. |
| 31 | * |
| 32 | */ |
| 33 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 34 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 37 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/types.h> |
| 41 | #include <linux/mtd/mtd.h> |
| 42 | #include <linux/mtd/nand.h> |
| 43 | #include <linux/mtd/nand_ecc.h> |
| 44 | #include <linux/mtd/compatmac.h> |
| 45 | #include <linux/interrupt.h> |
| 46 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 47 | #include <linux/leds.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/io.h> |
| 49 | |
| 50 | #ifdef CONFIG_MTD_PARTITIONS |
| 51 | #include <linux/mtd/partitions.h> |
| 52 | #endif |
| 53 | |
| 54 | /* Define default oob placement schemes for large and small page devices */ |
| 55 | static struct nand_oobinfo nand_oob_8 = { |
| 56 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 57 | .eccbytes = 3, |
| 58 | .eccpos = {0, 1, 2}, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 59 | .oobfree = {{3, 2}, {6, 2}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | static struct nand_oobinfo nand_oob_16 = { |
| 63 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 64 | .eccbytes = 6, |
| 65 | .eccpos = {0, 1, 2, 3, 6, 7}, |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 66 | .oobfree = {{8, 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | static struct nand_oobinfo nand_oob_64 = { |
| 70 | .useecc = MTD_NANDECC_AUTOPLACE, |
| 71 | .eccbytes = 24, |
| 72 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 73 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 74 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 75 | 56, 57, 58, 59, 60, 61, 62, 63}, |
| 76 | .oobfree = {{2, 38}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | }; |
| 78 | |
| 79 | /* This is used for padding purposes in nand_write_oob */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 80 | static uint8_t ffchars[] = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 82 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 83 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 84 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 85 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 86 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 87 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 88 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 89 | }; |
| 90 | |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 91 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 92 | size_t *retlen, const uint8_t *buf); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 93 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 94 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 95 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 96 | /* |
| 97 | * For devices which display every fart in the system on a seperate LED. Is |
| 98 | * compiled away when LED support is disabled. |
| 99 | */ |
| 100 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 101 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | /** |
| 103 | * nand_release_device - [GENERIC] release chip |
| 104 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 105 | * |
| 106 | * Deselect, release chip lock and wake up anyone waiting on the device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 108 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 110 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
| 112 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 113 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 114 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 115 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 116 | spin_lock(&chip->controller->lock); |
| 117 | chip->controller->active = NULL; |
| 118 | chip->state = FL_READY; |
| 119 | wake_up(&chip->controller->wq); |
| 120 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | } |
| 122 | |
| 123 | /** |
| 124 | * nand_read_byte - [DEFAULT] read one byte from the chip |
| 125 | * @mtd: MTD device structure |
| 126 | * |
| 127 | * Default read function for 8bit buswith |
| 128 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 129 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 131 | struct nand_chip *chip = mtd->priv; |
| 132 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | } |
| 134 | |
| 135 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
| 137 | * @mtd: MTD device structure |
| 138 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 139 | * Default read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | * endianess conversion |
| 141 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 142 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 144 | struct nand_chip *chip = mtd->priv; |
| 145 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 149 | * nand_read_word - [DEFAULT] read one word from the chip |
| 150 | * @mtd: MTD device structure |
| 151 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 152 | * Default read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | * endianess conversion |
| 154 | */ |
| 155 | static u16 nand_read_word(struct mtd_info *mtd) |
| 156 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 157 | struct nand_chip *chip = mtd->priv; |
| 158 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | } |
| 160 | |
| 161 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | * nand_select_chip - [DEFAULT] control CE line |
| 163 | * @mtd: MTD device structure |
| 164 | * @chip: chipnumber to select, -1 for deselect |
| 165 | * |
| 166 | * Default select function for 1 chip devices. |
| 167 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 168 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 170 | struct nand_chip *chip = mtd->priv; |
| 171 | |
| 172 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 174 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | break; |
| 176 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 177 | break; |
| 178 | |
| 179 | default: |
| 180 | BUG(); |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | /** |
| 185 | * nand_write_buf - [DEFAULT] write buffer to chip |
| 186 | * @mtd: MTD device structure |
| 187 | * @buf: data buffer |
| 188 | * @len: number of bytes to write |
| 189 | * |
| 190 | * Default write function for 8bit buswith |
| 191 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 192 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | { |
| 194 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 195 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 196 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 197 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 198 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 202 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | * @mtd: MTD device structure |
| 204 | * @buf: buffer to store date |
| 205 | * @len: number of bytes to read |
| 206 | * |
| 207 | * Default read function for 8bit buswith |
| 208 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 209 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | { |
| 211 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 212 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 214 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 215 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 216 | } |
| 217 | |
| 218 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 219 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 220 | * @mtd: MTD device structure |
| 221 | * @buf: buffer containing the data to compare |
| 222 | * @len: number of bytes to compare |
| 223 | * |
| 224 | * Default verify function for 8bit buswith |
| 225 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 226 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | { |
| 228 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 229 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 231 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 232 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | return 0; |
| 235 | } |
| 236 | |
| 237 | /** |
| 238 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
| 239 | * @mtd: MTD device structure |
| 240 | * @buf: data buffer |
| 241 | * @len: number of bytes to write |
| 242 | * |
| 243 | * Default write function for 16bit buswith |
| 244 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 245 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | { |
| 247 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 248 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | u16 *p = (u16 *) buf; |
| 250 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 251 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 252 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 253 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 254 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | } |
| 256 | |
| 257 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 258 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | * @mtd: MTD device structure |
| 260 | * @buf: buffer to store date |
| 261 | * @len: number of bytes to read |
| 262 | * |
| 263 | * Default read function for 16bit buswith |
| 264 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 265 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | { |
| 267 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 268 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | u16 *p = (u16 *) buf; |
| 270 | len >>= 1; |
| 271 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 272 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 273 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 277 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | * @mtd: MTD device structure |
| 279 | * @buf: buffer containing the data to compare |
| 280 | * @len: number of bytes to compare |
| 281 | * |
| 282 | * Default verify function for 16bit buswith |
| 283 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 284 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 285 | { |
| 286 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 287 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | u16 *p = (u16 *) buf; |
| 289 | len >>= 1; |
| 290 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 291 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 292 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | return -EFAULT; |
| 294 | |
| 295 | return 0; |
| 296 | } |
| 297 | |
| 298 | /** |
| 299 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
| 300 | * @mtd: MTD device structure |
| 301 | * @ofs: offset from device start |
| 302 | * @getchip: 0, if the chip is already selected |
| 303 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 304 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | */ |
| 306 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 307 | { |
| 308 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 309 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | u16 bad; |
| 311 | |
| 312 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 313 | page = (int)(ofs >> chip->page_shift); |
| 314 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 315 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 316 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | |
| 318 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 319 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 320 | } else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 321 | page = (int)ofs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 322 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 323 | if (chip->options & NAND_BUSWIDTH_16) { |
| 324 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
| 325 | page & chip->pagemask); |
| 326 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 327 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 328 | bad >>= 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | if ((bad & 0xFF) != 0xff) |
| 330 | res = 1; |
| 331 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 332 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 333 | page & chip->pagemask); |
| 334 | if (chip->read_byte(mtd) != 0xff) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | res = 1; |
| 336 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 337 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 338 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 340 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 341 | return res; |
| 342 | } |
| 343 | |
| 344 | /** |
| 345 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
| 346 | * @mtd: MTD device structure |
| 347 | * @ofs: offset from device start |
| 348 | * |
| 349 | * This is the default implementation, which can be overridden by |
| 350 | * a hardware specific driver. |
| 351 | */ |
| 352 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 353 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 354 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 355 | uint8_t buf[2] = { 0, 0 }; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 356 | size_t retlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | int block; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 358 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 359 | /* Get block number */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 360 | block = ((int)ofs) >> chip->bbt_erase_shift; |
| 361 | if (chip->bbt) |
| 362 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | |
| 364 | /* Do we have a flash based bad block table ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 365 | if (chip->options & NAND_USE_FLASH_BBT) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 366 | return nand_update_bbt(mtd, ofs); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | /* We write two bytes, so we dont have to mess with 16 bit access */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 369 | ofs += mtd->oobsize + (chip->badblockpos & ~0x01); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 370 | return nand_write_oob(mtd, ofs, 2, &retlen, buf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | } |
| 372 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 373 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 374 | * nand_check_wp - [GENERIC] check if the chip is write protected |
| 375 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 376 | * Check, if the device is write protected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 377 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 378 | * The function expects, that the device is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 380 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 382 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 384 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 385 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | } |
| 387 | |
| 388 | /** |
| 389 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 390 | * @mtd: MTD device structure |
| 391 | * @ofs: offset from device start |
| 392 | * @getchip: 0, if the chip is already selected |
| 393 | * @allowbbt: 1, if its allowed to access the bbt area |
| 394 | * |
| 395 | * Check, if the block is bad. Either by reading the bad block table or |
| 396 | * calling of the scan function. |
| 397 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 398 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 399 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 401 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 402 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 403 | if (!chip->bbt) |
| 404 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 405 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 406 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 407 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | } |
| 409 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 410 | /* |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 411 | * Wait for the ready pin, after a command |
| 412 | * The timeout is catched later. |
| 413 | */ |
| 414 | static void nand_wait_ready(struct mtd_info *mtd) |
| 415 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 416 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 417 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 418 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 419 | led_trigger_event(nand_led_trigger, LED_FULL); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 420 | /* wait until command is processed or timeout occures */ |
| 421 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 422 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 423 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 424 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 425 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 426 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 427 | } |
| 428 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 429 | /** |
| 430 | * nand_command - [DEFAULT] Send command to NAND device |
| 431 | * @mtd: MTD device structure |
| 432 | * @command: the command to be sent |
| 433 | * @column: the column address for this command, -1 if none |
| 434 | * @page_addr: the page address for this command, -1 if none |
| 435 | * |
| 436 | * Send command to NAND device. This function is used for small page |
| 437 | * devices (256/512 Bytes per page) |
| 438 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 439 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 440 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 442 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 443 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | /* |
| 446 | * Write out the command to the device. |
| 447 | */ |
| 448 | if (command == NAND_CMD_SEQIN) { |
| 449 | int readcmd; |
| 450 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 451 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 453 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 454 | readcmd = NAND_CMD_READOOB; |
| 455 | } else if (column < 256) { |
| 456 | /* First 256 bytes --> READ0 */ |
| 457 | readcmd = NAND_CMD_READ0; |
| 458 | } else { |
| 459 | column -= 256; |
| 460 | readcmd = NAND_CMD_READ1; |
| 461 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 462 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 463 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 464 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 465 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 466 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 467 | /* |
| 468 | * Address cycle, when necessary |
| 469 | */ |
| 470 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 471 | /* Serially input address */ |
| 472 | if (column != -1) { |
| 473 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 474 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 475 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 476 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 477 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 479 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 480 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 481 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 482 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 483 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 484 | if (chip->chipsize > (32 << 20)) |
| 485 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 486 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 487 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 488 | |
| 489 | /* |
| 490 | * program and erase have their own busy handlers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 491 | * status and sequential in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 492 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 494 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | case NAND_CMD_PAGEPROG: |
| 496 | case NAND_CMD_ERASE1: |
| 497 | case NAND_CMD_ERASE2: |
| 498 | case NAND_CMD_SEQIN: |
| 499 | case NAND_CMD_STATUS: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 500 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 501 | return; |
| 502 | |
| 503 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 504 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 505 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 506 | udelay(chip->chip_delay); |
| 507 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 508 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 509 | chip->cmd_ctrl(mtd, |
| 510 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 511 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 512 | return; |
| 513 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 514 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 516 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | * If we don't have access to the busy pin, we apply the given |
| 518 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 519 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 520 | if (!chip->dev_ready) { |
| 521 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 523 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 524 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | /* Apply this short delay always to ensure that we do wait tWB in |
| 526 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 527 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 528 | |
| 529 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | } |
| 531 | |
| 532 | /** |
| 533 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
| 534 | * @mtd: MTD device structure |
| 535 | * @command: the command to be sent |
| 536 | * @column: the column address for this command, -1 if none |
| 537 | * @page_addr: the page address for this command, -1 if none |
| 538 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 539 | * Send command to NAND device. This is the version for the new large page |
| 540 | * devices We dont have the separate regions as we have in the small page |
| 541 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 542 | * |
| 543 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 544 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 545 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 547 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | |
| 549 | /* Emulate NAND_CMD_READOOB */ |
| 550 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 551 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 552 | command = NAND_CMD_READ0; |
| 553 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 554 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 555 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 556 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 557 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
| 559 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 560 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | |
| 562 | /* Serially input address */ |
| 563 | if (column != -1) { |
| 564 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 565 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 567 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 568 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 569 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 570 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 571 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 572 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 573 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 574 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 576 | if (chip->chipsize > (128 << 20)) |
| 577 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 578 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 579 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 580 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 581 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 582 | |
| 583 | /* |
| 584 | * program and erase have their own busy handlers |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 585 | * status, sequential in, and deplete1 need no delay |
| 586 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 587 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 588 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | case NAND_CMD_CACHEDPROG: |
| 590 | case NAND_CMD_PAGEPROG: |
| 591 | case NAND_CMD_ERASE1: |
| 592 | case NAND_CMD_ERASE2: |
| 593 | case NAND_CMD_SEQIN: |
| 594 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 595 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | return; |
| 597 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 598 | /* |
| 599 | * read error status commands require only a short delay |
| 600 | */ |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 601 | case NAND_CMD_STATUS_ERROR: |
| 602 | case NAND_CMD_STATUS_ERROR0: |
| 603 | case NAND_CMD_STATUS_ERROR1: |
| 604 | case NAND_CMD_STATUS_ERROR2: |
| 605 | case NAND_CMD_STATUS_ERROR3: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 606 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 607 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | |
| 609 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 610 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 612 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 613 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 614 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 615 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 616 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 617 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 618 | return; |
| 619 | |
| 620 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 621 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 622 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 623 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 624 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 625 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 626 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 628 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 629 | * If we don't have access to the busy pin, we apply the given |
| 630 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 631 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 632 | if (!chip->dev_ready) { |
| 633 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 635 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 637 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | /* Apply this short delay always to ensure that we do wait tWB in |
| 639 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 640 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 641 | |
| 642 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 643 | } |
| 644 | |
| 645 | /** |
| 646 | * nand_get_device - [GENERIC] Get chip for selected access |
| 647 | * @this: the nand chip descriptor |
| 648 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 649 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 650 | * |
| 651 | * Get the device and lock it for exclusive access |
| 652 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 653 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 654 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 655 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 656 | spinlock_t *lock = &chip->controller->lock; |
| 657 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 658 | DECLARE_WAITQUEUE(wait, current); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 659 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 660 | spin_lock(lock); |
| 661 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 663 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 664 | if (!chip->controller->active) |
| 665 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 666 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 667 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 668 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 669 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 670 | return 0; |
| 671 | } |
| 672 | if (new_state == FL_PM_SUSPENDED) { |
| 673 | spin_unlock(lock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 674 | return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 675 | } |
| 676 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 677 | add_wait_queue(wq, &wait); |
| 678 | spin_unlock(lock); |
| 679 | schedule(); |
| 680 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | goto retry; |
| 682 | } |
| 683 | |
| 684 | /** |
| 685 | * nand_wait - [DEFAULT] wait until the command is done |
| 686 | * @mtd: MTD device structure |
| 687 | * @this: NAND chip structure |
| 688 | * @state: state to select the max. timeout value |
| 689 | * |
| 690 | * Wait for command done. This applies to erase and program only |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 691 | * Erase can take up to 400ms and program up to 20ms according to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | * general NAND and SmartMedia specs |
| 693 | * |
| 694 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 695 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip, int state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 696 | { |
| 697 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 698 | unsigned long timeo = jiffies; |
| 699 | int status; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 700 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 701 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 702 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 703 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 704 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 706 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 707 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 708 | /* Apply this short delay always to ensure that we do wait tWB in |
| 709 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 710 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 711 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 712 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 713 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 714 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 715 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 717 | while (time_before(jiffies, timeo)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 718 | /* Check, if we were interrupted */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 719 | if (chip->state != state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | return 0; |
| 721 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 722 | if (chip->dev_ready) { |
| 723 | if (chip->dev_ready(mtd)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 724 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 726 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | break; |
| 728 | } |
Thomas Gleixner | 20a6c21 | 2005-03-01 09:32:48 +0000 | [diff] [blame] | 729 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 731 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 732 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 733 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 734 | return status; |
| 735 | } |
| 736 | |
| 737 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 738 | * nand_read_page_swecc - {REPLACABLE] software ecc based page read function |
| 739 | * @mtd: mtd info structure |
| 740 | * @chip: nand chip info structure |
| 741 | * @buf: buffer to store read data |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 742 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 743 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 744 | uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 746 | int i, eccsize = chip->ecc.size; |
| 747 | int eccbytes = chip->ecc.bytes; |
| 748 | int eccsteps = chip->ecc.steps; |
| 749 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 750 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 751 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 752 | int *eccpos = chip->autooob->eccpos; |
| 753 | |
| 754 | chip->read_buf(mtd, buf, mtd->writesize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 755 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 756 | |
| 757 | if (chip->ecc.mode == NAND_ECC_NONE) |
| 758 | return 0; |
| 759 | |
| 760 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 761 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 762 | |
| 763 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 764 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 765 | |
| 766 | eccsteps = chip->ecc.steps; |
| 767 | p = buf; |
| 768 | |
| 769 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 770 | int stat; |
| 771 | |
| 772 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 773 | if (stat == -1) |
| 774 | mtd->ecc_stats.failed++; |
| 775 | else |
| 776 | mtd->ecc_stats.corrected += stat; |
| 777 | } |
| 778 | return 0; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 779 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 782 | * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function |
| 783 | * @mtd: mtd info structure |
| 784 | * @chip: nand chip info structure |
| 785 | * @buf: buffer to store read data |
| 786 | * |
| 787 | * Not for syndrome calculating ecc controllers which need a special oob layout |
| 788 | */ |
| 789 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 790 | uint8_t *buf) |
| 791 | { |
| 792 | int i, eccsize = chip->ecc.size; |
| 793 | int eccbytes = chip->ecc.bytes; |
| 794 | int eccsteps = chip->ecc.steps; |
| 795 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 796 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 797 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 798 | int *eccpos = chip->autooob->eccpos; |
| 799 | |
| 800 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 801 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 802 | chip->read_buf(mtd, p, eccsize); |
| 803 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 804 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 805 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 806 | |
| 807 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 808 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 809 | |
| 810 | eccsteps = chip->ecc.steps; |
| 811 | p = buf; |
| 812 | |
| 813 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 814 | int stat; |
| 815 | |
| 816 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 817 | if (stat == -1) |
| 818 | mtd->ecc_stats.failed++; |
| 819 | else |
| 820 | mtd->ecc_stats.corrected += stat; |
| 821 | } |
| 822 | return 0; |
| 823 | } |
| 824 | |
| 825 | /** |
| 826 | * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read |
| 827 | * @mtd: mtd info structure |
| 828 | * @chip: nand chip info structure |
| 829 | * @buf: buffer to store read data |
| 830 | * |
| 831 | * The hw generator calculates the error syndrome automatically. Therefor |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 832 | * we need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 833 | */ |
| 834 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 835 | uint8_t *buf) |
| 836 | { |
| 837 | int i, eccsize = chip->ecc.size; |
| 838 | int eccbytes = chip->ecc.bytes; |
| 839 | int eccsteps = chip->ecc.steps; |
| 840 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 841 | uint8_t *oob = chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 842 | |
| 843 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 844 | int stat; |
| 845 | |
| 846 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 847 | chip->read_buf(mtd, p, eccsize); |
| 848 | |
| 849 | if (chip->ecc.prepad) { |
| 850 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 851 | oob += chip->ecc.prepad; |
| 852 | } |
| 853 | |
| 854 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 855 | chip->read_buf(mtd, oob, eccbytes); |
| 856 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 857 | |
| 858 | if (stat == -1) |
| 859 | mtd->ecc_stats.failed++; |
| 860 | else |
| 861 | mtd->ecc_stats.corrected += stat; |
| 862 | |
| 863 | oob += eccbytes; |
| 864 | |
| 865 | if (chip->ecc.postpad) { |
| 866 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 867 | oob += chip->ecc.postpad; |
| 868 | } |
| 869 | } |
| 870 | |
| 871 | /* Calculate remaining oob bytes */ |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 872 | i = oob - chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 873 | if (i) |
| 874 | chip->read_buf(mtd, oob, i); |
| 875 | |
| 876 | return 0; |
| 877 | } |
| 878 | |
| 879 | /** |
| 880 | * nand_do_read - [Internal] Read data with ECC |
| 881 | * |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 882 | * @mtd: MTD device structure |
| 883 | * @from: offset to read from |
| 884 | * @len: number of bytes to read |
| 885 | * @retlen: pointer to variable to store the number of read bytes |
| 886 | * @buf: the databuffer to put data |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 887 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 888 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 889 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 890 | int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 891 | size_t *retlen, uint8_t *buf) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 892 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 893 | int chipnr, page, realpage, col, bytes, aligned; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 894 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 895 | struct mtd_ecc_stats stats; |
| 896 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 897 | int sndcmd = 1; |
| 898 | int ret = 0; |
| 899 | uint32_t readlen = len; |
| 900 | uint8_t *bufpoi; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 901 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 902 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 903 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 904 | chipnr = (int)(from >> chip->chip_shift); |
| 905 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 906 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 907 | realpage = (int)(from >> chip->page_shift); |
| 908 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 909 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 910 | col = (int)(from & (mtd->writesize - 1)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 911 | chip->oob_poi = chip->buffers.oobrbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 913 | while(1) { |
| 914 | bytes = min(mtd->writesize - col, readlen); |
| 915 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 916 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 917 | /* Is the current page in the buffer ? */ |
| 918 | if (realpage != chip->pagebuf) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 919 | bufpoi = aligned ? buf : chip->buffers.databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 921 | if (likely(sndcmd)) { |
| 922 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
| 923 | sndcmd = 0; |
| 924 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 926 | /* Now read the page into the buffer */ |
| 927 | ret = chip->ecc.read_page(mtd, chip, bufpoi); |
| 928 | if (ret < 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 929 | break; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 930 | |
| 931 | /* Transfer not aligned data */ |
| 932 | if (!aligned) { |
| 933 | chip->pagebuf = realpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 934 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 935 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 936 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 937 | if (!(chip->options & NAND_NO_READRDY)) { |
| 938 | /* |
| 939 | * Apply delay or wait for ready/busy pin. Do |
| 940 | * this before the AUTOINCR check, so no |
| 941 | * problems arise if a chip which does auto |
| 942 | * increment is marked as NOAUTOINCR by the |
| 943 | * board driver. |
| 944 | */ |
| 945 | if (!chip->dev_ready) |
| 946 | udelay(chip->chip_delay); |
| 947 | else |
| 948 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 950 | } else |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 951 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 953 | buf += bytes; |
| 954 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 955 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 956 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 957 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 958 | |
| 959 | /* For subsequent reads align to page boundary. */ |
| 960 | col = 0; |
| 961 | /* Increment page address */ |
| 962 | realpage++; |
| 963 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 964 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 965 | /* Check, if we cross a chip boundary */ |
| 966 | if (!page) { |
| 967 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 968 | chip->select_chip(mtd, -1); |
| 969 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 970 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 971 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 972 | /* Check, if the chip supports auto page increment |
| 973 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 974 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 975 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 976 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 977 | } |
| 978 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 979 | *retlen = len - (size_t) readlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 981 | if (ret) |
| 982 | return ret; |
| 983 | |
| 984 | return mtd->ecc_stats.failed - stats.failed ? -EBADMSG : 0; |
| 985 | } |
| 986 | |
| 987 | /** |
| 988 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
| 989 | * @mtd: MTD device structure |
| 990 | * @from: offset to read from |
| 991 | * @len: number of bytes to read |
| 992 | * @retlen: pointer to variable to store the number of read bytes |
| 993 | * @buf: the databuffer to put data |
| 994 | * |
| 995 | * Get hold of the chip and call nand_do_read |
| 996 | */ |
| 997 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 998 | size_t *retlen, uint8_t *buf) |
| 999 | { |
| 1000 | int ret; |
| 1001 | |
| 1002 | *retlen = 0; |
| 1003 | /* Do not allow reads past end of device */ |
| 1004 | if ((from + len) > mtd->size) |
| 1005 | return -EINVAL; |
| 1006 | if (!len) |
| 1007 | return 0; |
| 1008 | |
| 1009 | nand_get_device(mtd->priv, mtd, FL_READING); |
| 1010 | |
| 1011 | ret = nand_do_read(mtd, from, len, retlen, buf); |
| 1012 | |
| 1013 | nand_release_device(mtd); |
| 1014 | |
| 1015 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | } |
| 1017 | |
| 1018 | /** |
| 1019 | * nand_read_oob - [MTD Interface] NAND read out-of-band |
| 1020 | * @mtd: MTD device structure |
| 1021 | * @from: offset to read from |
| 1022 | * @len: number of bytes to read |
| 1023 | * @retlen: pointer to variable to store the number of read bytes |
| 1024 | * @buf: the databuffer to put data |
| 1025 | * |
| 1026 | * NAND read out-of-band data from the spare area |
| 1027 | */ |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1028 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, |
| 1029 | size_t *retlen, uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1030 | { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1031 | int col, page, realpage, chipnr, sndcmd = 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1032 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1033 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1034 | int readlen = len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1035 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1036 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", |
| 1037 | (unsigned int)from, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | |
| 1039 | /* Initialize return length value */ |
| 1040 | *retlen = 0; |
| 1041 | |
| 1042 | /* Do not allow reads past end of device */ |
| 1043 | if ((from + len) > mtd->size) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1044 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
| 1045 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1046 | return -EINVAL; |
| 1047 | } |
| 1048 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1049 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1050 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1051 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1052 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1054 | /* Shift to get page */ |
| 1055 | realpage = (int)(from >> chip->page_shift); |
| 1056 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1058 | /* Mask to get column */ |
| 1059 | col = from & (mtd->oobsize - 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1060 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1061 | while(1) { |
| 1062 | int bytes = min((int)(mtd->oobsize - col), readlen); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1063 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1064 | if (likely(sndcmd)) { |
| 1065 | chip->cmdfunc(mtd, NAND_CMD_READOOB, col, page); |
| 1066 | sndcmd = 0; |
| 1067 | } |
| 1068 | |
| 1069 | chip->read_buf(mtd, buf, bytes); |
| 1070 | |
| 1071 | readlen -= bytes; |
| 1072 | if (!readlen) |
| 1073 | break; |
| 1074 | |
| 1075 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1076 | /* |
| 1077 | * Apply delay or wait for ready/busy pin. Do this |
| 1078 | * before the AUTOINCR check, so no problems arise if a |
| 1079 | * chip which does auto increment is marked as |
| 1080 | * NOAUTOINCR by the board driver. |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1081 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1082 | if (!chip->dev_ready) |
| 1083 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1084 | else |
| 1085 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1086 | } |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1087 | |
| 1088 | buf += bytes; |
| 1089 | bytes = mtd->oobsize; |
| 1090 | col = 0; |
| 1091 | |
| 1092 | /* Increment page address */ |
| 1093 | realpage++; |
| 1094 | |
| 1095 | page = realpage & chip->pagemask; |
| 1096 | /* Check, if we cross a chip boundary */ |
| 1097 | if (!page) { |
| 1098 | chipnr++; |
| 1099 | chip->select_chip(mtd, -1); |
| 1100 | chip->select_chip(mtd, chipnr); |
| 1101 | } |
| 1102 | |
| 1103 | /* Check, if the chip supports auto page increment |
| 1104 | * or if we have hit a block boundary. |
| 1105 | */ |
| 1106 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
| 1107 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1108 | } |
| 1109 | |
| 1110 | /* Deselect and wake up anyone waiting on the device */ |
| 1111 | nand_release_device(mtd); |
| 1112 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1113 | *retlen = len; |
| 1114 | return 0; |
| 1115 | } |
| 1116 | |
| 1117 | /** |
| 1118 | * nand_read_raw - [GENERIC] Read raw data including oob into buffer |
| 1119 | * @mtd: MTD device structure |
| 1120 | * @buf: temporary buffer |
| 1121 | * @from: offset to read from |
| 1122 | * @len: number of bytes to read |
| 1123 | * @ooblen: number of oob data bytes to read |
| 1124 | * |
| 1125 | * Read raw data including oob into buffer |
| 1126 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1127 | int nand_read_raw(struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, |
| 1128 | size_t ooblen) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1129 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1130 | struct nand_chip *chip = mtd->priv; |
| 1131 | int page = (int)(from >> chip->page_shift); |
| 1132 | int chipnr = (int)(from >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1133 | int sndcmd = 1; |
| 1134 | int cnt = 0; |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 1135 | int pagesize = mtd->writesize + mtd->oobsize; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1136 | int blockcheck; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1137 | |
| 1138 | /* Do not allow reads past end of device */ |
| 1139 | if ((from + len) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1140 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: " |
| 1141 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1142 | return -EINVAL; |
| 1143 | } |
| 1144 | |
| 1145 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1146 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1147 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1148 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1149 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1150 | /* Add requested oob length */ |
| 1151 | len += ooblen; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1152 | blockcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1154 | while (len) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1155 | if (likely(sndcmd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1156 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, |
| 1157 | page & chip->pagemask); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1158 | sndcmd = 0; |
| 1159 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1160 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1161 | chip->read_buf(mtd, &buf[cnt], pagesize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1162 | |
| 1163 | len -= pagesize; |
| 1164 | cnt += pagesize; |
| 1165 | page++; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1166 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1167 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1168 | if (!chip->dev_ready) |
| 1169 | udelay(chip->chip_delay); |
| 1170 | else |
| 1171 | nand_wait_ready(mtd); |
| 1172 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1173 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1174 | /* |
| 1175 | * Check, if the chip supports auto page increment or if we |
| 1176 | * cross a block boundary. |
| 1177 | */ |
| 1178 | if (!NAND_CANAUTOINCR(chip) || !(page & blockcheck)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1179 | sndcmd = 1; |
| 1180 | } |
| 1181 | |
| 1182 | /* Deselect and wake up anyone waiting on the device */ |
| 1183 | nand_release_device(mtd); |
| 1184 | return 0; |
| 1185 | } |
| 1186 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1187 | /** |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1188 | * nand_write_page_swecc - {REPLACABLE] software ecc based page write function |
| 1189 | * @mtd: mtd info structure |
| 1190 | * @chip: nand chip info structure |
| 1191 | * @buf: data buffer |
| 1192 | */ |
| 1193 | static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1194 | const uint8_t *buf) |
| 1195 | { |
| 1196 | int i, eccsize = chip->ecc.size; |
| 1197 | int eccbytes = chip->ecc.bytes; |
| 1198 | int eccsteps = chip->ecc.steps; |
| 1199 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1200 | const uint8_t *p = buf; |
| 1201 | int *eccpos = chip->autooob->eccpos; |
| 1202 | |
| 1203 | if (chip->ecc.mode != NAND_ECC_NONE) { |
| 1204 | /* Software ecc calculation */ |
| 1205 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1206 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1207 | |
| 1208 | for (i = 0; i < chip->ecc.total; i++) |
| 1209 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1210 | } |
| 1211 | |
| 1212 | chip->write_buf(mtd, buf, mtd->writesize); |
| 1213 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1214 | } |
| 1215 | |
| 1216 | /** |
| 1217 | * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function |
| 1218 | * @mtd: mtd info structure |
| 1219 | * @chip: nand chip info structure |
| 1220 | * @buf: data buffer |
| 1221 | */ |
| 1222 | static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1223 | const uint8_t *buf) |
| 1224 | { |
| 1225 | int i, eccsize = chip->ecc.size; |
| 1226 | int eccbytes = chip->ecc.bytes; |
| 1227 | int eccsteps = chip->ecc.steps; |
| 1228 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1229 | const uint8_t *p = buf; |
| 1230 | int *eccpos = chip->autooob->eccpos; |
| 1231 | |
| 1232 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1233 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1234 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1235 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1236 | } |
| 1237 | |
| 1238 | for (i = 0; i < chip->ecc.total; i++) |
| 1239 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1240 | |
| 1241 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1242 | } |
| 1243 | |
| 1244 | /** |
| 1245 | * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write |
| 1246 | * @mtd: mtd info structure |
| 1247 | * @chip: nand chip info structure |
| 1248 | * @buf: data buffer |
| 1249 | * |
| 1250 | * The hw generator calculates the error syndrome automatically. Therefor |
| 1251 | * we need a special oob layout and handling. |
| 1252 | */ |
| 1253 | static void nand_write_page_syndrome(struct mtd_info *mtd, |
| 1254 | struct nand_chip *chip, const uint8_t *buf) |
| 1255 | { |
| 1256 | int i, eccsize = chip->ecc.size; |
| 1257 | int eccbytes = chip->ecc.bytes; |
| 1258 | int eccsteps = chip->ecc.steps; |
| 1259 | const uint8_t *p = buf; |
| 1260 | uint8_t *oob = chip->oob_poi; |
| 1261 | |
| 1262 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1263 | |
| 1264 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 1265 | chip->write_buf(mtd, p, eccsize); |
| 1266 | |
| 1267 | if (chip->ecc.prepad) { |
| 1268 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1269 | oob += chip->ecc.prepad; |
| 1270 | } |
| 1271 | |
| 1272 | chip->ecc.calculate(mtd, p, oob); |
| 1273 | chip->write_buf(mtd, oob, eccbytes); |
| 1274 | oob += eccbytes; |
| 1275 | |
| 1276 | if (chip->ecc.postpad) { |
| 1277 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1278 | oob += chip->ecc.postpad; |
| 1279 | } |
| 1280 | } |
| 1281 | |
| 1282 | /* Calculate remaining oob bytes */ |
| 1283 | i = oob - chip->oob_poi; |
| 1284 | if (i) |
| 1285 | chip->write_buf(mtd, oob, i); |
| 1286 | } |
| 1287 | |
| 1288 | /** |
| 1289 | * nand_write_page - [INTERNAL] write one page |
| 1290 | * @mtd: MTD device structure |
| 1291 | * @chip: NAND chip descriptor |
| 1292 | * @buf: the data to write |
| 1293 | * @page: page number to write |
| 1294 | * @cached: cached programming |
| 1295 | */ |
| 1296 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
| 1297 | const uint8_t *buf, int page, int cached) |
| 1298 | { |
| 1299 | int status; |
| 1300 | |
| 1301 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 1302 | |
| 1303 | chip->ecc.write_page(mtd, chip, buf); |
| 1304 | |
| 1305 | /* |
| 1306 | * Cached progamming disabled for now, Not sure if its worth the |
| 1307 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) |
| 1308 | */ |
| 1309 | cached = 0; |
| 1310 | |
| 1311 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 1312 | |
| 1313 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1314 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
| 1315 | /* |
| 1316 | * See if operation failed and additional status checks are |
| 1317 | * available |
| 1318 | */ |
| 1319 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1320 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 1321 | page); |
| 1322 | |
| 1323 | if (status & NAND_STATUS_FAIL) |
| 1324 | return -EIO; |
| 1325 | } else { |
| 1326 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
| 1327 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
| 1328 | } |
| 1329 | |
| 1330 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1331 | /* Send command to read back the data */ |
| 1332 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1333 | |
| 1334 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 1335 | return -EIO; |
| 1336 | #endif |
| 1337 | return 0; |
| 1338 | } |
| 1339 | |
| 1340 | #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0 |
| 1341 | |
| 1342 | /** |
| 1343 | * nand_write - [MTD Interface] NAND write with ECC |
| 1344 | * @mtd: MTD device structure |
| 1345 | * @to: offset to write to |
| 1346 | * @len: number of bytes to write |
| 1347 | * @retlen: pointer to variable to store the number of written bytes |
| 1348 | * @buf: the data to write |
| 1349 | * |
| 1350 | * NAND write with ECC |
| 1351 | */ |
| 1352 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
| 1353 | size_t *retlen, const uint8_t *buf) |
| 1354 | { |
| 1355 | int chipnr, realpage, page, blockmask; |
| 1356 | struct nand_chip *chip = mtd->priv; |
| 1357 | uint32_t writelen = len; |
| 1358 | int bytes = mtd->writesize; |
| 1359 | int ret = -EIO; |
| 1360 | |
| 1361 | *retlen = 0; |
| 1362 | |
| 1363 | /* Do not allow write past end of device */ |
| 1364 | if ((to + len) > mtd->size) { |
| 1365 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write: " |
| 1366 | "Attempt to write past end of page\n"); |
| 1367 | return -EINVAL; |
| 1368 | } |
| 1369 | |
| 1370 | /* reject writes, which are not page aligned */ |
| 1371 | if (NOTALIGNED(to) || NOTALIGNED(len)) { |
| 1372 | printk(KERN_NOTICE "nand_write: " |
| 1373 | "Attempt to write not page aligned data\n"); |
| 1374 | return -EINVAL; |
| 1375 | } |
| 1376 | |
| 1377 | if (!len) |
| 1378 | return 0; |
| 1379 | |
| 1380 | nand_get_device(chip, mtd, FL_WRITING); |
| 1381 | |
| 1382 | /* Check, if it is write protected */ |
| 1383 | if (nand_check_wp(mtd)) |
| 1384 | goto out; |
| 1385 | |
| 1386 | chipnr = (int)(to >> chip->chip_shift); |
| 1387 | chip->select_chip(mtd, chipnr); |
| 1388 | |
| 1389 | realpage = (int)(to >> chip->page_shift); |
| 1390 | page = realpage & chip->pagemask; |
| 1391 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1392 | |
| 1393 | /* Invalidate the page cache, when we write to the cached page */ |
| 1394 | if (to <= (chip->pagebuf << chip->page_shift) && |
| 1395 | (chip->pagebuf << chip->page_shift) < (to + len)) |
| 1396 | chip->pagebuf = -1; |
| 1397 | |
| 1398 | chip->oob_poi = chip->buffers.oobwbuf; |
| 1399 | |
| 1400 | while(1) { |
| 1401 | int cached = writelen > bytes && page != blockmask; |
| 1402 | |
| 1403 | ret = nand_write_page(mtd, chip, buf, page, cached); |
| 1404 | if (ret) |
| 1405 | break; |
| 1406 | |
| 1407 | writelen -= bytes; |
| 1408 | if (!writelen) |
| 1409 | break; |
| 1410 | |
| 1411 | buf += bytes; |
| 1412 | realpage++; |
| 1413 | |
| 1414 | page = realpage & chip->pagemask; |
| 1415 | /* Check, if we cross a chip boundary */ |
| 1416 | if (!page) { |
| 1417 | chipnr++; |
| 1418 | chip->select_chip(mtd, -1); |
| 1419 | chip->select_chip(mtd, chipnr); |
| 1420 | } |
| 1421 | } |
| 1422 | out: |
| 1423 | *retlen = len - writelen; |
| 1424 | nand_release_device(mtd); |
| 1425 | return ret; |
| 1426 | } |
| 1427 | |
| 1428 | /** |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1429 | * nand_write_raw - [GENERIC] Write raw data including oob |
| 1430 | * @mtd: MTD device structure |
| 1431 | * @buf: source buffer |
| 1432 | * @to: offset to write to |
| 1433 | * @len: number of bytes to write |
| 1434 | * @buf: source buffer |
| 1435 | * @oob: oob buffer |
| 1436 | * |
| 1437 | * Write raw data including oob |
| 1438 | */ |
| 1439 | int nand_write_raw(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1440 | const uint8_t *buf, uint8_t *oob) |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1441 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1442 | struct nand_chip *chip = mtd->priv; |
| 1443 | int page = (int)(to >> chip->page_shift); |
| 1444 | int chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1445 | int ret; |
| 1446 | |
| 1447 | *retlen = 0; |
| 1448 | |
| 1449 | /* Do not allow writes past end of device */ |
| 1450 | if ((to + len) > mtd->size) { |
| 1451 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt write " |
| 1452 | "beyond end of device\n"); |
| 1453 | return -EINVAL; |
| 1454 | } |
| 1455 | |
| 1456 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1457 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1458 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1459 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1460 | chip->oob_poi = oob; |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1461 | |
| 1462 | while (len != *retlen) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1463 | ret = nand_write_page(mtd, chip, buf, page, 0); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1464 | if (ret) |
| 1465 | return ret; |
| 1466 | page++; |
| 1467 | *retlen += mtd->writesize; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1468 | buf += mtd->writesize; |
| 1469 | chip->oob_poi += mtd->oobsize; |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1470 | } |
| 1471 | |
| 1472 | /* Deselect and wake up anyone waiting on the device */ |
| 1473 | nand_release_device(mtd); |
| 1474 | return 0; |
| 1475 | } |
Thomas Gleixner | 3821720 | 2006-05-23 22:33:52 +0200 | [diff] [blame] | 1476 | EXPORT_SYMBOL_GPL(nand_write_raw); |
Thomas Gleixner | 9223a45 | 2006-05-23 17:21:03 +0200 | [diff] [blame] | 1477 | |
| 1478 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1479 | * nand_write_oob - [MTD Interface] NAND write out-of-band |
| 1480 | * @mtd: MTD device structure |
| 1481 | * @to: offset to write to |
| 1482 | * @len: number of bytes to write |
| 1483 | * @retlen: pointer to variable to store the number of written bytes |
| 1484 | * @buf: the data to write |
| 1485 | * |
| 1486 | * NAND write out-of-band |
| 1487 | */ |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1488 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, |
| 1489 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1490 | { |
| 1491 | int column, page, status, ret = -EIO, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1492 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1493 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1494 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", |
| 1495 | (unsigned int)to, (int)len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1496 | |
| 1497 | /* Initialize return length value */ |
| 1498 | *retlen = 0; |
| 1499 | |
| 1500 | /* Do not allow write past end of page */ |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1501 | column = to & (mtd->oobsize - 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1502 | if ((column + len) > mtd->oobsize) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1503 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1504 | "Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1505 | return -EINVAL; |
| 1506 | } |
| 1507 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1508 | nand_get_device(chip, mtd, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1509 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1510 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1511 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1512 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1513 | /* Shift to get page */ |
| 1514 | page = (int)(to >> chip->page_shift); |
| 1515 | |
| 1516 | /* |
| 1517 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 1518 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 1519 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 1520 | * it in the doc2000 driver in August 1999. dwmw2. |
| 1521 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1522 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1523 | |
| 1524 | /* Check, if it is write protected */ |
| 1525 | if (nand_check_wp(mtd)) |
| 1526 | goto out; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1527 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1528 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1529 | if (page == chip->pagebuf) |
| 1530 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1531 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1532 | if (NAND_MUST_PAD(chip)) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1533 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, |
| 1534 | page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1535 | /* prepad 0xff for partial programming */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1536 | chip->write_buf(mtd, ffchars, column); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1537 | /* write data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1538 | chip->write_buf(mtd, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1539 | /* postpad 0xff for partial programming */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1540 | chip->write_buf(mtd, ffchars, mtd->oobsize - (len + column)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1541 | } else { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1542 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + column, |
| 1543 | page & chip->pagemask); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1544 | chip->write_buf(mtd, buf, len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1545 | } |
| 1546 | /* Send command to program the OOB data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1547 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1548 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1549 | status = chip->waitfunc(mtd, chip, FL_WRITING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1550 | |
| 1551 | /* See if device thinks it succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1552 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1553 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1554 | "Failed write, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1555 | ret = -EIO; |
| 1556 | goto out; |
| 1557 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1558 | *retlen = len; |
| 1559 | |
| 1560 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1561 | /* Send command to read back the data */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1562 | chip->cmdfunc(mtd, NAND_CMD_READOOB, column, page & chip->pagemask); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1563 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1564 | if (chip->verify_buf(mtd, buf, len)) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1565 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1566 | "Failed write verify, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1567 | ret = -EIO; |
| 1568 | goto out; |
| 1569 | } |
| 1570 | #endif |
| 1571 | ret = 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1572 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1573 | /* Deselect and wake up anyone waiting on the device */ |
| 1574 | nand_release_device(mtd); |
| 1575 | |
| 1576 | return ret; |
| 1577 | } |
| 1578 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1579 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1580 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
| 1581 | * @mtd: MTD device structure |
| 1582 | * @page: the page address of the block which will be erased |
| 1583 | * |
| 1584 | * Standard erase command for NAND chips |
| 1585 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1586 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1587 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1588 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1589 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1590 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1591 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1592 | } |
| 1593 | |
| 1594 | /** |
| 1595 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
| 1596 | * @mtd: MTD device structure |
| 1597 | * @page: the page address of the block which will be erased |
| 1598 | * |
| 1599 | * AND multi block erase command function |
| 1600 | * Erase 4 consecutive blocks |
| 1601 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1602 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1603 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1604 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1605 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1606 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1607 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1608 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1609 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1610 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1611 | } |
| 1612 | |
| 1613 | /** |
| 1614 | * nand_erase - [MTD Interface] erase block(s) |
| 1615 | * @mtd: MTD device structure |
| 1616 | * @instr: erase instruction |
| 1617 | * |
| 1618 | * Erase one ore more blocks |
| 1619 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1620 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1621 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1622 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1623 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1624 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1625 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1627 | * nand_erase_nand - [Internal] erase block(s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1628 | * @mtd: MTD device structure |
| 1629 | * @instr: erase instruction |
| 1630 | * @allowbbt: allow erasing the bbt area |
| 1631 | * |
| 1632 | * Erase one ore more blocks |
| 1633 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1634 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 1635 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1636 | { |
| 1637 | int page, len, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1638 | struct nand_chip *chip = mtd->priv; |
| 1639 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; |
| 1640 | unsigned int bbt_masked_page = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1641 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1642 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", |
| 1643 | (unsigned int)instr->addr, (unsigned int)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1644 | |
| 1645 | /* Start address must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1646 | if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1647 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1648 | return -EINVAL; |
| 1649 | } |
| 1650 | |
| 1651 | /* Length must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1652 | if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { |
| 1653 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1654 | "Length not block aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1655 | return -EINVAL; |
| 1656 | } |
| 1657 | |
| 1658 | /* Do not allow erase past end of device */ |
| 1659 | if ((instr->len + instr->addr) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1660 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1661 | "Erase past end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | return -EINVAL; |
| 1663 | } |
| 1664 | |
| 1665 | instr->fail_addr = 0xffffffff; |
| 1666 | |
| 1667 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1668 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1669 | |
| 1670 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1671 | page = (int)(instr->addr >> chip->page_shift); |
| 1672 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1673 | |
| 1674 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1675 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1676 | |
| 1677 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1678 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1679 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1680 | /* Check, if it is write protected */ |
| 1681 | if (nand_check_wp(mtd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1682 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1683 | "Device is write protected!!!\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1684 | instr->state = MTD_ERASE_FAILED; |
| 1685 | goto erase_exit; |
| 1686 | } |
| 1687 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1688 | /* |
| 1689 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 1690 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 1691 | * can not be matched. This is also done when the bbt is actually |
| 1692 | * erased to avoid recusrsive updates |
| 1693 | */ |
| 1694 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 1695 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1696 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1697 | /* Loop through the pages */ |
| 1698 | len = instr->len; |
| 1699 | |
| 1700 | instr->state = MTD_ERASING; |
| 1701 | |
| 1702 | while (len) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1703 | /* |
| 1704 | * heck if we have a bad block, we do not erase bad blocks ! |
| 1705 | */ |
| 1706 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 1707 | chip->page_shift, 0, allowbbt)) { |
| 1708 | printk(KERN_WARNING "nand_erase: attempt to erase a " |
| 1709 | "bad block at page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1710 | instr->state = MTD_ERASE_FAILED; |
| 1711 | goto erase_exit; |
| 1712 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1713 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1714 | /* |
| 1715 | * Invalidate the page cache, if we erase the block which |
| 1716 | * contains the current cached page |
| 1717 | */ |
| 1718 | if (page <= chip->pagebuf && chip->pagebuf < |
| 1719 | (page + pages_per_block)) |
| 1720 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1721 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1722 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1723 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1724 | status = chip->waitfunc(mtd, chip, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1725 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1726 | /* |
| 1727 | * See if operation failed and additional status checks are |
| 1728 | * available |
| 1729 | */ |
| 1730 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1731 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 1732 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1733 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1734 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1735 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1736 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1737 | "Failed erase, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1738 | instr->state = MTD_ERASE_FAILED; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1739 | instr->fail_addr = (page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1740 | goto erase_exit; |
| 1741 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1742 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1743 | /* |
| 1744 | * If BBT requires refresh, set the BBT rewrite flag to the |
| 1745 | * page being erased |
| 1746 | */ |
| 1747 | if (bbt_masked_page != 0xffffffff && |
| 1748 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
| 1749 | rewrite_bbt[chipnr] = (page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1750 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1751 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1752 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1753 | page += pages_per_block; |
| 1754 | |
| 1755 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1756 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1757 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1758 | chip->select_chip(mtd, -1); |
| 1759 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1760 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1761 | /* |
| 1762 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
| 1763 | * page mask to see if this BBT should be rewritten |
| 1764 | */ |
| 1765 | if (bbt_masked_page != 0xffffffff && |
| 1766 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 1767 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 1768 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1769 | } |
| 1770 | } |
| 1771 | instr->state = MTD_ERASE_DONE; |
| 1772 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1773 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1774 | |
| 1775 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
| 1776 | /* Do call back function */ |
| 1777 | if (!ret) |
| 1778 | mtd_erase_callback(instr); |
| 1779 | |
| 1780 | /* Deselect and wake up anyone waiting on the device */ |
| 1781 | nand_release_device(mtd); |
| 1782 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1783 | /* |
| 1784 | * If BBT requires refresh and erase was successful, rewrite any |
| 1785 | * selected bad block tables |
| 1786 | */ |
| 1787 | if (bbt_masked_page == 0xffffffff || ret) |
| 1788 | return ret; |
| 1789 | |
| 1790 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 1791 | if (!rewrite_bbt[chipnr]) |
| 1792 | continue; |
| 1793 | /* update the BBT for chip */ |
| 1794 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt " |
| 1795 | "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr], |
| 1796 | chip->bbt_td->pages[chipnr]); |
| 1797 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1798 | } |
| 1799 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1800 | /* Return more or less happy */ |
| 1801 | return ret; |
| 1802 | } |
| 1803 | |
| 1804 | /** |
| 1805 | * nand_sync - [MTD Interface] sync |
| 1806 | * @mtd: MTD device structure |
| 1807 | * |
| 1808 | * Sync is actually a wait for chip ready function |
| 1809 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1810 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1811 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1812 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1813 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1814 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1815 | |
| 1816 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1817 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1818 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1819 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1820 | } |
| 1821 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1822 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1823 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1824 | * @mtd: MTD device structure |
| 1825 | * @ofs: offset relative to mtd start |
| 1826 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1827 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1828 | { |
| 1829 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1830 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1831 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1832 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1833 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1834 | } |
| 1835 | |
| 1836 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1837 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | * @mtd: MTD device structure |
| 1839 | * @ofs: offset relative to mtd start |
| 1840 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1841 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1842 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1843 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | int ret; |
| 1845 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1846 | if ((ret = nand_block_isbad(mtd, ofs))) { |
| 1847 | /* If it was bad already, return success and do nothing. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1848 | if (ret > 0) |
| 1849 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1850 | return ret; |
| 1851 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1852 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1853 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | } |
| 1855 | |
| 1856 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1857 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
| 1858 | * @mtd: MTD device structure |
| 1859 | */ |
| 1860 | static int nand_suspend(struct mtd_info *mtd) |
| 1861 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1862 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1863 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1864 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1865 | } |
| 1866 | |
| 1867 | /** |
| 1868 | * nand_resume - [MTD Interface] Resume the NAND flash |
| 1869 | * @mtd: MTD device structure |
| 1870 | */ |
| 1871 | static void nand_resume(struct mtd_info *mtd) |
| 1872 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1873 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1874 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1875 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1876 | nand_release_device(mtd); |
| 1877 | else |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 1878 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
| 1879 | "in suspended state\n"); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 1880 | } |
| 1881 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 1882 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1883 | * Set default functions |
| 1884 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1885 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1886 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1887 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1888 | if (!chip->chip_delay) |
| 1889 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1890 | |
| 1891 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1892 | if (chip->cmdfunc == NULL) |
| 1893 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1894 | |
| 1895 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1896 | if (chip->waitfunc == NULL) |
| 1897 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1898 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1899 | if (!chip->select_chip) |
| 1900 | chip->select_chip = nand_select_chip; |
| 1901 | if (!chip->read_byte) |
| 1902 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 1903 | if (!chip->read_word) |
| 1904 | chip->read_word = nand_read_word; |
| 1905 | if (!chip->block_bad) |
| 1906 | chip->block_bad = nand_block_bad; |
| 1907 | if (!chip->block_markbad) |
| 1908 | chip->block_markbad = nand_default_block_markbad; |
| 1909 | if (!chip->write_buf) |
| 1910 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 1911 | if (!chip->read_buf) |
| 1912 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 1913 | if (!chip->verify_buf) |
| 1914 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 1915 | if (!chip->scan_bbt) |
| 1916 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1917 | |
| 1918 | if (!chip->controller) { |
| 1919 | chip->controller = &chip->hwcontrol; |
| 1920 | spin_lock_init(&chip->controller->lock); |
| 1921 | init_waitqueue_head(&chip->controller->wq); |
| 1922 | } |
| 1923 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1924 | } |
| 1925 | |
| 1926 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1927 | * Get the flash and manufacturer id and lookup if the type is supported |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1928 | */ |
| 1929 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1930 | struct nand_chip *chip, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1931 | int busw, int *maf_id) |
| 1932 | { |
| 1933 | struct nand_flash_dev *type = NULL; |
| 1934 | int i, dev_id, maf_idx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1935 | |
| 1936 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1937 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1938 | |
| 1939 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1940 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1941 | |
| 1942 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1943 | *maf_id = chip->read_byte(mtd); |
| 1944 | dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1945 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1946 | /* Lookup the flash id */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1947 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1948 | if (dev_id == nand_flash_ids[i].id) { |
| 1949 | type = &nand_flash_ids[i]; |
| 1950 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1951 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1952 | } |
| 1953 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1954 | if (!type) |
| 1955 | return ERR_PTR(-ENODEV); |
| 1956 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 1957 | if (!mtd->name) |
| 1958 | mtd->name = type->name; |
| 1959 | |
| 1960 | chip->chipsize = type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1961 | |
| 1962 | /* Newer devices have all the information in additional id bytes */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 1963 | if (!type->pagesize) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1964 | int extid; |
| 1965 | /* The 3rd id byte contains non relevant data ATM */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1966 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1967 | /* The 4th id byte is the important one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1968 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1969 | /* Calc pagesize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 1970 | mtd->writesize = 1024 << (extid & 0x3); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1971 | extid >>= 2; |
| 1972 | /* Calc oobsize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 1973 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1974 | extid >>= 2; |
| 1975 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 1976 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 1977 | extid >>= 2; |
| 1978 | /* Get buswidth information */ |
| 1979 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 1980 | |
| 1981 | } else { |
| 1982 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1983 | * Old devices have chip data hardcoded in the device id table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1984 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 1985 | mtd->erasesize = type->erasesize; |
| 1986 | mtd->writesize = type->pagesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 1987 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 1988 | busw = type->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 1989 | } |
| 1990 | |
| 1991 | /* Try to identify manufacturer */ |
| 1992 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { |
| 1993 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 1994 | break; |
| 1995 | } |
| 1996 | |
| 1997 | /* |
| 1998 | * Check, if buswidth is correct. Hardware drivers should set |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1999 | * chip correct ! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2000 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2001 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2002 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2003 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 2004 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
| 2005 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2006 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2007 | busw ? 16 : 8); |
| 2008 | return ERR_PTR(-EINVAL); |
| 2009 | } |
| 2010 | |
| 2011 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2012 | chip->page_shift = ffs(mtd->writesize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2013 | /* Convert chipsize to number of pages per chip -1. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2014 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2015 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2016 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2017 | ffs(mtd->erasesize) - 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2018 | chip->chip_shift = ffs(chip->chipsize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2019 | |
| 2020 | /* Set the bad block position */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2021 | chip->badblockpos = mtd->writesize > 512 ? |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2022 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
| 2023 | |
| 2024 | /* Get chip options, preserve non chip based options */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2025 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 2026 | chip->options |= type->options & NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2027 | |
| 2028 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2029 | * Set chip as a default. Board drivers can override it, if necessary |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2030 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2031 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2032 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2033 | /* Check if chip is a not a samsung device. Do not clear the |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2034 | * options for chips which are not having an extended id. |
| 2035 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame^] | 2036 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2037 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2038 | |
| 2039 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2040 | if (chip->options & NAND_4PAGE_ARRAY) |
| 2041 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2042 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2043 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2044 | |
| 2045 | /* Do not replace user supplied command function ! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2046 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 2047 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2048 | |
| 2049 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2050 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, |
| 2051 | nand_manuf_ids[maf_idx].name, type->name); |
| 2052 | |
| 2053 | return type; |
| 2054 | } |
| 2055 | |
| 2056 | /* module_text_address() isn't exported, and it's mostly a pointless |
| 2057 | test if this is a module _anyway_ -- they'd have to try _really_ hard |
| 2058 | to call us from in-kernel code if the core NAND support is modular. */ |
| 2059 | #ifdef MODULE |
| 2060 | #define caller_is_module() (1) |
| 2061 | #else |
| 2062 | #define caller_is_module() \ |
| 2063 | module_text_address((unsigned long)__builtin_return_address(0)) |
| 2064 | #endif |
| 2065 | |
| 2066 | /** |
| 2067 | * nand_scan - [NAND Interface] Scan for the NAND device |
| 2068 | * @mtd: MTD device structure |
| 2069 | * @maxchips: Number of chips to scan for |
| 2070 | * |
| 2071 | * This fills out all the uninitialized function pointers |
| 2072 | * with the defaults. |
| 2073 | * The flash ID is read and the mtd/chip structures are |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2074 | * filled with the appropriate values. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2075 | * The mtd->owner field must be set to the module of the caller |
| 2076 | * |
| 2077 | */ |
| 2078 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 2079 | { |
| 2080 | int i, busw, nand_maf_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2081 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2082 | struct nand_flash_dev *type; |
| 2083 | |
| 2084 | /* Many callers got this wrong, so check for it for a while... */ |
| 2085 | if (!mtd->owner && caller_is_module()) { |
| 2086 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); |
| 2087 | BUG(); |
| 2088 | } |
| 2089 | |
| 2090 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2091 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2092 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2093 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2094 | |
| 2095 | /* Read the flash type */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2096 | type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2097 | |
| 2098 | if (IS_ERR(type)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2099 | printk(KERN_WARNING "No NAND device found!!!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2100 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2101 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2102 | } |
| 2103 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2104 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2105 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2106 | chip->select_chip(mtd, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2107 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2108 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2109 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2110 | if (nand_maf_id != chip->read_byte(mtd) || |
| 2111 | type->id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2112 | break; |
| 2113 | } |
| 2114 | if (i > 1) |
| 2115 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2116 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2117 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2118 | chip->numchips = i; |
| 2119 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2120 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2121 | /* Preset the internal oob write buffer */ |
| 2122 | memset(chip->buffers.oobwbuf, 0xff, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2123 | |
| 2124 | /* |
| 2125 | * If no default placement scheme is given, select an appropriate one |
| 2126 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2127 | if (!chip->autooob) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2128 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2129 | case 8: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2130 | chip->autooob = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2131 | break; |
| 2132 | case 16: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2133 | chip->autooob = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2134 | break; |
| 2135 | case 64: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2136 | chip->autooob = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2137 | break; |
| 2138 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2139 | printk(KERN_WARNING "No oob scheme defined for " |
| 2140 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2141 | BUG(); |
| 2142 | } |
| 2143 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2144 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2145 | /* |
| 2146 | * The number of bytes available for the filesystem to place fs |
| 2147 | * dependend oob data |
| 2148 | */ |
Thomas Gleixner | 998cf64 | 2005-04-01 08:21:48 +0100 | [diff] [blame] | 2149 | mtd->oobavail = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2150 | for (i = 0; chip->autooob->oobfree[i][1]; i++) |
| 2151 | mtd->oobavail += chip->autooob->oobfree[i][1]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2152 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2153 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2154 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
| 2155 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2156 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2157 | switch (chip->ecc.mode) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2158 | case NAND_ECC_HW: |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2159 | /* Use standard hwecc read page function ? */ |
| 2160 | if (!chip->ecc.read_page) |
| 2161 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2162 | if (!chip->ecc.write_page) |
| 2163 | chip->ecc.write_page = nand_write_page_hwecc; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2164 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2165 | case NAND_ECC_HW_SYNDROME: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2166 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 2167 | !chip->ecc.hwctl) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2168 | printk(KERN_WARNING "No ECC functions supplied, " |
| 2169 | "Hardware ECC not possible\n"); |
| 2170 | BUG(); |
| 2171 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2172 | /* Use standard syndrome read/write page function ? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2173 | if (!chip->ecc.read_page) |
| 2174 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2175 | if (!chip->ecc.write_page) |
| 2176 | chip->ecc.write_page = nand_write_page_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2177 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2178 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2179 | break; |
| 2180 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 2181 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2182 | chip->ecc.size, mtd->writesize); |
| 2183 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2184 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2185 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2186 | chip->ecc.calculate = nand_calculate_ecc; |
| 2187 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2188 | chip->ecc.read_page = nand_read_page_swecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2189 | chip->ecc.write_page = nand_write_page_swecc; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2190 | chip->ecc.size = 256; |
| 2191 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2192 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2193 | |
| 2194 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2195 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 2196 | "This is not recommended !!\n"); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2197 | chip->ecc.read_page = nand_read_page_swecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2198 | chip->ecc.write_page = nand_write_page_swecc; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2199 | chip->ecc.size = mtd->writesize; |
| 2200 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2201 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2202 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2203 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2204 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2205 | BUG(); |
| 2206 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2207 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2208 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2209 | * Set the number of read / write steps for one page depending on ECC |
| 2210 | * mode |
| 2211 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2212 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
| 2213 | if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2214 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 2215 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2216 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2217 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2218 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 2219 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2220 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2221 | |
| 2222 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2223 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2224 | |
| 2225 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2226 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2227 | |
| 2228 | /* Fill in remaining MTD driver data */ |
| 2229 | mtd->type = MTD_NANDFLASH; |
Joern Engel | 5fa4339 | 2006-05-22 23:18:29 +0200 | [diff] [blame] | 2230 | mtd->flags = MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2231 | mtd->ecctype = MTD_ECC_SW; |
| 2232 | mtd->erase = nand_erase; |
| 2233 | mtd->point = NULL; |
| 2234 | mtd->unpoint = NULL; |
| 2235 | mtd->read = nand_read; |
| 2236 | mtd->write = nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2237 | mtd->read_oob = nand_read_oob; |
| 2238 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2239 | mtd->sync = nand_sync; |
| 2240 | mtd->lock = NULL; |
| 2241 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2242 | mtd->suspend = nand_suspend; |
| 2243 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2244 | mtd->block_isbad = nand_block_isbad; |
| 2245 | mtd->block_markbad = nand_block_markbad; |
| 2246 | |
| 2247 | /* and make the autooob the default one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2248 | memcpy(&mtd->oobinfo, chip->autooob, sizeof(mtd->oobinfo)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2249 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2250 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2251 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2252 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2253 | |
| 2254 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2255 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2256 | } |
| 2257 | |
| 2258 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2259 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2260 | * @mtd: MTD device structure |
| 2261 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2262 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2263 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2264 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2265 | |
| 2266 | #ifdef CONFIG_MTD_PARTITIONS |
| 2267 | /* Deregister partitions */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2268 | del_mtd_partitions(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2269 | #endif |
| 2270 | /* Deregister the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2271 | del_mtd_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2272 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 2273 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2274 | kfree(chip->bbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2275 | } |
| 2276 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2277 | EXPORT_SYMBOL_GPL(nand_scan); |
| 2278 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 2279 | |
| 2280 | static int __init nand_base_init(void) |
| 2281 | { |
| 2282 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 2283 | return 0; |
| 2284 | } |
| 2285 | |
| 2286 | static void __exit nand_base_exit(void) |
| 2287 | { |
| 2288 | led_trigger_unregister_simple(nand_led_trigger); |
| 2289 | } |
| 2290 | |
| 2291 | module_init(nand_base_init); |
| 2292 | module_exit(nand_base_exit); |
| 2293 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2294 | MODULE_LICENSE("GPL"); |
| 2295 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); |
| 2296 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |