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Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02001/*
2 * Watchdog driver for IMX2 and later processors
3 *
4 * Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
Anson Huang1a9c5ef2014-01-13 19:58:34 +08005 * Copyright (C) 2014 Freescale Semiconductor, Inc.
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +02006 *
7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
15 *
16 * MX1: MX2+:
17 * ---- -----
18 * Registers: 32-bit 16-bit
19 * Stopable timer: Yes No
20 * Need to enable clk: No Yes
21 * Halt on suspend: Manual Can be automatic
22 */
23
Xiubo Li30cb0422014-04-04 09:33:24 +080024#include <linux/clk.h>
Jingchang Lu334a9d82014-09-12 15:24:36 +080025#include <linux/delay.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020026#include <linux/init.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080027#include <linux/io.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020028#include <linux/kernel.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020029#include <linux/module.h>
30#include <linux/moduleparam.h>
Xiubo Lif728f4b2014-06-03 10:45:14 +080031#include <linux/of_address.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020032#include <linux/platform_device.h>
Xiubo Lia7977002014-04-04 09:33:25 +080033#include <linux/regmap.h>
Xiubo Li30cb0422014-04-04 09:33:24 +080034#include <linux/watchdog.h>
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020035
36#define DRIVER_NAME "imx2-wdt"
37
38#define IMX2_WDT_WCR 0x00 /* Control Register */
39#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
40#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
41#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
Anson Huang1a9c5ef2014-01-13 19:58:34 +080042#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020043
44#define IMX2_WDT_WSR 0x02 /* Service Register */
45#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
46#define IMX2_WDT_SEQ2 0xAAAA /* -> service sequence 2 */
47
Oskar Schirmer474ef122012-02-16 12:17:45 +000048#define IMX2_WDT_WRSR 0x04 /* Reset Status Register */
49#define IMX2_WDT_WRSR_TOUT (1 << 1) /* -> Reset due to Timeout */
50
Markus Pargmann5fe65ce2014-09-08 09:14:07 +020051#define IMX2_WDT_WMCR 0x08 /* Misc Register */
52
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020053#define IMX2_WDT_MAX_TIME 128
54#define IMX2_WDT_DEFAULT_TIME 60 /* in seconds */
55
56#define WDOG_SEC_TO_COUNT(s) ((s * 2 - 1) << 8)
57
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020058struct imx2_wdt_device {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020059 struct clk *clk;
Xiubo Lia7977002014-04-04 09:33:25 +080060 struct regmap *regmap;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +020061 struct watchdog_device wdog;
62};
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020063
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010064static bool nowayout = WATCHDOG_NOWAYOUT;
65module_param(nowayout, bool, 0);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +020066MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
67 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
68
69
70static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
71module_param(timeout, uint, 0);
72MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
73 __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
74
75static const struct watchdog_info imx2_wdt_info = {
76 .identity = "imx2+ watchdog",
77 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
78};
79
Guenter Roeck4d8b2292016-02-26 17:32:49 -080080static int imx2_wdt_restart(struct watchdog_device *wdog, unsigned long action,
81 void *data)
Jingchang Lu334a9d82014-09-12 15:24:36 +080082{
Damien Riegel2d9d24752015-11-16 12:28:04 -050083 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Jingchang Lu334a9d82014-09-12 15:24:36 +080084 unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
Damien Riegel2d9d24752015-11-16 12:28:04 -050085
Jingchang Lu334a9d82014-09-12 15:24:36 +080086 /* Assert SRS signal */
Fabio Estevam9493c0d2015-10-02 00:25:28 -030087 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
Jingchang Lu334a9d82014-09-12 15:24:36 +080088 /*
89 * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
90 * written twice), we add another two writes to ensure there must be at
91 * least two writes happen in the same one 32kHz clock period. We save
92 * the target check here, since the writes shouldn't be a huge burden
93 * for other platforms.
94 */
Fabio Estevam9493c0d2015-10-02 00:25:28 -030095 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
96 regmap_write(wdev->regmap, IMX2_WDT_WCR, wcr_enable);
Jingchang Lu334a9d82014-09-12 15:24:36 +080097
98 /* wait for reset to assert... */
99 mdelay(500);
100
Damien Riegel2d9d24752015-11-16 12:28:04 -0500101 return 0;
Jingchang Lu334a9d82014-09-12 15:24:36 +0800102}
103
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200104static inline void imx2_wdt_setup(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200105{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200106 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Xiubo Lia7977002014-04-04 09:33:25 +0800107 u32 val;
108
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200109 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200110
Anson Huang1a9c5ef2014-01-13 19:58:34 +0800111 /* Suspend timer in low power mode, write once-only */
112 val |= IMX2_WDT_WCR_WDZST;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200113 /* Strip the old watchdog Time-Out value */
114 val &= ~IMX2_WDT_WCR_WT;
115 /* Generate reset if WDOG times out */
116 val &= ~IMX2_WDT_WCR_WRE;
117 /* Keep Watchdog Disabled */
118 val &= ~IMX2_WDT_WCR_WDE;
119 /* Set the watchdog's Time-Out value */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200120 val |= WDOG_SEC_TO_COUNT(wdog->timeout);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200121
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200122 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200123
124 /* enable the watchdog */
125 val |= IMX2_WDT_WCR_WDE;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200126 regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200127}
128
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200129static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200130{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200131 u32 val;
132
133 regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
134
135 return val & IMX2_WDT_WCR_WDE;
136}
137
138static int imx2_wdt_ping(struct watchdog_device *wdog)
139{
140 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
141
142 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
143 regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
144 return 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200145}
146
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200147static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
148 unsigned int new_timeout)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200149{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200150 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200151
Michael Grzeschik30dd4a82015-05-06 13:17:59 +0200152 wdog->timeout = new_timeout;
153
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200154 regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
Xiubo Lia7977002014-04-04 09:33:25 +0800155 WDOG_SEC_TO_COUNT(new_timeout));
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200156 return 0;
157}
158
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200159static int imx2_wdt_start(struct watchdog_device *wdog)
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200160{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200161 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200162
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800163 if (imx2_wdt_is_running(wdev))
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200164 imx2_wdt_set_timeout(wdog, wdog->timeout);
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800165 else
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200166 imx2_wdt_setup(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200167
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800168 set_bit(WDOG_HW_RUNNING, &wdog->status);
169
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200170 return imx2_wdt_ping(wdog);
171}
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200172
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100173static const struct watchdog_ops imx2_wdt_ops = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200174 .owner = THIS_MODULE,
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200175 .start = imx2_wdt_start,
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200176 .ping = imx2_wdt_ping,
177 .set_timeout = imx2_wdt_set_timeout,
Damien Riegel2d9d24752015-11-16 12:28:04 -0500178 .restart = imx2_wdt_restart,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200179};
180
Krzysztof Kozlowski4bd8ce32015-01-05 10:09:17 +0100181static const struct regmap_config imx2_wdt_regmap_config = {
Xiubo Lia7977002014-04-04 09:33:25 +0800182 .reg_bits = 16,
183 .reg_stride = 2,
184 .val_bits = 16,
185 .max_register = 0x8,
186};
187
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200188static int __init imx2_wdt_probe(struct platform_device *pdev)
189{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200190 struct imx2_wdt_device *wdev;
191 struct watchdog_device *wdog;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200192 struct resource *res;
Xiubo Lia7977002014-04-04 09:33:25 +0800193 void __iomem *base;
194 int ret;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200195 u32 val;
196
197 wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
198 if (!wdev)
199 return -ENOMEM;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200200
201 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Xiubo Lia7977002014-04-04 09:33:25 +0800202 base = devm_ioremap_resource(&pdev->dev, res);
203 if (IS_ERR(base))
204 return PTR_ERR(base);
205
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200206 wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
207 &imx2_wdt_regmap_config);
208 if (IS_ERR(wdev->regmap)) {
Xiubo Lia7977002014-04-04 09:33:25 +0800209 dev_err(&pdev->dev, "regmap init failed\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200210 return PTR_ERR(wdev->regmap);
Xiubo Lia7977002014-04-04 09:33:25 +0800211 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200212
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200213 wdev->clk = devm_clk_get(&pdev->dev, NULL);
214 if (IS_ERR(wdev->clk)) {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200215 dev_err(&pdev->dev, "can't get Watchdog clock\n");
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200216 return PTR_ERR(wdev->clk);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200217 }
218
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200219 wdog = &wdev->wdog;
220 wdog->info = &imx2_wdt_info;
221 wdog->ops = &imx2_wdt_ops;
222 wdog->min_timeout = 1;
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800223 wdog->max_hw_heartbeat_ms = IMX2_WDT_MAX_TIME * 1000;
Vladimir Zapolskiy81351932015-06-02 15:46:18 +0300224 wdog->parent = &pdev->dev;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200225
Fabio Estevamaefb1632015-06-22 01:16:18 -0300226 ret = clk_prepare_enable(wdev->clk);
227 if (ret)
228 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200229
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200230 regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
231 wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200232
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200233 wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
234 if (wdog->timeout != timeout)
235 dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
236 timeout, wdog->timeout);
237
238 platform_set_drvdata(pdev, wdog);
239 watchdog_set_drvdata(wdog, wdev);
240 watchdog_set_nowayout(wdog, nowayout);
Damien Riegel2d9d24752015-11-16 12:28:04 -0500241 watchdog_set_restart_priority(wdog, 128);
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200242 watchdog_init_timeout(wdog, timeout, &pdev->dev);
243
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800244 if (imx2_wdt_is_running(wdev)) {
245 imx2_wdt_set_timeout(wdog, wdog->timeout);
246 set_bit(WDOG_HW_RUNNING, &wdog->status);
247 }
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200248
Markus Pargmann5fe65ce2014-09-08 09:14:07 +0200249 /*
250 * Disable the watchdog power down counter at boot. Otherwise the power
251 * down counter will pull down the #WDOG interrupt line for one clock
252 * cycle.
253 */
254 regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
255
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200256 ret = watchdog_register_device(wdog);
257 if (ret) {
258 dev_err(&pdev->dev, "cannot register watchdog device\n");
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300259 goto disable_clk;
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200260 }
261
262 dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
263 wdog->timeout, nowayout);
264
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200265 return 0;
Fabio Estevamdb11cba2015-06-22 01:16:19 -0300266
267disable_clk:
268 clk_disable_unprepare(wdev->clk);
269 return ret;
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200270}
271
272static int __exit imx2_wdt_remove(struct platform_device *pdev)
273{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200274 struct watchdog_device *wdog = platform_get_drvdata(pdev);
275 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200276
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200277 watchdog_unregister_device(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200278
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200279 if (imx2_wdt_is_running(wdev)) {
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200280 imx2_wdt_ping(wdog);
281 dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
Jingoo Hanbdf49572013-04-29 18:15:53 +0900282 }
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200283 return 0;
284}
285
286static void imx2_wdt_shutdown(struct platform_device *pdev)
287{
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200288 struct watchdog_device *wdog = platform_get_drvdata(pdev);
289 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200290
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200291 if (imx2_wdt_is_running(wdev)) {
292 /*
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800293 * We are running, configure max timeout before reboot
294 * will take place.
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200295 */
Anatolij Gustschinfaad5de2014-04-11 08:57:14 +0200296 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
297 imx2_wdt_ping(wdog);
298 dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200299 }
300}
301
Xiubo Liaefbaf32014-09-22 18:00:52 +0800302#ifdef CONFIG_PM_SLEEP
Xiubo Libbd59002014-10-16 11:44:15 +0800303/* Disable watchdog if it is active or non-active but still running */
Xiubo Liaefbaf32014-09-22 18:00:52 +0800304static int imx2_wdt_suspend(struct device *dev)
305{
306 struct watchdog_device *wdog = dev_get_drvdata(dev);
307 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
308
Xiubo Libbd59002014-10-16 11:44:15 +0800309 /* The watchdog IP block is running */
310 if (imx2_wdt_is_running(wdev)) {
311 imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
312 imx2_wdt_ping(wdog);
Xiubo Libbd59002014-10-16 11:44:15 +0800313 }
Xiubo Liaefbaf32014-09-22 18:00:52 +0800314
315 clk_disable_unprepare(wdev->clk);
316
317 return 0;
318}
319
320/* Enable watchdog and configure it if necessary */
321static int imx2_wdt_resume(struct device *dev)
322{
323 struct watchdog_device *wdog = dev_get_drvdata(dev);
324 struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
Fabio Estevamaefb1632015-06-22 01:16:18 -0300325 int ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800326
Fabio Estevamaefb1632015-06-22 01:16:18 -0300327 ret = clk_prepare_enable(wdev->clk);
328 if (ret)
329 return ret;
Xiubo Liaefbaf32014-09-22 18:00:52 +0800330
331 if (watchdog_active(wdog) && !imx2_wdt_is_running(wdev)) {
Xiubo Libbd59002014-10-16 11:44:15 +0800332 /*
333 * If the watchdog is still active and resumes
334 * from deep sleep state, need to restart the
335 * watchdog again.
Xiubo Liaefbaf32014-09-22 18:00:52 +0800336 */
337 imx2_wdt_setup(wdog);
Guenter Roeck11d7aba2016-02-28 13:12:20 -0800338 }
339 if (imx2_wdt_is_running(wdev)) {
Xiubo Liaefbaf32014-09-22 18:00:52 +0800340 imx2_wdt_set_timeout(wdog, wdog->timeout);
341 imx2_wdt_ping(wdog);
Xiubo Liaefbaf32014-09-22 18:00:52 +0800342 }
343
344 return 0;
345}
346#endif
347
348static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops, imx2_wdt_suspend,
349 imx2_wdt_resume);
350
Shawn Guof5a427e2011-07-18 11:15:21 +0800351static const struct of_device_id imx2_wdt_dt_ids[] = {
352 { .compatible = "fsl,imx21-wdt", },
353 { /* sentinel */ }
354};
Niels de Vos813296a2013-07-29 09:38:18 +0200355MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
Shawn Guof5a427e2011-07-18 11:15:21 +0800356
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200357static struct platform_driver imx2_wdt_driver = {
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200358 .remove = __exit_p(imx2_wdt_remove),
359 .shutdown = imx2_wdt_shutdown,
360 .driver = {
361 .name = DRIVER_NAME,
Xiubo Liaefbaf32014-09-22 18:00:52 +0800362 .pm = &imx2_wdt_pm_ops,
Shawn Guof5a427e2011-07-18 11:15:21 +0800363 .of_match_table = imx2_wdt_dt_ids,
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200364 },
365};
366
Fabio Porcedda1cb92042013-01-09 12:15:27 +0100367module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200368
369MODULE_AUTHOR("Wolfram Sang");
370MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
371MODULE_LICENSE("GPL v2");
Wolfram Sangbb2fd8a2010-04-29 10:03:17 +0200372MODULE_ALIAS("platform:" DRIVER_NAME);