blob: 20387fe09c617a4ce6d214548e019dbee1d3f7ec [file] [log] [blame]
Michael Hennerichdc26aec2008-11-18 17:48:22 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Michael Hennerichdc26aec2008-11-18 17:48:22 +08005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2
Michael Hennerichdc26aec2008-11-18 17:48:22 +08007 */
8
9#include <linux/device.h>
10#include <linux/platform_device.h>
11#include <linux/mtd/mtd.h>
Barry Songf1cb6462009-08-03 04:40:36 +000012#include <linux/mtd/physmap.h>
Michael Hennerichdc26aec2008-11-18 17:48:22 +080013#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#include <linux/irq.h>
17#include <linux/interrupt.h>
18#include <asm/bfin5xx_spi.h>
19#include <asm/dma.h>
20#include <asm/gpio.h>
21#include <asm/nand.h>
22#include <asm/portmux.h>
23#include <asm/dpmc.h>
24#include <linux/input.h>
25
26/*
27 * Name the Board for the /proc/cpuinfo
28 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080029const char bfin_board_name[] = "ADI BF538-EZKIT";
Michael Hennerichdc26aec2008-11-18 17:48:22 +080030
31/*
32 * Driver needs to know address, irq and flag pin.
33 */
34
35
36#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
37static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40};
41#endif
42
43#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Michael Hennerichdc26aec2008-11-18 17:48:22 +080044#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000045static struct resource bfin_uart0_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +080046 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000047 .start = UART0_THR,
48 .end = UART0_GCTL+2,
Michael Hennerichdc26aec2008-11-18 17:48:22 +080049 .flags = IORESOURCE_MEM,
50 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +080051 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000052 .start = IRQ_UART0_RX,
53 .end = IRQ_UART0_RX+1,
54 .flags = IORESOURCE_IRQ,
Michael Hennerichdc26aec2008-11-18 17:48:22 +080055 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +080056 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000057 .start = IRQ_UART0_ERROR,
58 .end = IRQ_UART0_ERROR,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = CH_UART0_TX,
63 .end = CH_UART0_TX,
64 .flags = IORESOURCE_DMA,
65 },
66 {
67 .start = CH_UART0_RX,
68 .end = CH_UART0_RX,
69 .flags = IORESOURCE_DMA,
70 },
71#ifdef CONFIG_BFIN_UART0_CTSRTS
72 { /* CTS pin */
73 .start = GPIO_PG7,
74 .end = GPIO_PG7,
75 .flags = IORESOURCE_IO,
76 },
77 { /* RTS pin */
78 .start = GPIO_PG6,
79 .end = GPIO_PG6,
80 .flags = IORESOURCE_IO,
Michael Hennerichdc26aec2008-11-18 17:48:22 +080081 },
82#endif
83};
84
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +000085unsigned short bfin_uart0_peripherals[] = {
86 P_UART0_TX, P_UART0_RX, 0
87};
88
89static struct platform_device bfin_uart0_device = {
90 .name = "bfin-uart",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
93 .resource = bfin_uart0_resources,
94 .dev = {
95 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
96 },
97};
98#endif
99#ifdef CONFIG_SERIAL_BFIN_UART1
100static struct resource bfin_uart1_resources[] = {
101 {
102 .start = UART1_THR,
103 .end = UART1_GCTL+2,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .start = IRQ_UART1_RX,
108 .end = IRQ_UART1_RX+1,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = IRQ_UART1_ERROR,
113 .end = IRQ_UART1_ERROR,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = CH_UART1_TX,
118 .end = CH_UART1_TX,
119 .flags = IORESOURCE_DMA,
120 },
121 {
122 .start = CH_UART1_RX,
123 .end = CH_UART1_RX,
124 .flags = IORESOURCE_DMA,
125 },
126};
127
128unsigned short bfin_uart1_peripherals[] = {
129 P_UART1_TX, P_UART1_RX, 0
130};
131
132static struct platform_device bfin_uart1_device = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800133 .name = "bfin-uart",
134 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000135 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
136 .resource = bfin_uart1_resources,
137 .dev = {
138 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
139 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800140};
141#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000142#ifdef CONFIG_SERIAL_BFIN_UART2
143static struct resource bfin_uart2_resources[] = {
144 {
145 .start = UART2_THR,
146 .end = UART2_GCTL+2,
147 .flags = IORESOURCE_MEM,
148 },
149 {
150 .start = IRQ_UART2_RX,
151 .end = IRQ_UART2_RX+1,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = IRQ_UART2_ERROR,
156 .end = IRQ_UART2_ERROR,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = CH_UART2_TX,
161 .end = CH_UART2_TX,
162 .flags = IORESOURCE_DMA,
163 },
164 {
165 .start = CH_UART2_RX,
166 .end = CH_UART2_RX,
167 .flags = IORESOURCE_DMA,
168 },
169};
170
171unsigned short bfin_uart2_peripherals[] = {
172 P_UART2_TX, P_UART2_RX, 0
173};
174
175static struct platform_device bfin_uart2_device = {
176 .name = "bfin-uart",
177 .id = 2,
178 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
179 .resource = bfin_uart2_resources,
180 .dev = {
181 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
182 },
183};
184#endif
185#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800186
187#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800188#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800189static struct resource bfin_sir0_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800190 {
191 .start = 0xFFC00400,
192 .end = 0xFFC004FF,
193 .flags = IORESOURCE_MEM,
194 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800195 {
196 .start = IRQ_UART0_RX,
197 .end = IRQ_UART0_RX+1,
198 .flags = IORESOURCE_IRQ,
199 },
200 {
201 .start = CH_UART0_RX,
202 .end = CH_UART0_RX+1,
203 .flags = IORESOURCE_DMA,
204 },
205};
206static struct platform_device bfin_sir0_device = {
207 .name = "bfin_sir",
208 .id = 0,
209 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
210 .resource = bfin_sir0_resources,
211};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800212#endif
213#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800214static struct resource bfin_sir1_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800215 {
216 .start = 0xFFC02000,
217 .end = 0xFFC020FF,
218 .flags = IORESOURCE_MEM,
219 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800220 {
221 .start = IRQ_UART1_RX,
222 .end = IRQ_UART1_RX+1,
223 .flags = IORESOURCE_IRQ,
224 },
225 {
226 .start = CH_UART1_RX,
227 .end = CH_UART1_RX+1,
228 .flags = IORESOURCE_DMA,
229 },
230};
231static struct platform_device bfin_sir1_device = {
232 .name = "bfin_sir",
233 .id = 1,
234 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
235 .resource = bfin_sir1_resources,
236};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800237#endif
238#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800239static struct resource bfin_sir2_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800240 {
241 .start = 0xFFC02100,
242 .end = 0xFFC021FF,
243 .flags = IORESOURCE_MEM,
244 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800245 {
246 .start = IRQ_UART2_RX,
247 .end = IRQ_UART2_RX+1,
248 .flags = IORESOURCE_IRQ,
249 },
250 {
251 .start = CH_UART2_RX,
252 .end = CH_UART2_RX+1,
253 .flags = IORESOURCE_DMA,
254 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800255};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800256static struct platform_device bfin_sir2_device = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800257 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800258 .id = 2,
259 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
260 .resource = bfin_sir2_resources,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800261};
262#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800263#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800264
Sonic Zhangdf5de262009-09-23 05:01:56 +0000265#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
266#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
267static struct resource bfin_sport0_uart_resources[] = {
268 {
269 .start = SPORT0_TCR1,
270 .end = SPORT0_MRCS3+4,
271 .flags = IORESOURCE_MEM,
272 },
273 {
274 .start = IRQ_SPORT0_RX,
275 .end = IRQ_SPORT0_RX+1,
276 .flags = IORESOURCE_IRQ,
277 },
278 {
279 .start = IRQ_SPORT0_ERROR,
280 .end = IRQ_SPORT0_ERROR,
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285unsigned short bfin_sport0_peripherals[] = {
286 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
287 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
288};
289
290static struct platform_device bfin_sport0_uart_device = {
291 .name = "bfin-sport-uart",
292 .id = 0,
293 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
294 .resource = bfin_sport0_uart_resources,
295 .dev = {
296 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
297 },
298};
299#endif
300#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
301static struct resource bfin_sport1_uart_resources[] = {
302 {
303 .start = SPORT1_TCR1,
304 .end = SPORT1_MRCS3+4,
305 .flags = IORESOURCE_MEM,
306 },
307 {
308 .start = IRQ_SPORT1_RX,
309 .end = IRQ_SPORT1_RX+1,
310 .flags = IORESOURCE_IRQ,
311 },
312 {
313 .start = IRQ_SPORT1_ERROR,
314 .end = IRQ_SPORT1_ERROR,
315 .flags = IORESOURCE_IRQ,
316 },
317};
318
319unsigned short bfin_sport1_peripherals[] = {
320 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
321 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
322};
323
324static struct platform_device bfin_sport1_uart_device = {
325 .name = "bfin-sport-uart",
326 .id = 1,
327 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
328 .resource = bfin_sport1_uart_resources,
329 .dev = {
330 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
331 },
332};
333#endif
334#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
335static struct resource bfin_sport2_uart_resources[] = {
336 {
337 .start = SPORT2_TCR1,
338 .end = SPORT2_MRCS3+4,
339 .flags = IORESOURCE_MEM,
340 },
341 {
342 .start = IRQ_SPORT2_RX,
343 .end = IRQ_SPORT2_RX+1,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = IRQ_SPORT2_ERROR,
348 .end = IRQ_SPORT2_ERROR,
349 .flags = IORESOURCE_IRQ,
350 },
351};
352
353unsigned short bfin_sport2_peripherals[] = {
354 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
355 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
356};
357
358static struct platform_device bfin_sport2_uart_device = {
359 .name = "bfin-sport-uart",
360 .id = 2,
361 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
362 .resource = bfin_sport2_uart_resources,
363 .dev = {
364 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
365 },
366};
367#endif
368#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
369static struct resource bfin_sport3_uart_resources[] = {
370 {
371 .start = SPORT3_TCR1,
372 .end = SPORT3_MRCS3+4,
373 .flags = IORESOURCE_MEM,
374 },
375 {
376 .start = IRQ_SPORT3_RX,
377 .end = IRQ_SPORT3_RX+1,
378 .flags = IORESOURCE_IRQ,
379 },
380 {
381 .start = IRQ_SPORT3_ERROR,
382 .end = IRQ_SPORT3_ERROR,
383 .flags = IORESOURCE_IRQ,
384 },
385};
386
387unsigned short bfin_sport3_peripherals[] = {
388 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
389 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
390};
391
392static struct platform_device bfin_sport3_uart_device = {
393 .name = "bfin-sport-uart",
394 .id = 3,
395 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
396 .resource = bfin_sport3_uart_resources,
397 .dev = {
398 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
399 },
400};
401#endif
402#endif
403
Barry Song706a01b2009-11-02 07:29:07 +0000404#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
405unsigned short bfin_can_peripherals[] = {
406 P_CAN0_RX, P_CAN0_TX, 0
407};
408
409static struct resource bfin_can_resources[] = {
410 {
411 .start = 0xFFC02A00,
412 .end = 0xFFC02FFF,
413 .flags = IORESOURCE_MEM,
414 },
415 {
416 .start = IRQ_CAN_RX,
417 .end = IRQ_CAN_RX,
418 .flags = IORESOURCE_IRQ,
419 },
420 {
421 .start = IRQ_CAN_TX,
422 .end = IRQ_CAN_TX,
423 .flags = IORESOURCE_IRQ,
424 },
425 {
426 .start = IRQ_CAN_ERROR,
427 .end = IRQ_CAN_ERROR,
428 .flags = IORESOURCE_IRQ,
429 },
430};
431
432static struct platform_device bfin_can_device = {
433 .name = "bfin_can",
434 .num_resources = ARRAY_SIZE(bfin_can_resources),
435 .resource = bfin_can_resources,
436 .dev = {
437 .platform_data = &bfin_can_peripherals, /* Passed to driver */
438 },
439};
440#endif
441
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800442/*
443 * USB-LAN EzExtender board
444 * Driver needs to know address, irq and flag pin.
445 */
446#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000447#include <linux/smc91x.h>
448
449static struct smc91x_platdata smc91x_info = {
450 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
451 .leda = RPC_LED_100_10,
452 .ledb = RPC_LED_TX_RX,
453};
454
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800455static struct resource smc91x_resources[] = {
456 {
457 .name = "smc91x-regs",
458 .start = 0x20310300,
459 .end = 0x20310300 + 16,
460 .flags = IORESOURCE_MEM,
461 }, {
462 .start = IRQ_PF0,
463 .end = IRQ_PF0,
464 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
465 },
466};
467static struct platform_device smc91x_device = {
468 .name = "smc91x",
469 .id = 0,
470 .num_resources = ARRAY_SIZE(smc91x_resources),
471 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000472 .dev = {
473 .platform_data = &smc91x_info,
474 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800475};
476#endif
477
478#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
479/* all SPI peripherals info goes here */
480#if defined(CONFIG_MTD_M25P80) \
481 || defined(CONFIG_MTD_M25P80_MODULE)
482/* SPI flash chip (m25p16) */
483static struct mtd_partition bfin_spi_flash_partitions[] = {
484 {
485 .name = "bootloader(spi)",
486 .size = 0x00040000,
487 .offset = 0,
488 .mask_flags = MTD_CAP_ROM
489 }, {
490 .name = "linux kernel(spi)",
491 .size = 0x1c0000,
492 .offset = 0x40000
493 }
494};
495
496static struct flash_platform_data bfin_spi_flash_data = {
497 .name = "m25p80",
498 .parts = bfin_spi_flash_partitions,
499 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
500 .type = "m25p16",
501};
502
503static struct bfin5xx_spi_chip spi_flash_chip_info = {
504 .enable_dma = 0, /* use dma transfer with this chip*/
505 .bits_per_word = 8,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800506};
507#endif
508
509#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
510#include <linux/spi/ad7879.h>
511static const struct ad7879_platform_data bfin_ad7879_ts_info = {
512 .model = 7879, /* Model = AD7879 */
513 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
514 .pressure_max = 10000,
515 .pressure_min = 0,
516 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
517 .acquisition_time = 1, /* 4us acquisition time per sample */
518 .median = 2, /* do 8 measurements */
519 .averaging = 1, /* take the average of 4 middle samples */
520 .pen_down_acc_interval = 255, /* 9.4 ms */
521 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
522 .gpio_default = 1, /* During initialization set GPIO = HIGH */
523};
524#endif
525
526#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
527static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
528 .enable_dma = 0,
529 .bits_per_word = 16,
530};
531#endif
532
533#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
534#include <asm/bfin-lq035q1.h>
535
536static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
537 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
538 .use_bl = 0, /* let something else control the LCD Blacklight */
539 .gpio_bl = GPIO_PF7,
540};
541
542static struct resource bfin_lq035q1_resources[] = {
543 {
544 .start = IRQ_PPI_ERROR,
545 .end = IRQ_PPI_ERROR,
546 .flags = IORESOURCE_IRQ,
547 },
548};
549
550static struct platform_device bfin_lq035q1_device = {
551 .name = "bfin-lq035q1",
552 .id = -1,
553 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
554 .resource = bfin_lq035q1_resources,
555 .dev = {
556 .platform_data = &bfin_lq035q1_data,
557 },
558};
559#endif
560
561#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
562static struct bfin5xx_spi_chip spidev_chip_info = {
563 .enable_dma = 0,
564 .bits_per_word = 8,
565};
566#endif
567
568#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
569static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
570 .enable_dma = 0,
571 .bits_per_word = 8,
572};
573#endif
574
575static struct spi_board_info bf538_spi_board_info[] __initdata = {
576#if defined(CONFIG_MTD_M25P80) \
577 || defined(CONFIG_MTD_M25P80_MODULE)
578 {
579 /* the modalias must be the same as spi device driver name */
580 .modalias = "m25p80", /* Name of spi_driver for this device */
581 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
582 .bus_num = 0, /* Framework bus number */
583 .chip_select = 1, /* SPI_SSEL1*/
584 .platform_data = &bfin_spi_flash_data,
585 .controller_data = &spi_flash_chip_info,
586 .mode = SPI_MODE_3,
587 },
588#endif
589#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
590 {
591 .modalias = "ad7879",
592 .platform_data = &bfin_ad7879_ts_info,
593 .irq = IRQ_PF3,
594 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
595 .bus_num = 0,
596 .chip_select = 1,
597 .controller_data = &spi_ad7879_chip_info,
598 .mode = SPI_CPHA | SPI_CPOL,
599 },
600#endif
601#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
602 {
603 .modalias = "bfin-lq035q1-spi",
604 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
605 .bus_num = 0,
606 .chip_select = 2,
607 .controller_data = &lq035q1_spi_chip_info,
608 .mode = SPI_CPHA | SPI_CPOL,
609 },
610#endif
611#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
612 {
613 .modalias = "spidev",
614 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
615 .bus_num = 0,
616 .chip_select = 1,
617 .controller_data = &spidev_chip_info,
618 },
619#endif
620};
621
622/* SPI (0) */
623static struct resource bfin_spi0_resource[] = {
624 [0] = {
625 .start = SPI0_REGBASE,
626 .end = SPI0_REGBASE + 0xFF,
627 .flags = IORESOURCE_MEM,
628 },
629 [1] = {
630 .start = CH_SPI0,
631 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000632 .flags = IORESOURCE_DMA,
633 },
634 [2] = {
635 .start = IRQ_SPI0,
636 .end = IRQ_SPI0,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800637 .flags = IORESOURCE_IRQ,
638 }
639};
640
641/* SPI (1) */
642static struct resource bfin_spi1_resource[] = {
643 [0] = {
644 .start = SPI1_REGBASE,
645 .end = SPI1_REGBASE + 0xFF,
646 .flags = IORESOURCE_MEM,
647 },
648 [1] = {
649 .start = CH_SPI1,
650 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000651 .flags = IORESOURCE_DMA,
652 },
653 [2] = {
654 .start = IRQ_SPI1,
655 .end = IRQ_SPI1,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800656 .flags = IORESOURCE_IRQ,
657 }
658};
659
660/* SPI (2) */
661static struct resource bfin_spi2_resource[] = {
662 [0] = {
663 .start = SPI2_REGBASE,
664 .end = SPI2_REGBASE + 0xFF,
665 .flags = IORESOURCE_MEM,
666 },
667 [1] = {
668 .start = CH_SPI2,
669 .end = CH_SPI2,
Barry Song769cfc02009-09-10 04:32:47 +0000670 .flags = IORESOURCE_DMA,
671 },
672 [2] = {
673 .start = IRQ_SPI2,
674 .end = IRQ_SPI2,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800675 .flags = IORESOURCE_IRQ,
676 }
677};
678
679/* SPI controller data */
680static struct bfin5xx_spi_master bf538_spi_master_info0 = {
681 .num_chipselect = 8,
682 .enable_dma = 1, /* master has the ability to do dma transfer */
683 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
684};
685
686static struct platform_device bf538_spi_master0 = {
687 .name = "bfin-spi",
688 .id = 0, /* Bus number */
689 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
690 .resource = bfin_spi0_resource,
691 .dev = {
692 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
693 },
694};
695
696static struct bfin5xx_spi_master bf538_spi_master_info1 = {
697 .num_chipselect = 8,
698 .enable_dma = 1, /* master has the ability to do dma transfer */
699 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
700};
701
702static struct platform_device bf538_spi_master1 = {
703 .name = "bfin-spi",
704 .id = 1, /* Bus number */
705 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
706 .resource = bfin_spi1_resource,
707 .dev = {
708 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
709 },
710};
711
712static struct bfin5xx_spi_master bf538_spi_master_info2 = {
713 .num_chipselect = 8,
714 .enable_dma = 1, /* master has the ability to do dma transfer */
715 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
716};
717
718static struct platform_device bf538_spi_master2 = {
719 .name = "bfin-spi",
720 .id = 2, /* Bus number */
721 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
722 .resource = bfin_spi2_resource,
723 .dev = {
724 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
725 },
726};
727
728#endif /* spi master and devices */
729
730#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
731static struct resource bfin_twi0_resource[] = {
732 [0] = {
733 .start = TWI0_REGBASE,
734 .end = TWI0_REGBASE + 0xFF,
735 .flags = IORESOURCE_MEM,
736 },
737 [1] = {
738 .start = IRQ_TWI0,
739 .end = IRQ_TWI0,
740 .flags = IORESOURCE_IRQ,
741 },
742};
743
744static struct platform_device i2c_bfin_twi0_device = {
745 .name = "i2c-bfin-twi",
746 .id = 0,
747 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
748 .resource = bfin_twi0_resource,
749};
750
751#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
752static struct resource bfin_twi1_resource[] = {
753 [0] = {
754 .start = TWI1_REGBASE,
755 .end = TWI1_REGBASE + 0xFF,
756 .flags = IORESOURCE_MEM,
757 },
758 [1] = {
759 .start = IRQ_TWI1,
760 .end = IRQ_TWI1,
761 .flags = IORESOURCE_IRQ,
762 },
763};
764
765static struct platform_device i2c_bfin_twi1_device = {
766 .name = "i2c-bfin-twi",
767 .id = 1,
768 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
769 .resource = bfin_twi1_resource,
770};
771#endif
772#endif
773
774#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
775#include <linux/gpio_keys.h>
776
777static struct gpio_keys_button bfin_gpio_keys_table[] = {
778 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
779};
780
781static struct gpio_keys_platform_data bfin_gpio_keys_data = {
782 .buttons = bfin_gpio_keys_table,
783 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
784};
785
786static struct platform_device bfin_device_gpiokeys = {
787 .name = "gpio-keys",
788 .dev = {
789 .platform_data = &bfin_gpio_keys_data,
790 },
791};
792#endif
793
794static const unsigned int cclk_vlev_datasheet[] =
795{
796/*
797 * Internal VLEV BF538SBBC1533
798 ****temporarily using these values until data sheet is updated
799 */
800 VRPAIR(VLEV_100, 150000000),
801 VRPAIR(VLEV_100, 250000000),
802 VRPAIR(VLEV_110, 276000000),
803 VRPAIR(VLEV_115, 301000000),
804 VRPAIR(VLEV_120, 525000000),
805 VRPAIR(VLEV_125, 550000000),
806 VRPAIR(VLEV_130, 600000000),
807};
808
809static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
810 .tuple_tab = cclk_vlev_datasheet,
811 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
812 .vr_settling_time = 25 /* us */,
813};
814
815static struct platform_device bfin_dpmc = {
816 .name = "bfin dpmc",
817 .dev = {
818 .platform_data = &bfin_dmpc_vreg_data,
819 },
820};
821
Barry Songf1cb6462009-08-03 04:40:36 +0000822#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
823static struct mtd_partition ezkit_partitions[] = {
824 {
825 .name = "bootloader(nor)",
826 .size = 0x40000,
827 .offset = 0,
828 }, {
829 .name = "linux kernel(nor)",
830 .size = 0x180000,
831 .offset = MTDPART_OFS_APPEND,
832 }, {
833 .name = "file system(nor)",
834 .size = MTDPART_SIZ_FULL,
835 .offset = MTDPART_OFS_APPEND,
836 }
837};
838
839static struct physmap_flash_data ezkit_flash_data = {
840 .width = 2,
841 .parts = ezkit_partitions,
842 .nr_parts = ARRAY_SIZE(ezkit_partitions),
843};
844
845static struct resource ezkit_flash_resource = {
846 .start = 0x20000000,
847#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
848 .end = 0x202fffff,
849#else
850 .end = 0x203fffff,
851#endif
852 .flags = IORESOURCE_MEM,
853};
854
855static struct platform_device ezkit_flash_device = {
856 .name = "physmap-flash",
857 .id = 0,
858 .dev = {
859 .platform_data = &ezkit_flash_data,
860 },
861 .num_resources = 1,
862 .resource = &ezkit_flash_resource,
863};
864#endif
865
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800866static struct platform_device *cm_bf538_devices[] __initdata = {
867
868 &bfin_dpmc,
869
870#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
871 &rtc_device,
872#endif
873
874#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +0000875#ifdef CONFIG_SERIAL_BFIN_UART0
876 &bfin_uart0_device,
877#endif
878#ifdef CONFIG_SERIAL_BFIN_UART1
879 &bfin_uart1_device,
880#endif
881#ifdef CONFIG_SERIAL_BFIN_UART2
882 &bfin_uart2_device,
883#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800884#endif
885
886#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
887 &bf538_spi_master0,
888 &bf538_spi_master1,
889 &bf538_spi_master2,
890#endif
891
892#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
893 &i2c_bfin_twi0_device,
894 &i2c_bfin_twi1_device,
895#endif
896
897#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800898#ifdef CONFIG_BFIN_SIR0
899 &bfin_sir0_device,
900#endif
901#ifdef CONFIG_BFIN_SIR1
902 &bfin_sir1_device,
903#endif
904#ifdef CONFIG_BFIN_SIR2
905 &bfin_sir2_device,
906#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800907#endif
908
Sonic Zhangdf5de262009-09-23 05:01:56 +0000909#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
910#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
911 &bfin_sport0_uart_device,
912#endif
913#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
914 &bfin_sport1_uart_device,
915#endif
916#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
917 &bfin_sport2_uart_device,
918#endif
919#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
920 &bfin_sport3_uart_device,
921#endif
922#endif
923
Barry Song706a01b2009-11-02 07:29:07 +0000924#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
925 &bfin_can_device,
926#endif
927
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800928#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
929 &smc91x_device,
930#endif
931
932#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
933 &bfin_lq035q1_device,
934#endif
935
936#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
937 &bfin_device_gpiokeys,
938#endif
Mike Frysingerc97618d2009-01-07 23:14:38 +0800939
Barry Songf1cb6462009-08-03 04:40:36 +0000940#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
941 &ezkit_flash_device,
942#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800943};
944
945static int __init ezkit_init(void)
946{
947 printk(KERN_INFO "%s(): registering device resources\n", __func__);
948 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
949
950#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
951 spi_register_board_info(bf538_spi_board_info,
952 ARRAY_SIZE(bf538_spi_board_info));
953#endif
954
955 return 0;
956}
957
958arch_initcall(ezkit_init);
Sonic Zhangc13ce9f2009-09-23 09:37:46 +0000959
960static struct platform_device *ezkit_early_devices[] __initdata = {
961#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
962#ifdef CONFIG_SERIAL_BFIN_UART0
963 &bfin_uart0_device,
964#endif
965#ifdef CONFIG_SERIAL_BFIN_UART1
966 &bfin_uart1_device,
967#endif
968#ifdef CONFIG_SERIAL_BFIN_UART2
969 &bfin_uart2_device,
970#endif
971#endif
972
973#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
974#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
975 &bfin_sport0_uart_device,
976#endif
977#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
978 &bfin_sport1_uart_device,
979#endif
980#ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
981 &bfin_sport2_uart_device,
982#endif
983#ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
984 &bfin_sport3_uart_device,
985#endif
986#endif
987};
988
989void __init native_machine_early_platform_add_devices(void)
990{
991 printk(KERN_INFO "register early platform devices\n");
992 early_platform_add_devices(ezkit_early_devices,
993 ARRAY_SIZE(ezkit_early_devices));
994}