blob: 3eb77080366a21db38065493a5a29d241d4320cc [file] [log] [blame]
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +08001/*
2 * Copyright (C) 2006 Intel Corp.
3 * Tom Long Nguyen (tom.l.nguyen@intel.com)
4 * Zhang Yanmin (yanmin.zhang@intel.com)
5 *
6 */
7
8#ifndef _AERDRV_H_
9#define _AERDRV_H_
10
Alexey Dobriyane8edc6e2007-05-21 01:22:52 +040011#include <linux/workqueue.h>
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080012#include <linux/pcieport_if.h>
13#include <linux/aer.h>
Huang Ying634deb02009-04-24 10:45:23 +080014#include <linux/interrupt.h>
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080015
16#define AER_NONFATAL 0
17#define AER_FATAL 1
18#define AER_CORRECTABLE 2
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080019
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080020#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
21 PCI_EXP_RTCTL_SENFEE| \
22 PCI_EXP_RTCTL_SEFEE)
23#define ROOT_PORT_INTR_ON_MESG_MASK (PCI_ERR_ROOT_CMD_COR_EN| \
24 PCI_ERR_ROOT_CMD_NONFATAL_EN| \
25 PCI_ERR_ROOT_CMD_FATAL_EN)
26#define ERR_COR_ID(d) (d & 0xffff)
27#define ERR_UNCOR_ID(d) (d >> 16)
28
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080029#define AER_ERROR_SOURCES_MAX 100
30
31#define AER_LOG_TLP_MASKS (PCI_ERR_UNC_POISON_TLP| \
32 PCI_ERR_UNC_ECRC| \
33 PCI_ERR_UNC_UNSUP| \
34 PCI_ERR_UNC_COMP_ABORT| \
35 PCI_ERR_UNC_UNX_COMP| \
36 PCI_ERR_UNC_MALF_TLP)
37
Zhang, Yanmin3d5505c2009-06-16 13:35:16 +080038#define AER_MAX_MULTI_ERR_DEVICES 5 /* Not likely to have more */
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080039struct aer_err_info {
Zhang, Yanmin3d5505c2009-06-16 13:35:16 +080040 struct pci_dev *dev[AER_MAX_MULTI_ERR_DEVICES];
41 int error_dev_num;
Hidetoshi Seto273024d2009-09-07 17:16:20 +090042
43 unsigned int id:16;
44
45 unsigned int severity:2; /* 0:NONFATAL | 1:FATAL | 2:COR */
46 unsigned int __pad1:5;
47 unsigned int multi_error_valid:1;
48
49 unsigned int first_error:5;
50 unsigned int __pad2:2;
51 unsigned int tlp_header_valid:1;
52
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080053 unsigned int status; /* COR/UNCOR Error Status */
Hidetoshi Seto0d90c3a2009-09-07 17:12:25 +090054 unsigned int mask; /* COR/UNCOR Error Mask */
Huang Yingc413d762011-02-21 13:54:43 +080055 struct aer_header_log_regs tlp; /* TLP Header */
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080056};
57
58struct aer_err_source {
59 unsigned int status;
60 unsigned int id;
61};
62
63struct aer_rpc {
64 struct pcie_device *rpd; /* Root Port device */
65 struct work_struct dpc_handler;
66 struct aer_err_source e_sources[AER_ERROR_SOURCES_MAX];
67 unsigned short prod_idx; /* Error Producer Index */
68 unsigned short cons_idx; /* Error Consumer Index */
69 int isr;
70 spinlock_t e_lock; /*
71 * Lock access to Error Status/ID Regs
72 * and error producer/consumer index
73 */
74 struct mutex rpc_mutex; /*
75 * only one thread could do
76 * recovery on the same
Uwe Kleine-König1b3c3712007-02-17 19:23:03 +010077 * root port hierarchy
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080078 */
79 wait_queue_head_t wait_release;
80};
81
82struct aer_broadcast_data {
83 enum pci_channel_state state;
84 enum pci_ers_result result;
85};
86
87static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
88 enum pci_ers_result new)
89{
Zhang, Yanmin029091d2009-04-30 14:48:29 +080090 if (new == PCI_ERS_RESULT_NONE)
91 return orig;
92
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +080093 switch (orig) {
94 case PCI_ERS_RESULT_CAN_RECOVER:
95 case PCI_ERS_RESULT_RECOVERED:
96 orig = new;
97 break;
98 case PCI_ERS_RESULT_DISCONNECT:
99 if (new == PCI_ERS_RESULT_NEED_RESET)
100 orig = new;
101 break;
102 default:
103 break;
104 }
105
106 return orig;
107}
108
109extern struct bus_type pcie_port_bus_type;
Hidetoshi Seto89713422010-04-15 13:21:27 +0900110extern void aer_do_secondary_bus_reset(struct pci_dev *dev);
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800111extern int aer_init(struct pcie_device *dev);
David Howells65f27f32006-11-22 14:55:48 +0000112extern void aer_isr(struct work_struct *work);
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800113extern void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
Hidetoshi Seto79e4b892009-09-07 17:16:45 +0900114extern void aer_print_port_info(struct pci_dev *dev, struct aer_err_info *info);
Huang Ying634deb02009-04-24 10:45:23 +0800115extern irqreturn_t aer_irq(int irq, void *context);
Zhang, Yanmin8d29bfb2007-06-06 11:44:16 +0800116
117#ifdef CONFIG_ACPI
118extern int aer_osc_setup(struct pcie_device *pciedev);
119#else
120static inline int aer_osc_setup(struct pcie_device *pciedev)
121{
122 return 0;
123}
124#endif
Zhang, Yanmin6c2b3742006-07-31 15:21:33 +0800125
Huang Yingaffb72c2010-05-18 14:35:16 +0800126#ifdef CONFIG_ACPI_APEI
127extern int pcie_aer_get_firmware_first(struct pci_dev *pci_dev);
128#else
129static inline int pcie_aer_get_firmware_first(struct pci_dev *pci_dev)
130{
131 if (pci_dev->__aer_firmware_first_valid)
132 return pci_dev->__aer_firmware_first;
133 return 0;
134}
135#endif
136
137static inline void pcie_aer_force_firmware_first(struct pci_dev *pci_dev,
138 int enable)
139{
140 pci_dev->__aer_firmware_first = !!enable;
141 pci_dev->__aer_firmware_first_valid = 1;
142}
Hidetoshi Setoc9a91882009-09-07 17:07:29 +0900143#endif /* _AERDRV_H_ */